CN106445575A - Program rewriting method and apparatus - Google Patents

Program rewriting method and apparatus Download PDF

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CN106445575A
CN106445575A CN201510498546.9A CN201510498546A CN106445575A CN 106445575 A CN106445575 A CN 106445575A CN 201510498546 A CN201510498546 A CN 201510498546A CN 106445575 A CN106445575 A CN 106445575A
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jump instruction
springboard code
indirect jump
springboard
code
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CN106445575B (en
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邱吉
徐成华
宋贵环
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Loongson Technology Corp Ltd
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Loongson Technology Corp Ltd
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Abstract

The invention provides a program rewriting method and apparatus. The method comprises the steps of creating a trampoline code for a target register of an indirect jump instruction in a to-be-processed program, and obtaining a trampoline code segment, wherein the trampoline code is used for constricting a PC (Program Counter) value corresponding to the indirect jump instruction in Kseg0; adding the trampoline code segment to an initial position of an address space of the to-be-processed program to obtain a new version program and a mapping table; and modifying the address of the target register of the indirect jump instruction located outside the trampoline code in the new version program to be an address of the trampoline code in the new version program, thereby obtaining a modified new version program, and enabling a processor to execute the trampoline code by jump when executing the address of the indirect jump instruction located outside the trampoline code. According to the method provided by the invention, the technical problem of program stop or crash caused by the fact that the processor performs instruction fetching on a wrong PC is avoided, so that the executive efficiency of the processor is improved.

Description

The rewrite method of program and device
Technical field
The present invention relates to computer technology, more particularly, to a kind of rewrite method of program and device.
Background technology
Processor, in execution phase, is frequently encountered on execution route and various redirects finger Order, for example, direct jump instruction or indirect jump instruction etc..After computing device is to jump instruction, Processor can jump in the destination address of this jump instruction, then executes the finger in this destination address Order.But, for indirect jump instruction, general, before program performing, processor is Do not know indirect jump instruction destination address to be jumped to, but adopt during program performing Go to guess the destination address of indirect jump instruction with the method for branch prediction.The method of above-mentioned branch prediction Destination address two aspect that whether can execute to redirecting and redirect is predicted, and it typically can be right A plurality of indirect jump instruction in program execution path carries out continuous processing and prediction, the transfer of processor Conjecture function can ensure that processor can allow processor roll back to correct status when guessing wrong, and continues to hold OK.
For indirect jump instruction, processor guesses that the destination address of this indirect jump instruction is specifically permissible For：According to the history jump information of this indirect jump instruction, processor guesses that this indirect jump instruction corresponds to Destination register in program counter (Program Counter, abbreviation PC) value, this PC value It is exactly the destination address of this indirect jump instruction, it is stored in the destination register of indirect jump instruction In.After this PC value guessed by processor, fetching operation will be sent according to this PC value.But, When the PC value of conjecture does not allow to carry out the address space (such as Kseg1) of fetching operation positioned at processor When it is possible to cause processor that status error occurs, thus leading to program determination or deadlock.
Therefore, the PC value that processor is guessed how is avoided to exceed legal fetching address space, with Avoid program termination or deadlock, become technical problem urgently to be resolved hurrily at present.
Content of the invention
The present invention provides a kind of rewrite method of program and device, in order to solve cannot avoid in prior art When redirecting, the PC value because being guessed exceeds legal fetching address space, the program brought to processor The technical problem terminating or crashing.
In a first aspect, the present invention provides a kind of rewrite method of program, including：
Destination register for the indirect jump instruction in pending program builds springboard code, obtains springboard Code segment, described springboard code is used for by corresponding for described indirect jump instruction PC value of program counter about Bundle is in Kseg0；
Described springboard code segment is added the original position of the address space to described pending program, obtain Redaction program and mapping table；Wherein, described mapping table includes described springboard code in described redaction journey Mapping relations between address in sequence and the destination register of described indirect jump instruction；
According to described mapping table, by the indirect jump outside described springboard code in described redaction program The destination register turning instruction is revised as address in described redaction program for the described springboard code, obtains Revised redaction program, so that processor is outside being located at described springboard code described in going between When connecing the address that jump instruction is located, redirect the described springboard code of execution.
In conjunction with a first aspect, in the first possible embodiment of first aspect, described springboard code Including the first springboard code and/or the second springboard code, described indirect jump instruction includes the first indirect instruction And/or the second indirect jump instruction, the corresponding destination register of described first indirect jump instruction posts for R1 Storage, the corresponding destination register of described second indirect jump instruction is the first depositor；
The described destination register for the indirect jump instruction in pending program builds springboard code, obtains Springboard code segment, described springboard code is used for corresponding for described indirect jump instruction program counter PC Value constrains in Kseg0, including：
Build described first springboard code for the corresponding R1 depositor of the described first indirect jump instruction, obtain Described springboard code segment；Or,
Build described second springboard code for corresponding first depositor of the described second indirect jump instruction, obtain Obtain described springboard code segment；Or,
Build described first springboard code for the corresponding R1 depositor of the described first indirect jump instruction, with And, it is that corresponding first depositor of the described second indirect jump instruction builds described second springboard code, and According to described first springboard code and described second springboard code, obtain described springboard code segment；
Wherein, described first springboard code is used for corresponding for the described first indirect jump instruction positioned at described A PC value in R1 depositor constrains in Kseg0；Described second springboard code is used for described the Corresponding the 2nd PC value in described first depositor of two indirect jump instructions constrains in Kseg0.
In conjunction with the first possible embodiment of first aspect, in the possible reality of the second of first aspect Apply in mode, described mapping table include address in described redaction program for the described springboard code with described Mapping relations between the destination register of jump instruction indirectly, specially：
Described mapping table include address in described redaction program for the described first springboard code with described The corresponding relation of R1 depositor, and/or, address in described redaction program for the described second springboard code Corresponding relation with described first depositor.
In conjunction with the possible embodiment of the second of first aspect, in the third possible reality of first aspect Apply in mode, described indirect jump instruction outside described springboard code includes：Positioned at described first The 3rd indirect jump instruction outside springboard code, and/or, outside described second springboard code Four indirect jump instructions；Wherein, described 3rd indirect jump instruction and described first indirect jump instruction Command content is identical, and the destination register of described 3rd indirect jump instruction is R1 depositor, and described the Four indirect jump instructions are identical with the command content of the described second indirect jump instruction, and described 4th indirect The destination register of jump instruction is the first depositor；
Described according to described mapping table, between being located in described redaction program outside described springboard code The destination register connecing jump instruction is revised as address in described redaction program for the described springboard code, Obtain revised redaction program, so that processor is outside being located at described springboard code described in going to Indirect jump instruction when redirect execution described springboard code segment, including：
According to described mapping table, the target of the 3rd indirect jump instruction described in described redaction program is posted Storage is revised as address in described redaction program for the described first springboard code, after obtaining described rewriting Redaction program so that described processor is going to the address that the described 3rd indirect jump instruction is located When redirect execution described first springboard code；Or,
According to described mapping table, the target of the 4th indirect jump instruction described in described redaction program is posted Storage is revised as address in described redaction program for the described second springboard code, after obtaining described rewriting Redaction program so that described computing device be located to the described 4th indirect jump instruction address when Redirect the described second springboard code of execution；Or,
According to described mapping table, the target of the 3rd indirect jump instruction described in described redaction program is posted Storage is revised as address in described redaction program for the described first springboard code, and by described redaction The destination register of the 4th indirect jump instruction described in program is revised as described second springboard code described Address in redaction program, obtains described revised redaction program, so that processor is going to Execution described first springboard code is redirected during the address that described 3rd indirect jump instruction is located, and, Described second jump of execution is redirected to the described 4th indirect jump instruction during the address that described computing device is located Plate code.
Any one of the third possible embodiment in conjunction with first aspect to first aspect, first In 4th kind of possible embodiment of aspect, described first springboard code is used for indirectly jumping described first Turn the corresponding PC value in described R1 depositor of instruction and constrain in Kseg0, specially：
Described first springboard code, whether correct for determining the described PC value guessed, will A described PC value constrains in Kseg0.
In conjunction with the 4th kind of possible embodiment of first aspect, in the 5th kind of possible reality of first aspect Apply in mode, described first springboard code includes at least one do-nothing instruction and described first indirect jump instruction； Described do-nothing instruction is used for determining whether guessed a PC value is correct；Methods described also includes：
Execute described revised redaction program, and be located when going to the described 3rd indirect jump instruction Address when, redirect execution described first springboard code；
When determining that guessed a PC value is correct after executing described do-nothing instruction, continue executing with described the The described first indirect jump instruction in one springboard code；
When determining guessed a PC value mistake after executing described do-nothing instruction, rollback to described first Springboard code on the address in described redaction program, to re-execute described first springboard code.
Any one of the third possible embodiment in conjunction with first aspect to first aspect, first In 6th kind of possible embodiment of aspect, described second springboard code includes step-by-step and instruction and second Jump instruction indirectly；
Described second springboard code is used for posting corresponding for the described second indirect jump instruction positioned at described first The 2nd PC value in storage constrains in Kseg0, specially：
Described step-by-step and instruction, for by immediate 0xDFFF in described R1 depositor, FFFF and institute State corresponding first depositor of the second indirect jump instruction address space carry out step-by-step with by described the Two PC values constrain in Kseg0.
In conjunction with the first possible embodiment of first aspect, in the 7th kind of possible reality of first aspect Apply in mode, described according to described first springboard code with described second springboard code, obtain described springboard Code segment, specifically includes：
By described first springboard code and described second springboard code according to corresponding register number from little To longer spread, obtain described springboard code segment.
In conjunction with the third possible embodiment of first aspect, in the 8th kind of possible reality of first aspect Apply in mode, described first indirect jump instruction is jr reg1Or jalr reg1, described second redirects finger indirectly Make as jr regNOr jalr regN, described N is the positive integer more than 1 less than or equal to 31, described first jump Address in described redaction program for the plate code is StubR1, described second springboard code is in described new edition Address in this program is StubRN；
Then described according to described mapping table, by the target of the 3rd indirect jump instruction in described redaction program Depositor is revised as address in described redaction program for the described first springboard code, specifically includes：
According to described mapping table, by the 3rd indirect jump instruction jr reg in described redaction program1In reg1 It is revised as StubR1, or, by jalr reg1In reg1It is revised as StubR1；
Described according to described mapping table, the target of the 4th indirect jump instruction in described redaction program is posted Storage is revised as address in described redaction program for the described second springboard code, specifically includes：
By the 4th indirect jump instruction jr reg in described redaction programNIn regNIt is revised as StubRN, Or, by jalr regNIn regNIt is revised as StubRN.
In conjunction with the 8th kind of possible embodiment of first aspect, in the 9th kind of possible reality of first aspect Apply in mode, when described first depositor is RNWhen, second in described second springboard code redirects indirectly Instruct as jr regNOr jalr regN.
Second aspect, the present invention provides a kind of rewriting device of program, including：
Springboard code construction module, for the destination register for the indirect jump instruction in pending program Build springboard code, obtain springboard code segment, described springboard code is used for described indirect jump instruction pair The PC value of program counter answered constrains in Kseg0；
First acquisition module, for the springboard code segment being obtained described springboard code construction acquisition module Add the original position of the address space to described pending program, obtain redaction program and mapping table； Wherein, described mapping table include address in described redaction program for the described springboard code with described indirectly Mapping relations between the destination register of jump instruction；
Second acquisition module, for the described mapping table being obtained according to described first acquisition module, will be described In redaction program, the destination register of the indirect jump instruction outside described springboard code is revised as institute State address in described redaction program for the springboard code, obtain revised redaction program, so that place During the address that indirect jump instruction outside being located at described springboard code described in going to for the reason device is located, jump Turn and execute described springboard code.
In conjunction with second aspect, in the first possible embodiment of second aspect, described springboard code Including the first springboard code and/or the second springboard code, described indirect jump instruction includes the first indirect instruction And/or the second indirect jump instruction, the corresponding destination register of described first indirect jump instruction posts for R1 Storage, the corresponding destination register of described second indirect jump instruction is the first depositor；
Then described springboard code construction module, specifically for for the corresponding R1 of the described first indirect jump instruction Depositor builds described first springboard code, obtains described springboard code segment；
Or, described springboard code construction module, specifically for corresponding to for the described second indirect jump instruction First depositor build described second springboard code, obtain described springboard code segment；
Or, described springboard code construction module, specifically for corresponding to for the described first indirect jump instruction R1 depositor build described first springboard code, and, be that the described second indirect jump instruction is corresponding First depositor builds described second springboard code, and according to described first springboard code and described second jump Plate code, obtains described springboard code segment；
Wherein, described first springboard code is used for corresponding for the described first indirect jump instruction positioned at described A PC value in R1 depositor constrains in Kseg0；Described second springboard code is used for described the Corresponding the 2nd PC value in described first depositor of two indirect jump instructions constrains in Kseg0.
In conjunction with the first possible embodiment of second aspect, in the possible reality of the second of second aspect Apply in mode, described mapping table include address in described redaction program for the described springboard code with described Mapping relations between the destination register of jump instruction indirectly, specially：
Described mapping table include address in described redaction program for the described first springboard code with described The corresponding relation of R1 depositor, and/or, address in described redaction program for the described second springboard code Corresponding relation with described first depositor.
In conjunction with the possible embodiment of the second of second aspect, in the third possible reality of second aspect Apply in mode, described indirect jump instruction outside described springboard code includes：Positioned at described first The 3rd indirect jump instruction outside springboard code, and/or, outside described second springboard code Four indirect jump instructions；Wherein, described 3rd indirect jump instruction and described first indirect jump instruction Command content is identical, and the destination register of described 3rd indirect jump instruction is R1 depositor, and described the Four indirect jump instructions are identical with the command content of the described second indirect jump instruction, and described 4th indirect The destination register of jump instruction is the first depositor；
Then described second acquisition module, specifically for the described mapping being obtained according to described first acquisition module Table, the destination register of the 3rd indirect jump instruction described in described redaction program is revised as described Address in described redaction program for the one springboard code, obtains described revised redaction program, with Described processor is made to redirect execution described the when going to address that the described 3rd indirect jump instruction is located One springboard code；
Or, described second acquisition module, described in obtaining according to described first acquisition module Mapping table, the destination register of the 4th indirect jump instruction described in described redaction program is revised as institute State address in described redaction program for the second springboard code, obtain described revised redaction program, So that described computing device be located to the described 4th indirect jump instruction address when redirect execution described the Two springboard codes；
Or, described second acquisition module, described in obtaining according to described first acquisition module Mapping table, the destination register of the 3rd indirect jump instruction described in described redaction program is revised as institute State address in described redaction program for the first springboard code, and by described in described redaction program The destination register of four indirect jump instructions is revised as described second springboard code in described redaction program Address, obtain described revised redaction program, so that processor is to go to the described 3rd indirect Execution described first springboard code is redirected during the address that jump instruction is located, and, hold in described processor The described second springboard code of execution is redirected to the described 4th indirect jump instruction during the address that row is located.
Any one of the third possible embodiment in conjunction with second aspect to second aspect, second In 4th kind of possible embodiment of aspect, described first springboard code is used for indirectly jumping described first Turn the corresponding PC value in described R1 depositor of instruction and constrain in Kseg0, specially：
Described first springboard code, whether correct for determining the described PC value guessed, will A described PC value constrains in Kseg0.
In conjunction with the 4th kind of possible embodiment of second aspect, in the 5th kind of possible reality of second aspect Apply in mode, described first springboard code includes at least one do-nothing instruction and described first indirect jump instruction； Described do-nothing instruction is used for determining whether guessed a PC value is correct；Described device also includes：
Processing module, for executing described revised redaction program, and ought go between the described 3rd When connecing the address that jump instruction is located, redirect the described first springboard code of execution；
Judge performing module, the PC value for determining guessed after executing described do-nothing instruction is correct When, indicate that what described processing module continued executing with described first springboard code described first redirects finger indirectly Order；And during for determining guessed a PC value mistake after executing described do-nothing instruction, instruction is described Processing module rollback to described first springboard code on the address in described redaction program, again to hold The described first springboard code of row.
Any one of the third possible embodiment in conjunction with second aspect to second aspect, second In 6th kind of possible embodiment of aspect, described second springboard code includes step-by-step and instruction and second Jump instruction indirectly；
Described second springboard code is used for posting corresponding for the described second indirect jump instruction positioned at described first The 2nd PC value in storage constrains in Kseg0, specially：
Described step-by-step and instruction, for by immediate 0xDFFF in described R1 depositor, FFFF and institute State corresponding first depositor of the second indirect jump instruction address space carry out step-by-step with by described the Two PC values constrain in Kseg0.
In conjunction with the first possible embodiment of second aspect, in the 7th kind of possible reality of second aspect Apply in mode, described springboard code construction module, specifically for according to described first springboard code and described Second springboard code, obtains described springboard code segment, specially：
Described springboard code construction module, specifically for by described first springboard code and described second springboard Code arranges from small to large according to corresponding register number, obtains described springboard code segment.
In conjunction with the third possible embodiment of second aspect, in the 8th kind of possible reality of second aspect Apply in mode, described first indirect jump instruction is jr reg1Or jalr reg1, described second redirects finger indirectly Make as jr regNOr jalr regN, described N is the positive integer more than 1 less than or equal to 31, described first jump Address in described redaction program for the plate code is StubR1, described second springboard code is in described new edition Address in this program is StubRN；
Then described second acquisition module, specifically for according to described mapping table, by described redaction program 3rd indirect jump instruction jr reg1In reg1It is revised as StubR1, or, by jalr reg1In reg1 It is revised as StubR1；And, specifically for by the 4th indirect jump instruction jr reg in described redaction programN In regNIt is revised as StubRN, or, by jalr regNIn regNIt is revised as StubRN.
In conjunction with the 8th kind of possible embodiment of second aspect, in the 9th kind of possible reality of second aspect Apply in mode, when described first depositor is RNWhen, second in described second springboard code redirects indirectly Instruct as jr regNOr jalr regN.
The rewrite method of program and device that the present invention provides, by for indirectly redirecting in pending program The destination register of instruction builds springboard code, obtains springboard code segment, and this springboard code segment is added To the home address space of pending program, obtain redaction program and mapping table, and according to this mapping The destination register of the indirect jump instruction outside this springboard code in redaction program is revised as by table This springboard code address in redaction program, obtains revised redaction program, so that processor Redirect this springboard code of execution when going to the indirect jump instruction outside springboard code.Due to this The PC being guessed value can be constrained in Kseg0 by springboard code, therefore avoids processor in mistake PC on carry out the technical problem of program determination that fetching brings or deadlock, improve the execution of processor Efficiency.
Brief description
The schematic flow sheet of the rewrite method embodiment one of the program that Fig. 1 provides for the present invention；
The schematic flow sheet of the rewrite method embodiment two of the program that Fig. 2 provides for the present invention；
The schematic flow sheet of the rewrite method embodiment three of the program that Fig. 3 provides for the present invention；
The schematic flow sheet of the rewrite method example IV of the program that Fig. 4 provides for the present invention；
The schematic flow sheet of the rewrite method embodiment five of the program that Fig. 5 provides for the present invention；
The rewrite process schematic diagram of the indirect jump instruction in the pending program that Fig. 6 provides for the present invention；
The structural representation of the rewriting device embodiment one of the program that Fig. 7 provides for the present invention；
The structural representation of rewriting side's device embodiment two of the program that Fig. 8 provides for the present invention.
Specific embodiment
Method according to the present invention goes for processor and carries out in configuration processor instructing the field redirecting Scape, the executive agent of the method can be processor or the communication equipment being integrated with processor, Such as computer, panel computer, server etc..Following embodiments so that executive agent is as processor are as a example come Illustrate.
It should be noted that the present embodiments relate to " A, and/or, B ", can include " A ", Three kinds of situations of " B ", " A and B ".
The present embodiments relate to method it is intended to solve prior art in processor cannot be avoided to redirect When, because the PC value guessed exceeds legal fetching address space, the program determination bringing or deadlock Technical problem.
With specifically embodiment, technical scheme is described in detail below.These tools below The embodiment of body can be combined with each other, may be in some embodiments for same or analogous concept or process Repeat no more.
The schematic flow sheet of the rewrite method embodiment one of the program that Fig. 1 provides for the present invention.The present embodiment The method being related to is by building jump for the corresponding destination register of indirect jump instruction in pending program Plate code, and constructed springboard code is added to pending program the program forming redaction, from And according to address in redaction program for the springboard code, original indirect jump instruction is written over, with Make computer can redirect the corresponding springboard code of execution when going to above-mentioned indirect jump instruction, and then Processor is allow to guarantee that guessed PC value is located at legal fetching by executing this springboard code The detailed process of address space.As shown in figure 1, the method includes：
S101：Destination register for the indirect jump instruction in pending program builds springboard code, obtains Springboard code segment, described springboard code is used for corresponding for described indirect jump instruction program counter PC Value constrains in Kseg0.
Specifically, the program that pending program will execute for processor, this pending program includes At least one indirect jump instruction, this each indirect jump instruction all corresponds to corresponding destination register. It should be noted that destination register can lead to for any one in addition to R0 in 32 general registers With depositor, in the present embodiment, processor can build to the destination register of each indirect jump instruction Springboard code, optionally, when the type of the indirect jump instruction included by pending program is different, Constructed springboard code is possible to difference.When processor has built springboard generation to all indirect jump instructions After code, springboard code segment is obtained according to these springboard codes.
General, processor in executing pending device program, between being related in pending program Connect jump instruction, processor typically can guess the destination address of this indirect jump instruction, is specifically as follows： Processor guesses the corresponding target of this indirect jump instruction according to the history jump information of this indirect jump instruction PC value in depositor, this PC value is exactly the destination address of this indirect jump instruction, and it is stored in this Indirectly in the corresponding destination register of jump instruction.After this PC value guessed by processor, will basis This PC value sends fetching operation, but, when the PC value of conjecture does not allow to carry out fetching behaviour positioned at processor It is possible to cause processor that status error occurs during address space (the such as Kseg1) making, thus Lead to program determination or deadlock.Therefore, in the present embodiment, the above-mentioned springboard generation for destination register structure Code, it is mainly used in for the destination address (i.e. above-mentioned PC value) of indirect jump instruction constraining in Kseg0 Interior, it is hereby ensured that indirect jump instruction may be located in legal address space, do not result in and redirect Mistake.Optionally, this springboard code can be for having the function of judging whether PC value is located in Kseg0 Instruction, or can also be the instruction through certain logical operationss, PC value being limited in Keg0.
It should be noted that the address space of above-mentioned legal address space Kseg0 be (0x8000,0000 0x9FFFF, FFFF), common 512M；Above-mentioned do not allow to carry out the address space of the Kseg1 of fetching operation For (0xA000,0000 0xBFFFF, FFFF), common 512M.
S102：Described springboard code segment is added the original position of the address space to described pending program, Obtain redaction program and mapping table；Wherein, described mapping table includes described springboard code in described new edition Mapping relations between address in this program and the destination register of described indirect jump instruction.
Specifically, when processor, above-mentioned springboard code segment is stored the original position to above-mentioned pending program Afterwards, processor can obtain a redaction program and mapping table, and this redaction program includes above-mentioned springboard generation Code section and original pending program.Because above-mentioned springboard code is to deposit with the target of indirect jump instruction Device is corresponding, therefore above-mentioned mapping table can include address in redaction program for this springboard code and with Mapping relations between the destination register of the corresponding indirect jump instruction of this springboard code, i.e. a target Depositor has mapping relations between the corresponding address of springboard code.
S103：According to described mapping table, outside being located at described springboard code in described redaction program The destination register of jump instruction is revised as ground in described redaction program for the described springboard code indirectly Location, obtains revised redaction program, so that processor is going to described be located at described springboard code Outside indirect jump instruction be located address when, redirect the described springboard code of execution.
Specifically, after processor obtains program and the above-mentioned mapping table of redaction, processor is to new edition In this program, the indirect jump instruction outside springboard code is rewritten, and obtains revised redaction Program, that is, processor by above-mentioned redaction program be located at springboard code outside indirect jump instruction mesh Scalar register file is revised as this address in redaction program for springboard code.Therefore, processor puts in place in execution During indirect jump instruction outside above-mentioned springboard code, can directly redirect the described springboard code of execution.
Because processor is when going to the indirect jump instruction outside above-mentioned springboard code, guessed PC value be likely to be mistake, therefore when computing device is between outside above-mentioned springboard code When connecing jump instruction, can directly redirect the described springboard code of execution, because this springboard code can be by institute The PC value of conjecture constrains in legal address space Kseg0, therefore avoids process to a certain extent Device carries out fetching on wrong PC.Therefore, the method that the present invention provides, processor can be avoided to hold During row jump instruction, the PC value because being guessed exceeds legal fetching address space, and the program brought is eventually The technical problem stopped or crash, improves the execution efficiency of processor.
The rewrite method of the program that the present invention provides, by for the indirect jump instruction in pending program Destination register builds springboard code, obtains springboard code segment, and this springboard code segment is added to waiting to locate The home address space of reason program, obtains redaction program and mapping table, and will be new according to this mapping table In version program, the destination register of the indirect jump instruction outside this springboard code is revised as this springboard Address in redaction program for the code, obtains revised redaction program, so that processor is in execution To redirecting this springboard code of execution during indirect jump instruction outside springboard code.Due to this springboard generation The PC being guessed value can be constrained in Kseg0 by code, therefore avoids processor on wrong PC Carry out the technical problem of program determination that fetching brings or deadlock, improve the execution efficiency of processor.
The schematic flow sheet of the rewrite method embodiment two of the program that Fig. 2 provides for the present invention.The present embodiment Refer to include the first springboard code when springboard code, indirect jump instruction includes first and indirectly redirects finger Order, and when the indirect jump instruction outside the above-mentioned code positioned at springboard is three indirect jump instruction, process Device can guarantee that by executing this first springboard code guessed a PC value is located at legal fetching The detailed process of address space.Wherein, this corresponding destination register of the first indirect jump instruction is R1 Depositor, described 3rd indirect jump instruction is identical with the command content of the described first indirect jump instruction, And the destination register of described 3rd indirect jump instruction is also R1 depositor.As shown in Fig. 2 the method Including：
S201：Build for the corresponding R1 depositor of the indirect jump instruction of described first in pending program First springboard code, obtains described springboard code segment, and described first springboard code is used between described first Connect the corresponding PC value in described R1 depositor of jump instruction to constrain in Kseg0.
Specifically, in the present embodiment, will be indirect for the indirect jump instruction referred to as first jumping to R1 depositor Jump instruction, i.e. the first indirect jump instruction is corresponding with R1 depositor.Optionally, this first is jumped indirectly Turning instruction can be jr reg1, can also be jalr reg1, can also be other jump instructions.Work as process Device is after the corresponding R1 depositor of the first indirect jump instruction builds the first springboard code, according to this first jump Plate code obtains springboard code segment.General, processor in executing pending device program, for waiting to locate The indirect jump instruction being related in reason program, processor typically can guess the target of this indirect jump instruction Address, is specifically as follows：According to the history jump information of this indirect jump instruction, processor guesses that this is indirect PC value in the corresponding destination register of jump instruction, this PC value is exactly the mesh of this indirect jump instruction Mark address, it is stored in the corresponding destination register of this indirect jump instruction.When this is guessed by processor After PC value, fetching operation will be sent according to this PC value, but, process when the PC value of conjecture is located at Device does not allow during address space (the such as Kseg1) carrying out fetching operation it is possible to cause processor Status error occurs, thus leading to program determination or deadlock.Therefore, in the present embodiment, above-mentioned for R1 The first springboard code that depositor builds, it is mainly used in first indirectly being redirected finger by what processor guessed The PC value in the corresponding depositor positioned at R1 is made to constrain in Kseg0.Therefore, because above-mentioned The PC value that one springboard code is guessed to processor has binding function so that processor is guessed A PC value will not be located at illegal fetching space in.As for the first springboard code in pending journey How to set in sequence and how to use, may refer to the specific descriptions of following S202 and S203.
S202：Described springboard code segment is added the original position of the address space to described pending program, Obtain redaction program and mapping table；Wherein, described mapping table includes described first springboard code described Address in redaction program and the corresponding relation of described R1 depositor.
S203：According to described mapping table, by the 3rd indirect jump instruction described in described redaction program Destination register is revised as address in described redaction program for the described first springboard code, obtains described Revised redaction program, so that described processor is going to the described 3rd indirect jump instruction place Address when redirect execution described first springboard code.
Specifically, the redaction program that above-mentioned processor is obtained include the 3rd indirect jump instruction, first Springboard code and other instructions, the 3rd indirect jump instruction is positioned at described in above-mentioned redaction program Indirect jump instruction outside first springboard code, the 3rd indirect jump instruction and the first indirect jump instruction Command content identical, and the destination register of described 3rd indirect jump instruction be R1 depositor.
After processor obtains program and the above-mentioned mapping table of redaction, processor is in redaction program The 3rd indirect jump instruction rewritten, obtain revised redaction program, that is, processor will be above-mentioned The destination register of the 3rd indirect jump instruction in redaction program is revised as described first springboard code and exists Address in redaction program, therefore, processor is when going to the address at the 3rd indirect jump instruction place The described first springboard code of execution can directly be redirected.
Because processor is when executing the address that the 3rd indirect jump instruction is located, the PC being guessed Value be likely to be mistake (because content and the first indirect jump instruction of the 3rd indirect jump instruction is interior Hold identical, so the corresponding PC value of the 3rd indirect jump instruction of processor conjecture is also a PC value), Therefore when the address that computing device is located to the 3rd indirect jump instruction, can directly redirect execution the One springboard code, because a PC value can be constrained in Kseg0 by this first springboard code, therefore Avoid processor to a certain extent and fetching is carried out on wrong PC.Therefore, the method that the present invention provides, Processor can be avoided when executing jump instruction, the PC value because being guessed exceeds legal fetching Address space, the program determination bringing or the technical problem of deadlock, improve the execution efficiency of processor.
The rewrite method of the program that the present invention provides, by depositing for the corresponding R1 of the first indirect jump instruction Device builds the first springboard code, obtains springboard code segment, and this springboard code segment is added to pending journey The home address space of sequence, obtains redaction program and mapping table, and according to this mapping table by redaction In program, the destination register of the 3rd indirect jump instruction is revised as the first springboard code in redaction program Address, obtain revised redaction program so that processor is going to the 3rd indirect jump instruction When redirect execution the first springboard code.Because a PC value can be constrained in by this first springboard code In Kseg0, therefore avoid processor and program determination or the deadlock that fetching is brought is carried out on wrong PC Technical problem, improve the execution efficiency of processor.
The schematic flow sheet of the rewrite method embodiment three of the program that Fig. 3 provides for the present invention.The present embodiment Refer to include the second springboard code when springboard code, indirect jump instruction includes second and indirectly redirects finger Order, and when the indirect jump instruction outside the above-mentioned code positioned at springboard is four indirect jump instruction, process Device can guarantee that by executing this second springboard code the 2nd guessed PC value is located at legal fetching The detailed process of address space.Wherein, this corresponding destination register of the second indirect jump instruction is first Depositor, this first depositor can be for removing R0 depositor and R1 depositor in 32 general registers Outside a general register, described 4th indirect jump instruction and described second indirect jump instruction Command content is identical, and the destination register of described 4th indirect jump instruction is also the first depositor.As Shown in Fig. 3, the method includes：
S301：Build described second springboard generation for corresponding first depositor of the described second indirect jump instruction Code, obtains described springboard code segment, and described second springboard code is used for the described second indirect jump instruction Corresponding the 2nd PC value in described first depositor constrains in Kseg0.
Specifically, in the present embodiment, the indirect jump instruction of the first depositor will be jumped to referred to as between second Connect jump instruction, i.e. the second indirect jump instruction is corresponding with the first depositor.In the present embodiment, will 32 general registers are classified, and wherein, in R0 depositor, (R0 is normal to a single class depositor , there is not the situation generation that indirect jump instruction jumps to R0 in value 0), R1 depositor is single one Class depositor (R1 depositor is note depositor), R2-R31 is a single class depositor, is referred to as For the first depositor.Above-mentioned second indirect jump instruction can be jr regN, can also be jalr regN, its In, N is the positive integer more than 1 less than or equal to 31, and the second indirect jump instruction can also be jumped for other Turn instruction.When processor is that corresponding first depositor of the second indirect jump instruction builds the second springboard code Afterwards, springboard code segment is obtained according to this second springboard code.General, processor is executing pending device In program, for the indirect jump instruction being related in pending program, processor typically can be guessed between this Connect the destination address of jump instruction, be specifically as follows：Processor is jumped according to the history of this indirect jump instruction PC value in the corresponding destination register of transfering the letter breath this indirect jump instruction of conjecture, this PC value is exactly this The indirectly destination address of jump instruction, it is stored in the corresponding destination register of this indirect jump instruction. After this PC value guessed by processor, fetching operation will be sent according to this PC value, but, work as conjecture PC value positioned at processor do not allow address space (the such as Kseg1) carrying out fetching operation when, just have It is likely to result in processor and status error occurs, thus leading to program determination or deadlock.Therefore, the present embodiment In, above-mentioned is the second springboard code that the first depositor builds, and it is mainly used in being guessed processor Corresponding the 2nd PC value being located in the first depositor of second indirect jump instruction constrains in Kseg0. Therefore, because the 2nd PC value that above-mentioned second springboard code is guessed to processor has binding function, The 2nd PC value that processor is guessed will not be located in illegal fetching space.As for the second jump How plate code sets in pending program and how to use, and may refer to following S302 and S303 Specific descriptions.
S302：Described springboard code segment is added the original position of the address space to described pending program, Obtain redaction program and mapping table；Wherein, described mapping table includes described second springboard code described Address in redaction program and the corresponding relation of described first depositor.
S303：According to described mapping table, by the 4th indirect jump instruction described in described redaction program Destination register is revised as address in described redaction program for the described second springboard code, obtains described Revised redaction program, so that what described computing device was located to the described 4th indirect jump instruction Execution described second springboard code is redirected during address.
Specifically, the redaction program that above-mentioned processor is obtained include the 4th indirect jump instruction, second Springboard code and other instructions, the 4th indirect jump instruction is positioned at described in above-mentioned redaction program Indirect jump instruction outside second springboard code, the 4th indirect jump instruction and the second indirect jump instruction Command content identical, and the destination register of described 4th indirect jump instruction be the first depositor.
After processor obtains program and the above-mentioned mapping table of redaction, processor is in redaction program The 4th indirect jump instruction rewritten, obtain revised redaction program, that is, processor will be above-mentioned The destination register of the 4th indirect jump instruction in redaction program is revised as described second springboard code and exists Address in redaction program, therefore, processor is when going to the address at the 4th indirect jump instruction place The described second springboard code of execution can directly be redirected.
Because processor is when executing four indirect jump instructions, the 2nd PC value guessed is likely to be Mistake (because the content of the 4th indirect jump instruction is identical with the content of the second indirect jump instruction, institute The corresponding PC value of the 4th indirect jump instruction with processor conjecture is also the 2nd PC value), therefore work as place When reason device goes to the address that the 4th indirect jump instruction is located, can directly redirect the second springboard generation of execution Code, because the 2nd PC value can be constrained in Kseg0 by this second springboard code, therefore to a certain degree On avoid processor fetching carried out on wrong PC.Therefore, the method that the present invention provides, can keep away Exempt from processor when executing jump instruction, it is empty that the 2nd PC value because being guessed exceeds legal fetching address Between, the program determination bringing or the technical problem of deadlock, improve the execution efficiency of processor.
The rewrite method of the program that the present invention provides, by posting for the second indirect jump instruction corresponding first Storage builds the second springboard code, obtains springboard code segment, and this springboard code segment is added to pending The home address space of program, obtains redaction program and mapping table, and according to this mapping table by new edition In this program, the destination register of the 4th indirect jump instruction is revised as the second springboard code in redaction program In address, obtain revised redaction program, so that processor redirects finger indirectly going to the 4th Execution the second springboard code is redirected during the address that order is located.Because this second springboard code can be by the 2nd PC Value constrains in Kseg0, therefore avoids processor and carries out the program that fetching is brought on wrong PC The technical problem terminating or crashing, improves the execution efficiency of processor.
The schematic flow sheet of the rewrite method example IV of the program that Fig. 4 provides for the present invention.The present embodiment Different from above-described embodiment two and embodiment three, the present embodiment refers to include the first jump when springboard code Plate code and the second springboard code, indirect jump instruction includes the first indirect jump instruction and second and indirectly jumps Turn instruction, and the indirect jump instruction outside the above-mentioned code positioned at springboard include the 3rd indirect jump instruction and During four indirect jump instructions, processor can be by executing this first springboard code and the second springboard code To guarantee guessed a PC value and the 2nd PC value concrete mistake positioned at legal fetching address space Journey.Wherein, this corresponding destination register of the first indirect jump instruction is R1 depositor, between the described 3rd Connect jump instruction identical with the command content of the described first indirect jump instruction, and the described 3rd redirects indirectly The destination register of instruction is also R1 depositor, and this corresponding destination register of the second indirect jump instruction is First depositor, the command content phase of described 4th indirect jump instruction and the described second indirect jump instruction With, and the destination register of described 4th indirect jump instruction is also the first depositor.As shown in figure 4, The method includes：
S401：Build first for the corresponding R1 depositor of the indirect jump instruction of first in pending program Springboard code and build the second springboard code for corresponding first depositor of the second indirect jump instruction, obtains Obtain springboard code segment；Wherein, described first springboard code is used for determining that guessed described first jumps indirectly Turn the corresponding PC value in described R1 depositor of instruction to constrain in Kseg0；Described second Springboard code be used for by corresponding for the described second indirect jump instruction in described first depositor second PC value constrains in Kseg0.
Specifically, in the present embodiment, it is that the first indirect jump instruction builds the first springboard code, Yi Jiwei Second indirect jump instruction builds the second springboard code and may refer to above-described embodiment two and the tool of embodiment three Body describes, and will not be described here.
It should be noted that when processor is that the first indirect jump instruction builds the first springboard code, and After building the second springboard code for the second indirect jump instruction, obtain the process of springboard code segment, specifically Can be：Processor can be according to the numbering of depositor by the first springboard code and the second springboard code sequence Arrangement, forms springboard code segment.
S402：Described springboard code segment is added the original position of the address space to described pending program, Obtain redaction program and mapping table；Wherein, described mapping table includes described first springboard code described Address in redaction program and the corresponding relation of described R1 depositor, and, described second springboard code Address in described redaction program and the corresponding relation of described first depositor.
Specifically, the detailed process of S402 may refer to above-described embodiment two and the specific descriptions of embodiment three, Will not be described here.
S403：According to described mapping table, by the 3rd indirect jump instruction described in described redaction program Destination register is revised as address in described redaction program for the described first springboard code, and will be described The destination register of the 4th indirect jump instruction described in redaction program is revised as described second springboard code Address in described redaction program, obtains described revised redaction program, so that processor exists Execution described first springboard code is redirected during the address going to the described 3rd indirect jump instruction place, with And, redirect execution when the address that described computing device is located to the described 4th indirect jump instruction described Second springboard code.
Specifically, the redaction program that above-mentioned processor is obtained include the 3rd indirect jump instruction, the 4th Jump instruction, the first springboard code, the second springboard code and other instructions indirectly.When processor obtains After the program of redaction and above-mentioned mapping table, processor redirects finger indirectly to the 3rd in redaction program Order and the 4th indirect jump instruction are rewritten, and obtain revised redaction program, that is, processor will be upper The destination register stating the 3rd indirect jump instruction in redaction program is revised as described first springboard code Address in redaction program, and the destination register of the 4th indirect jump instruction is revised as described Address in redaction program for the two springboard codes, therefore, processor is going to the 3rd indirect jump instruction Execution described first springboard code can directly be redirected during the address being located, and, hold in described processor During the address that row is located to the described 4th indirect jump instruction, can directly redirect described second springboard of execution Code.
Because processor is when executing three indirect jump instructions, the PC value guessed is likely to be Mistake (because the content of the 3rd indirect jump instruction is identical with the content of the first indirect jump instruction, institute The corresponding PC value of the 3rd indirect jump instruction with processor conjecture is also a PC value), therefore work as place When reason device goes to the address that the 3rd indirect jump instruction is located, can directly redirect the first springboard generation of execution Code, because this first springboard code can determine whether a PC value is correct, therefore keeps away to a certain extent Exempt from processor and fetching has been carried out on wrong PC；On the other hand, processor is jumped indirectly in execution the 4th When turning instruction, the 2nd PC value guessed be likely to be mistake (because of the 4th indirect jump instruction Content is identical with the content of the second indirect jump instruction, so the 4th indirect jump instruction of processor conjecture Corresponding PC value is also the 2nd PC value), therefore when computing device is located to the 4th indirect jump instruction Address when, can directly redirect execution the second springboard code, because this second springboard code can be by institute 2nd PC value of conjecture constrains in Kseg0, therefore avoids processor and is taken on wrong PC Refer to.Therefore, the method that the present invention provides, processor can be avoided when executing jump instruction, because being guessed PC value exceed legal fetching address space, the program determination bringing or the technical problem of deadlock, carry The high execution efficiency of processor.
Optionally, in the present embodiment, this first indirect jump instruction is jr reg1Or jalr reg1, the first jump Address in described redaction program for the plate code is StubR1, then " by described redaction in above-mentioned S403 In program, the destination register of the 3rd indirect jump instruction is revised as described first springboard code in described new edition Address in this program " is specifically as follows：By the 3rd indirect jump instruction jr in above-mentioned redaction program reg1In reg1It is revised as StubR1, or, by jalr reg1In reg1It is revised as StubR1", from And by jr reg1It is revised as j StubR1, or, by jalr reg1It is revised as jal StubR1.
Optionally, when above-mentioned first depositor is RNWhen, the second indirect jump instruction can be jr regN Or jalr regN, described N is the positive integer more than 1 less than or equal to 31；Above-mentioned second springboard code is in institute Stating the address in redaction program is StubRN.Then " by the 4th in described redaction program in above-mentioned S403 The destination register of jump instruction is revised as described second springboard code in described redaction program indirectly Address " is specifically as follows：By indirect for the 4th in above-mentioned redaction program jump instruction jr regNIn regN, It is revised as StubRN, or, by jalr regNIn regNIt is revised as StubRN", thus by redaction In program the 4th indirect jump instruction jr regNIt is revised as j StubRN, or, by jalr regNIt is revised as jal StubRN.
The rewrite method of the program that the present invention provides, by depositing for the corresponding R1 of the first indirect jump instruction Device builds the first springboard code and builds the second jump for corresponding first depositor of the second indirect jump instruction Plate code, obtains springboard code segment, and this springboard code segment is added to the initial address of pending program Space, obtains redaction program and mapping table, and according to this mapping table by between the 3rd in redaction program The destination register connecing jump instruction is revised as address in redaction program for the first springboard code, and will In redaction program, the destination register of the 4th indirect jump instruction is revised as the second springboard code in redaction Address in program, obtains revised redaction program, so that processor is jumped indirectly going to the 3rd Execution the first springboard code is redirected during the address turning instruction place, and, between computing device to the 4th Execution the second springboard code is redirected during the address connecing jump instruction place.Because this first springboard code is permissible Determine whether a PC value is correct, and the guessed the 2nd PC value can be constrained in by the second springboard code In Kseg0, therefore avoid processor and program determination or the deadlock that fetching is brought is carried out on wrong PC Technical problem, improve the execution efficiency of processor.
In order to better illustrate technical scheme, in following embodiments, all assume indirect jump instruction Including the first indirect jump instruction and the second indirect jump instruction, springboard code include the first springboard code and Second springboard code, the indirect jump instruction outside springboard code include positioned at the first springboard code it The 3rd outer indirect jump instruction and the 4th indirect jump instruction outside the second springboard code.
Further, on the basis of above-described embodiment four, above-mentioned first springboard code is used for described the The corresponding PC value in described R1 depositor of one indirect jump instruction constrains in Kseg0, It is specially：Described first springboard code, whether correct for determining the described PC value guessed, So that a described PC value to be constrained in Kseg0.Specifically, embodiment five shown in Figure 5, The present embodiment refers to the first springboard code and determines whether guessed a PC value is correctly specifically real Existing mode.In the present embodiment, the first springboard code includes at least one do-nothing instruction and described first and indirectly jumps Turn instruction, described do-nothing instruction is used for determining whether guessed a PC value is correct.Therefore, referring to Fig. 5 Shown, the method can also include：
S501：Execute described revised redaction program, and indirectly redirect finger when going to the described 3rd During the address that order is located, redirect the described first springboard code of execution.
S502：When determining that guessed a PC value is correct after executing described do-nothing instruction, continue executing with The described first indirect jump instruction in described first springboard code.
S503：When determining guessed a PC value mistake after executing described do-nothing instruction, rollback is to institute State the first springboard code on the address in described redaction program, to re-execute described first springboard generation Code.
Specifically, in the present embodiment, above-mentioned first springboard code can include at least one do-nothing instruction and One indirect jump instruction.In fact, in pending program, the first indirect jump instruction and the 3rd is jumped indirectly The destination register turning instruction is R1 depositor.For the redaction program being formed, the first springboard generation Jr reg in code1Or jalr reg1For the first indirect jump instruction, the jr reg outside the first springboard code1 Or jalr reg1For the 3rd indirect jump instruction, the finger of the first indirect jump instruction and the 3rd indirect jump instruction Content is made to be identical.Optionally, above-mentioned first springboard code can include 18 do-nothing instructions.With first Springboard code includes 3 do-nothing instructions and jr reg1As a example, the code sequence of this first springboard code can be joined It is shown in Table 1, wherein, " ssnop " is the do-nothing instruction mentioned in the present embodiment, and " nop " was the first springboard generation The END instruction of code, address in redaction program for the first springboard code shown in table 1 is StubR1.
Table 1
Redaction journey for program performing principle, after having executed above-mentioned S403, in above-mentioned S402 Sequence change turns to revised redaction program, i.e. the target of the 3rd indirect jump instruction in redaction program Address (the StubR in redaction program rewritten for the first springboard code by depositor1), above-mentioned new edition The destination register of the 4th indirect jump instruction in this program is rewritten in order to described second springboard code is in new edition Address in this program, thus obtain revised redaction program.Therefore, when computing device, this changes During redaction program after writing, that is, when the address that computing device is located to the 3rd indirect jump instruction, Due to the destination register of the 3rd indirect jump instruction being rewritten as ground in new procedures for the first springboard code Location (StubR1) so that processor can be straight when going to the address at the 3rd indirect jump instruction place Connect and redirect execution the first springboard code；But, indirectly redirect finger because the first springboard code includes first Order, the content of the first indirect jump instruction is identical with the content of the 3rd indirect jump instruction, therefore, processes After device has executed above-mentioned 3 do-nothing instructions (ssnop), can determine whether that a PC value is correct, processor can To continue executing with the first indirect jump instruction in the first springboard code, be equivalent to through a PC After the correctness of value judges, then re-execute the 3rd indirect jump instruction.Such process can be true Protect the correct of a PC value, also ensure that processor does not result in the execution gaps and omissions of the 3rd indirect jump instruction.
On the basis of above-described embodiment four and embodiment five, the embodiment of the present invention six refers to the second jump The specific implementation of plate code.In the present embodiment, the second springboard code includes step-by-step and instruction and second Jump instruction indirectly；Wherein, described step-by-step and instruction, for by the immediate in described R1 depositor The address space of 0xDFFF, FFFF first depositor corresponding with the described second indirect jump instruction carry out by Position with, described 2nd PC value is constrained in Kseg0.
It should be noted that when described first depositor is RNWhen, the second indirect jump instruction corresponding The address space of one depositor is exactly regNAddress space.Processor is by this regNAddress space with 0xDFFF in R1 depositor, FFFF step-by-step with, can be by regNIn the 2nd PC value constraint In Kseg0.
In the present embodiment, step-by-step in the second springboard code with instruct for will be vertical in described R1 depositor Count 0xDFFF, the address space of FFFF first depositor corresponding with the described second indirect jump instruction enters Row step-by-step with, described 2nd PC value is constrained in Kseg0.In fact, in pending program, The destination register of the second indirect jump instruction and the 4th indirect jump instruction is the first depositor.For The redaction program being formed, jr reg in the second springboard codeNOr jalr regNIndirectly redirect finger for second Order, the jr reg outside the second springboard codeNOr jalr regNFor the 4th indirect jump instruction, second The command content of jump instruction and the 4th indirect jump instruction is identical indirectly.With the second springboard code bag Include above-mentioned step-by-step and instruction and jr regNAs a example, the second springboard code may refer to shown in table 2, wherein, " lui $ at, 0xdfff ori $ at, $ at, 0xffff " it is immediate 0xDFFF in R1 depositor, FFFF ", " and regN,regN, $ at " be step-by-step and instruction ".Ground in redaction program for the second springboard code shown in table 2 Location is StubRN.
Table 2
Redaction journey for program performing principle, after having executed above-mentioned S403, in above-mentioned S402 Sequence change turns to revised redaction program, i.e. the target of the 3rd indirect jump instruction in redaction program Address (the StubR in redaction program rewritten for the first springboard code by depositor1), above-mentioned new edition The destination register of the 4th indirect jump instruction in this program is rewritten in order to described second springboard code is in new edition Address (StubR in this programN), thus forming revised redaction program.Therefore, work as process When device executes this revised redaction program, that is, when computing device is located to the 4th indirect jump instruction Address when, due to the destination register of the 4th indirect jump instruction being rewritten as the second springboard code new Address (StubR in programN) so that processor is going to the ground that the 4th indirect jump instruction is located Execution the second springboard code can be redirected during location；But, due to the second springboard code, to include second indirect Jump instruction, the content of the second indirect jump instruction is identical with the content of the 4th indirect jump instruction, therefore, Computing device complete " lui $ at, 0xdfff ori $ at, $ at, 0xffff and regN,regN, $ at " after, can be by Two PC values constrain in Kseg0, and therefore processor just can continue executing with the second springboard code Two indirect jump instructions, are equivalent to after the fetching space constraint of a 2nd PC value, more again Execute the 4th indirect jump instruction.Such process may insure the correct of the 2nd PC value, also ensures that place Reason device does not result in the execution gaps and omissions of the 4th indirect jump instruction.
In conjunction with above-described embodiment in addition it is also necessary to explanation, first indirect for every in pending program Jump instruction and the second indirect jump instruction will carry out the structure of corresponding springboard code, rewriting etc. and process. Specifically may refer to shown in following Fig. 6 is that the rewrite process of indirect jump instruction in pending program is shown It is intended to.It should be noted that following processes are only to include a plurality of second with pending program indirectly to redirect To illustrate as a example instruction, certainly, following processes are also applied for pending program and include a plurality of One indirect jump instruction, or include a plurality of first indirect jump instruction and a plurality of second indirect jump instruction Scene, the present invention will not be described here.The method specifically includes：
S601：Open and parse the elf file of pending program, determine pending program in elf file Skew and size.
S602：Judge whether every in pending program instruction rewrites to finish；If so, then execute S608； If it is not, then executing S603.
Here rewriting actually includes the processing procedure of above-described embodiment, indirectly redirects including for first Instruction and the second indirect jump instruction build corresponding springboard code, generate springboard code segment, by springboard generation Code section is added to the original position of pending program and is generated redaction program, by the 3rd in redaction program The destination register of jump instruction and the 4th indirect jump instruction carries out the process of rewriting etc., by these mistakes indirectly Journey is referred to as treating the rewriting of the instruction in processing routine.
Specifically, from the beginning of the deviation post that S601 determines, in units of 4 bytes, read pending journey In sequence each instruction, and judge whether all of indirect jump instruction all rewrites and finish, if so, Then terminate flow process, if it is not, then executing following S603.
S603：Judging whether present instruction is jr instruction, if so, then executing S604, if it is not, then executing S606.
S604：Judge the destination register reg of present instructionNWhether it is R0, if so, then return execution S602, if it is not, then execute S605.
S605：By the jr reg on this addressNIt is rewritten as into j StubN, and write right in above-mentioned elf file Answer position, return execution S602.
S606：Judge whether present instruction is jalr instruction and its destination register regNWhether it is R0, if It is to execute S607, if it is not, then returning execution S602.
S607：By the jalr reg on this addressNIt is rewritten as into jal StubN, and write in above-mentioned elf file Correspondence position, return execution S602.
S608：All processes terminate, and close elf file.
After pending device has executed above-mentioned S601 to S608, entirely pending program is just rewritten and is completed, Obtain revised redaction program.Processor execute this revised redaction program when it is possible to Process execution according to above-described embodiment one to embodiment six.
In order to better illustrate the above-mentioned revised redaction program of computing device, by revised new The first springboard code in version program and the second springboard code avoid PC value fetching mistake, and the present invention carries Supply an embodiment seven, this embodiment seven specifically to illustrate first with the complete procedure of a program re-writing Springboard code and the second springboard code are how to avoid PC value fetching mistake, specifically：
Assume that pending program includes the first indirect jump instruction jr reg1, the second indirect jump instruction jr regN.Before execution the first indirect jump instruction and the second indirect jump instruction, CPU does not know this Which destination address first jump instruction jumps in, does not also know which the second jump instruction jumps to In individual destination address.Therefore, in program process, CPU can guess that is located at a R1 depositor The first PC value of interior (reg1) and be located at RNThe 2nd PC value in depositor, a PC value is i.e. It is this first indirect jump instruction destination address to be jumped to, the 2nd PC value is exactly second indirectly to redirect Instruction destination address to be jumped to.Above-mentioned jr reg1Refer to jump to destination register reg1In In certain address, this certain address is exactly a PC value；Above-mentioned jr regNRefer to mesh to be jumped to Scalar register file regNIn certain address in, this certain address is exactly the 2nd PC value.
First, the method in the present embodiment is to construct a first springboard code to R1 depositor, to RN Depositor constructs a second springboard code, and this first springboard code can be one or more, the second jump Plate code can be one or more, indirect according to the indirect jump instruction of first in pending program and second Depending on the number of jump instruction.Then, processor is according to R1 depositor and RNThe numbering of depositor generates One springboard code segment.Assume this RNDepositor includes R2-R31 30 the first depositors altogether, processes Device according to R1 depositor, R2-R31 totally 31 depositors numbering by the first springboard code and the second springboard Code is ranked up, and that is, the first springboard code is front, the corresponding second springboard code of R2 subsequently, R3 pair After the second springboard code time answered, by that analogy, until being aligned to the corresponding second springboard code of R31, Thus forming springboard code segment.
Afterwards, the code segment being formed is added the start bit of the address space to pending program by processor Put, obtain redaction program and mapping table.Wherein, mapping table includes described first springboard code described Address in redaction program and the corresponding relation of described R1 depositor, and, described second springboard code Address in described redaction program and the corresponding relation of described first depositor, specifically may refer to table Shown in 3, specially：
Table 3
Address Code content
base StubR1, process jr/jalr r1
base+80 StubR2, process jr/jalr v0
base+100 StubR3, process jr/jalr v1
base+120 StubR4, process jr/jalr a0
base+140 StubR5, process jr/jalr a1
base+160 StubR6, process jr/jalr a2
base+180 StubR7, process jr/jalr a3
base+200 StubR8, process jr/jalr t0
base+220 StubR9, process jr/jalr t1
base+240 StubR10, process jr/jalr t2
base+260 StubR11, process jr/jalr t3
base+280 StubR12, process jr/jalr t4
base+300 StubR13, process jr/jalr t5
base+320 StubR14, process jr/jalr t6
base+340 StubR15, process jr/jalr t7
base+240 StubR16, process jr/jalr s0
base+260 StubR17, process jr/jalr s1
base+280 StubR18, process jr/jalr s2
base+300 StubR19, process jr/jalr s3
base+320 StubR20, process jr/jalr s4
base+340 StubR21, process jr/jalr s5
base+360 StubR22, process jr/jalr s6
base+380 StubR23, process jr/jalr s7
base+400 StubR24, process jr/jalr k0
base+420 StubR25, process jr/jalr k1
base+440 StubR26, process jr/jalr t8
base+460 StubR27, process jr/jalr t9
base+480 StubR28, process jr/jalr gp
base+500 StubR29, process jr/jalr sp
base+520 StubR30, process jr/jalr fp
base+540 StubR31, process jr/jalr ra
In table 3, v0 is corresponding to be R2 depositor, v1 corresponding R3 depositor, and a0 is corresponding to be R4 Depositor, a1 is corresponding to be R5 depositor, and a2 is corresponding to be R6 depositor, and a3 is corresponding to be that R7 posts Storage, t0 is corresponding to be R8 depositor, and t1 is corresponding to be R9 depositor, and t2 is corresponding to be that R10 deposits Device, t3 is corresponding to be R11 depositor, and t4 is corresponding to be R12 depositor, and t5 is corresponding to be that R13 deposits Device, t6 is corresponding to be R14 depositor, and t7 is corresponding to be R15 depositor, and s0 is corresponding to be that R16 deposits Device, s1 is corresponding to be R17 depositor, and s2 is corresponding to be R18 depositor, and s3 is corresponding to be that R19 posts Storage, s4 is corresponding to be R20 depositor, and s5 is corresponding to be R21 depositor, and s6 is corresponding to be R22 Depositor, s7 is corresponding to be R23 depositor, and k0 is corresponding to be R24 depositor, and k1 is corresponding to be R25 Depositor, t8 is corresponding to be R26 depositor, and t9 is corresponding to be R27 depositor, and gp is corresponding to be R28 Depositor, sp is corresponding to be R29 depositor, and fp is corresponding to be R30 depositor, and ra is corresponding to be R31 Depositor.
In table 3, StubR1 is address in redaction program for the first springboard code, StubR2-StubR31 It is respectively address in redaction program for the second different springboard codes.It is right that springboard code segment can pass through Linker (referring to a kind of software link instrument) specifies the mode of chained address to be placed on pending program Code space original position (base), generate redaction program.Afterwards, to the redaction being formed Program is rewritten, and changes each jr reg1Reg in instruction1For StubR1, change each jalr reg1 Reg in instruction1For StubR1, thus by each jr reg1Instruction modification is j StubR1And will be every Article one, jalr reg1Instruction modification is jal StubR1Instruction, in addition, also will change each jr regNInstruction In regNFor StubRN, change each jalr regNReg in instructionNFor StubRN, thus will be every Article one, jr regNIt is revised as j StubRNAnd by each jalr regNInstruction modification is jal StubRNInstruction, And then obtain revised redaction program.
So, when the pending program of computing device, actually execute redaction program.This new edition This program includes the 3rd indirect jump instruction, the 4th indirect instruction, the first springboard code, the second springboard generation Code and other instructions.In fact, in pending program, the first indirect jump instruction and the 3rd is jumped indirectly The destination register turning instruction is R1 depositor, the second indirect jump instruction and the 4th indirect jump instruction Destination register be the first depositor.For the redaction program being formed, in the first springboard code jr reg1Or jalr reg1For the first indirect jump instruction, the jr reg outside the first springboard code1Or jalr reg1For the 3rd indirect jump instruction, in the instruction of the first indirect jump instruction and the 3rd indirect jump instruction Appearance is identical；And, jr reg in the second springboard codeNOr jalr regNFor the second indirect jump instruction, Jr reg outside the second springboard codeNOr jalr regNFor the 4th indirect jump instruction, second is indirect The command content of jump instruction and the 4th indirect jump instruction is identical.
For the execution principle of degree, for the 3rd indirect jump instruction in redaction program, jr reg1As a example, as the jr reg in revised redaction program for the computing device1During the address being located, Because the reason rewrite, jr reg now1It is rewritten as j StubR1, therefore, processor just can redirect To stubR1(this stubR1For address in redaction program for the first springboard code) execute up, that is, Execute the first springboard code, because the first springboard code includes a plurality of ssnop instruction, therefore, its After having executed one or more of ssnop instructions, a PC value of the pre-treating device conjecture that will know is No correct.
If after execution ssnop instruction, the PC value that processor is guessed before confirming is correct, that , processor may proceed to execute the jr reg in the first springboard code1(ginseng is shown in Table 1), so guarantees Original jr reg1Instruction will not be missed；If after execution ssnop instruction, processor confirms First PC value is wrong, can return back to the first springboard code on the address in described redaction program, It return back to stubR1In, now this stubR1In jr reg1First PC value of the inside is correct, So processor can execute stubR successively1In the first springboard code.By it can herein be seen that so Can avoid processor that fetching behaviour is directly sent after conjecture the first PC value on the PC value guessed Make.
For the 4th indirect jump instruction in redaction program, jr regNAs a example, when processor is held The jr reg in revised redaction program for the rowNDuring the address being located, because the reason rewrite, now Jr regNIt is rewritten as j StubRN, therefore, processor just can jump to StubRN(this StubRN For address in redaction program for the second springboard code) execute up, that is, execute the second springboard code, Because the second springboard code includes for by immediate 0xDFFF in described R1 depositor, FFFF with The address space of corresponding first depositor of described second indirect jump instruction carry out step-by-step and instruction, example As " lui $ at, 0xdfff ori $ at, $ at, 0xffff " in table 2, therefore, processor has been after having executed this instruction, 2nd PC value can be constrained in Kseg0, therefore processor just can continue executing with the second springboard code In the second indirect jump instruction, be equivalent to after the fetching space constraint of a 2nd PC value, Re-execute the 4th indirect jump instruction again.Such process may insure the correct of the 2nd PC value, Guarantee that processor does not result in the execution gaps and omissions of the 4th indirect jump instruction.
In addition, the jr instruction being related in above-described embodiment, jalr instruction, j instruction and jal instruction, permissible Referring to the description of prior art, will not be described here.
The rewrite method of the program that the present invention provides, by depositing for the corresponding R1 of the first indirect jump instruction Device builds the first springboard code and builds the second jump for corresponding first depositor of the second indirect jump instruction Plate code, adds it to the home address space of pending program after obtaining springboard code segment, obtain new Version program and mapping table, and according to this mapping table by the 3rd indirect jump instruction in redaction program Destination register is revised as address in redaction program for the first springboard code, and by redaction program The destination register of the 4th indirect jump instruction is revised as ground in redaction program for the second springboard code Location, obtains revised redaction program, so that processor is jumped when going to three indirect jump instructions Turn execution the first springboard code, and, redirect execution when computing device is to four indirect jump instructions Second springboard code.Because this first springboard code can determine whether a PC value is correct, the second jump Guessed the 2nd PC value can be constrained in Kseg0 by plate code, therefore avoids processor in mistake The technical problem of program determination that fetching brings or deadlock is carried out on PC by mistake, improves holding of processor Line efficiency.
One of ordinary skill in the art will appreciate that：Realize all or part step of above-mentioned each method embodiment Suddenly can be completed by the related hardware of programmed instruction.Aforesaid program can be stored in a computer can Read in storage medium.This program upon execution, executes the step including above-mentioned each method embodiment；And Aforesaid storage medium includes：ROM, RAM, magnetic disc or CD etc. are various can be with store program codes Medium.
The structural representation of the rewriting device embodiment one of the program that Fig. 7 provides for the present invention.This device can Can also be integrated in the processor of computer in a computer with integrated, this device can also be independent Computer.As shown in fig. 7, this device includes：Springboard code construction module 10, the first acquisition module 11 and second acquisition module 12.
Wherein, springboard code construction module 10, for the mesh for the indirect jump instruction in pending program Scalar register file builds springboard code, obtains springboard code segment, and described springboard code is used for described indirect jump Turn the corresponding PC value of program counter of instruction to constrain in Kseg0；
First acquisition module 11, for the springboard code being obtained described springboard code construction acquisition module Duan Tianjia, to the original position of the address space of described pending program, obtains redaction program and mapping table； Wherein, described mapping table include address in described redaction program for the described springboard code with described indirectly Mapping relations between the destination register of jump instruction；
Second acquisition module 12, for the described mapping table being obtained according to described first acquisition module 11, The destination register of the indirect jump instruction outside described springboard code in described redaction program is repaiied It is changed to address in described redaction program for the described springboard code, obtain revised redaction program, So that the address that indirect jump instruction outside being located at described springboard code described in going to for the processor is located When, redirect the described springboard code of execution.
The rewriting device of the program that the present invention provides, can execute said method embodiment, its operation principle Similar with technique effect, will not be described here.
Further, described springboard code includes the first springboard code and/or the second springboard code, described between Connect jump instruction and include the first indirect instruction and/or the second indirect jump instruction, described first redirects finger indirectly Corresponding destination register is made to be R1 depositor, the corresponding destination register of described second indirect jump instruction For the first depositor；
Then described springboard code construction module 10, specifically for corresponding for the described first indirect jump instruction R1 depositor builds described first springboard code, obtains described springboard code segment；
Or, described springboard code construction module 10, specifically for for the described second indirect jump instruction pair The first depositor answered builds described second springboard code, obtains described springboard code segment；
Or, described springboard code construction module 10, specifically for for the described first indirect jump instruction pair The R1 depositor answered builds described first springboard code, and, it is that the described second indirect jump instruction corresponds to The first depositor build described second springboard code, and according to described first springboard code and described second Springboard code, obtains described springboard code segment；
Wherein, described first springboard code is used for corresponding for the described first indirect jump instruction positioned at described A PC value in R1 depositor constrains in Kseg0；Described second springboard code is used for described the Corresponding the 2nd PC value in described first depositor of two indirect jump instructions constrains in Kseg0.
Further, described springboard code construction module 10, specifically for according to described first springboard generation Code and described second springboard code, obtain described springboard code segment, specially：
Described springboard code construction module 10, specifically for jumping described first springboard code and described second Plate code arranges from small to large according to corresponding register number, obtains described springboard code segment.
Further, described mapping table includes address in described redaction program for the described springboard code The mapping relations and destination register of described indirect jump instruction between, specially：
Described mapping table include address in described redaction program for the described first springboard code with described The corresponding relation of R1 depositor, and/or, address in described redaction program for the described second springboard code Corresponding relation with described first depositor.
Further, described indirect jump instruction outside described springboard code includes：Positioned at institute State the 3rd indirect jump instruction outside the first springboard code, and/or, positioned at described second springboard code it The 4th outer indirect jump instruction；Wherein, described 3rd indirect jump instruction redirects indirectly with described first The command content of instruction is identical, and the destination register of described 3rd indirect jump instruction is R1 depositor, Described 4th indirect jump instruction is identical with the command content of the described second indirect jump instruction, and described The destination register of four indirect jump instructions is the first depositor；
Then described second acquisition module 12, specifically for the institute being obtained according to described first acquisition module 11 State mapping table, the destination register of the 3rd indirect jump instruction described in described redaction program is revised as Address in described redaction program for the described first springboard code, obtains described revised redaction journey Sequence, so that described processor redirects execution when going to the address at the described 3rd indirect jump instruction place Described first springboard code；
Or, described second acquisition module 12, specifically for obtaining according to described first acquisition module 11 Described mapping table, the destination register of the 4th indirect jump instruction described in described redaction program is repaiied It is changed to address in described redaction program for the described second springboard code, obtain described revised new edition This program so that described computing device be located to the described 4th indirect jump instruction address when redirect and hold The described second springboard code of row；
Or, described second acquisition module 12, specifically for obtaining according to described first acquisition module 11 Described mapping table, the destination register of the 3rd indirect jump instruction described in described redaction program is repaiied It is changed to address in described redaction program for the described first springboard code, and by described redaction program The destination register of described 4th indirect jump instruction is revised as described second springboard code in described redaction Address in program, obtains described revised redaction program, so that processor is going to described the Execution described first springboard code is redirected during the address that three indirect jump instructions are located, and, at described place Reason device goes to redirect execution described second springboard generation during the address at the described 4th indirect jump instruction place Code.
Described first springboard code is used for posting corresponding for the described first indirect jump instruction positioned at described R1 A PC value in storage constrains in Kseg0, specially：Described first springboard code, for true Whether the fixed described PC value guessed is correct, and a described PC value is constrained in Kseg0.
The structural representation of the rewriting device embodiment two of the program that Fig. 8 provides for the present invention.In this enforcement In example, described first springboard code is used for corresponding for the described first indirect jump instruction positioned at described R1 A PC value in depositor constrains in Kseg0, specially：Described first springboard code, is used for Determine whether the described PC value guessed is correct, and a described PC value is constrained in Kseg0. More specifically, described first springboard code includes at least one do-nothing instruction and described first indirect jump instruction； Described do-nothing instruction is used for determining whether guessed a PC value is correct.Therefore, real shown in above-mentioned Fig. 7 On the basis of applying example, further, said apparatus can also include：Processing module 13 and judgement execution mould Block 14.
Processing module 13, for executing described revised redaction program, and ought go to the described 3rd During the address that jump instruction is located indirectly, redirect the described first springboard code of execution；
Judge performing module 14, for just determining guessed a PC value after executing described do-nothing instruction When really, indicate that described processing module 13 continues executing with described first springboard code described first jumps indirectly Turn instruction；And during for determining guessed a PC value mistake after executing described do-nothing instruction, instruction Described processing module 13 rollback to described first springboard code on the address in described redaction program, with Re-execute described first springboard code.
The rewriting device of the program that the present invention provides, can execute said method embodiment, its operation principle Similar with technique effect, will not be described here.
Further, described second springboard code includes step-by-step and instruction and the second indirect jump instruction；
Described second springboard code is used for posting corresponding for the described second indirect jump instruction positioned at described first The 2nd PC value in storage constrains in Kseg0, specially：
Described step-by-step and instruction, for by immediate 0xDFFF in described R1 depositor, FFFF and institute State corresponding first depositor of the second indirect jump instruction address space carry out step-by-step with by described the Two PC values constrain in Kseg0.
Further, described first indirect jump instruction is jr reg1Or jalr reg1, described second is indirect Jump instruction is jr regNOr jalr regN, described N is the positive integer more than 1 less than or equal to 31, described Address in described redaction program for the first springboard code is StubR1, described second springboard code is in institute Stating the address in redaction program is StubRN；When described first depositor is RNWhen, described second jump In plate code second indirect jump instruction is jr regNOr jalr regN；
Then described second acquisition module 12, specifically for according to described mapping table, by described redaction program In the 3rd indirect jump instruction jr reg1In reg1It is revised as StubR1, or, by jalr reg1In reg1 It is revised as StubR1；And, specifically for by the 4th indirect jump instruction jr reg in described redaction programN In regNIt is revised as StubRN, or, by jalr regNIn regNIt is revised as StubRN.
The rewriting device of the program that the present invention provides, can execute said method embodiment, its operation principle Similar with technique effect, will not be described here.
Finally it should be noted that：Various embodiments above is only in order to illustrating technical scheme rather than right It limits；Although being described in detail to the present invention with reference to foregoing embodiments, this area common Technical staff should be understood：It still can be modified to the technical scheme described in foregoing embodiments, Or equivalent is carried out to wherein some or all of technical characteristic；And these modifications or replacement, and Do not make the scope of the essence disengaging various embodiments of the present invention technical scheme of appropriate technical solution.

Claims (20)

1. a kind of rewrite method of program is it is characterised in that include：
Destination register for the indirect jump instruction in pending program builds springboard code, obtains springboard Code segment, described springboard code is used for by corresponding for described indirect jump instruction PC value of program counter about Bundle is in Kseg0；
Described springboard code segment is added the original position of the address space to described pending program, obtain Redaction program and mapping table；Wherein, described mapping table includes described springboard code in described redaction journey Mapping relations between address in sequence and the destination register of described indirect jump instruction；
According to described mapping table, by the indirect jump outside described springboard code in described redaction program The destination register turning instruction is revised as address in described redaction program for the described springboard code, obtains Revised redaction program, so that processor is outside being located at described springboard code described in going between When connecing the address that jump instruction is located, redirect the described springboard code of execution.
2. method according to claim 1 is it is characterised in that described springboard code includes the first jump Plate code and/or the second springboard code, described indirect jump instruction is included between the first indirect instruction and/or second Connect jump instruction, the corresponding destination register of described first indirect jump instruction is R1 depositor, described the The corresponding destination register of two indirect jump instructions is the first depositor；
The described destination register for the indirect jump instruction in pending program builds springboard code, obtains Springboard code segment, described springboard code is used for corresponding for described indirect jump instruction program counter PC Value constrains in Kseg0, including：
Build described first springboard code for the corresponding R1 depositor of the described first indirect jump instruction, obtain Described springboard code segment；Or,
Build described second springboard code for corresponding first depositor of the described second indirect jump instruction, obtain Obtain described springboard code segment；Or,
Build described first springboard code for the corresponding R1 depositor of the described first indirect jump instruction, with And, it is that corresponding first depositor of the described second indirect jump instruction builds described second springboard code, and According to described first springboard code and described second springboard code, obtain described springboard code segment；
Wherein, described first springboard code is used for corresponding for the described first indirect jump instruction positioned at described A PC value in R1 depositor constrains in Kseg0；Described second springboard code is used for described the Corresponding the 2nd PC value in described first depositor of two indirect jump instructions constrains in Kseg0.
3. method according to claim 2 is it is characterised in that described mapping table includes described springboard Code reflecting between the destination register of the address in described redaction program and described indirect jump instruction Penetrate relation, specially：
Described mapping table include address in described redaction program for the described first springboard code with described The corresponding relation of R1 depositor, and/or, address in described redaction program for the described second springboard code Corresponding relation with described first depositor.
4. method according to claim 3 it is characterised in that described positioned at described springboard code it Outer indirect jump instruction includes：The 3rd indirect jump instruction outside described first springboard code, And/or, the 4th indirect jump instruction outside described second springboard code；Wherein, between the described 3rd Connect jump instruction identical with the command content of the described first indirect jump instruction, and the described 3rd redirects indirectly The destination register of instruction is R1 depositor, and described 4th indirect jump instruction redirects indirectly with described second The command content of instruction is identical, and the destination register of described 4th indirect jump instruction is the first depositor；
Described according to described mapping table, between being located in described redaction program outside described springboard code The destination register connecing jump instruction is revised as address in described redaction program for the described springboard code, Obtain revised redaction program, so that processor is outside being located at described springboard code described in going to Indirect jump instruction when redirect execution described springboard code segment, including：
According to described mapping table, the target of the 3rd indirect jump instruction described in described redaction program is posted Storage is revised as address in described redaction program for the described first springboard code, after obtaining described rewriting Redaction program so that described processor is going to the address that the described 3rd indirect jump instruction is located When redirect execution described first springboard code；Or,
According to described mapping table, the target of the 4th indirect jump instruction described in described redaction program is posted Storage is revised as address in described redaction program for the described second springboard code, after obtaining described rewriting Redaction program so that described computing device be located to the described 4th indirect jump instruction address when Redirect the described second springboard code of execution；Or,
According to described mapping table, the target of the 3rd indirect jump instruction described in described redaction program is posted Storage is revised as address in described redaction program for the described first springboard code, and by described redaction The destination register of the 4th indirect jump instruction described in program is revised as described second springboard code described Address in redaction program, obtains described revised redaction program, so that processor is going to Execution described first springboard code is redirected during the address that described 3rd indirect jump instruction is located, and, Described second jump of execution is redirected to the described 4th indirect jump instruction during the address that described computing device is located Plate code.
5. the method according to any one of claim 1-4 is it is characterised in that described first springboard generation Code is for by corresponding for the described first indirect jump instruction PC value in described R1 depositor about Restraint in Kseg0, specially：
Described first springboard code, whether correct for determining the described PC value guessed, will A described PC value constrains in Kseg0.
6. method according to claim 5 it is characterised in that described first springboard code include to A few do-nothing instruction and described first indirect jump instruction；Described do-nothing instruction is used for determining guessed first Whether PC value is correct；Methods described also includes：
Execute described revised redaction program, and be located when going to the described 3rd indirect jump instruction Address when, redirect execution described first springboard code；
When determining that guessed a PC value is correct after executing described do-nothing instruction, continue executing with described the The described first indirect jump instruction in one springboard code；
When determining guessed a PC value mistake after executing described do-nothing instruction, rollback to described first Springboard code on the address in described redaction program, to re-execute described first springboard code.
7. the method according to any one of claim 1-4 is it is characterised in that described second springboard generation Code includes step-by-step and instruction and the second indirect jump instruction；
Described second springboard code is used for posting corresponding for the described second indirect jump instruction positioned at described first The 2nd PC value in storage constrains in Kseg0, specially：
Described step-by-step and instruction, for by immediate 0xDFFF in described R1 depositor, FFFF and institute State corresponding first depositor of the second indirect jump instruction address space carry out step-by-step with by described the Two PC values constrain in Kseg0.
8. method according to claim 2 it is characterised in that described according to described first springboard generation Code and described second springboard code, obtain described springboard code segment, specifically include：
By described first springboard code and described second springboard code according to corresponding register number from little To longer spread, obtain described springboard code segment.
9. method according to claim 4 is it is characterised in that described first indirect jump instruction is jr reg1Or jalr reg1, described second indirect jump instruction is jr regNOr jalr regN, described N is big It is less than or equal to 31 positive integer in 1, address in described redaction program for the described first springboard code is StubR1, address in described redaction program for the described second springboard code is StubRN；
Then described according to described mapping table, by the target of the 3rd indirect jump instruction in described redaction program Depositor is revised as address in described redaction program for the described first springboard code, specifically includes：
According to described mapping table, by the 3rd indirect jump instruction jr reg in described redaction program1In reg1 It is revised as StubR1, or, by jalr reg1In reg1It is revised as StubR1；
Described according to described mapping table, the target of the 4th indirect jump instruction in described redaction program is posted Storage is revised as address in described redaction program for the described second springboard code, specifically includes：
By the 4th indirect jump instruction jr reg in described redaction programNIn regNIt is revised as StubRN, Or, by jalr regNIn regNIt is revised as StubRN.
10. method according to claim 9 is it is characterised in that working as described first depositor is RN When, the second indirect jump instruction in described second springboard code is jr regNOr jalr regN.
A kind of 11. rewriting devices of program are it is characterised in that include：
Springboard code construction module, for the destination register for the indirect jump instruction in pending program Build springboard code, obtain springboard code segment, described springboard code is used for described indirect jump instruction pair The PC value of program counter answered constrains in Kseg0；
First acquisition module, for the springboard code segment being obtained described springboard code construction acquisition module Add the original position of the address space to described pending program, obtain redaction program and mapping table； Wherein, described mapping table include address in described redaction program for the described springboard code with described indirectly Mapping relations between the destination register of jump instruction；
Second acquisition module, for the described mapping table being obtained according to described first acquisition module, will be described In redaction program, the destination register of the indirect jump instruction outside described springboard code is revised as institute State address in described redaction program for the springboard code, obtain revised redaction program, so that place During the address that indirect jump instruction outside being located at described springboard code described in going to for the reason device is located, jump Turn and execute described springboard code.
12. devices according to claim 11 are it is characterised in that described springboard code includes first Springboard code and/or the second springboard code, described indirect jump instruction includes the first indirect instruction and/or second Indirectly jump instruction, the corresponding destination register of described first indirect jump instruction is R1 depositor, described The corresponding destination register of second indirect jump instruction is the first depositor；
Described springboard code construction module, specifically for for the corresponding R1 of the described first indirect jump instruction Depositor builds described first springboard code, obtains described springboard code segment；
Or, described springboard code construction module, specifically for corresponding to for the described second indirect jump instruction First depositor build described second springboard code, obtain described springboard code segment；
Or, described springboard code construction module, specifically for corresponding to for the described first indirect jump instruction R1 depositor build described first springboard code, and, be that the described second indirect jump instruction is corresponding First depositor builds described second springboard code, and according to described first springboard code and described second jump Plate code, obtains described springboard code segment；
Wherein, described first springboard code is used for corresponding for the described first indirect jump instruction positioned at described A PC value in R1 depositor constrains in Kseg0；Described second springboard code is used for described the Corresponding the 2nd PC value in described first depositor of two indirect jump instructions constrains in Kseg0.
13. devices according to claim 12 are it is characterised in that described mapping table includes described jump Plate code is between the destination register of the address in described redaction program and described indirect jump instruction Mapping relations, specially：
Described mapping table include address in described redaction program for the described first springboard code with described The corresponding relation of R1 depositor, and/or, address in described redaction program for the described second springboard code Corresponding relation with described first depositor.
14. devices according to claim 13 it is characterised in that described positioned at described springboard code Outside indirect jump instruction include：The 3rd indirect jump instruction outside described first springboard code, And/or, the 4th indirect jump instruction outside described second springboard code；Wherein, between the described 3rd Connect jump instruction identical with the command content of the described first indirect jump instruction, and the described 3rd redirects indirectly The destination register of instruction is R1 depositor, and described 4th indirect jump instruction redirects indirectly with described second The command content of instruction is identical, and the destination register of described 4th indirect jump instruction is the first depositor；
Then described second acquisition module, specifically for the described mapping being obtained according to described first acquisition module Table, the destination register of the 3rd indirect jump instruction described in described redaction program is revised as described Address in described redaction program for the one springboard code, obtains described revised redaction program, with Described processor is made to redirect execution described the when going to address that the described 3rd indirect jump instruction is located One springboard code；
Or, described second acquisition module, described in obtaining according to described first acquisition module Mapping table, the destination register of the 4th indirect jump instruction described in described redaction program is revised as institute State address in described redaction program for the second springboard code, obtain described revised redaction program, So that described computing device be located to the described 4th indirect jump instruction address when redirect execution described the Two springboard codes；
Or, described second acquisition module, described in obtaining according to described first acquisition module Mapping table, the destination register of the 3rd indirect jump instruction described in described redaction program is revised as institute State address in described redaction program for the first springboard code, and by described in described redaction program The destination register of four indirect jump instructions is revised as described second springboard code in described redaction program Address, obtain described revised redaction program, so that processor is to go to the described 3rd indirect Execution described first springboard code is redirected during the address that jump instruction is located, and, hold in described processor The described second springboard code of execution is redirected to the described 4th indirect jump instruction during the address that row is located.
15. devices according to any one of claim 11-14 are it is characterised in that described first jumps Plate code is used for corresponding for the described first indirect jump instruction PC in described R1 depositor Value constrains in Kseg0, specially：
Described first springboard code, whether correct for determining the described PC value guessed, will A described PC value constrains in Kseg0.
16. devices according to claim 15 are it is characterised in that described first springboard code includes At least one do-nothing instruction and described first indirect jump instruction；Described do-nothing instruction is used for determining guessed the Whether one PC value is correct；Described device also includes：
Processing module, for executing described revised redaction program, and ought go between the described 3rd When connecing the address that jump instruction is located, redirect the described first springboard code of execution；
Judge performing module, the PC value for determining guessed after executing described do-nothing instruction is correct When, indicate that what described processing module continued executing with described first springboard code described first redirects finger indirectly Order；And during for determining guessed a PC value mistake after executing described do-nothing instruction, instruction is described Processing module rollback to described first springboard code on the address in described redaction program, again to hold The described first springboard code of row.
17. devices according to any one of claim 11-14 are it is characterised in that described second jumps Plate code includes step-by-step and instruction and the second indirect jump instruction；
Described second springboard code is used for posting corresponding for the described second indirect jump instruction positioned at described first The 2nd PC value in storage constrains in Kseg0, specially：
Described step-by-step and instruction, for by immediate 0xDFFF in described R1 depositor, FFFF and institute State corresponding first depositor of the second indirect jump instruction address space carry out step-by-step with by described the Two PC values constrain in Kseg0.
18. devices according to claim 12 it is characterised in that described springboard code construction module, Specifically for according to described first springboard code and described second springboard code, obtaining described springboard code segment, It is specially：
Described springboard code construction module, specifically for by described first springboard code and described second springboard Code arranges from small to large according to corresponding register number, obtains described springboard code segment.
19. devices according to claim 14 are it is characterised in that described first indirect jump instruction For jr reg1Or jalr reg1, described second indirect jump instruction is jr regNOr jalr regN, described N is It is less than or equal to 31 positive integer, address in described redaction program for the described first springboard code more than 1 For StubR1, address in described redaction program for the described second springboard code is StubRN；
Described second acquisition module, specifically for according to described mapping table, by described redaction program Three indirect jump instruction jr reg1In reg1It is revised as StubR1, or, by jalr reg1In reg1 It is revised as StubR1；And, specifically for by the 4th indirect jump instruction jr reg in described redaction programN In regNIt is revised as StubRN, or, by jalr regNIn regNIt is revised as StubRN.
20. devices according to claim 19 are it is characterised in that when described first depositor is RNWhen, the second indirect jump instruction in described second springboard code is jr regNOr jalr regN.
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