CN106444213B - A kind of integrated form surface phasmon logic circuit - Google Patents
A kind of integrated form surface phasmon logic circuit Download PDFInfo
- Publication number
- CN106444213B CN106444213B CN201610647448.1A CN201610647448A CN106444213B CN 106444213 B CN106444213 B CN 106444213B CN 201610647448 A CN201610647448 A CN 201610647448A CN 106444213 B CN106444213 B CN 106444213B
- Authority
- CN
- China
- Prior art keywords
- input
- optical
- logical
- module
- output end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F3/00—Optical logic elements; Optical bistable devices
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Optics & Photonics (AREA)
- Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)
Abstract
The present invention relates to a kind of integrated form all-optical logic gate device and its logical calculation method based on surface phasmon.It is characterized in that the device, by input module, SPP assembles module and output module is constituted.Wherein input module is three input doors, the identical and horizontal optical grating constitution being equally spaced by three groups of structures, i.e. input port A, control port B and input port C, and when need to only use dual input end door, control port B can leave unused；SPP assemble module by it is non-it is paraxial under the conditions of zone plate constitute；Output module is made of output end and optical detector.The present invention realizes pure optical logical operation, integrated level of the present invention is high, small in size compared with prior art, signal light loss is low, long transmission distance, the potentiality with multi-stage cascade, while present invention covers the light near ultraviolet infrared all wavelengths in, including 1.55um communication wavelengths.
Description
Technical field
The present invention relates to it is a kind of applied to optic communication, full optical oomputing, integrated optical path and other fields lightwave signal is realized it is complete
The logic gate device of optical logic operation, the integrated form all-optical logic more particularly to a kind of microminiature based on surface phasmon
Gate device and its logical calculation method.
Background technique
Conventional optical communication systems have been difficult to adapt to rapidly send out there is problems such as bulky, structure is complicated, energy consumption height
The communication requirement of exhibition.The development of full light technology is to realize the important foundation of future communications network, and all-optical logic gate is at optical signal
Basic unit in reason is to realize optical packet switching, the key components of optical oomputing and the following high-speed high capacity optical-fiber network.Mesh
Before, there are many distinct methods and material for realizing all-optical logic gate.But these implementations have certain limitation, such as
All-optical logic gate (CN201510683440.6) based on fiber nonlinear effect is unfavorable for being miniaturized, need very big power consumption and
Very long time delay；And the spontaneous radiation noise for the semiconductor optical amplifier being previously mentioned in patent (CN201410312088.0) can be right
As a result it produces a very large impact, while being limited by the free carrier service life in amplifier, be unfavorable for the signal processing etc. of high speed.
On the other hand, surface phasmon (SPP) is a kind of electromagnetic field surface modes of local on medium/metal surface,
It had not only had the speed of photonics, but also the scale with electronics, light can be constrained and be manipulated in sub-wavelength structure, quilt
It is described as the information carrier of current most promising nanometer integrated photonic device.Recently based on surface plasma all-optical logic gate
Design also appears in the newspapers repeatly, but there is also some limitations, such as dx.doi.org/10.1021/nl103228b (Nano
Lett.2011,11,471-475) plasma propagated using silver nanowires surface mentioned in interferes logic gate, is limited to
Silver nanowires length and high loss, the spread length of surface plasma are less than 20um, and specific door requires accurate defeated
Enter signal polarization angle, reduces the stability of output signal；Optical logic gate dx.doi.org/ based on metal channel-shaped waveguide
10.1021/nl303095s (Nano Lett.2012,12,5784-5790) makes since the design loss of waveguide arcuation is very big
Surface plasma propagation distance it is short, output signal strength contrast ratio is small, while lesser duct width makes in air
Dust and little particle can produce a very large impact waveguide performance.
Summary of the invention
In order to solve fields the deficiencies in the prior art, the invention proposes a kind of integrated-type of surface phasmon is complete
Logic gate device.
To achieve the purpose of the present invention, adopt the following technical scheme that the phasmon integrated-type all-optical logic gate device by
Input module, SPP convergence module and output module are constituted.Wherein input module is three input doors, identical by three groups of structures
And the horizontal optical grating constitution being equally spaced, i.e. input port A, control port B and input port C；SPP convergence module is by non-paraxial
Under the conditions of zone plate constitute；Output module is made of output end and optical detector.When using dual input end door, control port
B can leave unused.
The silver plate is the large-area high-quality monocrystalline silverskin prepared by specific process, need to meet surface phasmon at it
The low-loss long range in surface is propagated.In document (DOI:10.1038/ncomms8734) and (DOI:10.1002/
Adma.201401474Adv.Mater.2014,26,6106-6110) in have been reported that and apply.
The grating is the rectangular channel in period profile etched on high quality single crystal silver plate with micro-nano manufacturing method:
According to the grating coupling mechanism of surface phasmon, by taking lambda1-wavelength 633nm as an example, excitation SPP wavelength is 616.3nm.If
Photometric grid cycle is 616.3nm, duty ratio 1:1, groove depth 100nm, raster size 10um*3.2um, three groups of grating water
Flat 4um apart.The effect of grating herein is incident light to be coupled into surface phasmon signal light.
The zone plate is the rectangle in horizontal distribution etched on high quality single crystal silver plate with micro-nano manufacturing method
Slot: as needed, here with surface phasmon wavelength 616.3nm, we devise the zone plate that focal length is 10um.Zone plate
Width is 0.1um, groove depth 0.1um.Zone plate is 5um away from grating distance.
The optical detector is the power monitor placed at output end (light converged position), for monitoring the strong of output light
It is weak.
The utility model has the advantages that
1. since all modules of the invention are all based on the design of high quality single crystal silver, so incident light is low in energy consumption, from
It is low by the SPP propagation loss propagated SPP material more common than hot evaporation silverskin and silver nanowires etc., propagation distance is remote, and have more
The cascade potentiality of grade, for example, for 633nm, measurement result shows its attenuation length up to 80um or more, and if design work
In communication wavelengths 1.55um, attenuation length is expected to more than 1mm.
2. " slot " technique in the present invention is high-precision using electron beam exposure, focused-ion-beam lithography or semiconductor technology
The micro Process modes such as photoetching are spent, so integrated level is very high, volume very little.
3. the carrier wave for participating in operation in the present invention is SPP, it is a kind of electromagnetic field surface of local on medium/metal surface
Mode, the vertical direction light intensity in metal surface exponentially decay, therefore have sub-wavelength confinement ability, and this ability is highly dense
The optical chip of degree is integrated to have established basis.
4. a length of 633nm of light wave that the embodiment of the present invention is investigated, but not limited to this wavelength；The present invention as needed can be with
Cover the light slave near ultraviolet infrared all wavelengths in including 1.55um communication wavelengths.
5. optical logic gate of the invention is using coherent beam as information carrier, by the light intensity and phase that control input light
It realizes logical operation, so Different Logic door only needs a kind of basic structure can be realized, is conducive to extensive repetition and prepares, drop significantly
The low cost and difficulty of manufacture craft.
Detailed description of the invention
The present invention is described in further details with reference to the accompanying drawings and detailed description, wherein
Fig. 1 is structure of the invention block diagram.
Fig. 2 is "AND" logic gate simulation trial result of the present invention.
Fig. 3 is the definition figure of output end normalized intensity spectrum of the present invention and logical one and logical zero.
Fig. 4 is " exclusive or non-exclusive " logic gate simulation trial result of the invention.
Fig. 5 is determining for " exclusive or non-exclusive " gate outputs normalized intensity spectrum of the invention and logical one and logical zero
Justice figure.
In Fig. 1,11 be light input end A, and 12 be photocontrol end B, and 13 be light input end C, and 2 be surface phasmon wavestrip
Piece, 3 be output end D (coupling output slit).
Specific embodiment
For a further understanding of technical solution of the present invention, specific description is done by way of example in conjunction with attached drawing.This reality
It applies example only to further understand as to scheme of the invention, illustrate by taking the HeNe laser of 633nm wavelength as an example, and wanted not as right
The limitation asked.
As shown in Figure 1, the present invention, by input module, light assembles module and output module composition.Wherein input module is by three
The identical and grating (11) in equidistant horizontal distribution of group structure, (12), (13) are constituted, respectively input port A, control port B
With input port C.According to the grating coupling mechanism of surface phasmon, design cycle 616.3nm, duty ratio 1:1, groove depth
Degree is 100nm, and raster size 10um*3.2um, three groups of grating levels are at a distance of 4um.Module is assembled by Fresnel zone plate (2)
It constitutes, according to requirement of experiment, devising focal length is 10um, width 0.1um, the 0.1um Fresnel zone plate that groove depth is, wave
Band pitch of fins grating distance is 5um.Output module with optical detector by constituting, wherein the output end D is an output slit
(3), the long * money * high=100nm*200nm*100nm of typical sizes.The optical detector is to put in output end (light convergence position)
The power monitor set.
Using Fdtd Method (FDTD) method, calculates and cover above-mentioned spectra of interest range in the injection of each input terminal
Laser beam after device working condition, the present embodiment select 633nm wavelength incident light.According to the light of surface phasmon
Grid coupling mechanism, relevant, polarization direction perpendicular to grating slit electromagnetic wave after micro objective is assembled normal incidence arrive
Grating can excite in grating and propagate surface phasmon.All light beams for participating in logical operation, can pass through reflecting mirror, beam splitting
Mirror etc. adjusts the angle between them, to focus on respectively specified coupling grating；The surface excited by different incidence ends
Phasmon is assembled in focal point after zone plate and realizes interference；By the phase difference for controlling input signalTo control
The light intensity I of output end,The method of control input signal phase has very much, for example optics prolongs
Slow line, Babinet's compensator etc..With reference to Fig. 2, interference of the signal light in output end of input port A and input port C is shown
Situation.According to the principle of interference of electromagnetic wave, the carrier wave that two beam phases are identical, intensity is I can interfere phase at output end (focal point)
Long, output intensity is 4I multiplied by grating coupling efficiency, as shown in Figure 2 a, when Fig. 2 b is given apart from output end 1m, detection
The far-field signal intensity arrived；When two signal light phase by pi, they can be in output end interference cancellation, output intensity 0, such as
Shown in Fig. 2 c, when Fig. 2 d is given apart from output end 1m, the far-field signal intensity that detects.Note that due to SPP through before single seam to
Scattering properties, spot center is not in origin after being coupled to far field.Grating substitution output slit (3) be can choose to further mention
High output coupling overall strength.It can be seen that when input phase difference from 0 variation be π when, far-field signal intensity contrast general 20
Times.A certain light intensity value is set as threshold value, output intensity is logical zero when being less than this threshold value, when output intensity is greater than this threshold value
For logical one.There is the control to output for logical zero or logical one, then can design various logic door, realizes logic fortune
It calculates and more advanced calculating.
It is specific below by way of example the present invention also provides a kind of method for realizing logic computing function based on phasmon
Illustrate the several typical logic functions realized using the device and method of the above embodiment of the present invention.
Embodiment 1
Fig. 2 gives the simulation surface of intensity distribution of "AND" logic gate of the present invention.Working principle is as described below: two beam coherent lights
It is injected respectively by input terminal A and input terminal C, assembles in output end D after Fresnel zone plate and do interference operation, while being put
Light power meter here detects light intensity.Due to the coefficient of coup of coupling output grating or slit because manufacture craft is variant,
For each certain device, normalized intensity spectrum is defined, when all same-phases of the component for participating in interference, output intensity is most
By force, it is defined as normalized intensity 1, is defined as normalized intensity 0. for input terminal, when having light injection when interference cancellation completely
It is defined as logical one, when unglazed injection defines logical zero；When making "AND" logical gate operations, for output end, according to normalization
Intensity spectrum, optical power are greater than 0.8 and are defined as logical one, logical zero are defined as less than 0.4, as shown in Figure 3.Two beam phase phases
Same, light intensity is the signal light of I, can mutually be grown in output end (focal point) interference, output intensity 4I, as shown in Figure 2 a；When two letters
When number light phase phase difference of pi, they can interfere cancellation in output end, output intensity 0, as shown in Figure 2 c；By being placed on output end D
Light power meter record light intensity.
As the result is shown: when the light intensity of input terminal A and input terminal C are logical zero, the light intensity that output end measures is logic
"0"；When the light intensity of input terminal A is logical zero, and the light intensity of input terminal C is logical one, the light intensity that output end measures is logic
"0"；When input terminal A is logical one, and the light intensity of input terminal C is logical zero, the light intensity that output end measures is logical zero；?
When the light intensity of input terminal A and input terminal C are logical one, the light intensity that output end measures is logical one；.The results are shown in Table 1 for this,
The relationship of "AND" logic gate between input terminal A and input terminal C is reflected, realizes "AND" logic gate function.
Embodiment 2
Working principle same as Example 1, table 1 give the optical logic operation of OR-gate as a result, different from AND gate,
The threshold value of OR-gate is changed.When making "or" logical gate operations, for output end, composed according to normalized intensity, optical power
It is defined as logical one greater than 0.2, is defined as logical zero less than 0.1, as shown in figure 3, this threshold definitions is " threshold value 2 ".According to
Optical logic operation result and " threshold value " define, and table 2 gives corresponding truth table, reflects between input terminal A and input terminal C
The logical relation of "or" realizes the function of "or" logic gate.
Embodiment 3
Working principle and use " threshold value 2 " same as Example 1 defines, and table 1 gives distance optical logic operation knot
Fruit and corresponding truth table.Wherein "-I " indicates that light intensity is identical with " I ", phase phase difference " π ".Truth table reflect input terminal A with
The logical relation of distance between input terminal C, realizes the function of exclusive logic door.
Embodiment 4
Working principle and use " threshold value 2 " same as Example 1 defines, and table 1 gives " non-" optical logic operation result
With corresponding truth table.Wherein "-I " indicates that light intensity is identical with " I ", phase phase difference " π ".Truth table reflect input terminal A with it is defeated
Enter the logical relation for holding nondisjunction between C, realizes NOT logic gate.
Table 1
Embodiment 5
Fig. 4 gives the simulation surface of intensity distribution of " exclusive or non-exclusive " logic gate of the invention.When doing " exclusive or non-exclusive " logical operation, have
Three beams coherent light is injected by input terminal A, input terminal C and control terminal B respectively.The input light of control terminal B plays reference light when operation
Effect.Identical working principle and using " threshold value 2 " define, table 2 give " exclusive or non-exclusive " optical logic operation result with it is corresponding
Truth table.Truth table reflects between input terminal A and input terminal C the logical relation of " exclusive or non-exclusive ", realizes " exclusive or non-exclusive " logic
The function of door.
Embodiment 6
Working principle and use " threshold value 2 " same as Example 5 defines.When doing nand logical operation, there is three beams phase
Dry light is injected by input terminal A, input terminal C and control terminal B respectively.The input light of control terminal B plays reference light when operation.Its
In " -4I " indicate 4 times " I " light intensity, with " I " phase phase difference " π ".Table 2 give nand optical logic operation result with it is corresponding
Truth table.Truth table reflects the logical relation of nand between input terminal A and input terminal C, realizes nand logic gate
Function.
Embodiment 7
Working principle and use " threshold value 2 " same as Example 5 defines.When doing nondisjunction logical operation, there is three beams phase
Dry light is injected by input terminal A, input terminal C and control terminal B respectively.The input light of control terminal B plays reference light when operation.Its
In " -4I " indicate 4 times " I " light intensity, with " I " phase phase difference " π ".Table 2 give nondisjunction optical logic operation result with it is corresponding
Truth table.Truth table reflects the logical relation of nondisjunction between input terminal A and input terminal C, realizes nondisjunction logic gate
Function.
Table 2
Above-described specific embodiment, to the purpose of the invention patent, technical scheme and beneficial effects carried out into
One step is described in detail, it should be understood that being not used to limit this foregoing is merely a specific embodiment of the invention
The protection scope of invention, all within the spirits and principles of the present invention, any modification, equivalent substitution, improvement and etc. done should all
It is included within protection scope of the present invention.
Claims (5)
1. a kind of surface phasmon integrated-type all-optical logic gate device based on high quality single crystal silver, it is characterised in that the device
By input module, surface phasmon (SPP) assembles module and output module is constituted；Wherein input module is three input gate knots
Structure, the identical and horizontal optical grating constitution being equally spaced by three groups of structures, i.e. input port A, control port B and input port C, when
When using dual input end door, control port B can leave unused；SPP convergence module by it is non-it is paraxial under the conditions of zone plate constitute；Output
Module is made of output end and optical detector；Wherein, the zone plate is 5um at a distance from the grating.
2. the integrated-type all-optical logic gate device according to claim 1 based on surface phasmon, it is characterised in that institute
Stating grating is the rectangular channel in period profile etched on high quality single crystal silver plate with micro-nano manufacturing method.
3. the integrated-type all-optical logic gate device according to claim 1 based on surface phasmon, it is characterised in that institute
Stating zone plate is to meet zone plate basis mechanism in horizontal distribution with what micro-nano manufacturing method etched on high quality single crystal silver plate
Rectangular channel.
4. the integrated-type all-optical logic gate device according to claim 1 based on surface phasmon, it is characterised in that institute
Stating optical detector is the power monitor placed in output end.
5. the integrated-type all-optical logic gate device according to claim 1 based on surface phasmon, it is characterised in that according to
According to above structure, the variation and definition of logical zero and " 1 ", process are as follows: for input terminal, be defined as when having light injection are realized
Logical one, when unglazed injection, define logical zero；When making "AND" logical gate operations, for output end, composed according to normalized intensity,
Optical power is greater than 0.8 and is defined as logical one, is defined as logical zero less than 0.4, when making other logical gate operations, for output
End, is composed according to normalized intensity, and optical power is greater than 0.2 and is defined as logical one, is defined as logical zero less than 0.1；Difference input
The signal light at end is exported since the difference of phase difference directly affects the power of output end light by making in output end interference operation
It holds light intensity variation to realize the variation of logical zero and " 1 ", realizes all-optical logic operations.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610647448.1A CN106444213B (en) | 2016-08-09 | 2016-08-09 | A kind of integrated form surface phasmon logic circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610647448.1A CN106444213B (en) | 2016-08-09 | 2016-08-09 | A kind of integrated form surface phasmon logic circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106444213A CN106444213A (en) | 2017-02-22 |
| CN106444213B true CN106444213B (en) | 2019-08-09 |
Family
ID=58184906
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610647448.1A Expired - Fee Related CN106444213B (en) | 2016-08-09 | 2016-08-09 | A kind of integrated form surface phasmon logic circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106444213B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107976855B (en) * | 2017-12-18 | 2023-09-22 | 北京大学 | Universal linear optical all-optical logic gate and implementation method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101840126A (en) * | 2010-04-21 | 2010-09-22 | 中国科学院半导体研究所 | Silicon-based cascaded resonant cavity all-optical logical AND gate structure capable of reducing power consumption |
| US8111443B1 (en) * | 2009-04-15 | 2012-02-07 | The United States Of America As Represented By The Secretary Of The Navy | Plasmonic transistor |
| CN104508586A (en) * | 2012-07-04 | 2015-04-08 | 奥普拓塞斯有限公司 | Reconfigurable optical processing system |
-
2016
- 2016-08-09 CN CN201610647448.1A patent/CN106444213B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8111443B1 (en) * | 2009-04-15 | 2012-02-07 | The United States Of America As Represented By The Secretary Of The Navy | Plasmonic transistor |
| CN101840126A (en) * | 2010-04-21 | 2010-09-22 | 中国科学院半导体研究所 | Silicon-based cascaded resonant cavity all-optical logical AND gate structure capable of reducing power consumption |
| CN104508586A (en) * | 2012-07-04 | 2015-04-08 | 奥普拓塞斯有限公司 | Reconfigurable optical processing system |
Non-Patent Citations (2)
| Title |
|---|
| All-Optical Logic Gates Based on Nanoscale Plasmonic Slot Waveguides;Yulan Fu等;《Nano Letters》;20121101;第2012卷(第12期);第5784-5789页、附图2 * |
| Planar Plasmonic Focusing and Optical Transport Using CdS Nanoribbon;Zheyu Fang等;《ACS NANO》;20091215;第4卷(第1期);第75-82页、附图1、4-5 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106444213A (en) | 2017-02-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Chutinan et al. | Surface-emitting channel drop filters using single defects in two-dimensional photonic crystal slabs | |
| Li et al. | Free-space coupling of a light beam into a symmetrical metal-cladding optical waveguide | |
| Inoue et al. | Observation of small group velocity in two-dimensional AlGaAs-based photonic crystal slabs | |
| US7058259B2 (en) | Optical device having a waveguide lens with multimode interference | |
| US9971098B2 (en) | Coupler and optical waveguide chip applying the coupler | |
| CN106054291A (en) | Mixed metal-dielectric SSP (Spoof Surface Plasmon) periodic grating system as well as application and method thereof | |
| CN102156375A (en) | Optical logic gate | |
| CN113835158B (en) | Free space light and photon chip end face coupling method | |
| CN103986671A (en) | Non-blocking 2 * 2 optical switching node based on embedded type silicon substrate micro-ring resonant cavities | |
| Asano et al. | Investigation of a channel-add/drop-filtering device using acceptor-type point defects in a two-dimensional photonic-crystal slab | |
| KR20170033344A (en) | Cross waveguide | |
| CN106444213B (en) | A kind of integrated form surface phasmon logic circuit | |
| Germer et al. | Si-based light emitter in an integrated photonic circuit for smart biosensor applications | |
| CN105700073B (en) | A kind of surface phasmon unidirectional couplings and beam splitting device and preparation method | |
| CN100541147C (en) | A kind of measuring method of slowing light velocity effect of photon crystal and measurement mechanism | |
| Sermage et al. | Polariton acceleration in a microcavity wedge | |
| Villeneuve et al. | Two‐photon absorption in In1− x− y Ga x Al y As/InP waveguides at communications wavelengths | |
| Wang et al. | Experimental evidence of photonic crystal waveguides with wide bandwidth in two-dimensional Al 2 O 3 rods array | |
| CN106483774A (en) | Coat the multilamellar sub-wavelength structure Written Device of Medium Wave Guide based on unsymmetrical metal | |
| Shen et al. | Slanted gold mushroom array: a switchable bi/tridirectional surface plasmon polariton splitter | |
| KR20230016649A (en) | Tunable nanocircuit and waveguide systems and methods on optical fibers | |
| Chen et al. | Broadband and polarization-mediated unidirectional plasmon polaritons launch based on metallic triangle aperture arrays | |
| Ohmori et al. | Integrated-optic add/drop multiplexing of free-space waves for intra-board chip-to-chip optical interconnects | |
| Yoshimura et al. | Coupling efficiencies in reflective self-organized lightwave network (R-SOLNET) simulated by the beam propagation method | |
| Zhang et al. | Compact optical phased array using a serial grating antenna design |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20190809 Termination date: 20210809 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |