CN106375077A - Method of SI4463 chip for realizing data transmission by adopting GPIO mode - Google Patents
Method of SI4463 chip for realizing data transmission by adopting GPIO mode Download PDFInfo
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- CN106375077A CN106375077A CN201610744212.XA CN201610744212A CN106375077A CN 106375077 A CN106375077 A CN 106375077A CN 201610744212 A CN201610744212 A CN 201610744212A CN 106375077 A CN106375077 A CN 106375077A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/048—Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0079—Receiver details
- H04L7/0087—Preprocessing of received signal for synchronisation, e.g. by code conversion, pulse generation or edge detection
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
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Abstract
The invention discloses a method of an SI4463 chip for realizing data transmission by adopting a GPIO mode. The method comprises the steps of transmitting data by using a state transmitting machine tx-state; and receiving data by using state reception machine rx-state, wherein the state transmitting machine tx-state comprises a tx-idle state, a tx-ing state and a tx-end state; and the state receiving machine rx-state comprises an rx-prem state, an rx-sync state and an rx-data state. Compared with the prior art, the method of the SI4463 chip for realizing data transmission by adopting the GPIO mode can transmit large batches of data and can transmit multiple data such as start bits, data bits and check bits wirelessly in the practical application.
Description
Technical field
The present invention relates to chip data transmission method, more particularly, to si4463 chip realize data transfer using gpio pattern
Method.
Background technology
In micro-power wireless communication, si4463 chip has been used widely.Currently used si4463 radio frequency core
Piece is all by fifo pattern transceiving data it would be desirable to the data sending gives the internal buffer of si4463, starts si4463
Transmission, it is how to transmit that mcu end does not need each of focused data, easy to use.
Fifo, is the abbreviation of first input first output, and Chinese means First Input First Output, and this is a kind of biography
The sequentially execution method of system, the instruction being introduced into first completes and retires from office, and then just execution Article 2 instruction.Fifo queue is not to report
Literary composition is classified, and when the speed that the speed that message enters incoming interface can send more than interface, fifo presses the elder generation that message reaches interface
Message is sequentially allowed to enter enqueue afterwards, meanwhile, fifo allows the order that message presses in team go out team in the outlet of queue, and advanced message will
First go out team, laggard message by after go out team.Fifo queue has process simply, the little advantage of expense.But fifo does not differentiate between message
Type, using the forward mode done one's best, makes the delay of the real-time application to time-sensitive (as voip) cannot be guaranteed, and closes
The bandwidth of key business nor be guaranteed.
Prior art exists in data transmission procedure, and the digit that data is transmitted in the air is fixing 8, works as practical application
In when needing to transmit in the air start bit, data bit, check bit, be difficult to realize in fifo pattern.Under this technology, exist huge
Limitation, cannot meet the demand of new product.
Content of the invention
The present invention is directed to deficiency of the prior art, there is provided si4463 chip realizes data transfer using gpio pattern
Method, can transmit large batch of data, can transmit start bit, data bit, check bit etc. in the air in actual applications multiple
Data.
In order to solve above-mentioned technical problem, the present invention is addressed by following technical proposals: si4463 chip adopts
The method that gpio pattern realizes data transfer, carries out data is activation and using reception shape including using transmission state machine tx_state
State machine rx_state carries out data receiver, follows the steps below, step one during described transmission state machine tx_state work, will
Two gpio of si4463 and mcu communication are arranged to clock line data line；Step 2, aerial according to defined in practical application
Code source speed rate, the aerial code source speed of setting si4463；Step 3, is transmitted data, according to the association in practical application
View requires, and data is packaged in one and sends in the tx_buf of relief area；Step 4, starts the sending mode of si4463, si4463
Clock line clk be output as set rate clock；Step 5, mcu clock line clk receives the clock signal of si4463, and
According to this clock rate, when the rising edge of each clock cycle arrives, data is activation 1bit in tx_buf is passed through data by mcu
Line is sent to si4463.
It is preferable that described transmission state machine tx_state is divided into three kinds of states: tx_idle state in technique scheme,
Tx_ing state and tx_end state；During the described transmission not actuated data is activation of state machine tx_state, tx_state locates always
Instruct in the order tx_start that starts to be sent such as tx_idle state；Refer to when transmission state machine tx_state receives tx_start
When making, the bit that state machine takes out the first character section in tx_buf under tx_dile state sends, and state is switched
To under tx_ing state；Under tx_ing state, each clock cycle rising edge sends a bit, and whether judges current byte
It is sent completely, and how to send data check position, the data is activation in tx_buf completes, and state machine state is switched to
Tx_end state；Under tx_end state, system mode is switched to reception pattern, prepares receiving data, and state will be sent
Machine returns to tx_idle state, prepares to send next time.
It is preferable that described user equipment rx_state includes rx_prem state, rx_sync shape in technique scheme
State and rx_data state；During the work of described user equipment rx_state, include, step one, determine the length that standard preamble accords with
Degree, and this length is set to l；Step 2, user equipment rx_state are in rx_prem state, and detect leading character length,
This length is set to l1；Step 3, the step 2 that repeats, obtain length l1, l2, l3, l4 ... ln, by length l1, l2, l3,
L4 ... ln and length l, are contrasted, if length l1, l2, l3, l4 ... ln are less than l, enter next step, otherwise, from current
Bit returns and restarts to detect leading character；Step 4, user equipment rx_state are switched to rx_sync state, start to receive
Data, under rx_sync state, mates along rising edge sampled data and with the synchronization character setting in each clock, matching process
In need to do even-odd check to synchronization character, when synchronization character, the match is successful, then enter step 5, otherwise from current bit start weight
New coupling synchronization character, when the continuous n clock cycle, the match is successful, then return to step one；Step 5, user equipment rx_
State is switched to rx_data state, according to data bit, check bit receiving data, does than according to the data length in receiving data
Data check, if verifying successfully, data receiver completes, and state machine returns to rx_prem state, and enters step 6, if school
Test failure, then data receiver failure, is returned directly to rx_prem state；Step 6, data is given by user equipment rx_state
Upper layer application is processed.
The present invention can transmit large batch of data, can transmit start bit, data bit, verification in actual applications in the air
Multiple data such as position.
Brief description
Fig. 1 is schematic diagram of the present invention.
Specific embodiment
With specific embodiment, the present invention is described in further detail below in conjunction with the accompanying drawings: as shown in figure 1, si4463 core
The method that piece realizes data transfer using gpio pattern, carries out data is activation and use including using transmission state machine tx_state
User equipment rx_state carries out data receiver, follows the steps below, step during described transmission state machine tx_state work
One, two gpio of si4463 and mcu communication are arranged to clock line data line；Step 2, according to defined in practical application
Aerial code source speed rate, setting si4463 aerial code source speed；Step 3, is transmitted data, according to practical application
In protocol requirement, by data be packaged in one send relief area tx_buf in；Step 4, starts the sending mode of si4463,
The clock line clk of si4463 is output as the rate clock setting；Step 5, mcu clock line clk receives the clock letter of si4463
Number, and according to this clock rate, when the rising edge of each clock cycle arrives, data is activation 1bit in tx_buf is led to by mcu
Cross data line and be sent to si4463.
Described transmission state machine tx_state is divided into three kinds of states: tx_idle state, tx_ing state and tx_end shape
State；During the described transmission not actuated data is activation of state machine tx_state, it is to be sent that tx_state has been at tx_idle state etc.
Start order tx_start instruction；When transmission state machine tx_state receives tx_start instruction, state machine is in tx_dile shape
The bit taking out the first character section in tx_buf under state sends, and state is switched under tx_ing state；In tx_ing
Under state, each clock cycle rising edge sends a bit, and judges whether current byte is sent completely, and how to send number
According to check bit, the data is activation in tx_buf completes, and state machine state is switched to tx_end state；In tx_end state
Under, system mode is switched to reception pattern, prepares receiving data, and return to tx_idle state by sending state machine, prepare
Next time sends.
Described user equipment rx_state includes rx_prem state, rx_sync state and rx_data state；Described connect
When receiving state machine rx_state work, include, step one, determine the length that standard preamble accords with, and this length is set to l；Step
2nd, user equipment rx_state is in rx_prem state, and detects leading character length, and this length is set to l1；Step 3,
Repeat step 2, obtain length l1, l2, l3, l4 ... ln, length l1, l2, l3, l4 ... ln and length l are contrasted,
If length l1, l2, l3, l4 ... ln are less than l, enter next step, otherwise, from current bit return restart to detect leading
Symbol；Step 4, user equipment rx_state are switched to rx_sync state, start receiving data, under rx_sync state, every
Individual clock mates along rising edge sampled data and with the synchronization character setting, and needs synchronization character is done in odd even school in matching process
Test, the match is successful when synchronization character, then enter step 5, otherwise start again to mate synchronization character from current bit, when continuous n
Clock cycle, the match is successful, then return to step one；Step 5, user equipment rx_state are switched to rx_data state, press
According to data bit, check bit receiving data, doing data check than according to the data length in receiving data, if verifying successfully, counting
According to finishing receiving, state machine returns to rx_prem state, and enters step 6, if verifying unsuccessfully, data receiver failure, directly
Connect and return to rx_prem state；Step 6, data is processed by user equipment rx_state to upper layer application.
The principle of receiving data is that si4463 passes through clock line to mcu tranmitting data register signal, and mcu is upper per clock cycle
Rise along sampled data, and data is become final data according to protocol packing.Receive and realized by user equipment, in radio-frequency communication
During, bottom data frame adopts the format transmission of leading character+synchronization character+data+verification.And the lattice that different data adopts
Formula is different, and leading character does not have check bit, and synchronization character data position may tape verifying position.
The transmitting-receiving realizing data by gpio introduced in this programme, in data transmission procedure, and without focused data
Digit, the data sending and receiving in need all can as 2 system bit flow, during transmission, defined in specific protocol
Every bit data is sent on gpio by data form by sending state machine.During reception, bit is pressed by user equipment
Data receiver is come, further according to actual protocol format, bit flow data is packaged into data.
N and n in this programme, is defined concrete numerical value according to practical application.Si4463 chip operation is existed by this programme
Under gpio pattern, realize reception and the transmission of data by sending state machine and user equipment, send state machine and receive shape
State machine can become a state machine, be received and transmitted work simultaneously.Real by the gpio of the gpio of si4463 and mcu
The transmitting-receiving of existing data, in the program, mcu needs concern to receive and sends the transmission of each of data, and the program realizes upper phase
To complexity, it is possible to achieve the data communication under various data structures.
In this programme, some advantage following is had by the transmitting-receiving that gpio pattern realizes data:
Under first, fifo pattern, the data bit of air transmission cannot flexible configuration, under gpio pattern, send data by bit position,
The data transfer of arbitrary format can be met.
Under second, fifo pattern, the synchronization character of si4463 is at most only 4 bytes, the data frame format under fifo pattern
Restriction be difficult to realize the synchronization character of unnecessary 4 bytes.And under gpio pattern, be to send data according to bit, sync word length is not subject to
Limit.
Under 3rd, gpio pattern, the length of message and form are not shown by the data frame format of fifo, data length and lattice
Formula is unrestricted.
The present invention can transmit large batch of data, can transmit start bit, data bit, verification in actual applications in the air
Multiple data such as position, flexible configuration, the data transfer of arbitrary format can be met, and the length transmitted is unrestricted.
Claims (3)
1.si4463 chip using gpio pattern realize data transfer method it is characterised in that: include using send state machine
Tx_state carries out data is activation and carries out data receiver, described transmission state machine tx_ using user equipment rx_state
Follow the steps below during state work, step one, two gpio of si4463 and mcu communication are arranged to clock line data
Line；Step 2, aerial code source speed rate according to defined in practical application, the aerial code source speed of setting si4463；Step
Three, it is transmitted data, according to the protocol requirement in practical application, data is packaged in one and sends in the tx_buf of relief area；
Step 4, starts the sending mode of si4463, and the clock line clk of si4463 is output as the rate clock setting；Step 5, mcu
Clock line clk receives the clock signal of si4463, and according to this clock rate, when the rising edge of each clock cycle arrives,
Data is activation 1bit in tx_buf is sent to si4463 by data line by mcu.
2. si4463 chip according to claim 1 using gpio pattern realize data transfer method it is characterised in that:
Described transmission state machine tx_state is divided into three kinds of states: tx_idle state, tx_ing state and tx_end state；Described
When sending the not actuated data is activation of state machine tx_state, tx_state has been to be sent startup the such as tx_idle state to be ordered
Tx_start instructs；When transmission state machine tx_state receives tx_start instruction, state machine takes out under tx_dile state
First bit of the first character section in tx_buf sends, and state is switched under tx_ing state；Under tx_ing state,
Each clock cycle rising edge sends a bit, and judges whether current byte is sent completely, and how to send data check
Position, the data is activation in tx_buf completes, and state machine state is switched to tx_end state；Under tx_end state, will be
System state is switched to reception pattern, prepares receiving data, and returns to tx_idle state by sending state machine, prepares to send out next time
Send.
3. si4463 chip according to claim 2 using gpio pattern realize data transfer method it is characterised in that:
Described user equipment rx_state includes rx_prem state, rx_sync state and rx_data state；Described user equipment
During rx_state work, include, step one, determine the length that standard preamble accords with, and this length is set to l；Step 2, reception shape
State machine rx_state is in rx_prem state, and detects leading character length, and this length is set to l1；Step 3, repeat walk
Rapid two, obtain length l1, l2, l3, l4 ... ln, length l1, l2, l3, l4 ... ln and length l are contrasted, if length l1,
L2, l3, l4 ... ln is less than l, then enter next step, otherwise, returns from current bit and restarts to detect leading character；Step 4,
User equipment rx_state is switched to rx_sync state, starts receiving data, under rx_sync state, on each clock edge
Rise and mate along sampled data and with the synchronization character setting, need in matching process to do even-odd check to synchronization character, work as synchronization character
The match is successful for symbol, then enter step 5, otherwise start again to mate synchronization character from current bit, when the continuous n clock cycle not
It is made into work(, then return to step one；Step 5, user equipment rx_state are switched to rx_data state, according to data bit, school
Test a receiving data, do data check than according to the data length in receiving data, if verifying successfully, data receiver completes,
State machine returns to rx_prem state, and enters step 6, if verifying unsuccessfully, data receiver failure, and it is returned directly to rx_
Prem state；Step 6, data is processed by user equipment rx_state to upper layer application.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610744212.XA CN106375077A (en) | 2016-08-29 | 2016-08-29 | Method of SI4463 chip for realizing data transmission by adopting GPIO mode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610744212.XA CN106375077A (en) | 2016-08-29 | 2016-08-29 | Method of SI4463 chip for realizing data transmission by adopting GPIO mode |
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| CN106375077A true CN106375077A (en) | 2017-02-01 |
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| CN201610744212.XA Pending CN106375077A (en) | 2016-08-29 | 2016-08-29 | Method of SI4463 chip for realizing data transmission by adopting GPIO mode |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108710597A (en) * | 2018-05-17 | 2018-10-26 | 福建升腾资讯有限公司 | A kind of method and system using GPIO optimization MCU communications |
| WO2022072052A1 (en) * | 2020-10-01 | 2022-04-07 | Qualcomm Incorporated | Batch operation across an interface |
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| CN105119907A (en) * | 2015-07-22 | 2015-12-02 | 哈尔滨工业大学 | FPGA-based BiSS-C communication protocol method |
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| CN105119907A (en) * | 2015-07-22 | 2015-12-02 | 哈尔滨工业大学 | FPGA-based BiSS-C communication protocol method |
| CN105391508A (en) * | 2015-10-15 | 2016-03-09 | 盛科网络（苏州）有限公司 | Time division multiplexing architecture of quad serial gigabit media independent interface physical coding sublayer (QSGMII PCS) transmitting direction state machine, control method and control system therefor |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108710597A (en) * | 2018-05-17 | 2018-10-26 | 福建升腾资讯有限公司 | A kind of method and system using GPIO optimization MCU communications |
| WO2022072052A1 (en) * | 2020-10-01 | 2022-04-07 | Qualcomm Incorporated | Batch operation across an interface |
| US11513991B2 (en) | 2020-10-01 | 2022-11-29 | Qualcomm Incorporated | Batch operation across an interface |
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