CN106371942A - Memory error processing method, and related apparatus and system - Google Patents

Memory error processing method, and related apparatus and system Download PDF

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Publication number
CN106371942A
CN106371942A CN201610743187.3A CN201610743187A CN106371942A CN 106371942 A CN106371942 A CN 106371942A CN 201610743187 A CN201610743187 A CN 201610743187A CN 106371942 A CN106371942 A CN 106371942A
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scsi
order
memorizer
memory error
fault processing
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CN201610743187.3A
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CN106371942B (en
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罗庆超
张雷
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices

Abstract

Embodiments of the invention disclose a memory error processing method, and a related apparatus and system. The memory error processing method comprises the steps of receiving a first user-state data access command sent by a user-state application; converting the first user-state data access command into a first SCSI command; sending the first SCSI command to a memory through an SCSI protocol stack; and when a first response sent by an SCSI protocol is received, indicating that the execution of the first SCSI command fails by the first response, carrying a memory error code by the first response, obtaining a second SCSI command used for repairing the memory, enabling a repair operation indication of the second SCSI command to correspond to the memory error code, and sending the second SCSI command to the memory through the SCSI protocol stack. According to the technical scheme provided by the method, the apparatus and the system, memory error repair can be performed in a targeted manner.

Description

Memory errors processing method and relevant apparatus and system
Technical field
The application is related to field of computer technology, specifically related generally to memory errors processing method and relevant apparatus and System.
Background technology
In computer system (as storage control), operating system nucleus (referred to as " kernel ") accesses the agreement of memorizer Stack be usually scsi (small computer system interface, small computer system interface) protocol stack, here it On by abstract for memorizer for block (block) equipment, such as one hard disk can be conceptualized as one or more block devices.It is based on The block device that scsi protocol stack takes out, User space is applied according to posix (portable operating system Interface, portable operating system interface) conduct interviews.
Among prior art, for the memorizer being conceptualized as block device, when using standard block device visit order (example As read/write command) when conducting interviews, in the event of access errors, then be typically only capable to return simple for access errors Errored response (eio), the errors repair that carries out that this allows for targeting becomes relatively difficult.
Content of the invention
The embodiment of the present application provides memory errors processing method and relevant apparatus and system, is conducive to the carrying out of targeting Memory error is repaired.
The embodiment of the present application first aspect provides a kind of memory errors processing method of computer system, described computer System may include that User space application, small computer system interface (scsi) protocol stack and memory error process assembly.Institute State memory error process assembly and described scsi protocol stack is located at the kernel state of described computer system.Described User space application User space positioned at described computer system.
Methods described includes: when User space application needs to access memorizer, described User space is applied to described memorizer Fault processing assembly sends first user state data access command;Described memory error process assembly is receiving described User space After the first user state data access command that application sends, described first user state data access command is converted to a scsi Order, sends a described scsi order by scsi protocol stack to described memorizer;
Described scsi protocol stack receive a described scsi order rear to described memorizer send described first Scsi order;Receive the implementing result to a described scsi order for the described memorizer, depositing described in the instruction of described implementing result In the case that reservoir executes unsuccessfully to a described scsi order, send the first response to described memory error process assembly, Wherein, described first response indicates that a described scsi order executes failure, and described first response carries memory error code (sense code).
Described memory error process assembly in the case of receiving described first response that described scsi agreement sends, Obtain the 2nd scsi order for repairing described memorizer, the reparation operation instruction of described 2nd scsi order and described storage Device error code corresponds to, and sends described 2nd scsi order by described scsi protocol stack to described memorizer.
Methods described may further comprise: the described scsi order and described second that described memorizer execution receives Scsi order.
For example, when described 2nd scsi order is reset command, described memorizer passes through described second that execution receives Scsi order is to be restarted;Or when described 2nd scsi order is reset command, described memorizer passes through what execution received Described 2nd scsi order is to be resetted;Or when described 2nd scsi order is to access initial address adjustment order, described deposit Reservoir adjusts access initial address by the described 2nd scsi order that execution receives.
Wherein, described 2nd scsi order can be for example reset command or rewrite command or read order or diagnostic command again Deng.Wherein, described memorizer passes through to execute the described 2nd scsi order just corresponding mistake of very possible reparation.
Optionally, in some possible embodiments of first aspect, described computer system also includes described memorizer Corresponding block device, wherein, described block device is located at the kernel state of described computer system;Described User space is applied and is deposited to described Before reservoir fault processing assembly sends first user state data access command, methods described also includes:
Described User space is applied and is sent second user state data access command, described first user state number to described block device Asked the data object accessing according to visit order, asked the data pair of access with described second user state data access command As between there is common factor;
The described second user state data access command receiving is encapsulated as standard block device and accesses life by described block device Order, sends described standard block device visit order to described scsi protocol stack;
The described standard block device visit order receiving is converted to the 3rd scsi order by described scsi protocol stack, to institute State memorizer and send the 3rd scsi order;Receive the implementing result that described memorizer is directed to described 3rd scsi order;When described The described implementing result that memorizer is directed to described 3rd scsi order is the described 3rd scsi order failure of execution, described scsi association View stack sends, to described block device, the response that the described standard block device visit order of instruction executes failure,
Described block device is receiving the instruction described standard block device visit order execution from described scsi protocol stack After the response of failure, send, to the application of described User space, the sound that the described second user state data access command of instruction executes failure Should;
Described User space application receives the instruction described second user state data access command execution that described block device sends The response of failure.
In the example above, User space application preferentially can carry out data access by block device, when discovery is set by block After carrying out data access failure, same or similar data access is being carried out by memory error process assembly.When So, User space application may be based on other strategies to select by memory error process assembly or to carry out by block device Data access.
The embodiment of the present application second aspect provides a kind of memory errors processing method, comprising: the application of receive user state is sent out The first user state data access command sent;Described first user state data access command is converted to the first miniature computer System interface (scsi) order;A described scsi order is sent to described memorizer by scsi protocol stack;Described when receiving The first response that scsi agreement sends, described first response indicates that a described scsi order executes failure, described first response Carry memory error code, obtain the 2nd scsi order for repairing described memorizer, wherein, described 2nd scsi order Repair operation instruction corresponding with described memory error code, send described second by described scsi protocol stack to described memorizer Scsi order.
The embodiment of the present application third aspect provides a kind of computer system, comprising: User space application, memory error are processed Assembly and small computer system interface (scsi) protocol stack, wherein, described memory error process assembly and described scsi assist View stack is located at the kernel state of described computer system;
Described User space application, for sending first user state data access life to described memory error process assembly Order;
Wherein, described memory error process assembly, for receiving the first user state that described User space application sends After data access command, described first user state data access command is converted to a scsi order, by scsi agreement Stack sends a described scsi order to described memorizer;
Wherein, described scsi protocol stack, for, after receiving a described scsi order, sending to described memorizer A described scsi order;Receive the implementing result to a described scsi order for the described memorizer, refer in described implementing result In the case of showing that described memorizer executes unsuccessfully to a described scsi order, send the to described memory error process assembly One response, wherein, described first response indicates that a described scsi order executes failure, and it is wrong that described first response carries memorizer Error code;
Described memory error process assembly, in the feelings receiving described first response that described scsi agreement sends Under condition, obtain the 2nd scsi order for repairing described memorizer, the reparation operation instruction of described 2nd scsi order and institute State memory error code to correspond to, described 2nd scsi order is sent to described memorizer by described scsi protocol stack.
Optionally, in some possible embodiments of the third aspect, described computer system also includes described memorizer Corresponding block device, described block device is located at the kernel state of described computer system.
Wherein, described User space application is additionally operable to, and is sending first user state number to described memory error process assembly Before visit order, send second user state data access command, described first user state data access to described block device The data object accessing is asked in order, and described second user state data access command is asked between the data object accessing There is common factor;
Described block device is used for, and the described second user state data access command receiving is encapsulated as standard block device and visits Ask order, send described standard block device visit order to described scsi protocol stack;
Described scsi protocol stack is additionally operable to, and the described standard block device visit order receiving is converted to the 3rd scsi life Order, sends the 3rd scsi order to described memorizer;Receive the implementing result that described memorizer is directed to described 3rd scsi order; When the described implementing result that described memorizer is directed to described 3rd scsi order is the described 3rd scsi order failure of execution, to institute State block device and send the response that the described standard block device visit order of instruction executes failure,
Described block device is additionally operable to, and accesses life receiving the instruction described standard block device from described scsi protocol stack After the response of order execution failure, send to the application of described User space and indicate that described second user state data access command executes mistake The response losing;
Described User space application is additionally operable to, and receives the instruction described second user state data access life that described block device sends The response of order execution failure.
The embodiment of the present application fourth aspect provides a kind of memory error processing meanss, comprising:
Receiving unit, the first user state data access command sending for the application of receive user state;
Converting unit, for being converted to the first small computer system interface by described first user state data access command (scsi) order;
Transmitting element, for sending a described scsi order by scsi protocol stack to described memorizer;
Repair unit, for when receiving the first response that described scsi agreement sends, described first response instruction is described First scsi order executes failure, and described first response carries memory error code, obtain for repair described memorizer the Two scsi orders, the reparation operation instruction of described 2nd scsi order is corresponding with described memory error code;
Described transmitting element is additionally operable to, and sends described 2nd scsi life by described scsi protocol stack to described memorizer Order.
Further, in the scheme that the application aspects above provides, can obtain in several ways and be used for repairing 2nd scsi order of multiple described memorizer.
For example described acquisition mays include: for the 2nd scsi order repairing described memorizer and calls and described memorizer institute Belong to producer's corresponding fault processing plug-in unit and parse described memory error code;Receive that described fault processing plug-in unit sends with described Memory error code corresponding fault processing strategy;Based on described fault processing strategy generating and described fault processing strategy matching The 2nd scsi order.
Again for example described acquisition mays include: for the 2nd scsi order repairing described memorizer and calls and described memorizer The corresponding fault processing plug-in unit of affiliated producer parses described memory error code;Receive that described fault processing plug-in unit sends with institute State memory error code corresponding fault processing strategy;Apply to described User space and send described fault processing strategy;Receive institute State User space application by calling and the fault processing function of described fault processing strategy matching and described 2nd scsi that sends Order.
The example above provides some repair process machines that memory error process assembly and User space application each may participate in System, is conducive to meeting flexible repair process demand under different scenes.
Wherein, by introducing the fault processing plug-in unit of the affiliated producer of memorizer, be conducive to the ecology of its memorizer of framework, soon The repair process technology of respective memory producer is used in system speed, and then is conducive to further lift system stability reliable Property.
Further, in the scheme that the application aspects above provides, described 2nd scsi order also carries memorizer Parameter adjustment value, described 2nd scsi order is additionally operable to indicate that described memorizer is joined based on described memory parameter adjusted value Number adjustment.
Further, in the scheme that the application aspects above provides, described memory parameter adjusted value includes retrying Number of times adjusted value and/or timeout parameter adjusted value.
As can be seen that due to provide modification memory parameter mechanism so that change that some memory parameter become can Realize.For example pass through to reduce number of retries and/or increase timeout parameter, advantageously reduce kernel fault process time.
Further, in the technical scheme that the application aspects above provides, described memorizer can be for example stacked tile type (smr) hard disk or other kinds of hard disk.
Additionally, the embodiment of the present application the 5th aspect provides a kind of computer-readable recording medium, described computer-readable Storage medium stores the program code processing for memory repair.Described program code include for execute first aspect or The instruction of the method for second aspect.
The embodiment of the present application the 6th aspect also provides memory error processing meanss, it may include: memorizer and processor, lead to Cross the instruction calling in described memorizer storage or code, described processor is used for executing any one of the application offer and deposits Part or all of operation performed by memory error process assembly in reservoir error handling method.
As can be seen that the scheme of the application introduces memory error process assembly so that User space is applied and scsi agreement Interaction between stack eliminate the reliance on block device this uniquely in the middle of bridge, be User space application interact out with described scsi protocol stack Ward off second channel, i.e. User space application can be by memory error process assembly come dereference scsi protocol stack, Jin Erfang Ask memorizer.The motility so making User space application data access becomes higher, is conducive to improving error resilience ability.Additionally, Because block device is to access scsi protocol stack using standard block device visit order (such as read/write command), and related association Arrange in view for this access mode the scsi protocol stack when access errors occur generally only return to block device simply wrong By mistake response (eio), and this eio can not reflect the concrete reason of access errors, so make targeting carry out correlation Errors repair just becomes relatively difficult.And in technical scheme, memory error process assembly will be applied from User space First user state data access command be converted to a scsi order after, then memorizer be transmitted to by scsi protocol stack hold OK, and scsi protocol stack is to feed back the relevant response carrying memory error code for the visit order of scsi form, this Sample allows for when access errors, the memory error that memory error process assembly can be fed back based on scsi protocol stack To learn relevant error reason, and then be conducive to the reparation relevant error of more targeting (specific aim), and then be conducive to being lifted System stability reliability.
Brief description
For the technical scheme being illustrated more clearly that in the embodiment of the present application, below will be attached to use required in embodiment Figure be briefly described it should be apparent that, drawings in the following description are only some embodiments of the present application, for this area For those of ordinary skill, on the premise of not paying creative work, other accompanying drawings can also be obtained according to these accompanying drawings.
The configuration diagram of several computer systems that Fig. 1-a~Fig. 1-d provides for the embodiment of the present application;
A kind of schematic flow sheet of memory errors processing method that Fig. 2 provides for the embodiment of the present application;
The schematic flow sheet of another kind of memory errors processing method that Fig. 3-a provides for the embodiment of the present application;
A kind of schematic diagram of mapping table that Fig. 3-b provides for the embodiment of the present application;
The schematic flow sheet of another kind of memory errors processing method that Fig. 4-a provides for the embodiment of the present application;
The schematic diagram of another kind of mapping table that Fig. 4-b provides for the embodiment of the present application;
The schematic diagram of another kind of mapping table that Fig. 4-c provides for the embodiment of the present application;
A kind of schematic diagram of computer system that Fig. 5 provides for the embodiment of the present application;
A kind of schematic diagram of memory error processing meanss that Fig. 6 provides for the embodiment of the present application;
A kind of schematic diagram of memory error processing meanss that Fig. 7 provides for the embodiment of the present application.
Specific embodiment
The term " comprising " and " having " occurring in present specification, claims and accompanying drawing and their any changes Shape is it is intended that cover non-exclusive comprising.For example contain the process of series of steps or unit, method, system, product or Equipment is not limited to the step listed or unit, but alternatively also includes step or the unit do not listed, or optional Ground is also included for these processes, method, product or the intrinsic other steps of equipment or unit.Additionally, term " first ", " the Two " and " the 3rd " etc. is for distinguishing different objects, it is not intended to describe specific order.
Referring firstly to Fig. 1-a~Fig. 1-d.Wherein, Fig. 1-a shows a kind of conventional architectures of computer system, hardware The memorizer of layer is conceptualized as block (block) equipment, and User space application accesses block device according to posix.In operating system nucleus Assembly (such as block device etc.) pass through scsi agreement stack addressing memorizer.
Fig. 1-b shows a kind of computer system architecture that the embodiment of the present application citing provides, memory error treatment group The functional unit that part increases newly for the application.After newly-increased memory error process assembly, User space application can be wrong by memorizer Miss process assembly and scsi protocol stack to access memorizer.Memory error process assembly also has other names of product.
Some assemblies that the exemplified scsi protocol stack of Fig. 1-c may include, scsi protocol stack for example includes bottom assembly (as scsi low level driver), middle layer assembly (as scsi middle level driver) and upper component is (such as Sd scsi device and sg scsi generic etc.).Certainly scsi protocol stack such component clustering mode is schematic And nonrestrictive.
Some assemblies that Fig. 1-d exemplified memory error process assembly may include, memory error process assembly example As may include adjustment unit, relay unit and repairing unit.Certainly such component clustering mode is schematic and unrestricted Property.
The memorizer that each embodiment of the application is mentioned can for stacked tile type (smr) hard disk or other types of solid state hard disc or its The memorizer of its type.
In conventional art, standard block device interaction flow is directly based upon for scsi protocol stack and block equipment and hands over Mutually, therefore for the response carrying memory error code from memorizer, scsi protocol stack will mask in response and carry Memory error code, therefore, block equipment will be unable to obtain memory error code, this lead to User space application be based on block Equipment is any memory error code that cannot learn correlation.
Block equipment is to be obtained by abstract storage, and 1 memorizer can be conceptualized as one or more block equipment, Multiple memorizeies are likely to be conceptualized as 1 block device.Wherein, in the logical memory space in block equipment and memorizer Amount of physical memory corresponds to, and block equipment is used for using for user or system.
It is described in detail below by specific citing scene.
Refer to Fig. 2, Fig. 2 is that a kind of flow process of memory errors processing method that one embodiment of the application provides is illustrated Figure.Memory errors processing method shown in Fig. 2 citing can be based on the framework shown in Fig. 1-b~Fig. 1-d any one width figure citing To be embodied as.Referring to Fig. 2, an embodiment of the application provides a kind of memory errors processing method to may include:
201st, for example when User space application needs to access memorizer, User space is applied and is sent out to memory error process assembly Send first user state data access command.
202nd, described memory error process assembly receives the described first user state data that described User space application sends Visit order;Described first user state data access command is converted to a scsi life by described memory error process assembly Order.
It is appreciated that the type of data access of first user state data access command and a scsi order is identical, Type of data access for example can be for reading or writing.Such as first user state data access command is User space data read command, that First scsi order is scsi read command.Such as first user state data access command is User space data write command again, that First scsi order is scsi write order, by that analogy.
203rd, described memory error process assembly passes through scsi protocol stack to the memorizer described scsi order of transmission. Wherein, described memorizer, after have received the described scsi order that described scsi protocol stack sends, just can perform institute State a scsi order, and the described scsi order that can send to described scsi protocol stack of described memorizer execute knot Really, implementing result may indicate that a described scsi order execute unsuccessfully or success.
After described scsi protocol stack receives the implementing result of the described scsi order that described memorizer sends, If implementing result indicates that a described scsi order executes failure, then described scsi protocol stack can be to described memory error Process assembly sends the first response indicating that a described scsi order executes unsuccessfully, and wherein, the first response carries corresponding depositing Reservoir error code, memory error code can reflect a reason described scsi order executes unsuccessfully to a certain extent.Additionally, If implementing result indicates that a described scsi order runs succeeded, then described scsi protocol stack can be to described memory error Process assembly sends the second response indicating that a described scsi order runs succeeded.
If the 204, described memory error process assembly receives the described scsi of instruction that described scsi agreement sends Order executes the first response unsuccessfully, and the first response carries memory error code, then obtain for repairing described memorizer 2nd scsi order, the reparation operation instruction of described 2nd scsi order is corresponding with described memory error code.
205th, described memory error process assembly passes through described scsi protocol stack to described memorizer transmission described second Scsi order.Wherein, described 2nd scsi order can be for example reset command or reset command or access initial address adjustment Order or rewrite command or stressed order or diagnostic command etc..Described memorizer passes through the described 2nd scsi order of execution just to be had very much Corresponding mistake may be repaired.
As can be seen that the scheme of the present embodiment introduces memory error process assembly so that User space application and scsi assist View stack between interaction eliminate the reliance on block device this uniquely in the middle of bridge, be User space application interact with described scsi protocol stack Open second channel, that is, User space application can by memory error process assembly come dereference scsi protocol stack, and then Access memorizer.The motility so making User space application data access becomes higher, is conducive to improving error resilience ability.This Outward, because block device is to access scsi protocol stack using standard block device visit order (such as read/write command), and related Arrange in agreement for this access mode the scsi protocol stack when access errors occur generally only return to block device simple Errored response (eio), and this eio can not reflect the concrete reason of access errors, so make targeting carry out phase Closing errors repair just becomes relatively difficult.And in the scheme of the present embodiment, memory error process assembly will be answered from User space After first user state data access command is converted to a scsi order, then memorizer is transmitted to by scsi protocol stack Execution, and scsi protocol stack can feed back and carries memory error code (sense code) for the visit order of scsi form Relevant response, so allow for when access errors occur, memory error process assembly can be anti-based on scsi protocol stack The memory error of feedback is learning relevant error reason, and then is conducive to the reparation relevant error of more targeting (specific aim), And then be conducive to lift system stability and reliability.
Wherein, memory error process assembly can obtain use corresponding with described memory error code in several ways In the 2nd scsi order repairing described memorizer.
For example, described acquisition twoth scsi for repair described memorizer corresponding with described memory error code Order mays include: calls fault processing plug-in unit corresponding with the affiliated producer of described memorizer to parse described memory error code;Connect Receive the fault processing strategy corresponding with described memory error code that described fault processing plug-in unit sends;Based on described fault processing Strategy searches the 2nd scsi order for repairing described memorizer with described fault processing strategy matching.
Again for example, described obtain corresponding with described memory error code for repairing described memorizer second Scsi order mays include: calls fault processing plug-in unit corresponding with the affiliated producer of described memorizer to parse described memory error Code;Receive the fault processing strategy corresponding with described memory error code that described fault processing plug-in unit sends;To described user State application sends described fault processing strategy;Receive described User space application by calling and described fault processing strategy matching Fault processing function and the described 2nd scsi order that sends.
The example above provides some repair process machines that memory error process assembly and User space application each may participate in System, is conducive to meeting flexible repair process demand under different scenes.
Wherein, by introducing the fault processing plug-in unit of the affiliated producer of memorizer, be conducive to the ecology of its memorizer of framework, soon The repair process technology of respective memory producer is used in system speed, and then is conducive to further lift system stability reliable Property.
Further, the adjustment of portability memory parameter is gone back in described 2nd scsi order or a described scsi order Value.Wherein, described memory parameter adjusted value for example may include number of retries adjusted value and/or timeout parameter adjusted value.Pass through Reduce number of retries and/or increase timeout parameter, advantageously reduce kernel fault process time.
Optionally, before the first user state data access command that described receive user state application sends, methods described is also Apply including: described User space and send second user state data access command to the corresponding block device of described memorizer, described the One User space data access command is asked the data object accessing and described second user state data access command to be asked to visit Between the data object asked, there is common factor;Described User space application receives the instruction described second user state that described block device sends Data access command executes the response of failure.
For concrete example, the first user state data access command as described before side that described receive user state application sends Method also includes: described User space is applied and sent second user state data access command, institute to the corresponding block device of described memorizer State data object and the described second user state data access command request visit that the request of first user state data access command accesses Between the data object asked, there is common factor;After described block device receives described second user state data access command, by institute State second user state data access command and be encapsulated as standard block device visit order, send described calibrated bolck to scsi protocol stack and set Standby visit order;After described scsi protocol stack receives described standard block device visit order, described standard block device is visited Ask that order is converted to the 3rd scsi order, described 3rd scsi order is sent to described memorizer execution, and receives institute State memorizer transmission described 3rd scsi order execution implementing result (this implementing result indicate described 3rd scsi order Order runs succeeded or failure).
When the 3rd scsi order executes failure, then scsi protocol stack can send to described block device and indicate described calibrated bolck Equipment visit order executes the response of failure, when the 3rd scsi order runs succeeded, then described scsi protocol stack can be to described Block device sends the response indicating that described standard block device visit order runs succeeded.
When the instruction described standard block device visit order that described block device receives from scsi protocol stack executes failure Response after, described block device for example can send instruction described User space data access command execution to the application of described User space The response of failure.And work as described block device and receive the instruction described standard block device visit order execution from scsi protocol stack After successfully responding, described block device for example can send to the application of described User space and indicate described User space data access command The success of execution failure.Accordingly, described User space application can learn described use based on the respective response of block device feedback The implementing result of family state data access command.
In the example above, User space application preferentially can carry out data access by block device, when discovery is set by block After carrying out data access failure, same or similar data access is being carried out by memory error process assembly.When So, User space application may be based on other strategies to select by memory error process assembly or to carry out by block device Data access.
Refer to Fig. 3-a, Fig. 3-a is a kind of flow process of memory errors processing method that one embodiment of the application provides Schematic diagram.Memory errors processing method shown in Fig. 3-a citing can be based on shown in Fig. 1-b~Fig. 1-d any one width figure citing Framework being embodied as.Referring to Fig. 3-a, another kind of memory errors processing method of another embodiment offer of the application can Including:
301st, User space is applied and is sent User space data access command q1 to block device (black).
302nd, described block device (black) receives the described User space data access command that described User space application is sent q1.Described User space data access command q1 is encapsulated as standard block device visit order bq1 by described block device.Described block device Send described standard block device visit order bq1 to scsi protocol stack.
303rd, described scsi protocol stack receives described standard block device visit order, and described scsi protocol stack is by described standard Block device visit order is converted to scsi order sq1, and described scsi order sq1 is sent to described piece and sets by described scsi protocol stack Standby corresponding memorizer execution.
304th, described memorizer receives described scsi order sq1.
Described memorizer executes described scsi order sq1, and described memorizer sends described scsi to described scsi protocol stack The implementing result of order sq1.Wherein, this implementing result can indicate that the described scsi order sq1 success of described memorizer execution Or failure.If implementing result indicates the described scsi order sq1 order success of described memorizer execution then it represents that depositing described in accessing Reservoir success.If implementing result indicates the described scsi order sq1 failure of described memorizer execution then it represents that accessing described storage Device failure.
305th, described scsi protocol stack receives the implementing result of the described scsi order sq1 that described memorizer sends.
If described memorizer execution scsi order sq1 success, it is described that scsi protocol stack sends instruction to described block device The response bqa1-1 that standard block device visit order bq1 runs succeeded is (if described standard block device visit order is digital independent Order, then respond bqa1-1 portability and read data).If described memorizer executes described scsi order sq1 failure, described Scsi protocol stack sends, to described block device, the response bqa1-2 that the described standard block device visit order bq1 of instruction executes failure (eio), described response bqa1-2 does not carry memory error code (sense code).
306th, described block device receives response bqa1-1 or response bqa1-2.
Wherein, if block device receives response bqa1-1 (indicating that described standard block device visit order bq1 runs succeeded), Described block device sends, to User space application, the response qa1-1 indicating that described User space data access command q1 runs succeeded.If Block device receives response bqa1-2 (indicating that described standard block device visit order bq1 executes failure), and block device is to User space Application sends the response qa1-2 that described User space data access command q1 of instruction executes failure.
307th, User space application receives response qa1-1 or the response qa1-2 that block device sends.If described User space application connects Receive qa1-2 (represent and access described memorizer failure), described User space is applied and sent user to memory error process assembly State data access command q2.Wherein, User space data access command q2 is asked the data object accessing and User space data to be visited Ask that order q1 is asked the data object accessing to have common factor.
Specifically for example, described User space data access command q2 is asked the data object accessing is described User space data Visit order q1 is asked the subset of the data object of access.For example, described User space data access command q1 is asked to access Data object be data_01, data_02 and data_03, described User space data access command q2 asked access data Object may include at least one in data_01, data_02 and data_03, certainly described User space data access command q2 institute The data object that request accesses also can further include other data objects.
The address space of data object that the concrete request that for example, described User space data access command q2 carries accesses with What described User space data access command q1 carried is asked the subset of the address space of data object of access.For example, described It is add0001~add0010 that User space data access command q1 is asked the address space of the data object accessing, described user State data access command q2 asked the data object accessing address space can for the part in add0001~add0010 or All, certainly described User space data access command q2 is asked the data object accessing also can further include that other addresses are empty Between.
308th, described memory error process assembly receives described User space data access command q2, described memory error User space data access command q2 is converted to scsi order sq2 by process assembly;Described memory error process assembly is to described Scsi protocol stack sends described scsi order sq2.
309th, described scsi protocol stack receives described scsi order sq2, and described scsi protocol stack is by described scsi order sq2 It is sent to described memorizer execution.
310th, described memorizer receives described scsi order sq2.
Described memorizer executes described scsi order sq2, and described memorizer sends described scsi to described scsi protocol stack The implementing result of order sq2.Wherein, this implementing result can indicate that the described scsi order sq2 success of described memorizer execution Or failure, if implementing result indicates the described scsi order sq2 success of described memorizer execution then it represents that accessing described memorizer Success.The described scsi order sq2 failure if implementing result indicates described memorizer execution is lost then it represents that accessing described memorizer Lose.
311st, described scsi protocol stack receives the implementing result of the described scsi order sq2 that described memorizer sends.
If described memorizer executes described scsi order sq2 success, scsi protocol stack is processed to described memory error Assembly send indicate described scsi order sq2 run succeeded response sqa2-1 (if scsi order sq2 be data read command, So response sqa2-1 portability reads data).If described memorizer executes described scsi order sq2 failure, described scsi Protocol stack sends the response sqa2-2 that the described scsi order sq2 of instruction executes failure, institute to described memory error process assembly State response sqa2-2 and carry memory error code (sense code).
312nd, described memory error process assembly receives response sqa2-1 or response sqa2-2.At described memory error If reason assembly receives response sqa2-2 (represent and access described memorizer failure), described memory error process assembly is called Fault processing plug-in unit corresponding with the affiliated producer of described memorizer parses described memory error code, and fault processing plug-in unit is according to institute State memory error code and search corresponding fault processing strategy, described fault processing plug-in unit is to described memory error process assembly Return the described fault processing strategy finding.
If 313 described memory error process assemblies receive response sqa2-1, described memory error process assembly to Described User space application sends the response qa2-1 running succeeded for instruction user state data access command q2.If described storage Device fault processing assembly receives response sqa2-2, and described memory error process assembly is used for described User space application transmission Instruction user state data access command q2 executes the response qa2-2 of failure, and wherein, response qa2-2 carries described fault processing plan Slightly.
314th, described User space application receives described response qa2-1 or response qa2-2.
Mainly received as a example response qa2-2 by the application of described User space in flow process below.
Described User space application is searched at mistake corresponding with described fault processing strategy according to described fault processing strategy Reason function, sends scsi order by calling the described fault processing function finding to described memory error process assembly sx3.
Referring to Fig. 3-b, Fig. 3-b exemplified memory error code, fault processing strategy, fault processing function and correlation Possible corresponding relation between scsi order.It is come recording medium mistake by mapping table in citing shown in Fig. 3-b Corresponding relation between code, fault processing strategy, fault processing function and related scsi order, it is certainly not limited to use and reflect Penetrate relation table to record.
315th, described memory error process assembly receives described scsi order sx3, described memory error process assembly Send described scsi order sx3 to described scsi protocol stack.Described scsi order sx3 can be for example reset command or rewrite command Or read order or diagnostic command etc. again.
316th, described scsi protocol stack receives described scsi order sx3, and described scsi protocol stack is by described scsi order sx3 It is sent to described memorizer execution.
317th, described memorizer receives described scsi order sx3.
Described memorizer executes described scsi order sx3, and described memorizer sends described scsi to described scsi protocol stack The implementing result of order sx3.Wherein, implementing result can indicate that the described scsi order sx3 success of described memorizer execution or loses Lose, if implementing result indicates described memorizer execution, described scsi order sx3 success becomes then it represents that repairing described memorizer Work(, if implementing result indicates described memorizer execution, described scsi order sx3 failure is lost then it represents that repairing described memorizer Lose.
318th, described scsi protocol stack receives the implementing result of the described scsi order sx3 that described memorizer sends.Described Scsi protocol stack sends the implementing result to described scsi order sx3 for the described memorizer to described memory error process assembly.
319th, described memory error process assembly receives holding of the described scsi order sx3 from described scsi protocol stack Row result.Described memory error process assembly is applied to described User space and is sent described memorizer to described scsi order sx3 Implementing result.
Accordingly, described User space application receives the described scsi order sx3 that described memory error process assembly sends Implementing result, the application of described User space for example can show the implementing result to described scsi order sx3 for the described memorizer.Its In, this implementing result instruction memory repair fails or memory repair success.For example, if implementing result instruction reparation is deposited Reservoir failure, then described User space application can send alarm (the such as voice, word and/or picture shape of request manual intervention The alarm of formula).
Additionally, scsi order sq1 or described scsi order sx3 can also carry memory parameter adjusted value.Wherein, institute State memory parameter adjusted value and for example may include number of retries adjusted value and/or timeout parameter adjusted value.Retried secondary by minimizing Number and/or increase timeout parameter, advantageously reduce kernel fault process time.Certainly, described memory error process assembly Memory parameter adjusted value can be carried by other scsi orders, memory parameter adjusted value will be carried by scsi protocol stack Scsi order be sent to memorizer execution, and then adjust memory parameter.Memorizer also will be able to be stored by scsi protocol stack The adjustment result of device parameter feeds back to memory error process assembly.Wherein, adjustment memory parameter can be User space application Initiate, may also be alternate manner initiation.
Refer to Fig. 4, Fig. 4 is that a kind of flow process of memory errors processing method that one embodiment of the application provides is illustrated Figure.Memory errors processing method shown in Fig. 4 citing can be based on the framework shown in Fig. 1-b~Fig. 1-d any one width figure citing To be embodied as.Referring to Fig. 4, another embodiment of the application provides another kind of memory errors processing method to may include:
401st, User space is applied and is sent User space data access command q1 to block device (black).
402nd, described block device (black) receives the described User space data access command that described User space application is sent q1.Described User space data access command q1 is encapsulated as standard block device visit order bq1 by described block device.Described block device Send described standard block device visit order bq1 to scsi protocol stack.
403rd, described scsi protocol stack receives described standard block device visit order, and described scsi protocol stack is by described standard Block device visit order is converted to scsi order sq1, and described scsi order sq1 is sent to described piece and sets by described scsi protocol stack Standby corresponding memorizer execution.
404th, described memorizer receives described scsi order sq1.
Described memorizer executes described scsi order sq1, and described memorizer sends described scsi to described scsi protocol stack The implementing result of order sq1.Wherein, this implementing result can indicate that the described scsi order sq1 success of described memorizer execution Or failure.If implementing result indicates the described scsi order sq1 order success of described memorizer execution then it represents that depositing described in accessing Reservoir success.If implementing result indicates the described scsi order sq1 failure of described memorizer execution then it represents that accessing described storage Device failure.
405th, described scsi protocol stack receives the implementing result of the described scsi order sq1 that described memorizer sends.
If described memorizer execution scsi order sq1 success, it is described that scsi protocol stack sends instruction to described block device The response bqa1-1 that standard block device visit order bq1 runs succeeded is (if described standard block device visit order is digital independent Order, then respond bqa1-1 portability and read data).If described memorizer executes described scsi order sq1 failure, described Scsi protocol stack sends, to described block device, the response bqa1-2 that the described standard block device visit order bq1 of instruction executes failure (eio), described response bqa1-2 does not carry memory error code (sense code).
406th, described block device receives response bqa1-1 or response bqa1-2.
Wherein, if block device receives response bqa1-1 (indicating that described standard block device visit order bq1 runs succeeded), Described block device sends, to User space application, the response qa1-1 indicating that described User space data access command q1 runs succeeded.If Block device receives response bqa1-2 (indicating that described standard block device visit order bq1 executes failure), and block device is to User space Application sends the response qa1-2 that described User space data access command q1 of instruction executes failure.
407th, User space application receives response qa1-1 or the response qa1-2 that block device sends.If described User space application connects Receive qa1-2 (represent and access described memorizer failure), described User space is applied and sent user to memory error process assembly State data access command q2.Wherein, User space data access command q2 is asked the data object accessing and User space data to be visited Ask that order q1 is asked the data object accessing to have common factor.
Specifically for example, described User space data access command q2 is asked the data object accessing is described User space data Visit order q1 is asked the subset of the data object of access.For example, described User space data access command q1 is asked to access Data object be data_01, data_02 and data_03, described User space data access command q2 asked access data Object may include at least one in data_01, data_02 and data_03, certainly described User space data access command q2 institute The data object that request accesses also can further include other data objects.
The address space of data object that the concrete request that for example, described User space data access command q2 carries accesses with What described User space data access command q1 carried is asked the subset of the address space of data object of access.For example, described It is add0001~add0010 that User space data access command q1 is asked the address space of the data object accessing, described user State data access command q2 asked the data object accessing address space can for the part in add0001~add0010 or All, certainly described User space data access command q2 is asked the data object accessing also can further include that other addresses are empty Between.
408th, described memory error process assembly receives described User space data access command q2, described memory error User space data access command q2 is converted to scsi order sq2 by process assembly.Described memory error process assembly is to described Scsi protocol stack sends described scsi order sq2.
409th, described scsi protocol stack receives described scsi order sq2, and described scsi protocol stack is by described scsi order sq2 It is sent to described memorizer execution.
410th, described memorizer receives described scsi order sq2.
Described memorizer executes described scsi order sq2, and described memorizer sends described scsi to described scsi protocol stack The implementing result of order sq2.Wherein, this implementing result can indicate that the described scsi order sq2 success of described memorizer execution Or failure, if implementing result indicates the described scsi order sq2 success of described memorizer execution then it represents that accessing described memorizer Success.The described scsi order sq2 failure if implementing result indicates described memorizer execution is lost then it represents that accessing described memorizer Lose.
411st, described scsi protocol stack receives the implementing result of the described scsi order sq2 that described memorizer sends.
If described memorizer executes described scsi order sq2 success, scsi protocol stack is processed to described memory error Assembly send indicate described scsi order sq2 run succeeded response sqa2-1 (if scsi order sq2 be data read command, So response sqa2-1 portability reads data).If described memorizer executes described scsi order sq2 failure, described scsi Protocol stack sends the response sqa2-2 that the described scsi order sq2 of instruction executes failure, institute to described memory error process assembly State response sqa2-2 and carry memory error code (sense code).
412nd, described memory error process assembly receives response sqa2-1 or response sqa2-2.If described memory error Process assembly receives response sqa2-1, and described memory error process assembly sends to the application of described User space and uses for instruction The response qa2-1 that family state data access command q2 runs succeeded.If described memory error process assembly receives response sqa2- 2, described memory error process assembly sends for the execution of instruction user state data access command q2 to the application of described User space The response qa2-2 of failure.
Described User space application receives described response qa2-1 or response qa2-2.
Mainly received as a example response sqa2-2 by described memory error process assembly in flow process below.
If the 413, described memory error process assembly receives response sqa2-2 (represent and access described memorizer failure), Then described memory error process assembly is called and is deposited described in fault processing plug-in unit parsing corresponding with the affiliated producer of described memorizer Reservoir error code, fault processing plug-in unit searches corresponding fault processing strategy according to described memory error code, at described mistake Reason plug-in unit returns, to described memory error process assembly, the described fault processing strategy finding.
Referring to Fig. 4-b, between the exemplified memory error code of Fig. 4-b, fault processing strategy and related scsi order Possible corresponding relation.It is come recording medium error code, fault processing plan in citing shown in Fig. 4-b by mapping table Corresponding relation slightly and related scsi order between, it is certainly not limited to record using mapping table.
Referring to Fig. 4-c, the exemplified possible tool between described memory error code and fault processing strategy of Fig. 4-c Body corresponding relation.Certainly, the corresponding relation between described memory error code and fault processing strategy is not limited to shown in Fig. 4-c Citing.
414th, described memorizer based on described fault processing strategy search with described fault processing strategy matching be used for repair The scsi order sx3 of multiple described memorizer.
415th, described memory error process assembly sends described scsi order sx3 to described scsi protocol stack.Described Scsi order sx3 for example for reset command or rewrite command or can read order or diagnostic command etc. again.
416th, described scsi protocol stack receives described scsi order sx3, and described scsi protocol stack is by described scsi order sx3 It is sent to described memorizer execution.
417th, described memorizer receives described scsi order sx3.
Described memorizer executes described scsi order sx3, and described memorizer sends described scsi to described scsi protocol stack The implementing result of order sx3.Wherein, implementing result can indicate that the described scsi order sx3 success of described memorizer execution or loses Lose, if implementing result indicates described memorizer execution, described scsi order sx3 success becomes then it represents that repairing described memorizer Work(, if implementing result indicates described memorizer execution, described scsi order sx3 failure is lost then it represents that repairing described memorizer Lose.
418th, described scsi protocol stack receives the implementing result of the described scsi order sx3 that described memorizer sends.Described Scsi protocol stack sends the implementing result to described scsi order sx3 for the described memorizer to described memory error process assembly.
419th, described memory error process assembly receives holding of the described scsi order sx3 from described scsi protocol stack Row result.Described memory error process assembly can be applied to described User space further and send described memorizer to described scsi The implementing result of order sx3.
Accordingly, described User space application receives the described scsi order sx3 that described memory error process assembly sends Implementing result, the application of described User space for example can show the implementing result to described scsi order sx3 for the described memorizer.Its In, this implementing result instruction memory repair fails or memory repair success.For example, if implementing result instruction reparation is deposited Reservoir failure, then described User space application can send alarm (the such as voice, word and/or picture shape of request manual intervention The alarm of formula).
Additionally, scsi order sq1 or described scsi order sx3 can also carry memory parameter adjusted value.Wherein, institute State memory parameter adjusted value and for example may include number of retries adjusted value and/or timeout parameter adjusted value.Retried secondary by minimizing Number and/or increase timeout parameter, advantageously reduce kernel fault process time.Certainly, described memory error process assembly Memory parameter adjusted value can be carried by other scsi orders, memory parameter adjusted value will be carried by scsi protocol stack Scsi order be sent to memorizer execution, and then adjust memory parameter.Memorizer also will be able to be stored by scsi protocol stack The adjustment result of device parameter feeds back to memory error process assembly.Wherein, adjustment memory parameter can be User space application Initiate, may also be alternate manner initiation.
Wherein, when based on shown in Fig. 1-d, framework is to implement such scheme when, the tune in described memory error process assembly Whole adjustment unit can be used for carrying out the adjustment of relational storage parameter, and relay unit can be used for carrying out the conversion of related command and turns Send out, repair the associated restoration that unit can be used for memory error.Certainly such component clustering mode and division of labor mode are all shown Meaning property and non-limiting.
Some are also provided below for the relevant apparatus implementing such scheme.
Referring to Fig. 5, the embodiment of the present application provides a kind of computer system 500, comprising:
User space application 510, memory error process assembly 520 and small computer system interface (scsi) protocol stack 530, wherein, described memory error process assembly 510 and described scsi protocol stack 520 are located at the kernel of described computer system State.
Described User space application 510, can be used for sending the visit of first user state data to described memory error process assembly Ask order.
Described memory error process assembly 520, can be used for receiving the first user state that described User space application sends After data access command, described first user state data access command is converted to a scsi order, by scsi agreement Stack sends a described scsi order to described memorizer;
Described scsi protocol stack 530, can be used for, after receiving a described scsi order, sending to described memorizer A described scsi order;Receive the implementing result to a described scsi order for the described memorizer, refer in described implementing result In the case of showing that described memorizer executes unsuccessfully to a described scsi order, send the to described memory error process assembly One response, wherein, described first response indicates that a described scsi order executes failure, and it is wrong that described first response carries memorizer Error code;
Described memory error process assembly 520, for receiving described first response that described scsi agreement sends In the case of, obtain the 2nd scsi order for repairing described memorizer, the reparation operation instruction of described 2nd scsi order Corresponding with described memory error code, described 2nd scsi order is sent to described memorizer by described scsi protocol stack.
Optionally, in some possible embodiments, described computer system 500 may further include described storage The corresponding block device of device 540, wherein, described block device 540 is located at the kernel state of described computer system.
Described User space application 510 is additionally operable to, and is sending first user state number to described memory error process assembly 520 Before visit order, send second user state data access command, described first user state data access to described block device The data object accessing is asked in order, and described second user state data access command is asked between the data object accessing There is common factor;
Described block device 540 is used for, and the described second user state data access command receiving is encapsulated as calibrated bolck and sets Standby visit order, sends described standard block device visit order to described scsi protocol stack;
Described scsi protocol stack 530 is additionally operable to, and the described standard block device visit order receiving is converted to the 3rd Scsi order, sends the 3rd scsi order to described memorizer;Receive described memorizer and be directed to holding of described 3rd scsi order Row result;When the described implementing result that described memorizer is directed to described 3rd scsi order is that the described 3rd scsi order of execution is lost Lose, send, to described block device, the response that the described standard block device visit order of instruction executes failure.
Described block device 540 is additionally operable to, and visits receiving the instruction described standard block device from described scsi protocol stack After asking the response that order executes failure, send to the application of described User space and indicate that described second user state data access command is held The response of row failure.
Described User space application 510 is additionally operable to, and receives the instruction described second user state data visit that described block device sends Ask that order executes the response of failure.
Further, described memory error process assembly 520 can obtain and described for repairing in several ways 2nd scsi order of memorizer.
For example described acquisition mays include: for the 2nd scsi order repairing described memorizer and calls and described memorizer institute Belong to producer's corresponding fault processing plug-in unit and parse described memory error code;Receive that described fault processing plug-in unit sends with described Memory error code corresponding fault processing strategy;Based on described fault processing strategy generating and described fault processing strategy matching The 2nd scsi order.
Again for example described acquisition mays include: for the 2nd scsi order repairing described memorizer and calls and described memorizer The corresponding fault processing plug-in unit of affiliated producer parses described memory error code;Receive that described fault processing plug-in unit sends with institute State memory error code corresponding fault processing strategy;Apply to described User space and send described fault processing strategy;Receive institute State User space application by calling and the fault processing function of described fault processing strategy matching and described 2nd scsi that sends Order.
The example above provides some repair process machines that memory error process assembly and User space application each may participate in System, is conducive to meeting flexible repair process demand under different scenes.
Wherein, by introducing the fault processing plug-in unit of the affiliated producer of memorizer, be conducive to the ecology of its memorizer of framework, soon The repair process technology of respective memory producer is used in system speed, and then is conducive to further lift system stability reliable Property.
Further, in some possible embodiments, described 2nd scsi order also carries memory parameter adjustment Value, described 2nd scsi order is additionally operable to indicate that described memorizer carries out parameter adjustment based on described memory parameter adjusted value.
Further, in some possible embodiments, described memory parameter adjusted value includes number of retries adjustment Value and/or timeout parameter adjusted value.
As can be seen that due to provide modification memory parameter mechanism so that change that some memory parameter become can Realize.For example pass through to reduce number of retries and/or increase timeout parameter, advantageously reduce kernel fault process time.
Further, computer system 500 also includes memorizer 550, and described memorizer 550 is used for that execution receives One scsi order and the 2nd scsi order.For example described memorizer 550 is used for, when described 2nd scsi order is reset command, Restarted by executing the described 2nd scsi order receiving;Or when described 2nd scsi order is reset command, lead to Cross and execute the described 2nd scsi order receiving to be resetted;Or when described 2nd scsi order is adjusted for accessing initial address Whole order, adjusts access initial address by executing the described 2nd scsi order receiving.
Further, in some possible embodiments, described memorizer for example can for stacked tile type (smr) hard disk or its The hard disk of his type.
As can be seen that the scheme of the application introduces memory error process assembly 520 so that User space application and scsi assist View stack between interaction eliminate the reliance on block device this uniquely in the middle of bridge, be User space application interact with described scsi protocol stack Open second channel, that is, User space application can by memory error process assembly come dereference scsi protocol stack, and then Access memorizer.The motility so making User space application data access becomes higher, is conducive to improving error resilience ability.This Outward, because block device is to access scsi protocol stack using standard block device visit order (such as read/write command), and related Arrange in agreement for this access mode the scsi protocol stack when access errors occur generally only return to block device simple Errored response (eio), and this eio can not reflect the concrete reason of access errors, so make targeting carry out phase Closing errors repair just becomes relatively difficult.And in technical scheme, memory error process assembly will be answered from User space After first user state data access command is converted to a scsi order, then memorizer is transmitted to by scsi protocol stack Execution, and scsi protocol stack is to feed back the relevant response carrying memory error code for the visit order of scsi form, So allow for when access errors occur, the memorizer mistake that memory error process assembly can be fed back based on scsi protocol stack To learn relevant error reason by mistake, and then to be conducive to the reparation relevant error of more targeting (specific aim), and then to be conducive to carrying Rise system stability reliability.
Referring to Fig. 6, the embodiment of the present application provides a kind of memory error processing meanss 600, comprising: receiving unit 610, turn Change unit 620, transmitting element 630 and reparation unit 640.
Wherein, receiving unit 610, can be used for the first user state data access command that the application of receive user state sends.
Converting unit 620, for being converted to the first minicomputer system by described first user state data access command Interface (scsi) is ordered.
Transmitting element 630, for sending a described scsi order by scsi protocol stack to described memorizer.
Repair unit 640, for when receiving the first response that described scsi agreement sends, described first responds instruction institute State a scsi order and execute failure, described first response carries memory error code, obtains for repairing described memorizer 2nd scsi order, the reparation operation instruction of described 2nd scsi order is corresponding with described memory error code.
Described transmitting element 630 is additionally operable to, and sends described 2nd scsi by described scsi protocol stack to described memorizer Order.
Further, described memory error process assembly 520 can obtain and described for repairing in several ways 2nd scsi order of memorizer.
For example described acquisition mays include: for the 2nd scsi order repairing described memorizer and calls and described memorizer institute Belong to producer's corresponding fault processing plug-in unit and parse described memory error code;Receive that described fault processing plug-in unit sends with described Memory error code corresponding fault processing strategy;Based on described fault processing strategy generating and described fault processing strategy matching The 2nd scsi order.
Again for example described acquisition mays include: for the 2nd scsi order repairing described memorizer and calls and described memorizer The corresponding fault processing plug-in unit of affiliated producer parses described memory error code;Receive that described fault processing plug-in unit sends with institute State memory error code corresponding fault processing strategy;Apply to described User space and send described fault processing strategy;Receive institute State User space application by calling and the fault processing function of described fault processing strategy matching and described 2nd scsi that sends Order.
The example above provides some repair process machines that memory error process assembly and User space application each may participate in System, is conducive to meeting flexible repair process demand under different scenes.
Wherein, by introducing the fault processing plug-in unit of the affiliated producer of memorizer, be conducive to the ecology of its memorizer of framework, soon The repair process technology of respective memory producer is used in system speed, and then is conducive to further lift system stability reliable Property.
Further, in some possible embodiments, described 2nd scsi order also carries memory parameter adjustment Value, described 2nd scsi order is additionally operable to indicate that described memorizer carries out parameter adjustment based on described memory parameter adjusted value. Further, in some possible embodiments, described memory parameter adjusted value includes number of retries adjusted value and/or surpasses When parameter adjustment value etc..
As can be seen that due to provide modification memory parameter mechanism so that change that some memory parameter become can Realize.For example pass through to reduce number of retries and/or increase timeout parameter, advantageously reduce kernel fault process time.
Further, in some possible embodiments, described memorizer for example can for stacked tile type (smr) hard disk or its The hard disk of his type.
As can be seen that the scheme of the application introduces memory error processing meanss 600 so that User space application and scsi assist View stack between interaction eliminate the reliance on block device this uniquely in the middle of bridge, be User space application interact with described scsi protocol stack Open second channel, that is, User space application can by memory error processing meanss come dereference scsi protocol stack, and then Access memorizer.The motility so making User space application data access becomes higher, is conducive to improving error resilience ability.This Outward, because block device is to access scsi protocol stack using standard block device visit order (such as read/write command), and related Arrange in agreement for this access mode the scsi protocol stack when access errors occur generally only return to block device simple Errored response (eio), and this eio can not reflect the concrete reason of access errors, so make targeting carry out phase Closing errors repair just becomes relatively difficult.And in technical scheme, memory error processing meanss will be answered from User space After first user state data access command is converted to a scsi order, then memorizer is transmitted to by scsi protocol stack Execution, and scsi protocol stack is to feed back the relevant response carrying memory error code for the visit order of scsi form, So allow for when access errors occur, the memorizer mistake that memory error processing meanss can be fed back based on scsi protocol stack To learn relevant error reason by mistake, and then to be conducive to the reparation relevant error of more targeting (specific aim), and then to be conducive to carrying Rise system stability reliability.
Referring to Fig. 7, the embodiment of the present application provides memory error processing meanss 700, comprising: memorizer 710 and processor 720, wherein, by calling the instruction of storage or code in described memorizer, described processor 720 is used for executing following step Rapid:
The first user state data access command that the application of receive user state sends;Described first user state data access is ordered Order is converted to the first small computer system interface (scsi) order;Send described the by scsi protocol stack to described memorizer One scsi order;When have received the first response that described scsi agreement sends, described first response indicates a described scsi Order executes failure, and described first response carries memory error code, obtains the 2nd scsi life for repairing described memorizer Order, the reparation operation instruction of described 2nd scsi order is corresponding with described memory error code;By described scsi protocol stack to Described memorizer sends described 2nd scsi order.
Further, memory error processing meanss 700 can obtain and in several ways for repairing described storage 2nd scsi order of device.
For example described acquisition mays include: for the 2nd scsi order repairing described memorizer and calls and described memorizer institute Belong to producer's corresponding fault processing plug-in unit and parse described memory error code;Receive that described fault processing plug-in unit sends with described Memory error code corresponding fault processing strategy;Based on described fault processing strategy generating and described fault processing strategy matching The 2nd scsi order.
Again for example described acquisition mays include: for the 2nd scsi order repairing described memorizer and calls and described memorizer The corresponding fault processing plug-in unit of affiliated producer parses described memory error code;Receive that described fault processing plug-in unit sends with institute State memory error code corresponding fault processing strategy;Apply to described User space and send described fault processing strategy;Receive institute State User space application by calling and the fault processing function of described fault processing strategy matching and described 2nd scsi that sends Order.
The example above provides some repair process machines that memory error process assembly and User space application each may participate in System, is conducive to meeting flexible repair process demand under different scenes.
Wherein, by introducing the fault processing plug-in unit of the affiliated producer of memorizer, be conducive to the ecology of its memorizer of framework, soon The repair process technology of respective memory producer is used in system speed, and then is conducive to further lift system stability reliable Property.
Further, in some possible embodiments, described 2nd scsi order also carries memory parameter adjustment Value, described 2nd scsi order is additionally operable to indicate that described memorizer carries out parameter adjustment based on described memory parameter adjusted value. Further, in some possible embodiments, described memory parameter adjusted value includes number of retries adjusted value and/or surpasses When parameter adjustment value.
As can be seen that due to provide modification memory parameter mechanism so that change that some memory parameter become can Realize.For example pass through to reduce number of retries and/or increase timeout parameter, advantageously reduce kernel fault process time.
Further, in some possible embodiments, described memorizer for example can for stacked tile type (smr) hard disk or its The hard disk of his type.
As can be seen that the scheme of the application introduces memory error processing meanss 700 so that User space application and scsi assist View stack between interaction eliminate the reliance on block device this uniquely in the middle of bridge, be User space application interact with described scsi protocol stack Open second channel, that is, User space application can by memory error processing meanss come dereference scsi protocol stack, and then Access memorizer.The motility so making User space application data access becomes higher, is conducive to improving error resilience ability.This Outward, because block device is to access scsi protocol stack using standard block device visit order (such as read/write command), and related Arrange in agreement for this access mode the scsi protocol stack when access errors occur generally only return to block device simple Errored response (eio), and this eio can not reflect the concrete reason of access errors, so make targeting carry out phase Closing errors repair just becomes relatively difficult.And in technical scheme, memory error processing meanss will be answered from User space After first user state data access command is converted to a scsi order, then memorizer is transmitted to by scsi protocol stack Execution, and scsi protocol stack is to feed back the relevant response carrying memory error code for the visit order of scsi form, So allow for when access errors occur, the memorizer mistake that memory error processing meanss can be fed back based on scsi protocol stack To learn relevant error reason by mistake, and then to be conducive to the reparation relevant error of more targeting (specific aim), and then to be conducive to carrying Rise system stability reliability.
In the above-described embodiments, the description to each embodiment all emphasizes particularly on different fields, and does not have the portion described in detail in certain embodiment Point, may refer to the associated description of other embodiment.
Additionally, also a kind of computer-readable recording medium of the embodiment of the present application, described computer-readable recording medium storage The program code processing for conversation message.Described program code is included for executing any one memory error of the application The instruction of the part or all of step of processing method.
It should be understood that disclosed device in several embodiments provided herein, can be by another way Realize.Device embodiment for example described above is only the schematically division of for example described unit, and only one kind is patrolled Volume function divides, and actual can have other dividing mode when realizing, for example multiple units or assembly can in conjunction with or can collect Become to another system, or some features can be ignored or not execute.Another, shown or discussed each other indirect Coupling or direct-coupling or communication connection can be by some interfaces, the INDIRECT COUPLING of device or unit or communication connection, It can be electrical or other form.
The described unit illustrating as separating component can be or may not be physically separate, show as unit The part showing can be or may not be physical location, you can with positioned at a place, or can also be distributed to multiple On NE.Some or all of unit therein can be selected according to the actual needs to realize the scheme of the present embodiment Purpose.
In addition, can be integrated in a processing unit or each in each functional unit in each embodiment of the application Unit is individually physically present, but also two or more units are integrated in a unit.Above-mentioned integrated unit was both permissible Realized in the form of hardware, or can also be realized in the form of SFU software functional unit.
If described integrated unit is realized and as independent production marketing or use using in the form of SFU software functional unit When, can be stored in a computer read/write memory medium.Based on such understanding, the technical scheme of the application is substantially The part in other words prior art being contributed or all or part of this technical scheme can be in the form of software products Embody, this computer software product is stored in a storage medium, including some instructions with so that a computer Equipment (can be personal computer, server or network equipment etc.) execution each embodiment methods described of the application whole or Part steps.And aforesaid storage medium includes: u disk, read only memory (rom, read-only memory), random access memory are deposited Reservoir (ram, randomaccess memory), portable hard drive, magnetic disc or CD etc. are various can be with Jie of store program codes Matter.

Claims (21)

1. a kind of memory errors processing method of computer system is it is characterised in that described computer system includes: User space Application, memory error process assembly and small computer system interface (scsi) protocol stack, wherein, at described memory error Manage assembly and described scsi protocol stack is located at the kernel state of described computer system;
Methods described includes: described User space is applied and sent first user state data access to described memory error process assembly Order;
Described memory error process assembly after receiving the first user state data access command that the application of described User space sends, Described first user state data access command is converted to a scsi order, is sent to described memorizer by scsi protocol stack A described scsi order;
Described scsi protocol stack receive a described scsi order rear to described memorizer send described first scsi life Order;Receive the implementing result to a described scsi order for the described memorizer, indicate described memorizer pair in described implementing result In the case that a described scsi order executes unsuccessfully, send the first response, wherein, institute to described memory error process assembly State the first response and indicate that a described scsi order executes failure, described first response carries memory error code;
Described memory error process assembly, in the case of receiving described first response that described scsi agreement sends, obtains For repairing the 2nd scsi order of described memorizer, the reparation operation instruction of described 2nd scsi order is wrong with described memorizer Error code corresponds to, and sends described 2nd scsi order by described scsi protocol stack to described memorizer.
2. method according to claim 1 is it is characterised in that methods described also includes: when described 2nd scsi order is Reset command, described memorizer is restarted by the described 2nd scsi order that execution receives;Or work as described second Scsi order is reset command, and described memorizer is resetted by the described 2nd scsi order that execution receives;Or work as Described 2nd scsi order passes through, for accessing initial address adjustment order, described memorizer, described 2nd scsi that execution receives Order is to adjust access initial address.
3. method according to claim 1 and 2 is it is characterised in that described acquisition is used for repairing the second of described memorizer Scsi order, comprising: call fault processing plug-in unit corresponding with the affiliated producer of described memorizer to parse described memory error code; Receive the fault processing strategy corresponding with described memory error code that described fault processing plug-in unit sends;At described mistake Reason strategy generating and the 2nd scsi order of described fault processing strategy matching.
4. method according to claim 1 and 2 is it is characterised in that described acquisition is used for repairing the second of described memorizer Scsi order, comprising: call fault processing plug-in unit corresponding with the affiliated producer of described memorizer to parse described memory error code; Receive the fault processing strategy corresponding with described memory error code that described fault processing plug-in unit sends;Should to described User space With sending described fault processing strategy;Receive described User space application by calling the mistake with described fault processing strategy matching The described 2nd scsi order processing function and sending.
5. according to claim 3 to 4 any one methods described it is characterised in that described 2nd scsi order also carries memorizer Parameter adjustment value, described 2nd scsi order is additionally operable to indicate that described memorizer is joined based on described memory parameter adjusted value Number adjustment.
6. according to claim 5 method it is characterised in that described memory parameter adjusted value includes number of retries adjusted value And/or timeout parameter adjusted value.
7. the method according to any one of claim 1 to 6 it is characterised in that described computer system also include described in deposit The corresponding block device of reservoir, wherein, described block device is located at the kernel state of described computer system;
Described User space is applied before sending first user state data access command to described memory error process assembly, described Method also includes:
Described User space is applied and is sent second user state data access command to described block device, and described first user state data is visited Ask order asked access data object, with described second user state data access command asked access data object it Between there is common factor;
The described second user state data access command receiving is encapsulated as standard block device visit order by described block device, to Described scsi protocol stack sends described standard block device visit order;
The described standard block device visit order receiving is converted to the 3rd scsi order by described scsi protocol stack, deposits to described Reservoir sends the 3rd scsi order;Receive the implementing result that described memorizer is directed to described 3rd scsi order;When described storage The described implementing result that device is directed to described 3rd scsi order is the described 3rd scsi order failure of execution, described scsi protocol stack Send the response that the described standard block device visit order of instruction executes failure to described block device;
Described block device executes failure receiving the instruction described standard block device visit order from described scsi protocol stack Response after, send, to the application of described User space, the response that the described second user state data access command of instruction executes failure;
The instruction described second user state data access command that described User space application receives described block device transmission executes failure Response.
8. a kind of memory errors processing method is it is characterised in that include:
The first user state data access command that the application of receive user state sends;
Described first user state data access command is converted to the first small computer system interface (scsi) order;
A described scsi order is sent to described memorizer by scsi protocol stack;
When receiving the first response that described scsi agreement sends, described first response indicates that a described scsi order executes mistake Lose, wherein, described first response carries memory error code, obtains the 2nd scsi order for repairing described memorizer, its In, the reparation operation instruction of described 2nd scsi order is corresponding with described memory error code, by described scsi protocol stack to Described memorizer sends described 2nd scsi order.
9. method according to claim 8 is it is characterised in that described acquisition is used for repairing the 2nd scsi of described memorizer Order includes: calls fault processing plug-in unit corresponding with the affiliated producer of described memorizer to parse described memory error code;Receive The fault processing strategy corresponding with described memory error code that described fault processing plug-in unit sends;Based on described fault processing plan Slightly generate the 2nd scsi order with described fault processing strategy matching.
10. method according to claim 8 it is characterised in that described acquisition with for repairing the second of described memorizer Scsi order includes: calls fault processing plug-in unit corresponding with the affiliated producer of described memorizer to parse described memory error code; Receive the fault processing strategy corresponding with described memory error code that described fault processing plug-in unit sends;Should to described User space With sending described fault processing strategy;Receive described User space application by calling the mistake with described fault processing strategy matching The described 2nd scsi order processing function and sending.
11. according to claim 9 to 10 any one methods described it is characterised in that described 2nd scsi order also carries storage Device parameter adjustment value, described 2nd scsi order is additionally operable to indicate that described memorizer is carried out based on described memory parameter adjusted value Parameter adjustment.
A kind of 12. computer systems are it is characterised in that include: User space application, memory error process assembly and small-sized calculating Machine system interface (scsi) protocol stack, wherein, described memory error process assembly and described scsi protocol stack are located at described meter The kernel state of calculation machine system;
Described User space application, for sending first user state data access command to described memory error process assembly;
Wherein, described memory error process assembly, for receiving the first user state data that described User space application sends After visit order, described first user state data access command is converted to a scsi order, by scsi protocol stack to Described memorizer sends a described scsi order;
Wherein, described scsi protocol stack, for, after receiving a described scsi order, sending described to described memorizer First scsi order;Receive the implementing result to a described scsi order for the described memorizer, indicate institute in described implementing result State in the case that memorizer executes unsuccessfully to a described scsi order, send the first sound to described memory error process assembly Should, wherein, described first response indicates that a described scsi order executes failure, and described first response carries memory error Code;
Described memory error process assembly, in the situation receiving described first response that described scsi agreement sends Under, obtain the 2nd scsi order for repairing described memorizer, the reparation operation instruction of described 2nd scsi order with described Memory error code corresponds to, and sends described 2nd scsi order by described scsi protocol stack to described memorizer.
13. systems according to claim 12 it is characterised in that described computer system also includes described memorizer,
Described memorizer is used for, when described 2nd scsi order is reset command, by executing described 2nd scsi receiving Order is to be restarted;Or when described 2nd scsi order is reset command, ordered by described 2nd scsi that execution receives Order is to be resetted;Or when described 2nd scsi order be access initial address adjustment order, by execution receive described in 2nd scsi order is to adjust access initial address.
14. systems according to claim 12 or 13 are it is characterised in that obtaining for repairing the second of described memorizer The aspect of scsi order, described memory error process assembly is specifically for calling mistake corresponding with the affiliated producer of described memorizer Process plug-in unit by mistake and parse described memory error code;Receive the right with described memory error code of described fault processing plug-in unit transmission The fault processing strategy answered;The 2nd scsi life based on described fault processing strategy generating and described fault processing strategy matching Order.
15. systems according to claim 12 or 13 are it is characterised in that obtaining for repairing the second of described memorizer The aspect of scsi order, described memory error process assembly is specifically for calling mistake corresponding with the affiliated producer of described memorizer Process plug-in unit by mistake and parse described memory error code;Receive the right with described memory error code of described fault processing plug-in unit transmission The fault processing strategy answered;Apply to described User space and send described fault processing strategy;Receive described User space application to pass through Call the described 2nd scsi order sending with the fault processing function of described fault processing strategy matching.
16. systems according to any one of claim 12 to 15 are it is characterised in that described memorizer is stacked tile type (smr) Hard disk.
17. systems according to any one of claim 12 to 16 are it is characterised in that described in described computer system also includes The corresponding block device of memorizer, wherein, described block device is located at the kernel state of described computer system;
Wherein, described User space application is additionally operable to, and visits sending first user state data to described memory error process assembly Before asking order, send second user state data access command, described first user state data access command to described block device Asked access data object, and described second user state data access command asked access data object between have Occur simultaneously;
Described block device is used for, and the described second user state data access command receiving is encapsulated as standard block device and accesses life Order, sends described standard block device visit order to described scsi protocol stack;
Described scsi protocol stack is additionally operable to, and the described standard block device visit order receiving is converted to the 3rd scsi order, Send the 3rd scsi order to described memorizer;Receive the implementing result that described memorizer is directed to described 3rd scsi order;When The described implementing result that described memorizer is directed to described 3rd scsi order be the described 3rd scsi order of execution unsuccessfully, to described Block device sends the response that the described standard block device visit order of instruction executes failure;
Described block device is additionally operable to, and holds receiving the instruction described standard block device visit order from described scsi protocol stack After the response of row failure, send to the application of described User space and indicate that described second user state data access command executes unsuccessfully Response;
Described User space application is additionally operable to, and the instruction described second user state data access command receiving described block device transmission is held The response of row failure.
A kind of 18. memory error processing meanss are it is characterised in that include:
Receiving unit, the first user state data access command sending for the application of receive user state;
Converting unit, for being converted to the first small computer system interface by described first user state data access command (scsi) order;
Transmitting element, for sending a described scsi order by scsi protocol stack to described memorizer;
Repair unit, for when receiving the first response that described scsi agreement sends, described first responds instruction described first Scsi order executes failure, described first response carry memory error code, obtain for repair described memorizer second Scsi order, the reparation operation instruction of described 2nd scsi order is corresponding with described memory error code;
Described transmitting element is additionally operable to send described 2nd scsi order by described scsi protocol stack to described memorizer.
19. devices according to claim 18 are it is characterised in that obtaining the 2nd scsi for repairing described memorizer Order aspect, described reparation unit specifically for: call fault processing plug-in unit solution corresponding with the affiliated producer of described memorizer Analyse described memory error code;Receive the fault processing corresponding with described memory error code that described fault processing plug-in unit sends Strategy;The 2nd scsi order based on described fault processing strategy generating and described fault processing strategy matching.
20. devices according to claim 18 are it is characterised in that obtaining the 2nd scsi for repairing described memorizer Order aspect, described reparation unit specifically for: call fault processing plug-in unit solution corresponding with the affiliated producer of described memorizer Analyse described memory error code;Receive the fault processing corresponding with described memory error code that described fault processing plug-in unit sends Strategy;Apply to described User space and send described fault processing strategy;Receive described User space application by calling and described mistake The described 2nd scsi order missing the fault processing function processing strategy matching and sending.
21. according to claim 18 to 19 any one described device it is characterised in that described 2nd scsi order also carries storage Device parameter adjustment value, described 2nd scsi order is additionally operable to indicate that described memorizer is carried out based on described memory parameter adjusted value Parameter adjustment.
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