CN106355156B - Power supply signal generating device, power supply device and passive capacitive fingerprint identification system - Google Patents
Power supply signal generating device, power supply device and passive capacitive fingerprint identification system Download PDFInfo
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- CN106355156B CN106355156B CN201610798226.XA CN201610798226A CN106355156B CN 106355156 B CN106355156 B CN 106355156B CN 201610798226 A CN201610798226 A CN 201610798226A CN 106355156 B CN106355156 B CN 106355156B
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Abstract
A power supply signal generating device, a power supply device and a passive capacitive fingerprint identification system, wherein the power supply signal generating device comprises: the floating power supply comprises a power module and a signal module, wherein the power module is powered by a system power supply voltage and a system ground voltage and generates a first power supply voltage signal and a second power supply voltage signal which are synchronous and time-varying under the control of a control signal; the off-chip capacitor is connected between a pin for providing a first power supply voltage signal and a pin for providing a second power supply voltage signal of the floating power supply, wherein a power supply node of the power module is connected with a signal power supply node of the signal module so as to provide the first power supply voltage signal; and the power ground node of the power module is separated from the signal ground node of the signal module and noise equivalent to noise in the first supply voltage signal is introduced into the signal ground node to provide the second supply voltage signal. Noise in the supply voltage signal can be reduced.
Description
Technical Field
The present disclosure relates to the field of fingerprint identification, and in particular, to a power supply signal generating device, a power supply device including a power supply signal generating device, and a passive capacitive fingerprint identification system including a power supply device.
Background
Capacitive fingerprint recognition techniques can be categorized into active capacitive fingerprint recognition and passive capacitive fingerprint recognition, depending on whether an excitation signal is directly applied to a finger. The principle of active capacitive fingerprint identification is mainly to apply an excitation signal to a finger to enhance the charge on the surface of the finger, and to utilize an induction array of a touch panel to receive an electric field signal and amplify the signal, and the induced electric field is inconsistent due to the fact that the fingerprints are inconsistent, so that fingerprint information can be extracted accordingly. The passive working principle is to acquire fingerprint information according to the proportion influence degree of the ridges and the valleys of the fingerprint on the charge distribution of the upper electrode and the lower electrode of the internal capacitor of the touch panel when the finger presses on the touch panel, and no excitation signal is required to be applied to the finger additionally. In active capacitive fingerprint recognition, to avoid that the excitation signal is too strong to affect the user experience, the excitation amplitude signal amplitude is typically less than 4V. Because the passive capacitive fingerprint identification technology does not need to add an excitation signal to the finger, the uncomfortable feeling of a tested person caused by a large-amplitude excitation signal is avoided, and the signal-to-noise ratio of the fingerprint identification system can be improved by increasing the amplitude of the excitation signal. The amplitude of the excitation signal in passive capacitive fingerprint identification can be more than 4V, and even the excitation signal with the amplitude of more than 15V can be adopted.
However, in a practical passive capacitive fingerprint recognition system, due to the increase of the amplitude of the excitation signal and the influence of many factors such as parasitic inductance, parasitic capacitance, parasitic resistance, etc., the power supply signal provided to the fingerprint sensor may have a large noise, which may even cause communication errors.
Disclosure of Invention
In view of the above, the present disclosure provides a power supply signal generating device, a power supply device and a passive capacitive fingerprint recognition system, which can reduce noise in a power supply voltage signal.
According to an aspect of the present disclosure, there is provided a power supply signal generating apparatus including: the floating power supply comprises a power module and a signal module, wherein the power module is powered by a system power supply voltage and a system ground voltage and generates a first power supply voltage signal and a second power supply voltage signal which are synchronous and time-varying under the control of a control signal; the off-chip capacitor is connected between a pin of the floating power supply for providing a first power supply voltage signal and a pin of the floating power supply for providing a second power supply voltage signal outside a chip where the floating power supply is located, wherein a power supply node of the power module is connected with a signal power supply node of the signal module so as to provide the first power supply voltage signal; and the power ground node of the power module is separated from the signal ground node of the signal module and noise equivalent to noise in the first supply voltage signal is introduced into the signal ground node to provide the second supply voltage signal.
In some embodiments, a power supply node of the power module is connected with a signal supply node of the signal module, and is led out through a first pin to provide a first supply voltage signal at the first pin; the power ground node of the power module is led out through a second pin; the signal ground node of the signal module is led out through a third pin, and the third pin is connected with a second pin outside a chip where the floating power supply is located so as to provide a second power supply voltage signal at the third pin; and the off-chip capacitor is connected between the junction of the second pin P2 and the third pin P3 and the first pin P1.
In some embodiments, the third pin and the second pin are connected together in a single point outside the chip where the floating power supply is located, so that the first pin, the second pin and the third pin generate the same or similar parasitic parameters of the circuit.
In some embodiments, the third pin and the second pin are single-point bonded together through a printed circuit board PCB or single-point bonded together through a bond wire.
The single points are joined together by a printed circuit board PCB.
In some embodiments, the first supply voltage signal is a sensor supply voltage signal of a fingerprint sensor module in a passive capacitive fingerprint identification system and the second supply voltage signal is a sensor ground voltage signal of a fingerprint sensor module in a passive capacitive fingerprint identification system.
According to another aspect of the present disclosure, there is provided a power supply apparatus including: the power supply signal generating means described above; the power supply control device is powered by the system power supply voltage and the system ground voltage, is connected with the power supply signal generating device and is used for providing a control signal for the power supply signal generating device to control the power supply signal generating device to generate a first power supply voltage signal and a second power supply voltage signal which are synchronous and time-varying; and a power domain switching device which is supplied with power by the system power voltage and the system ground voltage, is connected with the power supply signal generating device and the power supply control device, is used for receiving the first power supply voltage signal and the second power supply voltage signal from the power supply signal generating device, and realizes signal switching between a first power domain formed by the system power voltage and the system ground voltage and a second power domain formed by the first power supply voltage signal and the second power supply voltage signal.
According to yet another aspect of the present disclosure, there is provided a passive capacitive fingerprint recognition system, comprising: the power supply device described above, and the fingerprint sensor module connected with the power supply signal generating device and the power domain converting device in the power supply device so as to be supplied with power by the first power supply voltage signal and the second power supply voltage signal generated by the power supply signal generating device, and to realize cross-power domain signal transmission with the external main control unit via the power domain converting device and the power supply control device in the power supply device.
In some embodiments, the power supply is integrated with the fingerprint sensor module.
In some embodiments, the power supply is implemented separately from the fingerprint sensor module.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following brief description of the drawings of the embodiments will make it apparent that the drawings in the following description relate only to some embodiments of the present disclosure, not to limit the present disclosure.
FIG. 1 illustrates an example block diagram of a passive capacitive fingerprint recognition system;
FIG. 2 shows exemplary waveforms of a sensor supply voltage signal VDD_SENS and a sensor ground voltage signal GND_SENS in a passive capacitive fingerprint recognition system;
FIG. 3 shows an example waveform diagram of GND_SENS, VDD_SENS, and signals transmitted across a power domain, as is ideal;
FIG. 4 shows waveforms of VDD_SENS, SPICLK_SENS generating glitch noise at GND_SENS at transitions and waveforms after demodulation by GND_SENS;
FIG. 5 is an enlarged view of a portion of FIG. 4;
fig. 6 shows a block diagram of a power supply signal generating unit of the passive capacitive fingerprint recognition system;
fig. 7 shows waveforms of vdd_sens, gnd_sens, gnd_sens_ext and vdd_sens-gnd_sens provided at P1, P2, P1' by the power supply signal generating unit of fig. 6, respectively;
fig. 8 shows a block diagram of a power supply signal generating apparatus according to an embodiment of the present disclosure;
fig. 9 shows waveforms of vdd_sens, gnd_sens_pwr, gnd_sens, gnd_sens_ext and vdd_sens-gnd_sens provided at P1, P2, P3, P1' of the power supply signal generating apparatus of fig. 8, respectively;
fig. 10 shows a block diagram of a power supply device according to an embodiment of the present disclosure;
fig. 11 illustrates a block diagram of a passive capacitive fingerprint identification system according to an embodiment of the disclosure.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments, which can be made by one of ordinary skill in the art without the need for inventive faculty, are within the scope of the present disclosure, based on the described embodiments of the present disclosure.
Fig. 1 shows an example block diagram of a passive capacitive fingerprint recognition system 100. As shown in fig. 1, the passive capacitive fingerprint recognition system 100 includes a fingerprint sensor module 101 and a power supply module 102. The power supply module 102 is connected to a system power supply voltage VDD (hereinafter abbreviated as VDD) and a system ground voltage GND (hereinafter abbreviated as GND), and supplies a sensor power supply voltage signal vdd_sens (hereinafter abbreviated as vdd_sens) and a sensor ground voltage signal gnd_sens (hereinafter abbreviated as gnd_sens) to the fingerprint sensor module 101. Herein, a power domain with VDD as a power supply voltage and GND as a reference ground voltage is referred to as a HOST power domain, and a power domain with vdd_sens as a power supply voltage and gnd_sens as a reference ground voltage is referred to as a SENS power domain. The power module 102 may enable the conversion of signals between the HOST power domain and the SENS power domain so that the signals are transmitted between the two power domains, e.g., between an external HOST unit and the fingerprint sensor module 101. In particular, signals transmitted between the HOST power domain and the SENS power domain are to be modulated and demodulated by GND_SENS or VDD_SENS. By way of example, the signal transmitted between the HOST power domain and the SENS power domain may be an SPI clock signal (represented by SPICLK) under the SPI protocol, but is not limited thereto, and may be any signal, such as a signal for control, communication, etc.
In some embodiments, as shown in fig. 1, the power supply module 102 may include a power supply signal generating unit 1021, a power supply control unit 1022, and a power domain converting unit 1023, all of which use VDD as a power supply voltage and GND as a reference ground voltage. The power supply signal generating unit 1021 is connected to the fingerprint sensor module 101 for supplying power supply voltage signals vdd_sens and gnd_sens to the fingerprint sensor module 101. The power supply control unit 1022 is connected to the power supply signal generating unit 1021, and is configured to supply the power supply signal generating unit 1021 with a boosting voltage VDDH (hereinafter, referred to as VDDH) and a driving ground voltage gnd_drv, and to control the power supply signal generating unit 1021 to generate vdd_sens and gnd_sens. The power domain conversion unit 1023 is connected to the power signal generation unit 1021, the power control unit 1022, and the fingerprint sensor module 101, and is configured to receive vdd_sens and gnd_sens from the power signal generation unit 1021, convert signals between HOST power domain and SENS power domain, and realize cross-power domain signal transmission between the fingerprint sensor module 101 and the external main control unit in cooperation with the power control unit 1022. The fingerprint sensor module 101 may be implemented by a fingerprint sensor chip, the power supply signal generation unit 1021 may be implemented by a floating power supply, the power supply control unit 1022 may be implemented by a power supply control circuit, and the power domain conversion unit 1023 may be implemented by a level shift buffer, for example, an H2S & S2H level shift buffer. However, it should be clear to a person skilled in the art that the above is an example implementation, and that embodiments of the present disclosure are not limited thereto.
The fingerprint sensor module 101 and the power supply module 102 may be integrated together or may be implemented independently of each other.
Fig. 2 shows exemplary waveforms of vdd_sens and gnd_sens in the passive capacitive fingerprint recognition system 100. As shown in fig. 2, vdd_sens and gnd_sens are a pair of time-varying signals with respect to the system ground GND, and may be square waves, but not limited thereto, and may be sine waves or saw-tooth waves, for example. The voltage difference between vdd_sens and gnd_sens remains constant, i.e. the supply voltage of the fingerprint sensor module 101 remains constant. For example, as shown in fig. 2, when vdd=1.8v and gnd=0v, vdd_sens is a square wave signal having a high level of 14.8V and a low level of 1.8V, and gnd_sens is a square wave signal having a high level of 13V and a low level of 0V, both are hopped in synchronization, so that the voltage for supplying power to the fingerprint sensor module 101 is stabilized at 1.8V.
FIG. 3 shows an example timing diagram of an ideal situation of GND_SENS, VDD_SENS, and signals transmitted across a power domain, where SPICLK_HOST represents an unmodulated SPICLK signal in the HOST power domain, SPICLK_SENS represents an SPICLK signal after being modulated by GND_SENS, and SPICLK_SENS-GND_SENS represents an SPICLK signal obtained in the SENS power domain after being demodulated by GND_SENS. The signals transmitted between the HOST power domain and the SENS power domain in FIG. 3 are exemplified by, but not limited to, SPICLK signals under the SPI protocol, which may be any signals such as those used for control, communication. Examples of signals transmitted between the HOST power domain and the SENS power domain include, but are not limited to, signals using buses of various standard communication protocols, such as signals using SPI communication protocols or I2C communication protocols, and other signals such as signals that are custom but require conversion between the HOST power domain and the SENS power domain.
As can be seen from fig. 3, in an ideal situation, accurate communication can be performed between the HOST power domain and the SENS power domain. However, in an actual passive capacitive fingerprint identification system, vdd_sens generates glitch noise at the gnd_sens transition due to the increase in the amplitude of the excitation signal and the influence of various factors such as parasitic inductance, parasitic capacitance, and parasitic resistance in the system. Such glitch noise may cause communication errors between the HOST power domain and the SENS power domain of the passive capacitive fingerprint recognition system, ultimately resulting in image acquisition failure.
Fig. 4 shows waveforms of vdd_sens, spiclk_sens generating glitch noise at gnd_sens transitions, and waveforms demodulated by gnd_sens, where spiclk_sens represents SPICLK signals modulated by gnd_sens, spiclk_sens-gnd_sens represents SPICLK signals demodulated by gnd_sens in the SENS power domain. As shown in the dashed line portion of fig. 4, vdd_sens and spiclk_sens generate noise at the transitions of gnd_sens, ultimately resulting in noise at the corresponding locations of the demodulated SPICLK signal. Fig. 5 is a partial enlarged view of fig. 4. As shown in fig. 5, vdd_sens and spiclk_sens generate skip/skip noise at the rising edge and the falling edge of gnd_sens, respectively, so that the demodulated signal spiclk_sens-gnd_sens obtained by demodulating spiclk_sens with gnd_sens generates skip noise and skip noise having widths t1 and t2, respectively. t1 and t2 are typically in the range of 0.5ns to 100ns, in some cases 1ns to 10ns, typically 1ns to 6ns, which can lead to errors in data transfer between the HOST power domain and the SENS power domain, and thus in communication, control, etc.
Although the above description has been given by taking gnd_sens as an example of modulating and demodulating a signal, it should be clear to a person skilled in the art that the above description is equally applicable to the case of taking vdd_sens as a modulating signal.
Fig. 6 shows a block diagram of a power supply signal generating unit 600 of a passive capacitive fingerprint recognition system. As shown in fig. 6, the power supply signal generating unit 600 includes a floating power supply 601 and an off-chip capacitor 602, where Lpar1 and Lpar2 represent parasitic inductances, rpar represents parasitic resistances, and Cpar represents parasitic capacitances. Float power supply 601 may be a float power supply relative to system ground that may include a power module 6011 and a signal module 6012. The power module 6011 is powered by VDD and GND and generates synchronous time-varying vdd_sens and gnd_sens under control of control signals. The power supply node of the power module 6011 is connected with the signal supply node of the signal module 6012 and led out through a pin P1 to provide VDD_SENS; the power ground node of the power module 6011 is connected to the signal ground node of the signal module 6012 and led out through pin P2 to provide gnd_sens. The off-chip capacitor 602 is connected between P1 and P2 off-chip where the floating power supply 601 is located.
Fig. 7 shows waveforms of vdd_sens, gnd_sens, gnd_sens_ext and vdd_sens-gnd_sens provided at P1, P2, P1' by the power supply signal generating unit of fig. 6, respectively. As shown in fig. 7, the gnd_sens provided at P2 by the power supply signal generating unit 600 is noiseless, and the parasitic inductance Lpar2 generated by the bonding (bonding) line causes the voltage signal gnd_sens_ext at P1' to have noise due to the connection of the capacitor 602 off-chip, thereby making vdd_sens at P1 noisy. The noiseless gnd_sens and the noisy vdd_sens cause the difference voltage vdd_sens-gnd_sens supplied from the power supply signal generating unit 600 to be noisy.
Based on the above discussion, the embodiments of the present disclosure propose a power supply signal generating device of a passive capacitive fingerprint recognition system, which can reduce noise in a power supply voltage signal by separating a power ground node of a power module from a signal ground node of a signal module and introducing noise equivalent to noise in a sensor power supply voltage signal into the signal ground node to provide a second power supply voltage signal.
Fig. 8 shows a block diagram of a power supply signal generating apparatus 800 according to an embodiment of the present disclosure.
As shown in fig. 8, the power supply signal generating device 800 includes a floating power supply 801 and an off-chip capacitor 802, where Lpar1, lpar2, and Lpar3 represent parasitic inductances, rpar represents parasitic resistances, and Cpar represents parasitic capacitances.
The float power source 801 includes a power module 8011 and a signal module 8012. The power module 8011 is powered by the system power supply voltage VDD and the system ground voltage GND and generates synchronous time-varying first and second power supply voltage signals under control of control signals, e.g., a sensor power supply voltage signal vdd_sens and a sensor ground voltage signal gnd_sens of a fingerprint sensor module in a passive capacitive fingerprint recognition system as shown in fig. 2. The power supply node of the power module 8011 is coupled to the signal supply node of the signal module 8012 to provide a first supply voltage signal, such as vdd_sens. The power ground node of the power module 8011 is separated from the signal ground node of the signal module 8012, and noise equivalent to noise in the first supply voltage signal is introduced into the signal ground node to provide a second supply voltage signal, e.g., gnd_sens. As an example, the power supply node of the power module 811 may be connected with the signal supply node of the signal module 8012, and led out from the chip where the floating power supply 801 is located through the first pin P1, to provide vdd_sens as the first supply voltage signal at the first pin P1; the power ground node of the power module 8011 is led out from the chip where the floating power source 801 is located through the second pin P2 to provide a noise-free gnd_sens (e.g., gnd_sens_pwr shown in fig. 9); the signal ground node of the signal module 8012 is led out from the chip where the floating power source 801 is located through the third pin P3, and the third pin P3 and the second pin P2 are single-point bonded together outside the chip where the floating power source 801 is located, for example, single-point bonded together through a printed circuit board (Printed Circuit Board) PCB or directly single-point bonded together through a bonding wire, so that the gnd_sens with noise is provided at the third pin P3 as the second power supply voltage signal.
The off-chip capacitor 802 is connected between a pin of the floating power supply 801 that supplies the first power supply voltage signal and a pin that supplies the second power supply voltage signal, for example, between a junction of the second pin P2 and the third pin P3 and the first pin P1, off-chip where the floating power supply 801 is located.
Fig. 9 shows waveforms of vdd_sens, gnd_sens_pwr, gnd_sens, gnd_sens_ext and vdd_sens-gnd_sens provided at P1, P2, P3, P1 'by the power supply signal generating apparatus of fig. 8, respectively, wherein vdd_sens, gnd_sens_pwr, gnd_sens, and gnd_sens_ext represent voltage signals at P1, P2, P3, P1' in fig. 8, respectively, and vdd_sens-gnd_sens represents that the power supply signal generating apparatus 800 of fig. 8 ultimately provides a differential voltage signal. As can be seen in fig. 9, vdd_sens provided at P1 is noisy at the gnd_sens transition due to parasitic inductance Lpar2 created by the bond wire of P1 to off-chip capacitor 802. The power ground node of the power module 8011 is separated from the signal ground node of the signal module 8012 and then led out from the chip where the floating power source 801 is located through the second pin P2 and the third pin P3, the third pin P3 is bonded with the second pin P2 outside the chip where the floating power source 801 is located, the parasitic inductance Lpar3 generated by the bonding wire leads noise equivalent to noise at the P1 into the third pin P3, so that gnd_sens with noise at the P3 is provided, and the voltage signals provided at the P1 and P3 serve as a pair of power supply voltage signals, so that noise in the differential voltage signal vdd_sens-gnd_sens can be reduced or even eliminated. It should be noted here that fig. 9 shows the difference voltage signal vdd_sens-gnd_sens as being completely cancelled for convenience of comparison with fig. 7, and in practice, only the noise may be reduced without being completely cancelled.
Fig. 10 shows a block diagram of a power supply apparatus 1000 according to an embodiment of the present disclosure. The power supply apparatus 1000 includes the power supply signal generation apparatus 800, the power supply control apparatus 1001, and the power domain conversion apparatus 1002 described above. The power supply control means 1001 may be implemented by a power supply control circuit and the power domain switching means 1002 may be implemented by a level shift buffer, for example an H2S & S2H level shift buffer. The power supply signal generating means 800, the power supply control means 1001 and the power domain switching means 1002 may be integrated in one chip or may be implemented separately. It should be clear to a person skilled in the art that the above is only an example implementation, and that embodiments of the present disclosure are not limited thereto.
As shown in fig. 10, the power supply control device 1001 and the power domain switching device 1002 are supplied with power from the system power supply voltage VDD and the system ground voltage GND. The power supply control means 1001 is connected to the power supply signal generating means 800 for providing a control signal to the power supply signal generating means 800 for controlling the provision of the synchronized time-varying first and second power supply voltage signals, e.g. vdd_sens and gnd_sens, at the power supply signal generating means 800. For example, as shown in fig. 10, the power supply control device 1001 may provide a control signal to the floating power supply 801 of the power supply signal generating device 800 to control the floating power supply 801 to provide the power supply voltage signals vdd_sens and gnd_sens at pins P1 and P3, respectively. As described above, since the power ground node of the power module 8011 in the floating power supply 801 is separated from the signal ground node of the signal module 8012 and is led out from the chip where the floating power supply 801 is located through the second pin P2 and the third pin P3, respectively, and the third pin P3 is bonded with the second pin P2 outside the chip where the floating power supply 801 is located (as shown by the broken line in fig. 10), the parasitic inductance Lpar3 generated by the bonding wire introduces noise equivalent to the noise at P1 into the third pin P3, thereby providing the gnd_sens with noise at P3. The noisy vdd_sens at P1 and the noisy gnd_sens at P3 are provided as a pair of supply voltage signals such that noise in the difference voltage vdd_sens-gnd_sens is reduced or even eliminated.
The power domain switching device 1002 is connected to the power supply signal generating device 1001 and the power supply control device 1001, and is configured to receive the first power supply voltage signal and the second power supply voltage signal from the power supply signal generating device 1001, and to perform signal switching between a first power domain formed by the system power supply voltage VDD and the system ground voltage GND and a second power domain formed by the first power supply voltage signal and the second power supply voltage signal. In addition, the power domain switching device 1002 and the power supply control device 1001 may cooperatively realize signal transmission across the first power domain and the second power domain.
Fig. 11 illustrates a block diagram of a passive capacitive fingerprint identification system 1100 according to an embodiment of the disclosure. As shown in fig. 11, the passive capacitive fingerprint recognition system 1100 may include the power supply 1000 and the fingerprint sensor module 1101 described above.
The fingerprint sensor module 1101 may be connected to the power supply signal generating device 800 and the power domain converting device 1002 in the power supply device 1000. The fingerprint sensor module 1101 may be powered by the first and second power supply voltage signals generated by the power supply signal generating device 800. As described above, the floating power source 801 in the power supply signal generating device 800 may provide the fingerprint sensor module 1101 with the noisy vdd_sens and gnd_sens at the pins P1 and P3 under the control of the power supply control device 1001, so that the noise in the differential voltage vdd_sens-gnd_sens is reduced or even eliminated.
The fingerprint sensor module 1101 may enable cross-power domain signal transmission with an external master control unit via the power domain switching device 1002 and the power control device 1001 in the power supply device 1000.
As an example, the fingerprint sensor module 1101 may be implemented by a fingerprint sensor chip. The power supply 1000 and the fingerprint sensor module 1101 may be integrated in one chip (as shown by the dotted line in fig. 11), in which case the third pin P3 may be bonded with the second pin P2 entirely off-chip. The power supply 1000 and the fingerprint sensor module 1101 may also be implemented in separate chips, respectively, in which case the third pin P3 may be bonded to the second pin P2 outside the chip (not shown) in which the power supply 1000 is located.
Embodiments of the present disclosure provide a second supply voltage signal by separating a power ground node of a power module from a signal ground node of a signal module and introducing noise equivalent to noise in a sensor supply voltage signal to the signal ground node such that noise in a difference voltage signal of the first supply voltage signal and the second supply voltage signal is reduced or even eliminated.
The embodiments of the present disclosure separate the power ground node of the power module 8011 from the signal ground node of the signal module 8012, and then respectively draw the power ground node of the power module 8011 from the chip where the floating power source 801 is located through the second pin P2 and the third pin P3, and join the third pin P3 with the second pin P2 outside the chip where the floating power source 801 is located, for example, by single-point joining through a PCB. The parasitic inductance Lpar3 generated by the bond wire outside the chip thus simply introduces noise equivalent to the noise at P1 into the third pin P3, so that the noise in the differential voltage signal vdd_sens-gnd_sens is reduced or even eliminated. By changing the topology of the circuit, the interference of the transitions of the gnd_sens to the circuit between vdd_sens and gnd_sens power supply domains is reduced in a simple manner.
The foregoing is merely a preferred embodiment of the present disclosure, and is not intended to limit the present disclosure, so that various modifications and changes may be made to the present disclosure by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.
Claims (8)
1. A power supply signal generating apparatus comprising:
the floating power supply comprises a power module and a signal module, wherein the power module is powered by a system power supply voltage and a system ground voltage and generates a first power supply voltage signal and a second power supply voltage signal which are synchronous and time-varying under the control of a control signal; and
an off-chip capacitor connected between a pin of the floating power supply providing a first power supply voltage signal and a pin providing a second power supply voltage signal outside a chip where the floating power supply is located,
the power supply node of the power module is connected with the signal power supply node of the signal module to provide a first power supply voltage signal; and is also provided with
The power ground node of the power module is separated from the signal ground node of the signal module, and noise equivalent to noise in the first supply voltage signal is introduced into the signal ground node to provide a second supply voltage signal,
the first supply voltage signal is a sensor supply voltage signal of a fingerprint sensor module in the passive capacitive fingerprint identification system, and the second supply voltage signal is a sensor ground voltage signal of the fingerprint sensor module in the passive capacitive fingerprint identification system.
2. The power supply signal generating apparatus according to claim 1, wherein,
the power supply node of the power module is connected with the signal power supply node of the signal module and led out of the chip through a first pin so as to provide a first power supply voltage signal at the first pin;
the power ground node of the power module is led out from the chip through a second pin;
the signal ground node of the signal module is led out from the chip through a third pin, and the third pin is connected with a second pin outside the chip where the floating power supply is positioned so as to provide a second power supply voltage signal at the third pin; and is also provided with
The off-chip capacitor is connected between the junction of the second pin P2 and the third pin P3 and the first pin P1.
3. The power supply signal generating device according to claim 2, wherein the third pin and the second pin are connected together at a single point outside a chip where the floating power supply is located, so that the first pin, the second pin and the third pin generate the same or similar parasitic circuit parameters.
4. The power supply signal generating device according to claim 3, wherein the third pin and the second pin are single-point bonded together through a printed circuit board PCB or single-point bonded together through a bonding wire.
5. A power supply apparatus comprising:
the power supply signal generating apparatus according to claim 1;
the power supply control device is powered by the system power supply voltage and the system ground voltage, is connected with the power supply signal generating device and is used for providing a control signal for the power supply signal generating device to control the power supply signal generating device to generate a first power supply voltage signal and a second power supply voltage signal which are synchronous and time-varying; and
and the power domain conversion device is powered by the system power voltage and the system ground voltage, is connected with the power supply signal generation device and the power supply control device, and is used for receiving the first power supply voltage signal and the second power supply voltage signal from the power supply signal generation device and realizing signal conversion between a first power domain formed by the system power voltage and the system ground voltage and a second power domain formed by the first power supply voltage signal and the second power supply voltage signal.
6. A passive capacitive fingerprint identification system, comprising:
the power supply device according to claim 5, and
the fingerprint sensor module is connected with the power supply signal generating device and the power supply domain switching device in the power supply device so as to supply power by the first power supply voltage signal and the second power supply voltage signal generated by the power supply signal generating device, and the power supply domain switching device and the power supply control device in the power supply device are used for realizing cross-power domain signal transmission with an external main control unit.
7. The passive capacitive fingerprint recognition system of claim 6, wherein the power supply is integrated with the fingerprint sensor module.
8. The passive capacitive fingerprint recognition system of claim 6, wherein the power supply is implemented separately from the fingerprint sensor module.
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| CN108780503B (en) * | 2018-02-12 | 2022-05-03 | 深圳市汇顶科技股份有限公司 | Fingerprint detection circuit, fingerprint identification device and terminal equipment |
| CN109245756B (en) * | 2018-11-07 | 2023-10-03 | 深圳讯达微电子科技有限公司 | Method for reducing power domain switching noise and chip output interface circuit |
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