CN106354673A - Data transmission method and device based on a plurality of DMA queues - Google Patents
Data transmission method and device based on a plurality of DMA queues Download PDFInfo
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- CN106354673A CN106354673A CN201610734599.0A CN201610734599A CN106354673A CN 106354673 A CN106354673 A CN 106354673A CN 201610734599 A CN201610734599 A CN 201610734599A CN 106354673 A CN106354673 A CN 106354673A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5061—Partitioning or combining of resources
- G06F9/5077—Logical partitioning of resources; Management or configuration of virtualized resources
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/28—DMA
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention discloses a data transmission method and a device based on a plurality of DMA queues. The method comprises the steps of configuring primary DMA queues and secondary DMA queues and distributing at least one secondary DMA queue for primary DMA queues; getting data by primary DMA queues and distributing data to secondary DMA queues corresponding to primary DMA queues; and scheduling secondary DMA queues to control data transmission. As data of secondary DMA queues come from distribution of primary DMA queues and the same primary DMA queue may have a plurality of secondary DMA queues, each secondary DMA queue just needs very low rate, greatly reducing cache of each secondary DMA queue so as to reduce consumption of hardware resources and effectively save chip area and power consumption. In the meantime, more DMA queues are realized at lower cost, greater flexibility is offered for virtualization and hardware is enabled to better support virtualization in finer granularity.
Description
Technical field
The present invention relates to communication technical field, especially relate to a kind of data transmission method based on many dma queue and
Device.
Background technology
Traditional Intel Virtualization Technology, is shared by software simulation and virtualization network adapter a physical port,
To meet input/output (i/o) demand of virtual machine.Multiple layers of simulation softward have made i/o decision-making for virtual machine, therefore lead to
Bottleneck occurs in environment and affects i/o performance, thus the virtual machine quantity run is had influence on a physical server to equalize
The i/o performance of system.With the development of Intel Virtualization Technology, virtual machine and container technique wish to directly operate direct memory access
(direct memory access, dma) queue, to improve systematic function, reduces time delay.After particularly container technique occurs,
The concurrent application run on one physical server more it is desirable to hardware supported more dma queue.
When being carried out data transmission based on many dma queue, each dma queue both participates in data transfer and scheduling, i.e. dma team
After row receive data, send data transfer request to service quality (qos), qos is by being scheduling to each dma queue
Control data is transmitted.Although these dma queues work simultaneously, each dma queue needs the handling capacity very little supported,
Simultaneously in order to meet traditional application scenarios, hardware dma cohort design is still necessary to support linear speed, and this results in hardware logic money
A large amount of consumption in source.
Such as in the application of 40g network interface card, design requirement supports 4000 dma queues, and each dma queue is according to 40g line
Speed is designing, then the transmission bandwidth of a dma queue can configure between 1m～40g, the hardware resource that this span is brought
Consume and include: the hardware cache of each dma queue needs according to 40g configuration, and the caching of consumption is directly proportional to handling capacity.And right
When restriction speed is done in dma queue, speed quantifier and comparator are also required to design according to 40g.Except hardware resource disappears
Beyond consumption, due to the simultaneous disequilibrium of dma queue of 1m and 40g to be considered, all can have quite in design and in checking
Complexity.In the example of above-mentioned 40g network interface card, support that the hardware resource shared by 4000 dma queues is quite huge,
Thus greatly increasing area and the power consumption of chip.
Content of the invention
The main object of the present invention is for providing a kind of data transmission method based on many dma queue and device it is intended to solve
The technical problem big to hardware resource consumption when being carried out data transmission based on many dma queue.
To achieve these objectives, the present invention propose a kind of data transmission method based on many dma queue, methods described include with
Lower step:
Configuration one-level dma queue and two grades of dma queues, are at least one two grades of dma team of described one-level dma queue assignment
Row；
Data is obtained by described one-level dma queue, described data distribution is given corresponding two grades of described one-level dma queue
Dma queue；
By described two grades of dma queues are scheduling with control data transmission.
Further, the described step by described two grades of dma queues are scheduling with control data transmission includes:
Two grades of dma queues are selected according to scheduling strategy, executes the data transfer request of the two grades of dma queues chosen；
Judge whether the transfer rate of described two grades of dma queues has exceeded restriction speed, if so, then hang up described two grades
Dma queue.
Further, the described step bag that described data distribution is given the corresponding two grades of dma queues of described one-level dma queue
Include:
When a data includes at least two parts, the various pieces of described data are distributed to described one-level dma team
Arrange corresponding same dma queue.
Further, the described step bag that described data distribution is given the corresponding two grades of dma queues of described one-level dma queue
Include:
When a data includes at least two parts, the various pieces of described data are respectively allocated to described one-level
The corresponding at least two 2 grades of dma queues of dma queue, and for described data various pieces arrange affiliated two grades of dma queues it
Between incidence relation.
Further, methods described also includes:
After the data transfer request of two grades of dma queues in elected is finished, whether judge the data block of this transmission
For a complete data；
If not a complete data, then determine whether this transmission data block be whether same data
Rear portion；
If not the last part of same data, then two grades of dma associated by data block of automatically this being transmitted
The selection result that queue is dispatched as next round.
The present invention proposes a kind of data transmission device based on many dma queue simultaneously, and described device includes:
Queue configuration module, for configuring the queue of one-level dma and two grades of dma queues, be described one-level dma queue assignment extremely
Few two grades of dma queues；
Data allocation module, for obtaining data by described one-level dma queue, described data distribution is given described one-level
The corresponding two grades of dma queues of dma queue；
Queue scheduling module, for by being scheduling control data transmission to described two grades of dma queues.
Further, described queue scheduling module is used for:
Two grades of dma queues are selected according to scheduling strategy, executes the data transfer request of the two grades of dma queues chosen；Judge
Whether the transfer rate of described two grades of dma queues has exceeded restriction speed, if so, then hangs up described two grades of dma queues.
Further, described data allocation module is used for:
When a data includes at least two parts, the various pieces of described data are distributed to described one-level dma team
Arrange corresponding same dma queue.
Further, described data allocation module is used for:
When a data includes at least two parts, the various pieces of described data are respectively allocated to described one-level
The corresponding at least two 2 grades of dma queues of dma queue, and for described data various pieces arrange affiliated two grades of dma queues it
Between incidence relation.
Further, described queue scheduling module is additionally operable to:
After the data transfer request of two grades of dma queues in elected is finished, whether judge the data block of this transmission
For a complete data；If not a complete data, then determine whether whether the data block of this transmission is same
The last part of individual data；If not the last part of same data, then automatically the data block bag that this transmits is closed
The selection result that two grades of dma queues of connection are dispatched as next round.
A kind of data transmission method based on many dma queue that the embodiment of the present invention is provided, by configuring dma queue
For the queue of one-level dma and two grades of dma queues, one-level dma queue receiving data simultaneously distributes to two grades of dma queues, two grades of dma queues
Participate in follow-up data transfer and scheduling, because the data of two grades of dma queues comes from the distribution of one-level dma queue, and same
Multiple two grades of dma queues can be had, therefore each two grades of dma queue only need to support the speed of very little under individual one-level dma queue,
Substantially reducing the caching of each two grades of dma queue, thus reducing the consumption to hardware resource, effectively saving the face of chip
Amass and power consumption.Simultaneously so that the cost increasing dma queue becomes controlled, more dma teams can be realized with relatively low cost
Virtualization applications are provided greater flexibility, and enable hardware preferably to support more fine-grained virtualization by row.
Brief description
Fig. 1 is the flow chart of the data transmission method based on many dma queue of first embodiment of the invention；
Fig. 2 is the structural representation of dma queue in the embodiment of the present invention；
Fig. 3 is the state transition diagram of two grades of dma queues in the embodiment of the present invention；
Fig. 4 be in the embodiment of the present invention queue of one-level dma to the schematic diagram of two grades of dma queue assignment data；
Fig. 5 be in the embodiment of the present invention queue of one-level dma to another schematic diagram of two grades of dma queue assignment data；
Fig. 6 is the flow chart of the data transmission method based on many dma queue of second embodiment of the invention；
Fig. 7 is the module diagram of the data transmission device based on many dma queue of third embodiment of the invention.
The realization of the object of the invention, functional characteristics and advantage will be described further in conjunction with the embodiments referring to the drawings.
Specific embodiment
It should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
Those skilled in the art of the present technique are appreciated that unless expressly stated, singulative " " used herein, "
Individual ", " described " and " being somebody's turn to do " may also comprise plural form.It is to be further understood that arranging used in the description of the present invention
Diction " inclusion " refers to there is described feature, integer, step, operation, element and/or assembly, but it is not excluded that existing or adding
Other features one or more, integer, step, operation, element, assembly and/or their group.It should be understood that when we claim unit
Part is " connected " or during " coupled " to another element, and it can be directly connected or coupled to other elements, or can also exist
Intermediary element.Additionally, " connection " used herein or " coupling " can include wirelessly connecting or wirelessly coupling.Used herein arrange
Diction "and/or" includes one or more associated list the whole of item or any cell and combines with whole.
Those skilled in the art of the present technique are appreciated that unless otherwise defined, and all terms used herein (include technology art
Language and scientific terminology), there is the general understanding identical meaning with the those of ordinary skill in art of the present invention.Also should
Be understood by, those terms defined in such as general dictionary it should be understood that have with the context of prior art in
The consistent meaning of meaning, and unless by specific definitions as here, otherwise will not use idealization or excessively formal implication
To explain.
Embodiment one
With reference to Fig. 1, the data transmission method based on many dma queue of first embodiment of the invention, methods described bag are proposed
Include following steps:
S11, configuration one-level dma queue and two grades of dma queues, are at least one two grades of dma team of one-level dma queue assignment
Row.
In the embodiment of the present invention, traditional dma queue is split into the queue of two-stage dma, respectively one-level dma queue and two
Level dma queue, it is alternatively possible to the queue of one-level dma is referred to as Client queue, two grades of dma queues is referred to as scheduling queue.
The queue of one-level dma is supplied to the traditional dma queue operation interface of user, such as in the example of 40g network interface card, each
The queue of one-level dma still may be configured to the arbitrary velocity between 1m～40g.The quantity of one-level dma queue can be according to need
Configure, such as configuration two, three or more one-level dma queue, as shown in Fig. 2 exemplary is configured with three one-level dma teams
Row, respectively cq0, cq1 and cq2.
Two grades of dma queues are the real queues participating in data transfer and scheduling on data path, are on data path
Attended Operation and the logical block of arbitration.In other words, two grades of dma queues participate in service arbitration, and arbitration result determines which is chosen
Data in individual two grades of dma queues is performed.For each two grades of dma queue, limiting speed, the limit of each two grades of dma queues are set
Speed processed can be the same or different.The quantity of two grades of dma queues can with the number of one-level dma queue as many, or
More, as shown in Fig. 2 exemplary is configured with six two grades of dma queues, respectively sq0, sq1, sq2, sq3, sq4 and sq5.
Each one-level queue needs the quantity of the flank speed=excess configured rate/bis- grade dma queue of support, excess configured rate one
As can be higher than linear speed, but not much higher, still with 40g network interface card as an example, if setting excess configured rate as 80g (2
Times linear speed), the quantity of two grades of dma queues is 4000, then each two grades of dma queue only needs to support the speed of 1m～20m, because
The caching that this each two grades of dma queue needs just seldom, and also more equalizes between each two grades of dma queues.
Can be divided for each one-level dma queue by setting up the mapping relations of the queue of one-level dma and two grades of dma queues
Join two grades of dma queues, wherein, the mapping relations of the queue of one-level dma and two grades of dma queues can be specified or by hard by software
Part is specified by algorithm.Be mapped to two grades of dma queues of same one-level dma queue queue sequence number can be continuous or
It is discontinuous, it is continuous that such as two grades dma queue queues 1,2,3 are mapped to one-level dma queue 1, and two grades of dma queues
1st, 3,5 to be mapped to one-level dma queue 1 be then discontinuous, and continuous queue sequence number is mapped to same Client queue and can save
The logic of queue mapping.As shown in Fig. 2 two grades of dma queue sq0 can be distributed to one-level dma queue cq0, by two grades of dma teams
Row sq1, sq2, sq3 distribute to one-level dma queue cq1 by two grades of dma queue sq4 and sq5 dispensing one-level dma queue cq2.
The credit value (credit) of all two grades of dma queues being mapped in same one-level dma queue and speed are combined in
It is equal to the credit value of this one-level dma queue together and speed sets.Credit value is used for priority arbitration or the poll of Weight
Arbitration, is mapped in the credit value of two grades of dma queues of difference in same one-level dma queue and rate value (restriction speed) is permissible
Different.
As shown in figure 3, two grades of dma queue at least dormancy, activation and three kinds of states of hang-up.Two grades of dma queues are allocated
To (as after being mapped to the queue of one-level dma) after the queue of one-level dma, then enter state of activation from resting state；When two grades of dma teams
When the transfer rate of row transmission data exceedes its restriction speed, two grades of dma queues then enter suspended state from state of activation；Hang
Under the state of rising, (continue Preset Time as hung up, at the end of hanging up during timer) when meeting the condition releasing suspended state,
Two grades of dma queues return state of activation from suspended state again；Two grades of dma queues to be turned round between activation and two states of hang-up
Change, when the mapping relations with the queue of one-level dma are cancelled, come back to resting state.
S12, by the queue of one-level dma obtain data, assign data to the corresponding two grades of dma teams of this one-level dma queue
Row.
In this step s12, one-level dma queue receiving data, then by the data receiving according to default allocation strategy
Distribute to its corresponding two grades of dma queue, alternatively, the queue of one-level dma can carry out data distribution according to load balancing principle,
As the data receiving is sequentially allocated to each two grades of dma queues.As shown in Fig. 2 one-level dma queue cq1 receives d0-
D5 totally six data, wherein, data d0 and d3 are distributed to two grades of dma queue sq1, data d1 and d4 are distributed to two grades of dma
Queue sq2, data d2 and d5 are distributed to two grades of dma queue sq3.
When a data includes at least two parts, the queue of one-level dma can be carried out using following two allocation strategies
Data distribution:
First, the various pieces of data are distributed to its corresponding same dma queue by the queue of one-level dma.For example, as schemed
Shown in 4, one-level dma queue cq1 is fully allocated to two grades by after a data packing being made up of d1 (1)-d1 (3) three part
Dma queue sq2.
Second, the various pieces of data are respectively allocated to one-level dma queue corresponding at least two 2 by the queue of one-level dma
Level dma queue, and the incidence relation between affiliated two grades of dma queues, this allocation strategy are set for the various pieces of this data
Advantage be that the load that can make each two grades of dma queues more equalizes, and data buffer storage can be saved.For example, as Fig. 5 institute
Show, one-level dma queue cq1 is respectively allocated to three two grades of dma teams by one by the data that d1 (1)-d1 (3) three part forms
Row, wherein, d (1) distributes to two grades of dma queue sq2, and d1 (2) distributes to two grades of dma queue sq3, and d1 (3) distributes to two grades of dma
Queue sq1, and d1 (1) is linked to two grades of dma queue sq3 belonging to d1 (2), d1 (2) is linked to two belonging to d1 (3)
Level dma queue sq1, to ensure that same data can continuously send.The different piece of same data is assigned in order
Two grades of different dma queues can save data cached space.
In the embodiment of the present invention, the data of transmission is mainly datagram, it is of course also possible to transmit other data.Data
Report is when being stored in physical memory, presented in data block, gives the correct time it is only necessary to corresponding to transmission data report in transmission data
Data block descriptor (or claim command character), this descriptor indicates deposit position in physical memory for the datagram,
That is, the data putting into the queue of one-level dma and two grades of dma queues is the descriptor of datagram.
Common, deposit the content of a datagram in each data block, a designator indicates a complete number
According to report, the queue of one-level dma receives the descriptor of each datagram, and the descriptor of each datagram is distributed to corresponding two grades
Dma queue.
But in some cases, datagram storage location in physical memory is probably discrete a, data
Report is made up of it is therefore desirable at least two descriptors could state a complete datagram at least two data blocks.Now, one
Level dma queue can distribute to its corresponding same two grades of dma queue by after the different descriptor packings of same datagram,
The different descriptors of same datagram can be respectively allocated to its corresponding two grades of different dma queue, by same data
The different descriptors of report are assigned to the space that different two grade dma queue can save buffer descriptor in order.By setting up
Linking relationship carrys out the different descriptors of synchronous same datagram.The queue of one-level dma is assigned to two grades of dma queues descriptor
The method of salary distribution can be different with application difference.
S13, by two grades of dma queues are scheduling control data transmission.
In the embodiment of the present invention, participate in data transfer and scheduling by two grades of dma queues.Specifically, it is active
Each two grades of dma queues send data transfer request to queue scheduling module (as qos), and queue scheduling module is according to scheduling strategy
Select two grades of dma queues, execute the data transfer request of the two grades of dma queues chosen；Data transfer when this two grades of dma queues
After request is finished, queue scheduling module judges whether the transfer rate of this two grades of dma queues has exceeded restriction speed, if
It is then to hang up this two grades of dma queues, if it is not, then continuing to keep this two grades of dma queues to be active.It is in suspended state
Two grades of dma queues not data retransmission request transmission, until meet release suspended state condition when (as hang up persistently preset when
Between, at the end of hanging up during timer), two grades of dma queue ability return state of activation from suspended state.
Scheduling strategy described in the embodiment of the present invention can adopt the scheduling strategy of prior art, will not be described here.
Further, the same data in order to ensure to be assigned to different two grade dma queue can completely continuously be passed
Defeated, after the data transfer request of two grades of dma queues in being elected to is finished, queue scheduling module also judges the number of this transmission
Whether it is a complete data according to block；If not a complete data, then determine whether that the data block of this transmission is
No be same data last part；If not the last part of same data, the then number automatically this being transmitted
The selection result dispatched as next round according to two grades of dma queues associated by block.
For example, when the descriptor that the data of transmission is datagram, the data transfer of two grades of dma queues in being elected to
After request is finished, queue scheduling module judges whether the descriptor of this transmission indicates a complete datagram；If
No, then determine whether whether the descriptor of this transmission indicates the last part of same datagram；If it is not, then automatically will
Associated by descriptor two grades of selection results that dma queue is dispatched as next round of this transmission.
For example, in Figure 5, after two grades of dma queue sq2 transmission d1 (1) in being elected to, during next round scheduling, two are then automatically chosen
Level dma queue sq3 transmission d1 (2), then during next round scheduling, then automatically choose two grades of dma queue sq1 transmission d1 (3).
The data transmission method based on many dma queue of the embodiment of the present invention, by being configured to one-level dma by dma queue
Queue and two grades of dma queues, one-level dma queue receiving data simultaneously distributes to two grades of dma queues, and two grades of dma queues participate in subsequently
Data transfer and scheduling, because the data of two grades of dma queues comes from the distribution of one-level dma queue, and same one-level dma
Multiple two grades of dma queues can be had, therefore each two grades of dma queue only need to support the speed of very little, greatly reduce under queue
The caching of each two grades of dma queue, thus reducing the consumption to hardware resource, effectively saves area and the work(of chip
Consumption.Simultaneously so that the cost increasing dma queue becomes controlled, more dma queues can be realized with relatively low cost, to void
Planization application provides greater flexibility, and enables hardware preferably to support more fine-grained virtualization.
Embodiment two
The data transmission method based on many dma queue of second embodiment of the invention with reference to Fig. 6, is proposed, the present embodiment with
As a example transmission data report, comprise the following steps:
S21, the descriptor of one-level dma queue receiving data report.
Descriptor is assigned to two grades of dma queues of activation by s22, the queue of one-level dma.
Wherein, an one-level dma queue is at least assigned with two grades of dma queues, and each one-level dma queue will each receive
To descriptor distribute to its corresponding two grades of dma queue.When same datagram is indicated by multiple descriptors, one-level dma team
Row can distribute to its corresponding same two grades of dma queue it is also possible to incite somebody to action after the different descriptors packings of same datagram
The different descriptors of same datagram are respectively allocated to its corresponding two grades of different dma queue.
Two grades of dma queues participate in follow-up scheduling, and in other words, two grades of dma queues participate in the service of queue scheduling module
Arbitration, arbitration result determines to choose the descriptor in which two grades of dma queue to be performed.
S23, queue scheduling module select two grades of dma queues according to scheduling strategy, execute the number of the two grades of dma queues chosen
According to transmission request.The descriptor of the datagram of two grades of dma queue request transmission of transmission primaries.
Whether the transfer rate of two grades of dma queues that s24, the judgement of queue scheduling module are chosen exceedes restriction speed.When super
When crossing restriction speed, execution step s25；When being not above limiting speed, leap to step s26.
Two grades of dma queues that s25, the hang-up of queue scheduling module are chosen.Then execution step s26.
It is in two grades of dma queues not data retransmission request transmission of suspended state, until meeting the condition releasing suspended state
When (continue Preset Time as hung up, at the end of hanging up during timer), two grades of dma queue ability return activation shape from suspended state
State.
S26, queue scheduling module judge whether the descriptor of this transmission indicates a complete datagram.If so,
Then return to step s23, carries out next round scheduling；If it is not, then execution step s27.
S27, queue scheduling module judge whether the descriptor of this transmission indicates the last part of same datagram.
If then return to step s23, carry out next round scheduling；If it is not, then execution step s28.
Two grades of dma queues associated by the descriptor that this transmits are adjusted by s28, queue scheduling module automatically as next round
The selection result of degree, and return to step s23, carry out next round scheduling.
Using the data transmission method based on many dma queue for the embodiment of the present invention, each two grades of dma queue only needs to prop up
Hold the speed of very little, substantially reduce the caching of each two grades of dma queue, thus reducing the consumption to hardware resource, effectively
Save area and the power consumption of chip.Simultaneously so that the cost increasing dma queue becomes controlled, can be real with relatively low cost
Now virtualization applications are provided greater flexibility, and enable hardware preferably to support more particulate by more dma queues
The virtualization of degree.
Embodiment three
With reference to Fig. 7, the data transmission device based on many dma queue of third embodiment of the invention, described device bag are proposed
Include queue configuration module, data allocation module and queue scheduling module, wherein:
Queue configuration module: for configuring the queue of one-level dma and two grades of dma queues, be one-level dma queue assignment at least
Individual two grades of dma queues.
The queue of one-level dma is supplied to the traditional dma queue operation interface of user, and two grades of dma queues are real logical in data
The queue of the scheduling of data transfer and queue scheduling module is participated on road.Queue configuration module is each two grades of dma queue setting
Limiting speed, the limiting speed of each two grades of dma queues can be the same or different.
Queue configuration module can by set up the mapping relations of the queue of one-level dma and two grades of dma queues come for each
The two grades of dma queues of one-level dma queue assignment.As shown in Fig. 2 two grades of dma queue sq0 can be distributed to one by queue configuration module
Level dma queue cq0, by two grades of dma queue sq1, sq2, sq3 distribute to one-level dma queue cq1 by two grades of dma queue sq4 and
Sq5 dispensing one-level dma queue cq2.
Data allocation module: for data is obtained by the queue of one-level dma, assign data to the queue of one-level dma and correspond to
Two grades of dma queues.
Specifically, data allocation module passes through one-level dma queue receiving data, then by the data receiving according to default
Allocation strategy distribute to its corresponding two grades of dma queue, alternatively, the queue of one-level dma can be entered according to load balancing principle
The data receiving such as is sequentially allocated to each two grades of dma queues by row data distribution.As shown in Fig. 2 the queue of one-level dma
Cq1 receives d0-d5 totally six data, wherein, data d0 and d3 is distributed to two grades of dma queue sq1, data d1 and d4 are divided
Two grades of dma queue sq2 of dispensing, data d2 and d5 are distributed to two grades of dma queue sq3.
When a data includes at least two parts, the queue of one-level dma can be carried out using following two allocation strategies
Data distribution:
First, the various pieces of data are distributed to its corresponding same dma queue by the queue of one-level dma.For example, as schemed
Shown in 4, one-level dma queue cq1 is fully allocated to two grades by after a data packing being made up of d1 (1)-d1 (3) three part
Dma queue sq2.
Second, the various pieces of data are respectively allocated to one-level dma queue corresponding at least two 2 by the queue of one-level dma
Level dma queue, and the incidence relation between affiliated two grades of dma queues, this allocation strategy are set for the various pieces of this data
Advantage be that the load that can make each two grades of dma queues more equalizes, and data buffer storage can be saved.For example, as Fig. 5 institute
Show, one-level dma queue cq1 is respectively allocated to three two grades of dma teams by one by the data that d1 (1)-d1 (3) three part forms
Row, wherein, d (1) distributes to two grades of dma queue sq2, and d1 (2) distributes to two grades of dma queue sq3, and d1 (3) distributes to two grades of dma
Queue sq1, and d1 (1) is linked to two grades of dma queue sq3 belonging to d1 (2), d1 (2) is linked to two belonging to d1 (3)
Level dma queue sq1, to ensure that same data can continuously send.
In the embodiment of the present invention, the data of transmission is mainly datagram, it is of course also possible to transmit other data.Data
Report is when being stored in physical memory, presented in data block, gives the correct time it is only necessary to corresponding to transmission data report in transmission data
Data block descriptor (or claim command character), this descriptor indicates deposit position in physical memory for the datagram,
That is, the data putting into the queue of one-level dma and two grades of dma queues is the descriptor of datagram.
Common, deposit the content of a datagram in each data block, as shown in fig. 6, depositing respectively in data block 0-5
Put the content of datagram 0-5.The queue of one-level dma receives the descriptor of each datagram, and the descriptor by each datagram
Distribute to corresponding two grades of dma queues.
But in some cases, datagram storage location in physical memory is probably discrete a, data
Report is made up of it is therefore desirable at least two descriptors could be stated at least two data blocks, as shown in fig. 7, data block (1)-(3)
One datagram d1 of composition.Now, the queue of one-level dma can be right by distributing to it after the different descriptor packings of same datagram
Same two grades of dma queues of answering are it is also possible to that the different descriptors of same datagram are respectively allocated to it is corresponding different
Two grades of dma queues.
Queue scheduling module: for by two grades of dma queues are scheduling with control data transmission.
Specifically, queue scheduling module selects two grades of dma queues according to scheduling strategy, executes the two grades of dma queues chosen
Data transfer request；After the data transfer request of this two grades of dma queues is finished, queue scheduling module judges this two grades
Whether the transfer rate of dma queue has exceeded restriction speed, if so, then hangs up this two grades of dma queues, if it is not, then continuing to keep
This two grades of dma queues are active.It is in two grades of dma queues not data retransmission request transmission of suspended state, until meeting
(continue Preset Time as hung up, at the end of hanging up during timer) during the condition releasing suspended state, two grades of dma queue ability from
Suspended state returns state of activation.
Scheduling strategy described in the embodiment of the present invention can adopt the scheduling strategy of prior art, will not be described here.
Further, the same data in order to ensure to be assigned to different two grade dma queue can completely continuously be passed
Defeated, after the data transfer request of two grades of dma queues in being elected to is finished, queue scheduling module also judges the number of this transmission
Whether it is a complete data according to block；If not a complete data, then determine whether that the data block of this transmission is
No be same data last part；If not the last part of same data, the then number automatically this being transmitted
The selection result dispatched as next round according to two grades of dma queues associated by block.
For example, when the descriptor that the data of transmission is datagram, the data transfer of two grades of dma queues in being elected to
After request is finished, queue scheduling module judges whether the descriptor of this transmission indicates a complete datagram；If
No, then determine whether whether the descriptor of this transmission indicates the last part of same datagram；If it is not, then automatically will
Associated by descriptor two grades of selection results that dma queue is dispatched as next round of this transmission.
For example, in Figure 5, after two grades of dma queue sq2 transmission d1 (1) in being elected to, during next round scheduling, two are then automatically chosen
Level dma queue sq3 transmission d1 (2), then during next round scheduling, then automatically choose two grades of dma queue sq1 transmission d1 (3).
The data transmission device based on many dma queue of the embodiment of the present invention, by being configured to one-level dma by dma queue
Queue and two grades of dma queues, one-level dma queue receiving data simultaneously distributes to two grades of dma queues, and two grades of dma queues participate in subsequently
Data transfer and scheduling, because the data of two grades of dma queues comes from the distribution of one-level dma queue, and same one-level dma
Multiple two grades of dma queues can be had, therefore each two grades of dma queue only need to support the speed of very little, greatly reduce under queue
The caching of each two grades of dma queue, thus reducing the consumption to hardware resource, effectively saves area and the work(of chip
Consumption.Simultaneously so that the cost increasing dma queue becomes controlled, more dma queues can be realized with relatively low cost, to void
Planization application provides greater flexibility, and enables hardware preferably to support more fine-grained virtualization.
It should be understood that above-described embodiment provide the data transmission device based on many dma queue with based on many dma team
The data transmission method embodiment of row belongs to same design, and it implements process and refers to embodiment of the method, and embodiment of the method
In technical characteristic all corresponding in device embodiment be suitable for, repeat no more here.
The data transmission method based on many dma queue of the embodiment of the present invention and device, are mainly used in pcie equipment, when
Miscellaneous equipment so can also be applied to.
It will be understood by those skilled in the art that the present invention includes relating to execute in operation described herein
Or multinomial equipment.These equipment can specially design for required purpose and manufacture, or can also include general-purpose computations
Known device in machine.These equipment have and are stored in its interior computer program, and these computer programs optionally activate
Or reconstruct.Such computer program can be stored in equipment (for example, computer) computer-readable recording medium or be stored in and be suitable to
Storage e-command is simultaneously coupled in any kind of medium of bus respectively, and described computer-readable medium includes but is not limited to
(read-only memory read-only deposits for any kind of disk (including floppy disk, hard disk, CD, cd-rom and magneto-optic disk), rom
Reservoir), ram (random access memory, random access memory), eprom (erasable programmable read-
Only memory, Erarable Programmable Read only Memory), eeprom (electrically erasable programmable
Read-only memory, EEPROM), flash memory, magnetic card or light card.It is, it is readable
Medium include being stored in the form of can reading by equipment (for example, computer) or transmission information any medium.
Those skilled in the art of the present technique be appreciated that can be realized with computer program instructions these structure charts and/or
Each frame in block diagram and/or flow graph and the combination of the frame in these structure charts and/or block diagram and/or flow graph.This technology is led
Field technique personnel be appreciated that can by these computer program instructions be supplied to general purpose computer, special purpose computer or other
The processor of programmable data processing method is realizing, thus the process by computer or other programmable data processing methods
Device is executing the scheme specified in the frame of structure chart disclosed by the invention and/or block diagram and/or flow graph or multiple frame.
Those skilled in the art of the present technique be appreciated that the various operations having discussed in the present invention, method, in flow process
Step, measure, scheme can be replaced, changed, combined or deleted.Further, there is discussed in the present invention each
Kind of operation, method, other steps in flow process, measure, scheme can also be replaced, changed, reset, decomposed, combined or deleted.
Further, of the prior art have and the step in the various operations disclosed in the present invention, method, flow process, measure, scheme
Can also be replaced, changed, reset, decomposed, combined or deleted.
The foregoing is only the preferred embodiments of the present invention, not thereby limit the scope of the claims of the present invention, every utilization
Equivalent structure or equivalent flow conversion that description of the invention and accompanying drawing content are made, or it is related to be directly or indirectly used in other
Technical field, be included within the scope of the present invention.
Claims (10)
1. a kind of data transmission method based on many dma queue is it is characterised in that comprise the following steps:
Configuration one-level dma queue and two grades of dma queues, are at least one the two grades of dma queue of described one-level dma queue assignment；
Data is obtained by described one-level dma queue, described data distribution is given the corresponding two grades of dma of described one-level dma queue
Queue；
By described two grades of dma queues are scheduling with control data transmission.
2. the data transmission method based on many dma queue according to claim 1 it is characterised in that described by institute
State two grades of dma queues be scheduling control data transmission step include:
Two grades of dma queues are selected according to scheduling strategy, executes the data transfer request of the two grades of dma queues chosen；
Judge whether the transfer rate of described two grades of dma queues has exceeded restriction speed, if so, then hang up described two grades of dma teams
Row.
3. the data transmission method based on many dma queue according to claim 1 and 2 is it is characterised in that described will be described
Data distribution includes to the step of the corresponding two grades of dma queues of described one-level dma queue:
When a data includes at least two parts, the various pieces of described data are distributed to described one-level dma queue pair
The same dma queue answered.
4. the data transmission method based on many dma queue according to claim 2 it is characterised in that described by described number
Include according to the step distributing to the corresponding two grades of dma queues of described one-level dma queue:
When a data includes at least two parts, the various pieces of described data are respectively allocated to described one-level dma team
Arrange corresponding at least two 2 grades of dma queues, and the pass between affiliated two grades of dma queues is set for the various pieces of described data
Connection relation.
5. the data transmission method based on many dma queue according to claim 4 is it is characterised in that methods described is also wrapped
Include:
After the data transfer request of two grades of dma queues in elected is finished, judge whether the data block of this transmission is one
Individual complete data；
If not a complete data, then determine whether that whether the data block of this transmission is last of same data
Part；
If not the last part of same data, then two grades of dma queues associated by data block of automatically this being transmitted
Selection result as next round scheduling.
6. a kind of data transmission device based on many dma queue is it is characterised in that include:
Queue configuration module, for configuring the queue of one-level dma and two grades of dma queues, is described one-level dma queue assignment at least
Individual two grades of dma queues；
Data allocation module, for obtaining data by described one-level dma queue, described data distribution is given described one-level dma
The corresponding two grades of dma queues of queue；
Queue scheduling module, for by being scheduling control data transmission to described two grades of dma queues.
7. the data transmission device based on many dma queue according to claim 6 is it is characterised in that described queue scheduling
Module is used for:
Two grades of dma queues are selected according to scheduling strategy, executes the data transfer request of the two grades of dma queues chosen；Judge described
Whether the transfer rate of two grades of dma queues has exceeded restriction speed, if so, then hangs up described two grades of dma queues.
8. the data transmission device based on many dma queue according to claim 6 or 7 it is characterized in that, described data is divided
Join module to be used for:
When a data includes at least two parts, the various pieces of described data are distributed to described one-level dma queue pair
The same dma queue answered.
9. the data transmission device based on many dma queue according to claim 7 is it is characterised in that described data distribution
Module is used for:
When a data includes at least two parts, the various pieces of described data are respectively allocated to described one-level dma team
Arrange corresponding at least two 2 grades of dma queues, and the pass between affiliated two grades of dma queues is set for the various pieces of described data
Connection relation.
10. the data transmission device based on many dma queue according to claim 9 is it is characterised in that described queue scheduling
Module is additionally operable to:
After the data transfer request of two grades of dma queues in elected is finished, judge whether the data block of this transmission is one
Individual complete data；If not a complete data, then determine whether whether the data block of this transmission is same number
According to last part；If not the last part of same data, then the two of the data block associated automatically this transmitted
The selection result that level dma queue is dispatched as next round.
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| CN107341063A (en) * | 2017-07-13 | 2017-11-10 | 郑州云海信息技术有限公司 | A kind of data transmission method and system |
| CN111522643A (en) * | 2020-04-22 | 2020-08-11 | 杭州迪普科技股份有限公司 | Multi-queue scheduling method and device based on FPGA, computer equipment and storage medium |
| CN114416611A (en) * | 2021-12-26 | 2022-04-29 | 山东云海国创云计算装备产业创新中心有限公司 | Data transmission method, device, equipment and medium for solid state disk |
| CN114996011A (en) * | 2022-06-07 | 2022-09-02 | 芯河半导体科技(无锡)有限公司 | Method for realizing virtualized DMA controller supporting flexible resource allocation |
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