CN106354554A - FPGA unit and FPGA wakeup method - Google Patents
FPGA unit and FPGA wakeup method Download PDFInfo
- Publication number
- CN106354554A CN106354554A CN201610681435.6A CN201610681435A CN106354554A CN 106354554 A CN106354554 A CN 106354554A CN 201610681435 A CN201610681435 A CN 201610681435A CN 106354554 A CN106354554 A CN 106354554A
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- CN
- China
- Prior art keywords
- fpga
- wake
- unit
- signal
- wakeup
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/485—Task life-cycle, e.g. stopping, restarting, resuming execution
Abstract
The invention discloses an FPGA unit and an FPGA wakeup method. The FPGA unit comprises a receiving unit used for receiving a wakeup signal of a user and an FPGA used for conducting wakeup according to the wakeup signal. According to the FPGA unit and the FPGA wakeup method, the user-controlled wakeup function is achieved with few logical resources, the user not only can flexibly control FPGA wakeup but also can accurately position a wakeup moment, and the flexibility of the FPGA wakeup is improved.
Description
Technical field
The present invention relates to field programmable gate array (field-programmable gate array, i.e. fpga) neck
Domain, more particularly, to a kind of fpga unit and fpga awakening method.
Background technology
With the extensive application of fpga, the motility to fpga awakening method is put forward higher requirement.Traditional fpga
Awakening method, realizes inside fpga, carries out fpga wake-up by fpga internal control.Because fpga internal control wakes up the moment
Fixing and opaque to user, so user can not flexibly control fpga to wake up, nor carry out accurately determining to waking up the moment
Position, constrains the motility of fpga wake-up.
Content of the invention
The present invention provides a kind of fpga unit and fpga awakening method, mainly solves existing fpga and wakes up scheme underaction
Problem.
The fpga unit that the present invention provides, comprising:
Receiving unit, for the wake-up signal of receive user;
Fpga, for being waken up according to described wake-up signal.
In certain embodiments, described receiving unit includes: pin group, and described pin group includes at least one fpga pipe
Foot.
In certain embodiments, described fpga includes:
User logic unit, for being transferred to wakeup unit by described wake-up signal by interconnector;
Wakeup unit, for waking up to described fpga according to described wake-up signal.
The fpga awakening method that the present invention provides, comprising:
The wake-up signal of receive user;
Fpga wake-up is carried out according to described wake-up signal.
In certain embodiments, carry out fpga wake-up according to described wake-up signal to include:
By the interconnector of the user logic unit in described fpga, described wake-up signal is transferred in described fpga
Wakeup unit;
Described wakeup unit wakes up to described fpga according to described wake-up signal.
The present invention provides a kind of new fpga unit and fpga awakening method.Achieve user's control with less logical resource
Arousal function processed, user can either flexibly control fpga to wake up it is also possible to be accurately positioned to waking up the moment, improves fpga
The motility waking up.
Brief description
The schematic diagram of the fpga unit that Fig. 1 provides for first embodiment of the invention;
The schematic diagram of the fpga unit that Fig. 2 provides for second embodiment of the invention;
The flow chart of the fpga awakening method that Fig. 3 provides for third embodiment of the invention.
Specific embodiment
It should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.
Below by specific embodiment, the present invention is described in more detail.
First embodiment
With reference to Fig. 1, the schematic diagram of the fpga unit that Fig. 1 provides for first embodiment of the invention, this fpga unit mainly wraps
Include: receiving unit 11 and fpga 12, wherein,
Receiving unit 11 is used for the wake-up signal (wakeup) of receive user;
Fpga 12 is used for being waken up according to described wake-up signal.
The concrete structure of receiving unit 11 has multiple, as long as enabling above-mentioned corresponding function.In some embodiments
In, receiving unit 11 may include that pin group, and described pin group includes at least one fpga pin, the fpga in this pin group
Pin can be the general pin of fpga.
Fpga 12 can include user logic unit and wakeup unit, and user logic unit is mainly used in realizing fpga 12
Basic function, the described wake-up signal being additionally operable to receive receiving unit 11 passed by the interconnector of user logic unit
It is defeated by wakeup unit;Wakeup unit is mainly used according to described wake-up signal, described fpga being waken up.
The present embodiment is different from traditional fpga and wakes up scheme, wakes up not by fpga internal control, but by user
Control, wake-up signal is sent by user, fpga is waken up under the triggering of the wake-up signal that user sends it is achieved that user couple
The flexible control that fpga wakes up, improves the motility of fpga wake-up.
Second embodiment
With reference to Fig. 2, the schematic diagram of the fpga unit that Fig. 2 provides for second embodiment of the invention, this fpga unit mainly wraps
Include: pin group 21 and fpga 22, pin group 21 includes the general pin of one group of fpga, and fpga 22 includes user logic unit 221
With wakeup unit 222, user logic unit 221 is mainly used in realizing the basic function of fpga22.After electricity on fpga unit, use
The wake-up signal that family produces inputs from pin group 21, and pin group 21 connects the user logic unit 221 in fpga 22, and user patrols
Pin group 21 and wakeup unit 222 are connected by the interconnector collecting unit 221, and wake-up signal passes through user logic unit 221
Interconnector reaches wakeup unit 222, and fpga is waken up.
The present embodiment make use of the interconnector of user logic unit 221 that wake-up signal is transferred to wakeup unit 222, uses
Less logical resource achieves user's control arousal function, and user can either flexibly control fpga to wake up it is also possible to wake-up
Moment is accurately positioned, and improves the motility of fpga wake-up.
3rd embodiment
With reference to Fig. 3, the flow chart of the fpga awakening method that Fig. 3 provides for third embodiment of the invention, this fpga wake-up side
Method specifically includes that
S401, the wake-up signal of receive user;
S402, fpga wake-up is carried out according to described wake-up signal.
The wake-up signal of pin group receive user can be passed through, described pin group includes at least one fpga in step s401
Pin, the fpga pin in this pin group can be the general pin of fpga.
To can be called out described in step s401 by the interconnector of the user logic unit in fpga in step s402
Awake signal transmission gives the wakeup unit in described fpga;Described wakeup unit is called out to described fpga according to described wake-up signal
Wake up.
The present embodiment is different from traditional fpga and wakes up scheme, controls not by fpga device inside and wakes up, but by
User's control, sends wake-up signal by user, and fpga is waken up it is achieved that being used under the triggering of the wake-up signal that user sends
The flexible control that family wakes up to fpga, improves the motility of fpga wake-up.
The embodiments of the present invention are for illustration only, do not represent the quality of embodiment.By above embodiment party
The description of formula, those skilled in the art can be understood that above-described embodiment method can be by software plus necessary general
The mode of hardware platform is realizing naturally it is also possible to pass through hardware, but the former is more preferably embodiment in many cases.It is based on
Such understanding, what technical scheme substantially contributed to prior art in other words partly can be with software product
Form embody, this computer software product is stored in a storage medium (as rom/ram, magnetic disc, CD), including
Some instructions are with so that a station terminal equipment (can be mobile phone, computer, server, air-conditioner, or network equipment etc.)
Method described in execution each embodiment of the present invention.
Above in conjunction with accompanying drawing, embodiments of the invention are described, but the invention is not limited in above-mentioned concrete
Embodiment, above-mentioned specific embodiment is only schematically, rather than restricted, those of ordinary skill in the art
Under the enlightenment of the present invention, in the case of without departing from present inventive concept and scope of the claimed protection, also can make a lot
Form, these belong within the protection of the present invention.
Claims (5)
1. a kind of fpga unit is it is characterised in that include:
Receiving unit, for the wake-up signal of receive user;
Fpga, for being waken up according to described wake-up signal.
2. fpga unit as claimed in claim 1 is it is characterised in that described receiving unit includes: pin group, described pin group
Including at least one fpga pin.
3. fpga unit as claimed in claim 1 is it is characterised in that described fpga includes:
User logic unit, for being transferred to wakeup unit by described wake-up signal by interconnector;
Wakeup unit, for waking up to described fpga according to described wake-up signal.
4. a kind of fpga awakening method is it is characterised in that include:
The wake-up signal of receive user;
Fpga wake-up is carried out according to described wake-up signal.
5. fpga awakening method as claimed in claim 4 is it is characterised in that carry out fpga wake-up packet according to described wake-up signal
Include:
By the interconnector of the user logic unit in described fpga, described wake-up signal is transferred to calling out in described fpga
Awake unit;
Described wakeup unit wakes up to described fpga according to described wake-up signal.
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CN201610681435.6A CN106354554A (en) | 2016-08-17 | 2016-08-17 | FPGA unit and FPGA wakeup method |
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CN201610681435.6A CN106354554A (en) | 2016-08-17 | 2016-08-17 | FPGA unit and FPGA wakeup method |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101256209A (en) * | 2008-03-26 | 2008-09-03 | 首都师范大学 | Three-phase electrical energy computation chip based on NIOS II microprocessor |
CN102654532A (en) * | 2011-05-31 | 2012-09-05 | 杭州万工科技有限公司 | Method for reducing power consumption of electric energy metering chip |
CN103248663A (en) * | 2012-02-14 | 2013-08-14 | 鸿富锦精密工业(深圳)有限公司 | Terminal equipment control circuit |
CN104697587A (en) * | 2015-04-01 | 2015-06-10 | 成都城联科技有限公司 | Monitoring device for underground drainage pipe network and working mechanism of monitoring device |
-
2016
- 2016-08-17 CN CN201610681435.6A patent/CN106354554A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101256209A (en) * | 2008-03-26 | 2008-09-03 | 首都师范大学 | Three-phase electrical energy computation chip based on NIOS II microprocessor |
CN102654532A (en) * | 2011-05-31 | 2012-09-05 | 杭州万工科技有限公司 | Method for reducing power consumption of electric energy metering chip |
CN103248663A (en) * | 2012-02-14 | 2013-08-14 | 鸿富锦精密工业(深圳)有限公司 | Terminal equipment control circuit |
CN104697587A (en) * | 2015-04-01 | 2015-06-10 | 成都城联科技有限公司 | Monitoring device for underground drainage pipe network and working mechanism of monitoring device |
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Application publication date: 20170125 |
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