CN106353549B - A kind of conditioned circuit device and voltage measuring apparatus - Google Patents
A kind of conditioned circuit device and voltage measuring apparatus Download PDFInfo
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- CN106353549B CN106353549B CN201610667922.7A CN201610667922A CN106353549B CN 106353549 B CN106353549 B CN 106353549B CN 201610667922 A CN201610667922 A CN 201610667922A CN 106353549 B CN106353549 B CN 106353549B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
- G01R15/04—Voltage dividers
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0084—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring voltage only
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Abstract
The present invention provides a kind of conditioned circuit devices, comprising: first adjusts circuit, the second adjusting adjusts circuit, signal conditioner, analogue-to-digital converters and processor；The processor receives the output signal after signal conditioner and analogue-to-digital converters conversion, and analyzes according to pre-set rule the digital signal；According to analysis as a result, adjusting the disconnection of each switch and closed state in circuit by sending control signal to control described first, the investment or cutting of tunable capacitor are realized, the equivalent capacity for adjusting circuit so as to adjust described first；And control described second adjusts the gear connection status of multiplexer in circuit, changes the resistor voltage divider network tap position of connection, so as to adjust the voltage at the fixed capacity both ends, fixed capacity is made to be modeled to tunable capacitor.The present invention can reduce the investment of manpower, greatly improved work efficiency by the program-controlled adjust automatically for realizing derided capacitors.
Description
Technical field
The present invention relates to field of circuit control, and more specifically, it relates to a kind of conditioned circuit devices and voltage measurement to fill
It sets.
Background technique
Since semiconductor electronic circuit voltage is lower, high input voltage signal is divided usually using divider resistance
Decaying, however there are input capacitance Cin, divider resistance and buffer input capacitance Cin to constitute low pass filtered after buffer partial pressure
Wave device network, with the increase of frequency input signal, the capacitive reactance of buffer input capacitance is reduced, and the voltage into buffer is declined
Subtract, limit the bandwidth of input signal, in order to improve bandwidth, the shunt capacitance on divider resistance, high frequency is divided by capacitor
Pressure, as shown in Figure 1, divider resistance include upper divider resistance be R1, lower divider resistance is R2, derided capacitors include upper derided capacitors
For C1, always the derided capacitors (including stray capacitance and buffer input capacitance) are descended to be C2, if resistance capacitance value meets R1 × C1
The time constant of=R2 × C2, i.e., upper partial pressure capacitance-resistance are equal with the lower partial pressure time constant of capacitance-resistance, for any frequency capacitor point
Pressure ratio with electric resistance partial pressure than identical, available flat amplitude-frequency response.
Actually since derided capacitors are there are error, buffer input capacitance, mounting structure etc. can all have differences, cause
Partial pressure capacity-resistance time constant is unequal up and down, causes amplitude-frequency characteristic uneven, thus need to the derided capacitors of each product into
Row fine tuning, is matched using tunable capacitor at present, and adjustable electric has semicircle fixed metal electrode and movable semicircle metal electrode,
Centre uses ceramics or film or air as dielectric, and the overlapping degree of movable electrode and fixed electrode is manually adjusted by tool
It is more time-consuming so as to adjust capacity, but by the way of this manually adjust.
Summary of the invention
In view of this, realizing the adjust automatically of derided capacitors the present invention provides a kind of conditioned circuit device, can reduce
The investment of manpower, greatly improves work efficiency.
To achieve the above object, the invention provides the following technical scheme:
A kind of conditioned circuit device, comprising: the first signal input part N1, second signal input terminal N2, the first divider resistance
R1, the second divider resistance R2, the first derided capacitors C1, buffer input capacitance Cin, stray capacitance C2', buffer 1, first are adjusted
Economize on electricity the adjusting of road 5, second circuit 6, signal conditioner 2, analogue-to-digital converters 3 and processor 4；
The first end of the first adjusting circuit 5 is connected with the input terminal of the buffer 1, and described first adjusts circuit 5
Second end be connected with the output end of the buffer 1, it is described first adjust circuit 5 third end ground connection；
The first end of the second adjusting circuit 6 is connected with the input terminal of the buffer 1, and described second adjusts circuit 6
Second end be connected with the output end of the buffer 1, it is described second adjust circuit 6 third end ground connection；
The output end of the buffer 1 passes sequentially through the signal conditioner 2 and the analogue-to-digital converters 3 and institute
The input terminal for stating processor 4 is connected；
The signal conditioner 2 improves the output signal of the buffer 1, and sends the signal after conditioning to
The analogue-to-digital converters 3, the analogue-to-digital converters 3 carry out digital conversion to received signal, and will be after conversion
Digital signal be sent to the processor 4, the processor 4 is according to pre-set rule to the received digital signal
It is analyzed, and result will be analyzed and be sent to the described first control terminal for adjusting each switch in circuit 5 by controlling harness L2
And the described second address input end for adjusting multiplexer 61 in circuit 6 is sent to by controlling harness (L1).
Optionally, the first adjusting circuit 5 includes: the identical branch of multiple structures, and each branch is parallel with one another,
Wherein each branch includes: first capacitor C11, first switch Q11 and the first protective resistance R11, the first capacitor C11
First end be connected with the input terminal of the buffer 1, the second end of the first capacitor C11 and the first switch Q11's
First end is connected, the second end ground connection of the first switch Q11, between the first capacitor C11 and the first switch Q11
Tie point is connected by the first protective resistance R11 with the output end of the buffer 1.
Optionally, the second adjusting circuit 6 includes: fixed capacity C21, multiplexer 61 and resistor network 62；Institute
The first end for stating fixed capacity C21 is connected with the input terminal of the buffer 1, the second end of the fixed capacity C21 with it is described
The output end N3 of multiplexer 61 is connected；The first end of the resistor network 62 is connected with the output end of the buffer 1, institute
The second end ground connection of resistor network 62 is stated, the resistor network 62 includes multiple resistance, and each resistance is sequentially connected in series；It is described
Multiplexer 61 includes first input end and multiple second input terminals, and the first input end ground connection, multiple described second is defeated
Enter end to correspond with the first end of multiple resistance in order.
Optionally, the processor 4 includes: multiple output ends, wherein output corresponding with the first adjusting circuit 5
End is connected with control terminal of each switch in the first adjusting circuit 5 respectively by switch control harness L2, and described
Second, which adjusts the corresponding output end of circuit 6, controls multichannel in harness L1 and the second adjusting circuit 6 by multiplexer
The address input end of multiplexer 61 is connected.
Optionally, the capacity of capacitor is incremented by successively according to binary system on every branch in the first adjusting circuit 5.
Optionally, the described first switch for adjusting every branch road in circuit 5 is mechanical relay, low capacitor optical relay
Or technotron.
Optionally, the electrode of capacitor is that circuit board covers copper on every branch in the first adjusting circuit 5, and dielectric is plate
Substrate；Or the capacitor of every branch road is fixed capacitor in the first adjusting circuit 5.
Optionally, the processor 4 includes: the first analytical unit 41, and first analytical unit 41 is for receiving amplitude
Identical low frequency and high-frequency digital signal measure the amplitude of low frequency and high-frequency signal, the amplitude of high-frequency signal described in comparative analysis
With the difference of the low frequency signal amplitude.
Optionally, the processor 4 includes: the second analytical unit 42, and second analytical unit 42 is used for received
Digital signal carries out fft analysis, obtains the fundamental wave of the digital signal and the amplitude of each harmonic and phase ratio information, foundation
The percent information first passes through the percent information that theoretical FFT is calculated with the digital signal in advance and is compared analysis.
A kind of voltage measuring apparatus, comprising: the conditioned circuit device.
It can be seen via above technical scheme that compared with prior art, the invention discloses a kind of conditioned circuit device, packets
It includes: the first signal input part N1, second signal input terminal N2, the first divider resistance R1, the second divider resistance R2, the first partial pressure electricity
Hold C1, buffer input capacitance Cin, stray capacitance C2', buffer 1, first and adjusts circuit 5, second adjusting circuit 6, signal tune
Manage device 2, analogue-to-digital converters 3 and processor 4；The reception of processor 4 is improved through signal conditioner 2 and analog to digital
Output signal after the conversion of converter 3, and the output signal is analyzed according to pre-set rule；According to analysis knot
Fruit adjusts the disconnection of each switch and closed state in circuit 5 by control harness transmission control signal to control described first,
Realize the investment or cutting of tunable capacitor, the equivalent capacity for adjusting circuit 5 so as to adjust described first；And control described second
The gear connection status of multiplexer 61 in circuit 6 is adjusted, fixed capacity C21 and resistor voltage divider network tap position are changed
Connection relationship makes fixed capacity C21 be modeled to tunable capacitor so as to adjust the voltage at the both ends the fixed capacity C21.The present invention
By the program-controlled adjust automatically for realizing derided capacitors, it can reduce the investment of manpower, greatly improve work efficiency.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is a kind of circuit diagram of available circuit device provided by the invention；
Fig. 2 is a kind of circuit diagram of the conditioned circuit device provided in the embodiment of the present invention；
Fig. 3 is the circuit diagram of another conditioned circuit device provided in the embodiment of the present invention；
Fig. 4 is the structural schematic diagram of processor in the corresponding Fig. 3 of the embodiment of the present invention two.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Description and claims of this specification and term " first " in above-mentioned attached drawing, " second " etc. are for distinguishing
Similar object, without being used to describe a particular order or precedence order.It should be understood that the term used in this way is in appropriate feelings
It can be interchanged under condition, this is only to describe the used differentiation in description to the object of same alike result in the embodiment of the present invention
Mode.
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing and specific real
Applying mode, the present invention is described in further detail.
Attached drawing 2 is please referred to, is an a kind of embodiment circuit diagram of conditioned circuit device provided by the invention.
A kind of conditioned circuit device, as shown in Fig. 2, the device includes: that the first signal input part N1, second signal are defeated
Enter to hold N2, the first divider resistance R1, the second divider resistance R2, the first derided capacitors C1, buffer input capacitance Cin, stray electrical
Hold C2', buffer 1, first adjusts circuit 5, second and adjusts circuit 6, signal conditioner 2, analogue-to-digital converters 3 and processing
Device 4；
The first end of the first adjusting circuit 5 is connected with the input terminal of the buffer 1, and described first adjusts circuit 5
Second end be connected with the output end of the buffer 1, it is described first adjust circuit 5 third end ground connection；
The first end of the second adjusting circuit 6 is connected with the input terminal of the buffer 1, and described second adjusts circuit 6
Second end be connected with the output end of the buffer 1, it is described second adjust circuit 6 third end ground connection；
The output end of the buffer 1 passes sequentially through the signal conditioner 2 and the analogue-to-digital converters 3 and institute
The input terminal for stating processor 4 is connected；
The signal conditioner 2 improves the output signal of the buffer 1, and sends the signal after conditioning to
The analogue-to-digital converters 3, the analogue-to-digital converters 3 carry out digital conversion to received signal, and will be after conversion
Digital signal be sent to the processor 4, the processor 4 is according to pre-set rule to the received digital signal
It is analyzed, and result will be analyzed and be sent to the described first control terminal for adjusting each switch in circuit 5 by controlling harness L2
And the described second address input end for adjusting multiplexer 61 in circuit 6 is sent to by controlling harness L1.
Wherein, described first the control terminal of each switch is adjusted in circuit 5 and described second to adjust multichannel in circuit 6 multiple
With the address input end of device 61, according to the received analysis as a result, control described first adjusts the disconnected of each switch in circuit 5
It opens or is closed；And control described second adjusts the gear connecting line and multiplexer 61 of multiplexer 61 in circuit 6
An interior input terminal is connected, and adjusts the equivalent capacitance value of circuit 6 to change described first and adjust circuit 5 and described second.
Technical solution disclosed according to embodiments of the present invention one, the processor 4 send control letter by control harness
It number can control described first and adjust the disconnection of each switch and closed state in circuit 5, to realize and each switch series
The investment or cutting of the tunable capacitor of connection, the equivalent capacity for adjusting circuit 5 so as to adjust described first；And control described second
The gear connection status for adjusting multiplexer 61 in circuit 6, changes 62 tap position of resistor voltage divider network of connection, to adjust
The voltage at the whole fixed capacity both ends, makes fixed capacity be modeled to tunable capacitor, the adjust automatically of derided capacitors may be implemented,
Reduce artificial intervention, improves working efficiency, while improving Adjustment precision.
Attached drawing 3 is please referred to, is a kind of another example structure schematic diagram of conditioned circuit device provided by the invention.
As shown in figure 3, in the present embodiment, the first adjusting circuit 5 includes: the identical branch of multiple structures, each
The branch is parallel with one another, wherein each branch includes: first capacitor C11, first switch Q11 and the first protective resistance
R11, the first end of the first capacitor C11 are connected with the input terminal of the buffer 1, the second end of the first capacitor C11
It is connected with the first end of the first switch Q11, the second end of the first switch Q11 is grounded, the first capacitor C11 and institute
The tie point stated between first switch Q11 is connected by the first protective resistance R11 with the output end of the buffer 1.
Wherein, the described first capacity for adjusting capacitor on every branch in circuit 5 can be incremented by successively according to binary system, false
If lowest order is C, a high position is followed successively by 2C, 4C, 8C, 16C etc., and being incremented by according to binary system can be realized at most with the smallest element
Equally spaced gear, such as 8 kinds of different capabilities for being 1pF with the i.e. composable scale of tri- capacitors of 1pF, 2pF, 4pF, 0pF (3
Do not connect), 1pF, 2pF, 3pF (1pF is in parallel with 2pF), 4pF, 5pF (1pF is in parallel with 4pF)), 6pF (2pF is in parallel with 4pF),
7pF (3 parallel connections) etc..
Wherein, the described first capacitor for adjusting every branch road in circuit 5 can be the series-parallel structure of one or more capacitors
At；
Or the capacitor can be to cover the capacitor that copper is constituted as electrode, plate substrate as dielectric using circuit board,
Wherein it is arranged as the copper face product of covering of capacitance electrode according to binary system, ground level covers copper as public electrode, to realize binary system
Capacitor；Or the capacitor may be fixed capacitor.
Described first switch for adjusting each road in circuit 5 can be mechanical relay, the optical relay of low capacitor
Or technotron, it is realized and the concatenated tunable capacitor of switch by the disconnection and closed state that control the switch
Investment and cutting, so as to adjust it is described first adjust circuit 5 capacitance.
The first protective resistance R11 is used to maintain the first tunable capacitor C11 when the first switch Q11 is disconnected
With the connection between the first switch Q11 tie point voltage and the first divider resistance R1 and the second divider resistance R2
Point voltage is identical, and switch ends stray capacitance is avoided to generate Leakage Current.
As shown in figure 3, the second adjusting circuit 6 includes: fixed capacity C21, multiplexer 61 and resistor network 62；
The first end of the fixed capacity C21 is connected with the input terminal of the buffer 1, the second end of the fixed capacity C21 and institute
The output end N3 for stating multiplexer 61 is connected；The first end of the resistor network 62 is connected with the output end of the buffer 1,
The second end of the resistor network 62 is grounded, and the resistor network 62 includes multiple resistance, and each resistance is sequentially connected in series；Institute
Stating multiplexer 61 includes first input end and multiple second input terminals, and the first input end is grounded, and multiple described second
Input terminal is corresponded with the first end of multiple resistance in order.
Wherein, the multiplexer 61 includes that first input end and multiple second input terminals, the first input end connect
Ground, multiple second input terminals are corresponded with the first end of multiple resistance in order.By controlling multiplexer
61 gear and the connection status of input terminal may be implemented to carry out average mark to the output of buffer 1 using multiple resistance
Pressure, i.e., controllable fixed capacity C21 both end voltage accounts for the ratio of dividing point voltage-to-ground, so that fixed capacity C21 is modeled as
Variable capacitance.
Wherein, the resistor voltage divider network that the resistor network 62 is composed in series by multiple resistance, the both ends of whole string resistance, one
Ground connection is held, the first ends of another termination signal source to be divided, multiple electricity groups are different taps or leading point, difference
Tap correspond to different intrinsic standoff ratios.
For example, the resistor voltage divider network being composed in series by 5 resistance, 0~5 tap intrinsic standoff ratio is respectively 0/5,1/5,2/5,
3/5,4/5,5/5, if signal voltage be Vs, the output voltage of 0~5 tap be respectively 0,1/5Vs, 2/5Vs, 3/5Vs, 4/5Vs,
Vs.The multiplexer selects one of tap, and an intrinsic standoff ratio can be obtained.
The capacity of the fixed capacity C21 >=first adjusts the capacity of lowest order capacitor in circuit, to cover described first
The error for adjusting 5 lowest order capacitor of circuit keeps adjustment smoothly continuous, by the gear shape for controlling the multiplexer 61
State changes 62 tap position of resistor voltage divider network of connection, so as to adjust the voltage at the both ends the fixed capacity C21, thus will
Fixed capacity C21 is modeled as variable capacitance.
As shown in figure 3, the processor 4 includes: multiple output ends, wherein it is corresponding to adjust circuit 5 with described first
Output end is connected with the control terminal of each switch in the first adjusting circuit 5 respectively by switch control harness L2, with
Described second adjusts the corresponding output end of circuit 6 is controlled in harness L1 and the second adjusting circuit 6 by multiplexer
The address input end of multiplexer 61 is connected.
As shown in figure 4, the processor 4 includes:
First analytical unit 41, first analytical unit are used to receive the identical low frequency of amplitude and high-frequency digital signal,
Measure the amplitude of low frequency and high-frequency signal, the amplitude of high-frequency signal described in comparative analysis and the difference of the low frequency signal amplitude.
As shown in figure 4, the processor 4 includes:
Second analytical unit 42, second analytical unit are used to carry out fft analysis to received digital signal, obtain institute
The fundamental wave of digital signal and the amplitude of each harmonic and phase ratio information are stated, according to the percent information and the digital signal
The percent information that theoretical FFT is calculated is first passed through in advance is compared analysis.
Wherein, when carrying out the adjust automatically of derided capacitors, the processor has 2 kinds of Adjusted Options, and one of which is institute
The first analytical unit 41 for stating processor 4 receives the identical low frequency of the amplitude exported through analog-digital converter 3 and high frequency respectively
Signal, processor 4 first measure the amplitude of low frequency signal, then measure the high-frequency signal amplitude of output, the letter of high frequency described in comparative analysis
Number amplitude and the low frequency signal amplitude difference, in a progressive manner, pass through switch control harness L2 send control letter
Number to it is described first adjust circuit 5 in each road switch control terminal, with adjust it is described first adjusting circuit 5 in opening
Off status, the equivalent capacitance value for adjusting circuit 5 to first carry out coarse adjustment；Harness L1, which is controlled, by multiplexer sends control letter
Number to the multiplexer address input end, the multiplexer parses the control signal, selects one of them defeated
Enter and corresponding data is held to be exported, i.e., described second adjusts 61 gear of multiplexer and one of input in circuit 6
End is connected, and by controlling the gear of multiplexer, i.e., controllable fixed capacity both end voltage accounts for the ratio of dividing point voltage-to-ground
Example flows through the electric current of fixed capacity to change, fixed capacity is modeled as variable capacitance, adjusts circuit 5 and the by first
Two adjust the cooperation of circuit 6, realize the Auto-matching of capacity-resistance time constant up and down, make R1 × C1=R2 × C2, described lower point total
Voltage capacitance C2 includes: the first adjusting circuit equivalent capacitor, second adjusts circuit fixed capacity and buffer input capacitance and spuious
Capacitor keeps final high-frequency signal amplitude and low frequency signal difference minimum, and as matching status, the processor 4 are remembered simultaneously at this time
It records the high frequency and first under low frequency signal amplitude matching status and adjusts in circuit 5 switch state of every branch road and described
Second adjusts the gear state of the multiplexer 61 of circuit 6, is switched on adjusts circuit 5 all in accordance with this yard of configuration first each time
Switch state and it is described second adjust circuit 6 61 gear state of multiplexer.
Another Adjusted Option is 42 pairs of the second analytical unit of the processor 4 by partial pressure decaying, buffer 1, letter
Input square-wave signal after number conditioner 2, analogue-to-digital converters 3 are converted carries out fft analysis, and wherein signal conditioner 2 is used for
Input signal is adjusted to meet the signal of 3 input voltage range of analogue-to-digital converters, analogue-to-digital converters 3 are used for will
Its input signal changes into as digital signal, and 4 pairs of processor digital 3 sampled values of signal imitation-digital quantizer carry out fft analysis,
Obtain the fundamental wave of input square-wave signal and the amplitude and phase information of each harmonic.Since square-wave signal can pass through FFT operation
It is decomposed into fundamental wave and its each harmonic is formed by stacking, amplitude and period are constant, and fundamental wave and each harmonic amplitude proportion are also kept not
Become, according to this feature, FFT is carried out to the digital signal that analogue-to-digital converters 3 are converted and finds out fundamental wave and each harmonic ratio
Example is compared with the ratio of input square-wave signal theoretical calculation.According to comparison result, circuit is adjusted by control harness adjustment first
Switch state and second adjust circuit multiplexer gear state, the number for converting final analogue-to-digital converters 3
The case where when fundamental wave and each harmonic ratio of signal are closest to input square wave progress theoretical decomposition, switch state is at this time
Matching status, the switch state and described second that processor 4 records the first adjusting circuit 5 under this matching status adjust circuit 6
61 gear state of multiplexer, be switched on each time all in accordance with this yard configuration first adjust circuit 5 switch and described second
Adjust 61 gear of multiplexer of circuit 6.
The description of specific embodiment in two through the embodiment of the present invention, the processor 4 is by receiving through the letter
Number conditioner 2 and the analogue-to-digital converters 3 convert after digital signal, pass through first analytical unit or institute
It states the second analytical unit to analyze the received digital signal, while analysis result being sent to by controlling harness L2
Described first adjusts the control terminal of each switch in circuit 5 and is sent to the second adjusting circuit 6 by controlling harness L1
The address input end of interior multiplexer 61, thus effectively adjust it is described first adjust circuit 5 in each switch disconnection with
Closed state, to realize the investment or cutting of tunable capacitor, to change the described first equivalent capacity for adjusting circuit 5；And
The described second gear connection status for adjusting multiplexer 61 in circuit 6 is adjusted, the resistor voltage divider network 62 for changing connection is taken out
Head position makes fixed capacity C21 be modeled to tunable capacitor so as to adjust the voltage at the both ends the fixed capacity C21, makes to divide up and down
Voltage capacitance reaches matching.It may be implemented to divide the matched adjust automatically of capacity-resistance time constant up and down by program-controlled, obtain flat
Amplitude-frequency characteristic improves production efficiency, simultaneously because avoiding vibration to derided capacitors stability without mechanical capacitance adjustable device
It influences.
The present invention also provides a kind of specific embodiment of voltage measuring apparatus, which includes: above-mentioned
The conditioned circuit device.
Wherein, the voltage measuring apparatus can be surveyed for the voltage of all measurement direct currents, exchange or alternating current-direct current mixed signal
Measure device, such as oscillograph；Or a certain module in the voltage measuring apparatus is for measuring above-mentioned voltage signal, it is such as multi-purpose
Table, power meter, power analyzer etc..
Wherein, the voltage measuring apparatus can be according to sampling principle, be converted using analogue-to-digital converters 3, will even
Then continuous analog-signal transitions carry out restoration and reconstruction waveform, to achieve the purpose that measured waveform at discrete Serial No..
The buffer 1 is used to make received input signal buffering transformation, plays measured body and the voltage measurement
The effect of device isolation, the transformation of voltage measuring apparatus working condition will not influence input signal, while the amplitude of signal being cut
Shift to level range appropriate, the i.e. manageable range of voltage measuring apparatus, that is to say, that the signal of different amplitudes is passing through
The signal that can be all transformed into identical voltage range after input buffer amplifier；
The signal conditioner 2, for the output analog signal conditioner to be measured to the buffer 1 to suitable simulation numeral
The range that converter 3 is converted；
The analog-digital converter 3, the continuous analog signal for exporting the signal conditioner 2 are changed into discrete
Serial No., then rebuild waveform according to the sequencing of Serial No., the analog-digital converter 3 plays a sampling
Effect, it is converted into digital representation under the action of sampling clock, by the arrive size of signal amplitude at moment of sampling pulse
Numerical value, this point be known as sampled point；
The processor 4 converted by receiving the analogue-to-digital converters 3 after digital signal, and according to setting in advance
The rule set analyzes the received digital signal, while analysis result by control harness L2 is sent to described the
One adjusts the control terminal of each switch in circuit 5 and is sent to multichannel in the second adjusting circuit 6 by controlling harness L1
The address input end of multiplexer 61 can control described first and adjust the disconnection of each switch and closed state in circuit 5, with reality
The investment or cutting of existing tunable capacitor, the equivalent capacity for adjusting circuit 5 so as to adjust described first；And control described second is adjusted
The gear connection status of multiplexer 61, changes 62 tap position of resistor voltage divider network of connection in economize on electricity road 6, so as to adjust
The voltage at the both ends the fixed capacity C21, makes fixed capacity C21 be modeled to tunable capacitor, may be implemented to divide up and down by program-controlled
The matched adjust automatically of capacity-resistance time constant is pressed, flat amplitude-frequency characteristic is obtained.
The voltage measuring apparatus, as internal circuit structure, may be implemented up and down by using the conditioned circuit device
The matched adjust automatically of capacity-resistance time constant is divided, flat amplitude-frequency characteristic is obtained, while ensure that signal data, high frequency signal data measures
Accuracy, effectively prevent measurement error.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other
The difference of embodiment, the same or similar parts in each embodiment may refer to each other.For device disclosed in embodiment
For, since it is corresponded to the methods disclosed in the examples, so being described relatively simple, related place is said referring to method part
It is bright.
In addition it should be noted that, the apparatus embodiments described above are merely exemplary, wherein described as separation
The unit of part description may or may not be physically separated, component shown as a unit can be or
It can not be physical unit, it can it is in one place, or may be distributed over multiple network units.It can be according to reality
Some or all of the units may be selected to achieve the purpose of the solution of this embodiment for the needs on border.In addition, provided by the invention
In Installation practice attached drawing, the connection relationship between unit indicates there is communication connection between them, specifically can be implemented as one
Item or a plurality of communication bus or signal wire.Those of ordinary skill in the art are without creative efforts, it can
It understands and implements.
In conclusion the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations；Although referring to upper
Stating embodiment, invention is explained in detail, those skilled in the art should understand that: it still can be to upper
Technical solution documented by each embodiment is stated to modify or equivalent replacement of some of the technical features；And these
It modifies or replaces, the spirit and scope for technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution.
Claims (8)
1. a kind of conditioned circuit device characterized by comprising the first signal input part (N1), second signal input terminal (N2),
First divider resistance (R1), the second divider resistance (R2), the first derided capacitors (C1), buffer input capacitance (Cin), stray electrical
Hold (C2'), buffer (1), the first adjusting circuit (5), the second adjusting circuit (6), signal conditioner (2), analog-digital conversion
Device (3) and processor (4)；
Second signal input terminal (N2) ground connection, one end of first divider resistance (R1) connect the first signal input
It holds (N1), one end of other end connection second divider resistance (R2) of first divider resistance (R1), described second point
The other end of piezoresistance (R2) is grounded, and one end of first derided capacitors (C1) connects first signal input part (N1),
The other end of first derided capacitors (C1) connects the stray capacitance (C2'), another termination of the stray capacitance (C2')
The one end on ground, the buffer input capacitance (Cin) is connected with the input terminal of the buffer (1), the buffer input electricity
Hold the other end ground connection of (Cin)
Described first first end for adjusting circuit (5) is connected with the input terminal of the buffer (1), and described first adjusts circuit
(5) second end is connected with the output end of the buffer (1), and described first adjusts the third end ground connection of circuit (5), and described the
One first end for adjusting circuit (5) is also respectively connected with the other end and the first partial pressure electricity of first divider resistance (R1)
Hold the other end of (C1)；
Described second first end for adjusting circuit (6) is connected with the input terminal of the buffer (1), and described second adjusts circuit
(6) second end is connected with the output end of the buffer (1), and described second adjusts the third end ground connection of circuit (6), and described the
Two first ends for adjusting circuit (6) are also connected with the described first first end for adjusting circuit (5)；
The output end of the buffer (1) pass sequentially through the signal conditioner (2) and the analogue-to-digital converters (3) with
The input terminal of the processor (4) is connected；
The signal conditioner (2) improves the output signal of the buffer (1), and sends the signal after conditioning to
The analogue-to-digital converters (3), the analogue-to-digital converters (3) carry out digital conversion to received signal, and will turn
Digital signal after changing is sent to the processor (4), and the processor (4) is according to pre-set rule to received described
Digital signal is analyzed, and analysis result is sent in first adjusting circuit (5) each by controlling harness (L2)
The control terminal of switch and the ground for being sent to second adjusting circuit (6) interior multiplexer (61) by controlling harness (L1)
Location input terminal；
First adjusting circuit (5) includes: the identical branch of multiple structures, and each branch is parallel with one another, wherein each
The branch includes: first capacitor (C11), first switch (Q11) and the first protective resistance (R11), the first capacitor (C11)
First end be connected with the input terminal of the buffer (1), the second end of the first capacitor (C11) and the first switch
(Q11) first end is connected, and the second end ground connection of the first switch (Q11), the first capacitor (C11) is opened with described first
The tie point closed between (Q11) is connected by first protective resistance (R11) with the output end of the buffer (1)；
Second adjusting circuit (6) includes: fixed capacity (C21), multiplexer (61) and resistor network (62)；It is described solid
The first end for determining capacitor (C21) is connected with the input terminal of the buffer (1), the second end of the fixed capacity (C21) and institute
The output end (N3) for stating multiplexer (61) is connected；The first end of the resistor network (62) is defeated with the buffer (1)
Outlet is connected, and the second end ground connection of the resistor network (62), the resistor network (62) includes multiple resistance, each electricity
Resistance is sequentially connected in series；The multiplexer (61) includes first input end and multiple second input terminals, and the first input end connects
Ground, multiple second input terminals are corresponded with the first end of multiple resistance in order.
2. the apparatus according to claim 1, which is characterized in that the processor (4) includes: multiple output ends, wherein with
Described first, which adjusts circuit (5) corresponding output end, adjusts circuit with described first respectively by switch control harness (L2)
(5) control terminal of each switch in is connected, and output end corresponding with second adjusting circuit (6) passes through multiplexing
Device controls the address input end that harness (L1) adjusts circuit (6) interior multiplexer (61) with described second and is connected.
3. the apparatus according to claim 1, which is characterized in that capacitor on every branch in first adjusting circuit (5)
Capacity it is incremented by successively according to binary system.
4. the apparatus according to claim 1, which is characterized in that described first adjusts opening for every branch road in circuit (5)
Close is mechanical relay, low capacitor optical relay or technotron.
5. the apparatus according to claim 1, which is characterized in that capacitor on every branch in first adjusting circuit (5)
Electrode be that circuit board covers copper, dielectric is plate substrate；Or the capacitor of every branch road is in first adjusting circuit (5)
Fixed capacitor.
6. the apparatus according to claim 1, which is characterized in that the processor (4) includes: the first analytical unit (41),
First analytical unit (41) measures low frequency and high-frequency signal for receiving the identical low frequency of amplitude and high-frequency digital signal
Amplitude, the amplitude of high-frequency signal described in comparative analysis and the difference of the low frequency signal amplitude.
7. the apparatus according to claim 1, which is characterized in that the processor (4) includes: the second analytical unit (42),
Second analytical unit (42) be used for received digital signal carry out fft analysis, obtain the digital signal fundamental wave and
The amplitude and phase ratio information of each harmonic first pass through theoretical FFT according to the percent information and the digital signal in advance and count
The percent information of calculation is compared analysis.
8. a kind of voltage measuring apparatus, which is characterized in that including the conditioned circuit device as described in claim 1 to 7 any one.
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| CN201610667922.7A CN106353549B (en) | 2016-08-15 | 2016-08-15 | A kind of conditioned circuit device and voltage measuring apparatus |
| PCT/CN2017/076396 WO2018032754A1 (en) | 2016-08-15 | 2017-03-13 | Adjustable circuit device and voltage measuring device |
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| CN201610667922.7A CN106353549B (en) | 2016-08-15 | 2016-08-15 | A kind of conditioned circuit device and voltage measuring apparatus |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2018032754A1 (en) * | 2016-08-15 | 2018-02-22 | 广州致远电子股份有限公司 | Adjustable circuit device and voltage measuring device |
| CN107589690B (en) * | 2017-08-11 | 2019-12-17 | 东北电力大学 | Harmonic signal phase adjusting method and device for piezoelectric micro-fluidic system |
| CN109633296A (en) * | 2018-10-25 | 2019-04-16 | 国网浙江省电力有限公司检修分公司 | A kind of full frequency-domain wave recording device |
| CN110058080A (en) * | 2018-10-25 | 2019-07-26 | 国网浙江省电力有限公司检修分公司 | A kind of adaptive full frequency-domain recording system and method that can trigger transient high frequency acquisition |
| CN109581050A (en) * | 2018-10-25 | 2019-04-05 | 浙江华云清洁能源有限公司 | It is distributed the full frequency-domain recording system of centralization |
| CN110297124B (en) * | 2019-08-06 | 2022-04-12 | 南方电网科学研究院有限责任公司 | Non-grounded voltage measuring device and method |
| CN113447698B (en) * | 2021-06-11 | 2022-03-08 | 南方电网数字电网研究院有限公司 | Voltage measurement circuit, method and apparatus |
| CN114688738B (en) * | 2022-03-28 | 2023-09-05 | 广东固特科技有限公司 | Valve type ultrasonic scale treatment device for water heater |
| CN115454187B (en) * | 2022-09-19 | 2023-09-29 | 北京大学 | Multi-bit amplitude and phase adjustable modulation current generating circuit and integrated circuit |
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