CN106326533A - Method for modeling circuit of simulation training system - Google Patents
Method for modeling circuit of simulation training system Download PDFInfo
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- CN106326533A CN106326533A CN201610664690.XA CN201610664690A CN106326533A CN 106326533 A CN106326533 A CN 106326533A CN 201610664690 A CN201610664690 A CN 201610664690A CN 106326533 A CN106326533 A CN 106326533A
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- 238000012549 training Methods 0.000 title claims abstract description 27
- 238000000034 method Methods 0.000 title abstract description 29
- 238000004088 simulation Methods 0.000 title abstract description 9
- 238000010586 diagram Methods 0.000 claims description 20
- 230000009897 systematic effect Effects 0.000 claims description 8
- 230000008859 change Effects 0.000 claims description 7
- 238000013459 approach Methods 0.000 claims description 5
- 238000000354 decomposition reaction Methods 0.000 claims description 3
- 238000012360 testing method Methods 0.000 abstract description 15
- 238000012423 maintenance Methods 0.000 abstract description 4
- 230000010354 integration Effects 0.000 description 7
- 238000013461 design Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 230000009471 action Effects 0.000 description 3
- 230000008030 elimination Effects 0.000 description 2
- 238000003379 elimination reaction Methods 0.000 description 2
- 230000008520 organization Effects 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000003745 diagnosis Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
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- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The invention relates to a method for modeling a circuit of a simulation training system. The method comprises the following steps of digitalizing of a system schematic, reconstructing of the system schematic by a computer, and realizing of system logic reasoning. The method has the advantages that a new method for a physical model of a circuit of an integrated testing system is established by an object oriented technology through attributes, methods and events of component devices, circuits, and single machines, the simulation of equipment faults of the integrated testing system is realized, and the problem of no technical means for maintenance and training of certain type of integrated testing equipment troubling the army for a long time is solved.
Description
Technical field
The present invention relates to a kind of simulated training system circuit modeling approach.
Background technology
The simulation training of modernization has become as the important component part of military training means.Since entering 21 century, meter
Calculation machine emulation technology, network technology and virtual reality technology achieve quickly development, provide important for analog simulation training
Technical support so that analog simulation training system with its distinctive verisimilitude, interactivity and economy, progressively replace reality dress
The standby new tool becoming information age military training.
Certain type missile integration test system be mainly used to the integration test to guided missile, it be set electron, precision optical machinery,
Computer, the technology such as automatically control are in the large-scale and complicated device of one.At present, owing to being not equipped with, training cartridge is standby and equipment, army
Main battle weaponry can only be used to be trained, but owing to this system price is expensive, operation is complicated, actual load loss is relatively big, maintaining
Costly, and misoperation can cause equipment damage, normally train affecting army and preparation against war if being difficult to repair in time；Separately
Outward, main battle weaponry carries out normal operating only in equipment operation code, it is possible to meet the needs of equipment operation skill training, but
Cannot be carried out equipment failure diagnosis and process training, it is impossible to meeting the needs of equipment Safeguard personnel training, the most greatly affect
The training effect of army.
Summary of the invention
The technical problem to be solved is to provide a kind of simulated training system circuit modeling approach, is used for realizing
The Operation and maintenance simulation training of certain type missile integration test system.
Technical scheme can be realized by techniques below measure: a kind of simulated training system circuit modeling side
Method, comprises the following steps:
S1, systematic schematic diagram digitized, including
Decomposition circuit, is divided into multiple figure by training system circuit according to function, and each figure correspondence is one or more
Circuit, circuit is made up of series and parallel circuit, and series and parallel circuit is made up of parallel circuit or series circuit, and parallel circuit is by series circuit group
Becoming, series circuit connects components and parts, and
Set up hierarchical relationship, carry out classification volume according to components and parts each in circuit, series circuit, the hierarchical relationship of parallel circuit
Number, and
Component information, reference numeral storage each components and parts, series circuit, the letter of parallel circuit is stored with hierarchical relationship
Breath, obtains digitalization principle figure；
S2, the computer reconstruction of systematic schematic diagram, the digitalization principle figure of gained in S1 is modeled in computer and shows
Illustrate, model including schematic diagram and components and parts, schematic diagram dynamically generates with components and parts and shows；
S3, system logic implementation of inference, receive external signal, and sent on request by logical reasoning analog systems function
Various control signals, including
State changing section, when arranging including fault, when state change, simulated operation, state changes and simulated operation platform
Switch input state, and
Reasoning part, when state changes, circuit inference, and send control indication signal, and
Output interface part, when state changes, mainly gives element state change, simulated operation circle by signal
Face, simulated operation platform, circuit demonstration and multimedia presentation system.
Compared with prior art, there is advantages that carrying out integrated test system fault according to army examines
The disconnected needs with elimination ability training, use series circuit in Object-oriented Technique design circuit, parallel circuit, series and parallel circuit and
All kinds of components and parts, give certain attribute, method and event, carry out state setting by attribute, realize its function by method,
Trigger its action by event, show in the way of structure graph after circuit system schematic diagram is modeled and real-time display circuit work
Make state, it is achieved that the logical reasoning of integration test process；Arranged by system mode and element and circuit property are carried out fault
Arrange, change the attribute of all kinds of components and parts, it is achieved the simulation of each equipment fault of integrated test system, solve long-standing problem army
The test maintenance of equipment training of certain type missile integration without the difficult problem of technological means.
Accompanying drawing explanation
The invention will be further described to utilize accompanying drawing, but the embodiment in accompanying drawing does not constitute any limit to the present invention
System.
Fig. 1 is the schematic diagram sending out control power supply circuits；
Fig. 2 is the digitized hierarchical structure sending out control power supply circuits；
Fig. 3 is the computer reconstruction figure sending out control power supply circuits.
Detailed description of the invention
For making the present invention easier to understand, the specific embodiment of the present invention is further illustrated below.
A kind of simulated training system circuit modeling approach, including:
S1, systematic schematic diagram digitized, including decomposition circuit, set up its structural relation, with hierarchical relationship storage components and parts
Information.
Circuit system, when carrying out circuit and being virtual, is first divided into multiple figure, each figure pair according to function by system
Answering one or more circuit, each circuit is made up of a series and parallel circuit, and a series and parallel circuit is made up of serial or parallel connection circuit,
Wherein parallel circuit is made up of series circuit, and series circuit can be made up of parallel circuit and components and parts, first device of all types of circuit
Part composition includes: voltage source (hydraulic power source), control element, executive component and auxiliary element etc..
The feature of series circuit be electric current from high voltage to low-voltage, therefore, design time present same series electrical
Components and parts on road are in same rank when storage, and high voltage is in initial position, and low-voltage is in terminal location.When this
Series circuit high voltage for require voltage, control components and parts be in can duty, all element functions normal time, then this series connection
Circuit works.
Each parallel circuit is formed by least more than one series circuit.Therefore, when design, parallel circuit is one
Individual the container including series circuit, as long as when there being a series circuit in running order in parallel circuit, then this is also
Connection circuit is in can duty.When parallel circuit is in running order, then in running order for logical series circuit.
Series and parallel circuit is formed by one or more series circuits or parallel circuit combination, functionally can regard one as from it
The individual series circuit containing parallel circuit.Therefore, when design, series and parallel circuit is one and includes parallel circuit and components and parts
Series circuit, when components and parts each in series circuit and parallel circuit be in can duty time, then this series and parallel circuit is in work
State.
S2, the computer reconstruction of systematic schematic diagram, the digitalization principle figure of gained in S1 is modeled in computer and shows
Illustrate, model including schematic diagram and components and parts, schematic diagram dynamically generates with components and parts and shows.
The method that system uses when modeling is that circuit system resolves into series and parallel circuit, parallel circuit or series circuit,
Each circuit is made up of the components and parts of various functions respectively, uses Object-oriented Technique design series, parallel, series-parallel connection and all kinds of unit
Device, gives certain attribute, method and event, carries out state setting by attribute, realize its function by method, logical
The event of mistake triggers its action, it is achieved logical reasoning function.
In the process of reconstruction of circuit, the groundwork of figure is to show and location for generative circuit and circuit, and it is raw
One-tenth can be divided into three parts: series circuit generation module, parallel circuit generation module and series and parallel circuit generation module.By connecting,
Parallel connection and series and parallel circuit generation module, system can realize location and display and the system modelling of electrical schematic diagram.
In the process of reconstruction of components and parts, each components and parts are divided into element class and class signal, modeling to share an interface, all
Components and parts class is respectively provided with identical method and attribute, but its implementation is different, and the implication expressed by attribute also differs.
S3, system logic implementation of inference, receive external signal, and sent on request by logical reasoning analog systems function
Various control signals.
System logic reasoning is divided into three parts: one is state changing section, and when mainly fault is arranged, state changes, simulates
During operation, state changes and simulated operation floor switch input state；Two is reasoning part, when main completion status changes, and circuit
Reasoning, and send control indication signal；Three is output interface part, when state changes, mainly gives element by signal
State change, simulated operation interface, simulated operation platform, circuit demonstration and multimedia presentation system.
In reasoning process, in addition to the inference function of circuit, the also reasoning of part components and parts, as relay, voltage mechanism,
Positive voltage input signal, positive voltage output signal, display lamp etc..
As a example by sending out control power supply circuits, Fig. 1 represents the schematic diagram sending out control power supply circuits, carries out decomposing according to this schematic diagram
To digitized hierarchical structure as shown in Figure 2, and obtain storage organization as shown in table 1 below according to this hierarchical structure further
Table, wherein numbering is mainly used in expressing each components and parts, series circuit and the hierarchical relationship of parallel circuit in circuit, and interface is and mould
Intending the corresponding input of operating board, output interface address, original state is that these components and parts compose initial state value, element when generating
Type is for distinguishing each components and parts when the computer reconstruction of systematic schematic diagram and system logic reasoning.
1, table control power supply storage organization table
Use Object-oriented Technique that systematic schematic diagram is carried out computer reconstruction, obtain computer reconstruction as shown in Figure 3
Figure, and the logical reasoning of simulated training system is finally realized by circuit and components and parts each implementation of inference, receive the signal of telecommunication, and
Send corresponding control signal.
In sum, the present invention propose a kind of use Object-oriented Technique to pass through components and parts, circuit and unit attribute,
Method and the new method of event establishment integrated test system circuit physical model, carry out integrated test system fault according to army and examine
The disconnected needs with elimination ability training, use series circuit in Object-oriented Technique design circuit, parallel circuit, series and parallel circuit and
All kinds of components and parts, give certain attribute, method and event, carry out state setting by attribute, realize its function by method,
Trigger its action by event, show in the way of structure graph after circuit system schematic diagram is modeled and real-time display circuit work
Make state, it is achieved that the logical reasoning of integration test process；Arranged by system mode and element and circuit property are carried out fault
Arrange, change the attribute of all kinds of components and parts, it is achieved the simulation of each equipment fault of integrated test system, solve long-standing problem army
The test maintenance of equipment training of certain type missile integration without the difficult problem of technological means.
Last institute is it should be noted that, the present invention is only protected by above example in order to technical scheme to be described
Protecting the restriction of scope, although being explained in detail the present invention with reference to preferred embodiment, those of ordinary skill in the art should
Understand, technical scheme can be modified or equivalent, without deviating from the essence of technical solution of the present invention
And scope.
Claims (1)
1. a simulated training system circuit modeling approach, it is characterised in that comprise the following steps:
S1, systematic schematic diagram digitized, including
Decomposition circuit, is divided into multiple figure by training system circuit according to function, the corresponding one or more circuit of each figure,
Circuit is made up of series and parallel circuit, and series and parallel circuit is made up of parallel circuit or series circuit, and parallel circuit is made up of series circuit, string
Connection circuit connects components and parts, and
Set up hierarchical relationship, carry out classification numbering according to components and parts each in circuit, series circuit, the hierarchical relationship of parallel circuit,
And
Store component information, reference numeral storage each components and parts, series circuit, the information of parallel circuit with hierarchical relationship, obtain
To digitalization principle figure；
S2, the computer reconstruction of systematic schematic diagram, the digitalization principle figure of gained in S1 is modeled in computer and demonstrates
Come, model including schematic diagram and components and parts, schematic diagram dynamically generates with components and parts and shows；
S3, system logic implementation of inference, receive external signal, and send various on request by logical reasoning analog systems function
Control signal, including
State changing section, when arranging including fault, when state change, simulated operation, state changes and simulated operation floor switch
Input state, and
Reasoning part, when state changes, circuit inference, and send control indication signal, and
Output interface part, when state changes, mainly gives element state change, simulated operation interface, mould by signal
Intend operating platform, circuit demonstration and multimedia presentation system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610664690.XA CN106326533A (en) | 2016-08-12 | 2016-08-12 | Method for modeling circuit of simulation training system |
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|---|---|---|---|
| CN201610664690.XA CN106326533A (en) | 2016-08-12 | 2016-08-12 | Method for modeling circuit of simulation training system |
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| CN106326533A true CN106326533A (en) | 2017-01-11 |
Family
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Citations (6)
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|---|---|---|---|---|
| US20060031732A1 (en) * | 2000-06-08 | 2006-02-09 | Advantest Corporation | Generating test patterns used in testing semiconductor integrated circuit |
| CN101702271A (en) * | 2009-11-18 | 2010-05-05 | 深圳高级技工学校 | Vehicle practice teaching table based on singlechip technology |
| CN104504956A (en) * | 2014-12-22 | 2015-04-08 | 中国神华能源股份有限公司 | Railway electrical training system based on virtual reality |
| CN104751715A (en) * | 2015-01-29 | 2015-07-01 | 哈尔滨理工大学 | Electric shock fault simulation training device and testing method |
| CN105096694A (en) * | 2015-09-17 | 2015-11-25 | 中国人民解放军海军工程大学 | Electrical equipment virtual maintenance training system simulation method |
| CN105528943A (en) * | 2015-07-06 | 2016-04-27 | 中国电子科技集团公司第二十八研究所 | Design and implementation method of education and training system based on circuit simulation technology |
-
2016
- 2016-08-12 CN CN201610664690.XA patent/CN106326533A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060031732A1 (en) * | 2000-06-08 | 2006-02-09 | Advantest Corporation | Generating test patterns used in testing semiconductor integrated circuit |
| CN101702271A (en) * | 2009-11-18 | 2010-05-05 | 深圳高级技工学校 | Vehicle practice teaching table based on singlechip technology |
| CN104504956A (en) * | 2014-12-22 | 2015-04-08 | 中国神华能源股份有限公司 | Railway electrical training system based on virtual reality |
| CN104751715A (en) * | 2015-01-29 | 2015-07-01 | 哈尔滨理工大学 | Electric shock fault simulation training device and testing method |
| CN105528943A (en) * | 2015-07-06 | 2016-04-27 | 中国电子科技集团公司第二十八研究所 | Design and implementation method of education and training system based on circuit simulation technology |
| CN105096694A (en) * | 2015-09-17 | 2015-11-25 | 中国人民解放军海军工程大学 | Electrical equipment virtual maintenance training system simulation method |
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| Date | Code | Title | Description |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| CB03 | Change of inventor or designer information | ||
| CB03 | Change of inventor or designer information |
Inventor after: Xue Xuedong Inventor after: Cheng Xude Inventor after: Zheng Yuan Inventor after: Liu Dongyan Inventor after: Zhang Shuai Inventor after: Cheng Kan Inventor after: Wang Pin Inventor after: Liu Wei Inventor before: Liu Fuli Inventor before: Xue Xuedong Inventor before: Xu Bing Inventor before: Zheng Yuan Inventor before: Liu Dongyan Inventor before: Zhang Shuai Inventor before: Cheng Kan Inventor before: Wang Pin |
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| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20181206 Address after: No. 88 Houbaoying Road, Qinhuai District, Nanjing City, Jiangsu Province Applicant after: ARMY ENGINEERING University OF PLA Address before: 430075 No. 15-4, 42 Louyu East Road, Wuhan City, Hubei Province Applicant before: Liu Fuli |
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| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170111 |