CN106325461A - Information processing method and electronic equipment - Google Patents

Information processing method and electronic equipment Download PDF

Info

Publication number
CN106325461A
CN106325461A CN201510351037.3A CN201510351037A CN106325461A CN 106325461 A CN106325461 A CN 106325461A CN 201510351037 A CN201510351037 A CN 201510351037A CN 106325461 A CN106325461 A CN 106325461A
Authority
CN
China
Prior art keywords
electronic equipment
chip
mode
timing data
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201510351037.3A
Other languages
Chinese (zh)
Other versions
CN106325461B (en
Inventor
许艳飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lenovo Beijing Ltd
Original Assignee
Lenovo Beijing Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lenovo Beijing Ltd filed Critical Lenovo Beijing Ltd
Priority to CN201510351037.3A priority Critical patent/CN106325461B/en
Publication of CN106325461A publication Critical patent/CN106325461A/en
Application granted granted Critical
Publication of CN106325461B publication Critical patent/CN106325461B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Power Sources (AREA)
  • Telephone Function (AREA)

Abstract

The embodiment of the invention discloses an information processing method and electronic equipment. The method is applied to the electronic equipment, and the electronic equipment at least comprises a first chip. The method comprises the following steps: acquiring timing data when the electronic equipment is in a first state and the first chip is in a first mode; judging whether the timing data satisfies a first preset condition, and generating a first judgment result; and switching the first chip to a second mode from the first mode when the first judgment result represents that the timing data satisfies the first preset condition, wherein the first chip has greater power consumption in the first mode than the second mode. According to the information processing method and the electronic equipment disclosed by the invention, energy conservation can be achieved without entering a BIOS setting interface.

Description

A kind of information processing method and electronic equipment
Technical field
The present invention relates to the information processing technology, be specifically related to a kind of information processing method and electronic equipment.
Background technology
In the electronic equipment such as all-in-one, personal digital assistant, when it is in shutdown S5 state, on mainboard Some circuit be still within being not turned off state, needing electronic equipment is that it is powered;In prior art, By entering basic input output system (BIOS, Basic Input Output System), interface is set by this A little circuit are set to when electronic equipment enters S5 state close, to reach the purpose of power saving.How without Enter BIOS to arrange interface and be configured realizing the purpose of power saving and become problem demanding prompt solution.
Summary of the invention
For solving the technical problem of existing existence, the embodiment of the present invention be to provide a kind of information processing method and Electronic equipment, it is possible to need not realize in the case of entrance BIOS arranges interface the saving of the energy.
The technical scheme of the embodiment of the present invention is achieved in that
Embodiments providing a kind of information processing method, described method is applied in an electronic equipment, Described electronic equipment at least includes the first chip;Described method includes:
When described electronic equipment is in the first state and the first chip is in first mode,
Obtain timing data;
Judge whether timing data meets first pre-conditioned, and generate the first judged result;
When the first judged result be characterized as described timing data meet first pre-conditioned time, switch the first chip From first mode to the second pattern;
Wherein, the first chip power consumption in the flrst mode is more than the second pattern.
In such scheme, described electronic equipment also includes the second state;Described electronic equipment is in the second condition Power consumption more than the first state;
At switching the first chip after first mode to the second pattern,
Detect whether described electronic equipment is in the second state;
Detect when described electronic equipment is in the second state, wake up the first chip up so that it is cut from the second pattern Shift to first mode.
In such scheme, described electronic equipment also includes first from processing unit;Described method also includes:
When the first judged result be characterized as described timing data meet first pre-conditioned time, first is single from processing Unit generates the first triggering signal;
First chip respond this first trigger signal, the first signal end is switched to the first prearranged signals, with from First mode enters the second pattern.
In such scheme, it is judged that whether timing data meets first pre-conditioned includes:
Judge whether described timing data reaches the first tentation data;
Being judged as when described timing data reaches the first tentation data, described first judged result is characterized as described It is pre-conditioned that timing data meets first;
Being judged as when described timing data is not up to the first tentation data, described first judged result is characterized as institute State timing data not met first pre-conditioned.
In such scheme, described method also includes:
Described first judged result be characterized as described timing data not met first pre-conditioned time,
The first signal end controlling the first chip is the second prearranged signals, so that the first chip is in first mode.
The embodiment of the present invention additionally provides a kind of electronic equipment, and described electronic equipment includes the first chip;Described Electronic equipment also includes:
First acquiring unit, for being in the first state and the first chip is in the first mould when described electronic equipment During formula, obtain timing data;
First judging unit, is used for judging whether timing data meets first pre-conditioned, and generates first and sentence Disconnected result;
First switch unit, is characterized as described timing for the first judged result generated when the first judging unit Data meet first pre-conditioned time, switch the first chip from first mode to the second pattern;
Wherein, the first chip power consumption in the flrst mode is more than the second pattern.
In such scheme, described electronic equipment also includes the second state;Described electronic equipment is in the second condition Power consumption more than the first state;Described electronic equipment also includes:
First detector unit, is used at switching the first chip after first mode to the second pattern, detects institute State whether electronic equipment is in the second state;
Second switch unit, when the first detector unit detects that described electronic equipment is in the second state, Wake up the first chip up so that it is switch to first mode from the second pattern.
In such scheme, described electronic equipment also includes first from processing unit;
Described first switch unit, the first judged result for generating when the first judging unit is characterized as described Timing data meet first pre-conditioned time, by first from processing unit generate first triggering signal;
Control the first chip and respond this first triggering signal, control to switch to the first signal end of the first chip First prearranged signals, so that it enters the second pattern from first mode.
In such scheme, described first judging unit, it is used for:
Judge whether described timing data reaches the first tentation data;
Being judged as when described timing data reaches the first tentation data, described first judged result is characterized as described It is pre-conditioned that timing data meets first;
Being judged as when described timing data is not up to the first tentation data, described first judged result is characterized as institute State timing data not met first pre-conditioned.
In such scheme,
Described first switch unit, is additionally operable to described first judged result when the first judging unit generates and characterizes For described timing data not met first pre-conditioned time,
The first signal end controlling the first chip is the second prearranged signals, so that the first chip is in first mode.
The information processing method of embodiment of the present invention offer and electronic equipment, wherein said method is applied to an electricity In subset, described electronic equipment at least includes the first chip;Described method includes: when described electronic equipment It is in the first state and time the first chip is in first mode, obtains timing data;Whether judge timing data Meet first pre-conditioned, and generate the first judged result;When the first judged result is characterized as described timing number According to meet first pre-conditioned time, switch the first chip from first mode to the second pattern;Wherein, the first core Sheet power consumption in the flrst mode is more than the second pattern.The feelings at interface can be set need not to enter BIOS The saving of the energy is realized under condition.
Accompanying drawing explanation
The first embodiment of the information processing method that Fig. 1 provides for the present invention realize schematic flow sheet;
Second embodiment of the information processing method that Fig. 2 provides for the present invention realize schematic flow sheet;
The composition structural representation of the first embodiment of the electronic equipment that Fig. 3 provides for the present invention;
The composition structural representation of the second embodiment of the electronic equipment that Fig. 4 provides for the present invention.
Detailed description of the invention
Below in conjunction with accompanying drawing to a preferred embodiment of the present invention will be described in detail, it will be appreciated that described below Bright preferred embodiment is merely to illustrate and explains the present invention, is not intended to limit the present invention.
In the information processing method of present invention offer and the following embodiment of electronic equipment, involved electronics sets For including but not limited to: all kinds computer such as industrial control computer, personal computer, integral type electricity Brain, panel computer, mobile phone, electronic reader etc..The object of the preferred electronic equipment of the embodiment of the present invention is Integral computer or desktop computer.
Embodiment one
The first embodiment of the information processing method that the present invention provides, is applied in an electronic equipment, described electricity Subset includes that a mainboard, described mainboard generally include: central processor CPU, chipset chipset and Embedded controller EC, can include other conventional devices certainly, and this is not specifically limited.The present embodiment In, when electronic equipment enters S5 state, mainboard only having CPU and is closed, other device is also not turned off, Electronic equipment is needed to remain as the running voltage that its offer is certain.Described electronic equipment also includes the first chip, First chip can be specially ERP (energy-conservation) circuit or ERP chip, and this first chip can be arranged on master On plate, it is also possible to arrange in the electronic device on other devices in addition to mainboard, the most do not do concrete limit Fixed;It is preferably arranged on mainboard.This first chip has both of which, and one is open mode, Yi Zhongwei Close or park mode (energy saver mode), preferably " shut " mode".Under it is energy saver mode, it is possible to will be with Its device being in connection status is turned off or dormancy, i.e. can will close not yet under being in S5 state on mainboard Close or the device of dormancy carries out closing or dormancy, it is achieved that energy saving.
The first embodiment of the information processing method that Fig. 1 provides for the present invention realize schematic flow sheet;Such as figure Shown in 1, described method includes:
Step 101: when described electronic equipment is in the first state and the first chip is in first mode, obtain Take timing data;
Here, the first state is that electronic equipment is in S5 state;First mode be the first chip be open mode. During it is to say, the first chip is open mode electronic equipment is in S5 state while, can be fixed by detection Time the chronometric data of device and obtain timing data.
Step 102: judge whether timing data meets first pre-conditioned, and generate the first judged result;
Here, it is contemplated that in actual applications, there are reverse countdown and the countdown of timer, so, the One predetermined condition be intervalometer timing arrive or timing terminate.I.e. judge whether the timing of intervalometer ties Whether bundle or timing arrive, and generate the first judged result.
Step 103: when the first judged result be characterized as described timing data meet first pre-conditioned time, cut Change the first chip from first mode to the second pattern;Wherein, the first chip power consumption in the flrst mode is more than Second pattern.
Here, terminate or time timing arrives when the first judged result is characterized as the timing of intervalometer, by the One chip switches to energy saver mode from open mode;Described second pattern is the energy saver mode of the first chip.The One chip power consumption in a turned-on mode is more than the power consumption under energy saver mode.In the power save mode, on mainboard with First chip is in the device of connection status and all will be closed, i.e. can by mainboard under being in S5 state still It is not turned off or the device of dormancy carries out closing or dormancy, it is achieved that energy saving.
In aforementioned schemes, being in S5 state and the first chip is under first mode at electronic equipment, detection is fixed Time device chronometric data, and chronometric data meet first pre-conditioned time, switch the unlatching mould of the first chip Formula is energy saver mode so that on mainboard under being in S5 state former be not turned off or the device of dormancy carries out closing or Dormancy;Can arrange under interface, realize the closedown to the device on mainboard or dormancy need not to enter BIOS, Reduce the power consumption of electronic equipment, it is achieved that energy saving.
Embodiment two
Second embodiment of the information processing method that the present invention provides, is applied in an electronic equipment, described electricity Subset includes that a mainboard, described mainboard generally include: central processor CPU, chipset chipset and Embedded controller EC, can include other conventional devices certainly, and this is not specifically limited.The present embodiment In, when electronic equipment enters S5 state, mainboard only having CPU and is closed, other device is also not turned off Or dormancy, need electronic equipment to remain as the running voltage that its offer is certain.Described electronic equipment also includes One chip, the first chip can be specially ERP (energy-conservation) circuit or ERP chip, and this first chip is permissible It is arranged on mainboard, it is also possible to arrange in the electronic device on other devices in addition to mainboard, the most not It is specifically limited;It is preferably arranged on mainboard.This first chip has both of which, and one is open mode, A kind of for closing or park mode (energy saver mode), under it is energy saver mode, it is possible to will be in it and be connected The device of state is turned off or dormancy, i.e. can will still be not turned off under being in S5 state on mainboard or dormancy Device carries out closing or dormancy, it is achieved that energy saving.
Second embodiment of the information processing method that Fig. 2 provides for the present invention realize schematic flow sheet;Such as figure Shown in 2, described method includes:
Step 201: when described electronic equipment is in the first state and the first chip is in first mode, obtain Take timing data;
Here, the first state is that electronic equipment is in S5 state;First mode be the first chip be open mode. It is to say, be in electronic equipment be in S5 state simultaneously the first chip be open mode time, can be by inspection Survey the chronometric data of intervalometer and obtain timing data.
Step 202: judge whether timing data meets first pre-conditioned, and generate the first judged result;
Here, described to judge whether timing data meets first pre-conditioned, including: judge described timing number According to whether reaching the first tentation data;It is judged as when described timing data reaches the first tentation data, described One judged result is characterized as described timing data, and to meet first pre-conditioned.In view of in actual applications, deposit There are being reverse countdown and the countdown of timer, so, a temporal information can be pre-set such as 2 hours, often Judging the most whether reach timing time every 2 hours, such as current time is 11:00, then 2 hours it It is 13:00 afterwards, it is judged that whether 13:00 arrives.Or, can arrange timing time is 2 hours, carries out down Timing, when timing to 0, is and reaches the first tentation data, meets first pre-conditioned.It is fixed i.e. to judge Time device timing whether terminate or whether timing arrives, and generate the first judged result.
In one preferred embodiment of the present invention, described method also includes: be judged as described timing data not When reaching the first tentation data, described first judged result is characterized as described timing data not met first and presets Condition, the first signal end controlling the first chip is the second prearranged signals, so that the first chip is in the first mould Formula.Wherein, the first signal end is for enabling leads ends, and the second prearranged signals is high level 1.I.e. do not have when timing When having end or timing not to arrive, timing data is considered as the situation of the not up to first tentation data, now The enable signal end of the first chip is high level, and the first chip is in open mode.It should be noted that it is logical In the case of Chang, the first chip is open mode, only when the enable signal end of the first chip is pulled to low level, First chip enters energy saver mode.
Step 203: when the first judged result be characterized as described timing data meet first pre-conditioned time, One generates the first triggering signal from processing unit;First chip responds this first triggering signal, by the first signal End-grain cutting is changed to the first prearranged signals, to enter the second pattern from first mode.
Here, described first is chipset or EC from processing unit, when timing terminates or timing arrives Time, chipset or EC generates the first triggering signal, and sends the first triggering signal to the first chip, by the Enable leads ends pin of one chip is drawn as low level such as pin=0, and its first chip enters energy-conservation from open mode Pattern.Wherein, the first prearranged signals is low level 0.It is of course also possible to arrange the first prearranged signals for height Level such as pin=1, the second prearranged signals is low level, it is meant that the first chip when being low level under normal circumstances Be in open mode, when Enable Pin pin is drawn high be 1 time, the first chip need enter energy saver mode, When first chip is energy saver mode, the device that mainboard is in connection status with the first chip all will be closed, I.e. can will still be not turned off under being in S5 state on mainboard or the device of dormancy carries out closing or dormancy, it is achieved Energy saving.
In one preferred embodiment of the present invention, described method also includes: described electronic equipment also includes Two-state;Described electronic equipment power consumption in the second condition is more than the first state;Switching the first chip from First mode, to after the second pattern, detects whether described electronic equipment is in the second state;Detect described When electronic equipment is in the second state, wake up the first chip up so that it is switch to first mode from the second pattern. Wherein, the second state is the open state of electronic equipment, and the power that electronic equipment can be consumed in start is more than The power consumed under off-mode.When the first chip is in energy saver mode, detection electronic equipment whether from Off-mode switches to open state, when switching to open state, wakes up the first chip up, by the first chip from Energy saver mode switches to open mode, to realize the normal work of the first chip, on mainboard with the first chip at Device in connection status is all opened, normally to work.
In aforementioned schemes, being in S5 state and the first chip is under first mode at electronic equipment, detection is fixed Time device chronometric data, and chronometric data meet first pre-conditioned time, switch the unlatching mould of the first chip Formula is energy saver mode so that on mainboard under being in S5 state former be not turned off or the device of dormancy carries out closing or Dormancy;Can arrange under interface, realize the closedown to the device on mainboard or dormancy need not to enter BIOS, Reduce the power consumption of electronic equipment, it is achieved that energy saving.
Embodiment three
The first embodiment of the electronic equipment that the present invention provides, described electronic equipment includes a mainboard, described master Plate generally includes: central processor CPU, chipset chipset and embedded controller EC, certainly may be used Including the device that other are conventional, this is not specifically limited.In the present embodiment, when electronic equipment enters S5 During state, mainboard only having CPU and is closed, other device is also not turned off, and needs electronic equipment to remain as it Certain running voltage is provided.Described electronic equipment also includes that the first chip, the first chip can be specially ERP (energy-conservation) circuit or ERP chip, this first chip can be arranged on mainboard, it is also possible to is arranged on electronics In equipment on other devices in addition to mainboard, it is not specifically limited herein;It is preferably arranged on mainboard. This first chip has both of which, and one is open mode, a kind of for closing or park mode (energy saver mode), It is preferably " shut " mode".Under it is energy saver mode, it is possible to the device being in connection status with it is turned off Or dormancy, i.e. can will still be not turned off under being in S5 state on mainboard or the device of dormancy carries out closing or stopping Sleep, it is achieved that energy saving.
The composition structural representation of the first embodiment of the electronic equipment that Fig. 3 provides for the present invention;Such as Fig. 3 institute Showing, described electronic equipment also includes: first acquiring unit the 301, first judging unit 302, first switches single Unit 303;Wherein,
First acquiring unit 301, for being in the first state and the first chip is in the when described electronic equipment During one pattern, obtain timing data;
Here, the first state is that electronic equipment is in S5 state;First mode be the first chip be open mode. During it is to say, the first chip is open mode being in S5 state while, electronic equipment, specifically first Acquiring unit 301 can obtain timing data by the chronometric data of detection intervalometer.
First judging unit 302, is used for judging whether timing data meets first pre-conditioned, and generates One judged result;
Here, it is contemplated that in actual applications, there are reverse countdown and the countdown of timer, so, the One predetermined condition be intervalometer timing arrive or timing terminate.I.e. electronic equipment, specifically first sentence Disconnected unit 302 judges whether the timing of intervalometer terminates or whether timing arrives, and generates the first judgement Result.
First switch unit 303, is characterized as the first judged result generated when the first judging unit 302 Described timing data meet first pre-conditioned time, switch the first chip from first mode to the second pattern;Its In, the first chip power consumption in the flrst mode is more than the second pattern.
Here, the first judged result generated when electronic equipment, the specifically first judging unit 302 is characterized as The timing of intervalometer terminate or timing arrive time, the first switch unit 303 by the first chip from open mould Formula switches to energy saver mode;Described second pattern is the energy saver mode of the first chip.First chip is opening mould Power consumption under formula is more than the power consumption under energy saver mode.In the power save mode, mainboard is in the first chip even The device connecing state all will be closed, and i.e. can will still be not turned off under being in S5 state on mainboard or dormancy Device carries out closing or dormancy, it is achieved that energy saving.
In aforementioned schemes, being in S5 state and the first chip is under first mode at electronic equipment, detection is fixed Time device chronometric data, and chronometric data meet first pre-conditioned time, switch the unlatching mould of the first chip Formula is energy saver mode so that on mainboard under being in S5 state former be not turned off or the device of dormancy carries out closing or Dormancy;Can arrange under interface, realize the closedown to the device on mainboard or dormancy need not to enter BIOS, Reduce the power consumption of electronic equipment, it is achieved that energy saving.
Embodiment four
Second embodiment of the electronic equipment that the present invention provides, described electronic equipment includes a mainboard, described master Plate generally includes: central processor CPU, chipset chipset and embedded controller EC, certainly may be used Including the device that other are conventional, this is not specifically limited.In the present embodiment, when electronic equipment enters S5 During state, mainboard only having CPU and is closed, other device is also not turned off, and needs electronic equipment to remain as it Certain running voltage is provided.Described electronic equipment also includes that the first chip, the first chip can be specially ERP (energy-conservation) circuit or ERP chip, this first chip can be arranged on mainboard, it is also possible to is arranged on electronics In equipment on other devices in addition to mainboard, it is not specifically limited herein;It is preferably arranged on mainboard. This first chip has both of which, and one is open mode, a kind of for closing or park mode (energy saver mode), It is preferably " shut " mode".Under it is energy saver mode, it is possible to the device being in connection status with it is turned off Or dormancy, i.e. can will still be not turned off under being in S5 state on mainboard or the device of dormancy carries out closing or stopping Sleep, it is achieved that energy saving.
The composition structural representation of the second embodiment of the electronic equipment that Fig. 4 provides for the present invention;Such as Fig. 4 institute Showing, described electronic equipment also includes: first acquiring unit the 401, first judging unit 402, first switches single Unit 403;Wherein,
First acquiring unit 401, for being in the first state and the first chip is in the when described electronic equipment During one pattern, obtain timing data;
Here, the first state is that electronic equipment is in S5 state;First mode be the first chip be open mode. During it is to say, the first chip is open mode being in S5 state while, electronic equipment, specifically first Acquiring unit 401 can obtain timing data by the chronometric data of detection intervalometer.
First judging unit 402, is used for judging whether timing data meets first pre-conditioned, and generates One judged result;
Here, it is first pre-conditioned that described first judging unit 402 judges whether timing data meets, including: Judge whether described timing data reaches the first tentation data;It is judged as that described timing data reaches first and makes a reservation for During data, described first judged result is characterized as described timing data, and to meet first pre-conditioned.Consider In actual application, there are reverse countdown and the countdown of timer, so, a time letter can be pre-set Breath such as 2 hours, judged the most whether reach timing time every 2 hours, and such as current time is 11:00, Being 13:00 after so 2 hours, the first judging unit 402 judges whether 13:00 arrives.Or, can It is 2 hours to arrange timing time, carries out countdown, when timing to 0, be and reach the first predetermined number According to, it is judged that pre-conditioned for meeting first.I.e. first judging unit 402 judges whether the timing of intervalometer ties Whether bundle or timing arrive, and generate the first judged result.
In one preferred embodiment of the present invention, the first judging unit 402 is judged as described timing data not When reaching the first tentation data, described first judged result is characterized as described timing data not met first and presets Condition, the first signal end controlling the first chip is the second prearranged signals, so that the first chip is in the first mould Formula.Wherein, the first signal end is for enabling leads ends, and the second prearranged signals is high level 1.I.e. sentence when first Disconnected unit 402 is judged when timing is not over or timing does not arrives, and timing data is considered as not up to the The situation of one tentation data, the enable signal end now controlling the first chip is high level, and the first chip is in Open mode.It should be noted that the first chip is open mode under normal circumstances, only at the first chip Enable signal end when being pulled to low level, the first chip enters energy saver mode.
First switch unit 403, is characterized as the first judged result generated when the first judging unit 402 Described timing data meet first pre-conditioned time, by first from processing unit generate first triggering signal; Control the first chip and respond this first triggering signal, control the first signal end is switched to the first prearranged signals, To enter the second pattern from first mode.
Here, described first is chipset or EC from processing unit, when the first judging unit 402 judges meter Time terminate or time timing arrives, the first switch unit 403 generates the first triggering by chipset or EC Signal, and send the first triggering signal to the first chip, control enable leads ends pin of the first chip draw into Low level such as pin=0, its first chip enters energy saver mode from open mode.Wherein, the first prearranged signals is Low level 0.It is of course also possible to arranging the first prearranged signals is high level such as pin=1, the second prearranged signals is Low level, it is meant that be in open mode, when Enable Pin being drawn for the first chip during low level under normal circumstances Foot is drawn high when being 1, and the first chip needs to enter energy saver mode, when the first chip is energy saver mode, mainboard The device being above in connection status with the first chip all will be closed, and i.e. can will be in S5 state on mainboard Under be still not turned off or the device of dormancy carries out closing or dormancy, it is achieved that energy saving.
In one preferred embodiment of the present invention, described electronic equipment also includes the second state;Described electronics Equipment power consumption in the second condition is more than the first state;
Described electronic equipment also includes:
First detector unit 404, is used at switching the first chip after first mode to the second pattern, inspection Survey whether described electronic equipment is in the second state;
For the first detector unit 404, second switch unit 405, detects that described electronic equipment is in second During state, wake up the first chip up so that it is switch to first mode from the second pattern.
Wherein, the second state is the open state of electronic equipment, the power that electronic equipment can be consumed in start More than the power consumed under off-mode.When the first chip is in energy saver mode, the first detector unit 404 Whether detection electronic equipment switches to open state from off-mode, when switching to open state, and the second switching Unit 405 wakes up the first chip up, and from energy saver mode, the first chip is switched to open mode, to realize first The normal work of chip, the device that mainboard is in connection status with the first chip is all opened, normal to carry out Work.
In aforementioned schemes, being in S5 state and the first chip is under first mode at electronic equipment, detection is fixed Time device chronometric data, and chronometric data meet first pre-conditioned time, switch the unlatching mould of the first chip Formula is energy saver mode so that on mainboard under being in S5 state former be not turned off or the device of dormancy carries out closing or Dormancy;Can arrange under interface, realize the closedown to the device on mainboard or dormancy need not to enter BIOS, Reduce the power consumption of electronic equipment, it is achieved that energy saving.
In several embodiments provided herein, it should be understood that disclosed equipment and method, can To realize by another way.Apparatus embodiments described above is only schematically, such as, and institute Stating the division of unit, be only a kind of logic function and divide, actual can have other dividing mode when realizing, As: multiple unit or assembly can be in conjunction with, or it is desirably integrated into another system, or some features can be neglected Slightly, or do not perform.It addition, the coupling each other of shown or discussed each ingredient or directly coupling Close or communication connection can be the INDIRECT COUPLING by some interfaces, equipment or unit or communication connection, can Be electrical, machinery or other form.
The above-mentioned unit illustrated as separating component can be or may not be physically separate, as The parts that unit shows can be or may not be physical location, i.e. may be located at a place, it is possible to To be distributed on multiple NE;Part or all of unit therein can be selected according to the actual needs Realize the purpose of the present embodiment scheme.
It addition, each functional unit in various embodiments of the present invention can be fully integrated in a processing unit, Can also be that each unit is individually as a unit, it is also possible to two or more unit are integrated in one In individual unit;Above-mentioned integrated unit both can realize to use the form of hardware, it would however also be possible to employ hardware adds soft The form of part functional unit realizes.
One of ordinary skill in the art will appreciate that: all or part of step realizing said method embodiment can Completing with the hardware relevant by programmed instruction, aforesaid program can be stored in an embodied on computer readable and deposit In storage media, this program upon execution, performs to include the step of said method embodiment;And aforesaid storage Medium includes: movable storage device, read only memory (ROM, Read-Only Memory), magnetic disc or The various media that can store program code such as person's CD.
The above, the only detailed description of the invention of the present invention, but protection scope of the present invention is not limited to This, any those familiar with the art, in the technical scope that the invention discloses, can readily occur in Change or replacement, all should contain within protection scope of the present invention.Therefore, protection scope of the present invention should It is as the criterion with described scope of the claims.

Claims (10)

1. an information processing method, described method is applied in an electronic equipment, and described electronic equipment is at least Including the first chip;Described method includes:
When described electronic equipment is in the first state and the first chip is in first mode,
Obtain timing data;
Judge whether timing data meets first pre-conditioned, and generate the first judged result;
When the first judged result be characterized as described timing data meet first pre-conditioned time, switch the first chip From first mode to the second pattern;
Wherein, the first chip power consumption in the flrst mode is more than the second pattern.
Method the most according to claim 1, it is characterised in that described electronic equipment also includes the second shape State;Described electronic equipment power consumption in the second condition is more than the first state;
At switching the first chip after first mode to the second pattern,
Detect whether described electronic equipment is in the second state;
Detect when described electronic equipment is in the second state, wake up the first chip up so that it is cut from the second pattern Shift to first mode.
Method the most according to claim 1, it is characterised in that described electronic equipment also include first from Processing unit;Described method also includes:
When the first judged result be characterized as described timing data meet first pre-conditioned time, first is single from processing Unit generates the first triggering signal;
First chip respond this first trigger signal, the first signal end is switched to the first prearranged signals, with from First mode enters the second pattern.
Method the most according to claim 1, it is characterised in that judge whether timing data meets first Pre-conditioned include:
Judge whether described timing data reaches the first tentation data;
Being judged as when described timing data reaches the first tentation data, described first judged result is characterized as described It is pre-conditioned that timing data meets first;
Being judged as when described timing data is not up to the first tentation data, described first judged result is characterized as institute State timing data not met first pre-conditioned.
Method the most according to claim 4, it is characterised in that described method also includes:
Described first judged result be characterized as described timing data not met first pre-conditioned time,
The first signal end controlling the first chip is the second prearranged signals, so that the first chip is in first mode.
6. an electronic equipment, described electronic equipment includes the first chip;Described electronic equipment also includes:
First acquiring unit, for being in the first state and the first chip is in the first mould when described electronic equipment During formula, obtain timing data;
First judging unit, is used for judging whether timing data meets first pre-conditioned, and generates first and sentence Disconnected result;
First switch unit, is characterized as described timing for the first judged result generated when the first judging unit Data meet first pre-conditioned time, switch the first chip from first mode to the second pattern;
Wherein, the first chip power consumption in the flrst mode is more than the second pattern.
Electronic equipment the most according to claim 6, it is characterised in that described electronic equipment also includes Two-state;Described electronic equipment power consumption in the second condition is more than the first state;Described electronic equipment also wraps Include:
First detector unit, is used at switching the first chip after first mode to the second pattern, detects institute State whether electronic equipment is in the second state;
Second switch unit, when the first detector unit detects that described electronic equipment is in the second state, Wake up the first chip up so that it is switch to first mode from the second pattern.
Electronic equipment the most according to claim 6, it is characterised in that described electronic equipment also includes One from processing unit;
Described first switch unit, the first judged result for generating when the first judging unit is characterized as described Timing data meet first pre-conditioned time, by first from processing unit generate first triggering signal;
Control the first chip and respond this first triggering signal, control to switch to the first signal end of the first chip First prearranged signals, so that it enters the second pattern from first mode.
Electronic equipment the most according to claim 6, it is characterised in that described first judging unit, uses In:
Judge whether described timing data reaches the first tentation data;
Being judged as when described timing data reaches the first tentation data, described first judged result is characterized as described It is pre-conditioned that timing data meets first;
Being judged as when described timing data is not up to the first tentation data, described first judged result is characterized as institute State timing data not met first pre-conditioned.
Electronic equipment the most according to claim 9, it is characterised in that
Described first switch unit, is additionally operable to described first judged result when the first judging unit generates and characterizes For described timing data not met first pre-conditioned time,
The first signal end controlling the first chip is the second prearranged signals, so that the first chip is in first mode.
CN201510351037.3A 2015-06-23 2015-06-23 Information processing method and electronic equipment Active CN106325461B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510351037.3A CN106325461B (en) 2015-06-23 2015-06-23 Information processing method and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510351037.3A CN106325461B (en) 2015-06-23 2015-06-23 Information processing method and electronic equipment

Publications (2)

Publication Number Publication Date
CN106325461A true CN106325461A (en) 2017-01-11
CN106325461B CN106325461B (en) 2020-06-23

Family

ID=57728357

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510351037.3A Active CN106325461B (en) 2015-06-23 2015-06-23 Information processing method and electronic equipment

Country Status (1)

Country Link
CN (1) CN106325461B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101441508A (en) * 2008-12-12 2009-05-27 成都市华为赛门铁克科技有限公司 Control method of equipment operation mode, equipment and system
CN101930279A (en) * 2009-06-25 2010-12-29 陈仲文 Electronic device for reducing power consumption of computer motherboard and motherboard thereof
CN102136791A (en) * 2010-01-22 2011-07-27 环旭电子股份有限公司 Power supply control circuit
CN102428424A (en) * 2010-03-26 2012-04-25 索尼公司 Information Processing Apparatus And Power Supply Control Circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101441508A (en) * 2008-12-12 2009-05-27 成都市华为赛门铁克科技有限公司 Control method of equipment operation mode, equipment and system
CN101930279A (en) * 2009-06-25 2010-12-29 陈仲文 Electronic device for reducing power consumption of computer motherboard and motherboard thereof
CN102136791A (en) * 2010-01-22 2011-07-27 环旭电子股份有限公司 Power supply control circuit
CN102428424A (en) * 2010-03-26 2012-04-25 索尼公司 Information Processing Apparatus And Power Supply Control Circuit

Also Published As

Publication number Publication date
CN106325461B (en) 2020-06-23

Similar Documents

Publication Publication Date Title
CN104272388B (en) The ultra-deep power-down mode of storage arrangement
CN104777888B (en) Coordinate the energy consumption in control reduction computer system by the software and hardware of more power supplys
KR100488088B1 (en) The power management method of portable computer
TWI515552B (en) Power management in a system having a processor and a voltage converter that provides a power voltage to the processor
CN103246335B (en) Condition control method and electronic equipment
CN103872719A (en) Method for reducing power consumption of static battery
CN101930279A (en) Electronic device for reducing power consumption of computer motherboard and motherboard thereof
CN102147652A (en) Shut-down energy-saving system and shut-down energy-saving method
CN108123509B (en) Charging control method and related device thereof
CN103838349A (en) Power supply control system and method thereof
KR20130002921A (en) Information processing device and power supply control circuit
CN101770273A (en) Method for realizing energy saving of system with a plurality of central processing units of server and device therefor
CN106648026A (en) Head-mounted displaying device and method for lowering power consumption of head-mounted displaying device
CN107104478A (en) A kind of information processing method and electronic equipment
CN105487638A (en) Electronic circuit system and power consumption reducing method thereof
CN104049717B (en) Power saving control circuit and electronic equipment
CN108700927A (en) For reducing the power supplier and method of the stand-by electric of electronic equipment
CN104168679B (en) Electromagnetic oven and charging method thereof
CN101655734B (en) Computer with power saving state control and control method
CN101826685B (en) Power supply socket device special for computer
CN106325461A (en) Information processing method and electronic equipment
CN101286051A (en) Electric power closed-loop control method and system
CN112649724A (en) Power failure detection circuit and method and MCU chip
JP2001034370A (en) Power-saving controller, power-saving control method, and computer system
CN105653380B (en) Control method and electronic equipment

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant