CN106301804A - A kind of realize the server of WOL, system and method - Google Patents

A kind of realize the server of WOL, system and method Download PDF

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Publication number
CN106301804A
CN106301804A CN201610812282.4A CN201610812282A CN106301804A CN 106301804 A CN106301804 A CN 106301804A CN 201610812282 A CN201610812282 A CN 201610812282A CN 106301804 A CN106301804 A CN 106301804A
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China
Prior art keywords
network card
south bridge
bridge chip
supply module
power supply
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CN201610812282.4A
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CN106301804B (en
Inventor
赵国栋
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Zhengzhou Yunhai Information Technology Co Ltd
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Zhengzhou Yunhai Information Technology Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H04L12/12—Arrangements for remote connection or disconnection of substations or of equipment thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/02—Protocols based on web technology, e.g. hypertext transfer protocol [HTTP]
    • H04L67/025—Protocols based on web technology, e.g. hypertext transfer protocol [HTTP] for remote control or remote monitoring of applications
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Sources (AREA)
  • Small-Scale Networks (AREA)

Abstract

The invention provides the server of a kind of WOL, system and method, this server includes: South Bridge chip, network interface card, at least one isolation circuit, at least one control circuit and the first supply module, wherein, South Bridge chip is connected with the second pin of network interface card by the first pin；Interface and the first supply module that each isolation circuit of at least one isolation circuit is corresponding with South Bridge chip, network interface card respectively are connected；There is provided low level when receiving the first supply module, block circuit between the interface that South Bridge chip is corresponding with network interface card；Each control circuit of at least one control circuit connects network interface card corresponding interface, the most in parallel with an isolation circuit, for exporting high level to interface corresponding to network interface card；When network interface card any interface high level, receiving the special data package that external management server sends, when comprising corresponding MAC Address, send wake-up signal South Bridge chip, South Bridge chip responds, it is achieved WOL.The present invention can improve the reliability of WOL.

Description

Server, system and method for realizing network awakening
Technical Field
The present invention relates to the field of server technologies, and in particular, to a server, a system, and a method for implementing network wakeup.
Background
The network awakening is that a special data packet containing the MAC address of the network card of the server is sent by means of the relevant awakening software of a computer, and after the network card corresponding to the MAC address receives the data packet, an awakening signal is sent to the south bridge chip to start the server. At present, especially for places with a large number of servers, such as machine rooms and internet bars, the remote boot of a plurality of servers is of great significance for facilitating the management of the servers by users at any time and realizing the unified remote boot of the servers.
At present, the way of waking up the network is to output a high level to a corresponding interface of the network card through a GPIO pin of the south bridge chip PCH, and then receive the high level network card to respond, that is, receive a special data packet sent by an external computer, and send a wake-up signal, thereby finally realizing the wake-up of the network. However, the south bridge PCH has a special application mechanism, for example, when the south bridge wells sburg is reset, the pin GPIO61 becomes low, and when the pin is connected to the corresponding interface of the network card, the pin outputs low level for the corresponding interface of the network card, and at this time, the network card cannot receive any data packet, and thus the network wakeup function cannot be realized, and thus, the conventional wakeup manner often causes unreliable network wakeup.
Disclosure of Invention
The embodiment of the invention provides a server, a system and a method for realizing network awakening, which can effectively improve the reliability of network awakening.
A server for implementing wake-on-lan, comprising: a south bridge chip, a network card, at least one isolation circuit, at least one control circuit and a first power supply module,
the south bridge chip is connected with the second pin of the network card through the first pin;
each of the at least one isolation circuit is respectively connected with the corresponding interface in the south bridge chip and the network card and the first power supply module; the network card interface module is used for blocking the line connection between the south bridge chip and the interface corresponding to the network card when receiving the low level provided by the first power supply module;
each control circuit in the at least one control circuit is connected to the interface corresponding to the network card, forms a one-to-one parallel relation with an isolation circuit and is used for outputting high level to the interface corresponding to the network card;
the network card is used for receiving a special data packet sent by an external management server when any interface receives a high level, and sending a wake-up signal to the first pin through the second pin when the special data packet contains a corresponding MAC address; and the south bridge chip is used for receiving the wake-up signal through the first pin and then is in a response state, so that network wake-up of the server is realized.
Preferably, each of the isolation circuits includes: the MOS transistor and the first pull-up resistor;
the source S of the MOS tube is connected with a corresponding GPIO pin in the south bridge chip, the drain D of the MOS tube is connected with an interface corresponding to the network card, and the grid G of the MOS tube is connected with the first power supply module through the first pull-up resistor;
the first power supply module is used for providing a low level/a high level for the MOS transistor through the first pull-up resistor;
and the MOS tube is used for being in a cut-off state when receiving the low level provided by the first power supply module through the grid G, and blocking the line connection between the south bridge chip and one interface corresponding to the network card.
Preferably, each of the control circuits includes: a second power supply module and a second pull-up resistor, wherein,
the second power supply module is connected with one interface corresponding to the network card through the second pull-up resistor and is connected with one MOS (metal oxide semiconductor) tube in parallel one to one;
and the second power supply module is used for directly supplying power to an interface corresponding to the network card through the second pull-up resistor and continuously outputting a high level to the interface corresponding to the network card.
Preferably, the MOS transistor is configured to be in an off state when the gate G receives a high level provided by the first power supply module and the source S receives a high level output by a GPIO pin corresponding to the south bridge chip, and block line connection between the south bridge chip and the interface corresponding to the network card;
and the network card is used for receiving the high level output by the control circuit through an interface corresponding to the network card and maintaining the working state.
Preferably, the MOS transistor is configured to be in a conducting state when the gate G receives a high level provided by the first power supply module and the source S receives a low level output by a GPIO pin corresponding to the south bridge chip, and is used to connect a line between the south bridge chip and an interface corresponding to the network card;
the south bridge chip is used for outputting a low level through a corresponding GPIO pin and pulling down a high level output by the control circuit;
and the network card is used for receiving the low level output by the south bridge chip through the interface corresponding to the network card and stopping working.
A system for realizing network awakening, any one of the server for realizing network awakening and the external management server, wherein,
the external management server is used for sending a corresponding special data packet for each server which realizes network awakening in the at least one server which realizes network awakening;
and each server for realizing network awakening is used for receiving the special data packet sent by the external management server, and responding to the special data packet when the special data packet is determined to contain the MAC address corresponding to the current network card so as to finish network awakening.
A method for realizing network awakening is characterized in that a first pin of a south bridge chip is connected with a second pin of a network card, each isolating circuit in at least one isolating circuit is respectively connected with corresponding interfaces in the south bridge chip and the network card and a first power supply module, each control circuit in at least one control circuit is connected to the corresponding interface of the network card and is connected with one isolating circuit in parallel one to one, and the method further comprises the following steps:
through each of the at least one isolation circuit, when receiving the low level provided by the first power supply module, blocking the line connection between the south bridge chip and the interface corresponding to the network card;
outputting a high level to an interface corresponding to the network card through each control circuit in the at least one control circuit;
when any interface of the network card receives a high level, receiving a special data packet sent by an external management server, and when the special data packet contains a corresponding MAC address, sending a wake-up signal to the south bridge chip; and when the south bridge chip receives the wake-up signal, responding and realizing network wake-up of the server.
Preferably, each isolation circuit comprises a MOS tube and a first pull-up resistor;
in at least one isolation circuit, each isolation circuit is respectively connected with the corresponding interface in the south bridge chip and the network card and the first power supply module, and the isolation circuit comprises:
connecting the source S of the MOS tube to a corresponding GPIO pin in the south bridge chip; connecting the drain electrode D of the MOS tube to an interface corresponding to the network card; connecting a grid G of the MOS tube to the first power supply module through the first pull-up resistor;
the circuit connection between the interfaces corresponding to the south bridge chip and the network card is blocked, which comprises the following steps:
receiving a low level/high level provided by the first power supply module through the first pull-up resistor; when the grid G of the MOS tube receives the low level provided by the first power supply module, the MOS tube is in a cut-off state, and the line connection between the south bridge chip and the interface corresponding to the network card is blocked.
Preferably, each of the control circuits includes: the second power supply module and the second pull-up resistor;
in the at least one control circuit, each control circuit is connected to the interface corresponding to the network card and connected in parallel with an isolation circuit in a one-to-one manner, and the method includes:
the second power supply module is connected with an interface corresponding to the network card through the second pull-up resistor and is connected with an MOS (metal oxide semiconductor) tube in parallel one to one;
the outputting the high level to the interface corresponding to the network card includes:
the second power supply module directly supplies power to an interface corresponding to the network card through the second pull-up resistor, and continuously outputs high level to the interface corresponding to the network card.
Preferably, further comprising:
the grid G of the MOS tube receives the high level provided by the first power supply module, the source S receives the high level output by one GPIO pin corresponding to the south bridge chip, and the MOS tube is in a cut-off state and blocks the line connection between the south bridge chip and the interface corresponding to the network card;
and the interface corresponding to the network card receives the high level output by the control circuit and maintains the working state.
Preferably, the gate G of the MOS transistor receives the high level provided by the first power supply module, the source S receives a GPIO pin output low level corresponding to the south bridge chip, and the MOS transistor is in a conducting state and communicates with a line between the south bridge chip and the interface corresponding to the network card;
pulling down the high level output by the control circuit through the low level output by one GPIO pin corresponding to the south bridge chip;
and the interface corresponding to the network card receives the low level output by the south bridge chip and stops working.
The embodiment of the invention provides a server, a system and a method for realizing network awakening, wherein an MOS isolation control circuit is added between GPIO pins corresponding to a south bridge chip and each line connected with an interface corresponding to a network card, even if one or more corresponding GPIO pins output low level when the south bridge chip is reset, the MOS isolation control circuit blocks the connection between the corresponding GPIO pins and the interface corresponding to the network card and always outputs high level for the corresponding interface of the network card, so that the network card responds, and an awakening signal is sent to the south bridge chip through the network card to finish network awakening, thereby preventing the problem that the network card cannot respond when receiving the low level during the period, and further improving the reliability of network awakening.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a block diagram of an apparatus for implementing wake-on-lan according to an embodiment of the present invention;
fig. 2 is a block diagram of an apparatus for implementing wake-on-lan according to another embodiment of the present invention;
fig. 3 is a block diagram of an apparatus for implementing wake-on-lan according to another embodiment of the present invention;
fig. 4 is a diagram of a system for implementing wake-on-lan according to an embodiment of the present invention;
fig. 5 is a flowchart of a method for implementing wake-on-lan according to an embodiment of the present invention;
fig. 6 is a block diagram of a system for implementing wake-on-lan according to another embodiment of the present invention;
fig. 7 is a flowchart of a method for implementing wake-on-lan according to another embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer and more complete, the technical solutions in the embodiments of the present invention will be described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention, and based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative efforts belong to the scope of the present invention.
As shown in fig. 1, an embodiment of the present invention provides a server for implementing network wakeup, where the server may include: a south bridge chip 101, a network card 102, at least one isolation circuit 103, at least one control circuit 104 and a first power supply module 105, wherein,
the south bridge chip 101 is connected with the second pin of the network card 102 through the first pin;
in the at least one isolation circuit 103, each isolation circuit 103 is connected to a corresponding interface in the south bridge chip 101 and the network card 102, and the first power supply module 105 respectively; when receiving the low level provided by the first power supply module 105, the south bridge chip 101 is blocked from being connected to the interface corresponding to the network card 102;
in the at least one control circuit 104, each control circuit 104 is connected to an interface corresponding to the network card 102, and forms a one-to-one parallel relationship with one isolation circuit 103, so as to output a high level to the interface corresponding to the network card 102;
the network card 102 is configured to receive a special data packet sent by an external management server when any interface receives a high level, and send a wake-up signal to the first pin through the second pin when the special data packet includes a corresponding MAC address; the south bridge chip 101 is configured to be in a response state after receiving the wake-up signal through the first pin, so as to implement network wake-up of the server.
In the embodiment shown in fig. 1, by adding an MOS isolation control circuit between the GPIO pin corresponding to the south bridge chip and each line of the interface connection corresponding to the network card, even if one or more corresponding GPIO pins output a low level when the south bridge chip is reset, the MOS isolation control circuit blocks the connection between the corresponding GPIO pin and the interface corresponding to the network card and always outputs a high level for the corresponding interface of the network card, so that the network card responds, and sends a wake-up signal to the south bridge chip through the network card to complete network wake-up, thereby preventing the problem that the network card cannot respond because it receives a low level during this period, and thus improving reliability of network wake-up.
As shown in fig. 2, in another embodiment of the present invention, in order to prevent the operating state of the network card from being affected when the corresponding GPIO pin of the south bridge chip outputs a low level, and further cannot realize wake-up, each of the isolation circuits 103 includes: a MOS transistor 201 and a first pull-up resistor 202;
the source S of the MOS 201 is connected to a corresponding GPIO pin in the south bridge chip 101, the drain D is connected to an interface corresponding to the network card 102, and the gate G is connected to the first power supply module 105 through the first pull-up resistor 202;
the first power supply module 105 is configured to provide a low level/a high level for the MOS transistor 201 through the first pull-up resistor 202;
the MOS 201 is configured to be in a cut-off state when receiving the low level provided by the first power supply module 105 through the gate G, and block line connection between the south bridge chip 101 and the interface corresponding to the network card 102.
Generally, in the field of servers, the power provided by the first power supply module is called core power, the core power is powered on when the server is not started, and is not powered, that is, the core power is always 0v, and the level provided by the MOS transistor is always low. In addition, when the MOS tube is selected, the type of the MOS tube can be selected according to the requirements of a user, in the embodiment of the invention, the 2N 7002N-channel MOS tube is selected, when the grid G of the N-type MOS tube receives a low level, the MOS tube is in a cut-off state no matter whether the source S receives the low level or the high level, the MOS tube is not conducted, and therefore, when a GPIO pin connected with the source S of the N-type MOS tube abnormally outputs the low level, an interface corresponding to a network card connected with the drain D of the N-type MOS tube receives the low level, and further the working state of the network card is avoided.
As shown in fig. 3, in another embodiment of the present invention, in order to wake up the network card and remotely boot the server, each of the control circuits 103 includes: a second power supply module 301 and a second pull-up resistor 302, wherein,
the second power supply module 301 is connected to an interface corresponding to the network card 102 through the second pull-up resistor 302, and is connected in parallel with one MOS transistor 201 one to one;
the second power supply module 301 is configured to directly supply power to an interface corresponding to the network card 102 through the second pull-up resistor 302, and continuously output a high level to the interface corresponding to the network card 102.
It should be noted that the second power supply module is different from the first power supply module, and in the field of servers, the second power supply module is generally called an AUX power, and the AUX power can be powered as long as the server is plugged in with a power supply, and a power supply voltage of 3.3v is provided, that is, in the network wakeup process, the AUX power can always provide a high level for an interface corresponding to the network card, and in the process, the AUX power cannot be pulled down because the corresponding GPIO pin of the south bridge chip outputs a low level, so that the interface corresponding to the network card can always be enabled, and further, the network wakeup function can be realized, and finally, remote start-up is realized.
In an embodiment of the present invention, in order to enable one or more interfaces of a network card, the MOS transistor 201 is configured to be in a cut-off state when the gate G receives a high level provided by the first power supply module 105 and the source S receives a high level output by a GPIO pin corresponding to the south bridge chip 101, so as to block a line connection between the south bridge chip 101 and the interface corresponding to the network card 102;
the network card 102 is configured to receive the high level output by the control circuit 104 through an interface corresponding to the network card 102, and maintain a working state.
In an embodiment of the present invention, in order to disable one or more interfaces of a network card, the MOS transistor 201 is configured to be in a conducting state when the gate G receives a high level provided by the first power supply module 105 and the source S receives a low level output by a GPIO pin corresponding to the south bridge chip 101, and communicate a line between the south bridge chip 101 and the interface corresponding to the network card 102;
the south bridge chip 101 is configured to output a low level through a corresponding GPIO pin and pull down the high level output by the control circuit 104;
the network card 102 is configured to receive the low level output by the south bridge chip 101 through an interface corresponding to the network card 102, and stop working.
In the embodiment of the invention, after the wake-on-LAN function of the remote server is realized, the currently used network card interface can be controlled to be disabled/used according to the low level/high level output by the south bridge chip PCH, and if a user disables one or more interfaces of the network card for reducing power consumption or avoiding service information leakage, the output of the PCH can be controlled, so that the use of the network card interface can be effectively controlled. Typically, a low level is considered to be interface disabled and a high level is considered to be interface active. Then, in the embodiment of the present invention, after the network wake-up is implemented, the user can set according to the own requirements. For example, taking an interface for disabling the current network card as an example, when the south bridge chip PCH outputs a low level, the S pole of the MOS transistor receives a low level, and since a core electrical module has a supply voltage of 3.3v after the power is turned on, a high level is provided for the G pole of the MOS transistor, so that the MOS transistor is turned on (parasitic diode is turned on) because the G pole is higher than the S pole, the level of the whole line is pulled low by the low level output by the south bridge chip PCH, and a corresponding network card interface connected to a GPIO pin of the PCH through the MOS transistor receives a low level, so that the network card interface is disabled, that is, before no user resets the interface, the interface cannot use any function.
As shown in fig. 4, an embodiment of the present invention provides a system for implementing wake-on-lan, where the system includes: at least one server 401 for implementing wake-on-lan and an external management server 402 as described in any of the above, wherein,
the external management server 402 is configured to send a corresponding special data packet to each server 401 that implements wake-on-lan in the at least one server that implements wake-on-lan;
and each of the at least one server 401 for implementing network wakeup is configured to receive a special data packet sent by the external management server 402, and when it is determined that the special data packet includes an MAC address corresponding to the current network card, respond to the special data packet to complete network wakeup.
As shown in fig. 5, an embodiment of the present invention provides a method for waking up on a network, where the method may include the following steps:
step 501: connecting a first pin of the south bridge chip with a second pin of the network card in advance;
step 502: in advance, each of at least one isolation circuit is respectively connected with the corresponding interface in the south bridge chip and the network card and the first power supply module;
step 503: in advance, each control circuit in at least one control circuit is connected to an interface corresponding to the network card and is connected with an isolating circuit in one-to-one parallel connection;
step 504: through each of the at least one isolation circuit, when receiving the low level provided by the first power supply module, blocking the line connection between the south bridge chip and the interface corresponding to the network card;
step 505: outputting a high level to an interface corresponding to the network card through each control circuit in the at least one control circuit;
step 506: when any interface of the network card receives a high level, receiving a special data packet sent by an external management server, and when the special data packet contains a corresponding MAC address, sending a wake-up signal to the south bridge chip;
step 507: and when the south bridge chip receives the wake-up signal, responding and realizing network wake-up of the server.
Even if one or more corresponding GPIO pins output low level when the south bridge chip is reset, the MOS isolation control circuit blocks the connection between the corresponding GPIO pins and the interface corresponding to the network card and always outputs high level for the corresponding interface of the network card, so that the network card responds, and sends a wake-up signal for the south bridge chip through the network card to complete network wake-up, thereby preventing the problem that the network card cannot respond when receiving low level, and improving the reliability of network wake-up.
In an embodiment of the present invention, in order to avoid that the corresponding interface of the network card of the server receives the low level and cannot realize the wake-up function when a corresponding GPIO pin of the south bridge chip outputs the low level, in step 502, each of the isolation circuits includes an MOS transistor and a first pull-up resistor;
the specific implementation of step 502 includes: connecting the source S of the MOS tube to a corresponding GPIO pin in the south bridge chip; connecting the drain electrode D of the MOS tube to an interface corresponding to the network card; connecting a grid G of the MOS tube to the first power supply module through the first pull-up resistor; the specific implementation of step 504 includes: receiving a low level/high level provided by the first power supply module through the first pull-up resistor; when the grid G of the MOS tube receives the low level provided by the first power supply module, the MOS tube is in a cut-off state, and the line connection between the south bridge chip and the interface corresponding to the network card is blocked.
The selection of the MOS transistor can be selected according to a user, for example, the selection can be made according to N-type and P-type MOS transistors, or according to different models, such as 2N7002, FDN301N, MDV1660, and the like. It should be noted that when different MOS transistors are selected according to the N-type and the P-type, the conduction conditions of the two transistors may be different, and thus, it should be noted that. In the embodiment of the invention, the N-type MOS tube of 2N7002 is adopted, and after the G pole of the MOS tube receives the low level, the MOS tube is not conducted no matter the S pole receives the high level or the low level, so that the low level output by the south bridge chip does not influence the network awakening function of a network card interface connected with the south bridge chip through the MOS tube.
By adding the MOS isolating circuit between the GPIO pin of the south bridge chip and each network card interface, the circuit connection between the GPIO pin and the current network card interface can be blocked when the corresponding GPIO pin outputs a low level abnormally, so that the phenomenon that some GPIO pins output low levels because the south bridge chip carries out special application such as reset processing and the like can be effectively prevented, and the corresponding interface of the network card receives the low level and cannot realize the network awakening function.
In an embodiment of the present invention, in order to ensure that the currently used network card interface can implement the network wakeup function, in step 503, each control circuit includes: the second power supply module and the second pull-up resistor;
the specific implementation of step 503 includes: the second power supply module is connected with an interface corresponding to the network card through the second pull-up resistor and is connected with an MOS (metal oxide semiconductor) tube in parallel one to one; an embodiment of step 505, comprises: the second power supply module directly supplies power to an interface corresponding to the network card through the second pull-up resistor, and continuously outputs high level to the interface corresponding to the network card.
In addition, in order to improve the driving capability of the south bridge chip, the second power supply module may be connected to another wire, and the second power supply module may be connected to a GPIO pin corresponding to the south bridge chip PCH through one or more resistors, and may be connected in parallel to an MOS transistor, so that after 220v of ac power is supplied to the server to be network awakened in advance, the driving circuit may improve the driving capability of the south bridge chip.
The circuit formed by connecting the resistor and the power supply module in parallel with each MOS tube connected with the network card interface can effectively control that each interface of the network card can always receive high level in the network awakening process, so that no matter which interface a user connects a wire to before, when all the interfaces can receive the high level, the interface connected with the wire can be enabled in the network awakening stage, thereby effectively ensuring the reliability of network awakening and preventing the problem that a remote server cannot be started due to other factors.
In an embodiment of the present invention, in order to enable a certain interface or multiple interfaces of the network card, after step 508, the method further includes: the grid G of the MOS tube receives the high level provided by the first power supply module, the source S receives the high level output by one GPIO pin corresponding to the south bridge chip, and the MOS tube is in a cut-off state and blocks the line connection between the south bridge chip and the interface corresponding to the network card; and the interface corresponding to the network card receives the high level output by the control circuit and maintains the working state.
In one embodiment of the present invention, in order to disable a certain interface or multiple interfaces of a network card, a gate G of the MOS transistor receives a high level provided by the first power supply module, a source S of the MOS transistor receives a GPIO pin corresponding to the south bridge chip and outputs a low level, and the MOS transistor is in a conducting state and communicates a line between the south bridge chip and the interface corresponding to the network card; pulling down the high level output by the control circuit through the low level output by one GPIO pin corresponding to the south bridge chip; and the interface corresponding to the network card receives the low level output by the south bridge chip and stops working.
After network awakening is realized, namely after the remote server is started, in order to reduce power consumption caused by the interface of the network card and protect service information of a user, the user can selectively disable one or more interfaces according to requirements, so that the service information safety of the user can be effectively ensured, and power consumption waste can be prevented.
Taking an IANDIS1 interface of a network card in a server for implementing network wake-up in the system for implementing network wake-up shown in fig. 6 as an example, a method for implementing network wake-up is described in detail, as shown in fig. 7, the method may include the following steps:
step 701: and connecting the Wake # pin of the south bridge chip with the Wake # pin of the network card in advance.
And the south bridge chip and the network card are both provided with special Wake # pins for communication, wherein the Wake # pin of the network card is used for sending a Wake-up signal to the Wake # pin of the south bridge chip, and then the south bridge chip responds and realizes network Wake-up, namely remote starting.
Step 702: the N-type 2N7002MOS tube is respectively connected with the GPIO1 pin of the south bridge chip, the IANDIS1 interface of the network card and the P3V3 power supply module in advance.
As shown in fig. 7, a system for implementing wake-on-lan includes: a server 601 for implementing network wakeup and an external management server 602, where the server 601 for implementing network wakeup further includes: an isolation circuit composed of a south bridge chip 6011, a network card 6012, an N-type 2N7002MOS transistor 60131 and a 4.7k resistor 60132, a control circuit composed of a P3V3_ AUX power supply module 60141 and a 4.7k resistor 60142, and a driving circuit composed of a P3V3_ AUX power supply module 6016 and a 4.7k resistor 6017. In the embodiment of the present invention, one pin corresponding to the south bridge chip 6011 is GPIO1, and 1 interface corresponding to the network card 6012 is IANDIS 1.
The specific connection process is as follows: the S pole of an N-type 2N7002MOS tube 60131 is connected to a GPIO1 pin of a south bridge chip 6011, the D pole is connected to an IANDIS1 interface of a network card 6012, and the G pole is connected to a P3V3 power supply module 6015 through a 4.7k resistor 60132.
Step 703: the P3V3_ AUX power supply module is connected with an IANDIS1 interface of the network card through a 4.7k pull-up resistor in advance and is connected with the N-type 2N7002MOS tube in parallel.
In the embodiment shown in fig. 7, the specific connection process between the control circuit composed of the P3V3_ AUX power supply module 60141 and the 4.7k resistor 60142 and other components is as follows: first, a P3V3_ AUX power supply module 60141 is connected to a 4.7k resistor 60142, then the other end of the 4.7k resistor 60142 is connected to an indiis 1 interface of a network card 6012 through a wire, and is connected in parallel to a D electrode of an N-type 2N7002MOS transistor 60131, that is, both are connected to an indiis 1 interface, and a specific circuit form after connection can be obviously seen in fig. 7 and is not described in detail.
Step 704: the wire is connected to the external network card interface corresponding to the IANDIS1 interface in advance, and the network is awakened by the interface.
Each interface of the network card corresponds to an external interface respectively, and is used for connecting with an external wire, so the embodiment of the present invention takes the example that the IANDIS1 interface is used for implementing the network wake-up function.
Step 705: and (4) supplying 220v alternating current to the server to be awakened in the network in advance.
Since there is no power supply module in the server to be woken up to provide the operating voltage for the server, 220V ac power should be provided for the server in advance, so that the voltage of the P3V3 power supply module 6015 in fig. 7 for supplying power to other components on the motherboard is 0V, and the P3V3_ AUX power supply modules 6016 and 60141 for supplying power to other components on the motherboard have a power supply voltage of 3.3V.
Step 706: the N-type 2N7002MOS tube receives the low level provided by the P3V3 power supply module.
Since it is in the wake-on-lan phase, the server 601 for wake-on-lan is not powered on, so the voltage on the power module 6015 of P3V3 in fig. 7 is always 0V in this phase, that is, the voltage provided by the gate voltage applied to the G pole of the N-type 2N7002MOS transistor in this phase of P3V3 is always 0V, and in general, the voltage between 0V and 0.7V is considered as low level, so the voltage provided by the power module P3V3 received by the G pole is always low level in this phase.
Step 707: and the N-type 2N7002MOS tube is cut off, and the connection of the GPIO1 pin and the IANDIS1 interface line is blocked.
After the G pole of the N-type 2N7002MOS transistor receives the low level provided by the P3V3, no matter the S pole of the MOS transistor receives the high level or the low level output by the GPIO1 pin, the MOS transistor is cut off, which is determined according to the conduction principle of the MOS transistor, because the MOS tube is conducted only when the level of the G pole is higher than that of the S pole, otherwise, the MOS tube is cut off, in the embodiment of the invention, as long as the level received by the S pole is lower than or equal to that of the G pole after the G pole receives the low level, the two conditions do not meet the condition of the conduction of the MOS tube, therefore, the N-type 2N7002MOS tube is cut off, and because the N-type 2N7002MOS tube is connected between the south bridge chip and the network card, because the MOS tube is cut off, the connection between the south bridge chip and the network card is blocked, therefore, if the GPIO1 pin on the south bridge chip is abnormal and outputs low level, the working state of the network card will not be affected.
Step 708: the control circuit composed of the P3V3_ AUX power supply module and the 4.7k resistor provides high level for the IANDIS1 interface on the network card.
In the wake-on-lan process shown in fig. 7, the server 601 for implementing wake-on-lan is in a standby state, because there is no power supply unit such as a battery for supplying power to the server in the server, so if it wants to implement remote server startup, the server must already switch on 220V ac, and the P3V3_ AUX power supply module 60141 is present after switching on 220V ac and has a voltage of 3.3V, and in general, the voltage of 2.2 to 3.3V is considered as a high level, so at this stage, the P3V3_ AUX power supply module 60141 will always provide a high level for the IANDIS1 interface of the network card 6012 through the 4.7k resistor 60142, thereby effectively ensuring that the interface is always effective in the wake-on-lan stage, and thus the wake-on-lan function can be implemented.
In addition, the P3V3 — AUX power supply module 6016 and the resistor 6017 are used as driving circuits in the embodiment of the invention to improve the driving capability of the south bridge chip 6011.
Step 709: the IANDIS1 interface receives the high level and receives special packets sent by the external management server.
When the IANDIS1 interface on the network card receives the high level, the network card responds to receive the special data packet sent by the external management server 602, that is, the network card 6012 may wake up the network according to the special data packet.
Step 710: and checking that the special data packet has the MAC address corresponding to the current network card.
After receiving the special data packet, the network card 6012 may analyze and process the content included in the special data packet, because the user is a specific user who wants to remotely boot a certain server, in general, the data packet may accurately include the MAC address corresponding to the network card 6012. After the network card 6012 analyzes and determines that it contains its corresponding MAC address, for example, the contained addresses are 00-23-5A-36-54-62, which are the same as the corresponding MAC address, and then the network card can send a wake-up signal to the south bridge chip.
Step 711: the network card sends a Wake-up signal to a Wake # pin on the south bridge chip through the Wake # pin on the network card.
After the network card 6012 determines the MAC address, a dedicated pin may be used to perform network Wake-up, and a Wake-up Wake signal sent by the network card 6012 is output to a Wake # pin on the south bridge chip through the Wake # pin on the network card 6012.
Step 712: and after receiving the Wake-up signal, the Wake # pin on the south bridge chip responds to realize the network Wake-up of the current server.
Step 713: the N-type 2N7002MOS transistor receives the high level provided by the P3V3 power supply module, executes step 714 when the pin GPIO1 of the south bridge chip outputs a high level, and executes step 717 when the pin GPIO1 of the south bridge chip outputs a low level.
After network wake-up is realized, that is, after the server is remotely turned on, the P3V3 power supply module 6015 for supplying power to other components on the motherboard is changed from 0V to 3.3V, and then according to the above-mentioned corresponding relationship between the low level and the voltage, the P3V36015 provides a high level for the G pole of the MOS transistor 60131, and at this time, it should be discussed separately according to the output of different GPIO1 pins. When the GPIO1 pin outputs a high level, step 714 is performed.
Step 714: the N-type 2N7002MOS tube is in a cut-off state, and the pin of the GPIO1 is blocked from being connected with the line of the IANDIS1 interface.
This step is the same as the principle described in step 707 above and will not be described again.
Step 715: the P3V3_ AUX power module continues to provide a high level through a resistor to the IANDIS1 interface.
After 220V alternating current is supplied to the server and network wake-up is realized, the P3V3_ AUX power supply module 60141 still has the previous voltage of 3.3V, and similarly, according to the corresponding relationship between the high level and the voltage, it is determined that the P3V3_ AUX60141 continues to provide the high level for the IANDIS1 interface.
Step 716: the IANDIS1 interface of the network card receives the high level provided by the P3V3_ AUX power supply module, the enabling of the interface is realized, namely the interface can be used, and the current process is ended.
After wake-on-lan is realized, the interface of the IANDIS1 realizes the enabling of the interface by receiving high level, so that the interface of the IANDIS1 can be continuously used in the following applications such as data communication or wake-on-lan.
Step 717: the N-type 2N7002MOS tube is in a conducting state and is connected with the line of the IANDIS1 interface through the GPIO1 pin.
After the wake-up of the network is achieved, since the G pole of the N-type 2N7002MOS 60131 receives a high level and the S pole receives a low level, the G pole is higher than the S pole, the MOS 60131 is turned on through the parasitic diode therein, so that the lines between the south bridge chip 6011, the MOS 60131 and the network card 6012 are connected.
Step 718: through the connected circuit, the low level output by the pin GPIO1 will pull down the high level on the P3V3_ AUX power supply module.
In the connected line, as long as one point is low level, the other points are also low level, so that the high level provided by the P3V3_ AUX power supply module 60141 for the IANDIS1 interface through the resistor 60142 is pulled low.
Step 719: the IANDIS1 interface receives a low level, enabling the interface to be disabled.
In summary, the embodiments of the present invention have at least the following advantages:
1. in the embodiment of the invention, the MOS isolation control circuit is added between the GPIO pin corresponding to the south bridge chip and each line connected with the interface corresponding to the network card, even if one or more corresponding GPIO pins output low level when the south bridge chip is reset, the MOS isolation control circuit blocks the connection between the corresponding GPIO pins and the interface corresponding to the network card and always outputs high level for the corresponding interface of the network card, so that the network card responds, and sends a wake-up signal to the south bridge chip through the network card to complete network wake-up, thereby preventing the problem that the network card cannot respond when receiving low level, and improving the reliability of network wake-up.
2. In an embodiment of the invention, by adding an MOS isolation circuit between the GPIO pin of the south bridge chip and each network card interface, it is possible to block the line connection between the GPIO pin and the current network card interface when the corresponding GPIO pin abnormally outputs a low level, thereby effectively preventing some GPIO pins from outputting a low level due to special applications such as reset processing performed by the south bridge chip, and thus preventing the corresponding interfaces of the network card from receiving a low level without being able to implement a wake-up function.
3. In an embodiment of the invention, each MOS tube connected with the network card interface is connected with a circuit consisting of a resistor and a power supply module in parallel, so that each interface of the network card can always receive a high level in the network awakening process, and therefore, no matter which interface the user connects a wire to before, the interface connected with the wire can be enabled in the network awakening stage after all the interfaces can receive the high level, thereby effectively ensuring the reliability of network awakening and preventing the problem that a remote server cannot be started due to other factors.
4. In an embodiment of the present invention, after network wake-up is implemented, that is, after a remote server is powered on, in order to reduce power consumption caused by an interface of a network card and protect service information of a user, the user may selectively disable one or more interfaces according to a requirement, so that service information security of the user can be effectively ensured and power consumption waste can be prevented.
Because the information interaction, execution process, and other contents between the units in the device are based on the same concept as the method embodiment of the present invention, specific contents may refer to the description in the method embodiment of the present invention, and are not described herein again.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a" does not exclude the presence of other similar elements in a process, method, article, or apparatus that comprises the element.
Those of ordinary skill in the art will understand that: all or part of the steps for realizing the method embodiments can be completed by hardware related to program instructions, the program can be stored in a computer readable storage medium, and the program executes the steps comprising the method embodiments when executed; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Finally, it is to be noted that: the above description is only a preferred embodiment of the present invention, and is only used to illustrate the technical solutions of the present invention, and not to limit the protection scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.

Claims (9)

1. A server for implementing wake-on-lan, comprising: a south bridge chip, a network card, at least one isolation circuit, at least one control circuit and a first power supply module,
the south bridge chip is connected with the second pin of the network card through the first pin;
each of the at least one isolation circuit is respectively connected with the corresponding interface in the south bridge chip and the network card and the first power supply module; the network card interface module is used for blocking the line connection between the south bridge chip and the interface corresponding to the network card when receiving the low level provided by the first power supply module;
each control circuit in the at least one control circuit is connected to the interface corresponding to the network card, forms a one-to-one parallel relation with an isolation circuit and is used for outputting high level to the interface corresponding to the network card;
the network card is used for receiving a special data packet sent by an external management server when any interface receives a high level, and sending a wake-up signal to the first pin through the second pin when the special data packet contains a corresponding MAC address; and the south bridge chip is used for receiving the wake-up signal through the first pin and then is in a response state, so that network wake-up of the server is realized.
2. The apparatus of claim 1, wherein each isolation circuit comprises: the MOS transistor and the first pull-up resistor;
the source S of the MOS tube is connected with a corresponding GPIO pin in the south bridge chip, the drain D of the MOS tube is connected with an interface corresponding to the network card, and the grid G of the MOS tube is connected with the first power supply module through the first pull-up resistor;
the first power supply module is used for providing a low level/a high level for the MOS transistor through the first pull-up resistor;
and the MOS tube is used for being in a cut-off state when receiving the low level provided by the first power supply module through the grid G, and blocking the line connection between the south bridge chip and the interface corresponding to the network card.
3. The apparatus of claim 2, wherein each of the control circuits comprises: a second power supply module and a second pull-up resistor, wherein,
the second power supply module is connected with one interface corresponding to the network card through the second pull-up resistor and is connected with one MOS (metal oxide semiconductor) tube in parallel one to one;
and the second power supply module is used for directly supplying power to an interface corresponding to the network card through the second pull-up resistor and continuously outputting a high level to the interface corresponding to the network card.
4. The apparatus of claim 2,
the MOS tube is used for being in a cut-off state when the grid G receives the high level provided by the first power supply module and the source S receives the high level output by one GPIO pin corresponding to the south bridge chip, and the line connection between the south bridge chip and the interface corresponding to the network card is blocked;
and the network card is used for receiving the high level output by the control circuit through an interface corresponding to the network card and maintaining the working state.
Or,
the MOS tube is used for being in a conducting state when the grid G receives a high level provided by the first power supply module and the source S receives a low level output by a GPIO pin corresponding to the south bridge chip and communicating a line between the south bridge chip and an interface corresponding to the network card;
the south bridge chip is used for outputting a low level through a corresponding GPIO pin and pulling down a high level output by the control circuit;
and the network card is used for receiving the low level output by the south bridge chip through the interface corresponding to the network card and stopping working.
5. A system for implementing wake-on-lan, comprising: at least one server implementing wake-on-LAN and an external management server as claimed in any one of claims 1 to 4,
the external management server is used for sending a corresponding special data packet for each server which realizes network awakening in the at least one server which realizes network awakening;
and each server for realizing network awakening is used for receiving the special data packet sent by the external management server, and responding to the special data packet when the special data packet is determined to contain the MAC address corresponding to the current network card so as to finish network awakening.
6. A method for realizing network awakening is characterized in that a first pin of a south bridge chip is connected with a second pin of a network card, each isolation circuit in at least one isolation circuit is respectively connected with corresponding interfaces in the south bridge chip and the network card and a first power supply module, each control circuit in at least one control circuit is connected to the corresponding interface of the network card and is connected with one isolation circuit in parallel one to one, and the method further comprises the following steps:
through each of the at least one isolation circuit, when receiving the low level provided by the first power supply module, blocking the line connection between the south bridge chip and the interface corresponding to the network card;
outputting a high level to an interface corresponding to the network card through each control circuit in the at least one control circuit;
when any interface of the network card receives a high level, receiving a special data packet sent by an external management server, and when the special data packet contains a corresponding MAC address, sending a wake-up signal to the south bridge chip; and when the south bridge chip receives the wake-up signal, responding and realizing network wake-up of the server.
7. The method of claim 6, wherein each isolation circuit comprises a MOS transistor and a first pull-up resistor;
in at least one isolation circuit, each isolation circuit is respectively connected with the corresponding interface in the south bridge chip and the network card and the first power supply module, and the isolation circuit comprises:
connecting the source S of the MOS tube to a corresponding GPIO pin in the south bridge chip; connecting the drain electrode D of the MOS tube to an interface corresponding to the network card; connecting a grid G of the MOS tube to the first power supply module through the first pull-up resistor;
the circuit connection between the interfaces corresponding to the south bridge chip and the network card is blocked, which comprises the following steps:
receiving a low level/high level provided by the first power supply module through the first pull-up resistor; when the grid G of the MOS tube receives the low level provided by the first power supply module, the MOS tube is in a cut-off state, and the line connection between the south bridge chip and the interface corresponding to the network card is blocked.
8. The method of claim 7, wherein each of the control circuits comprises: the second power supply module and the second pull-up resistor;
in the at least one control circuit, each control circuit is connected to the interface corresponding to the network card and connected in parallel with an isolation circuit in a one-to-one manner, and the method includes:
the second power supply module is connected with an interface corresponding to the network card through the second pull-up resistor and is connected with an MOS (metal oxide semiconductor) tube in parallel one to one;
the outputting the high level to the interface corresponding to the network card includes:
the second power supply module directly supplies power to an interface corresponding to the network card through the second pull-up resistor, and continuously outputs high level to the interface corresponding to the network card.
9. The method of claim 7, further comprising:
the grid G of the MOS tube receives the high level provided by the first power supply module, the source S receives the high level output by one GPIO pin corresponding to the south bridge chip, and the MOS tube is in a cut-off state and blocks the line connection between the south bridge chip and the interface corresponding to the network card;
and the interface corresponding to the network card receives the high level output by the control circuit and maintains the working state.
Or,
the grid G of the MOS tube receives the high level provided by the first power supply module, the source S receives a GPIO pin corresponding to the south bridge chip and outputs a low level, and the MOS tube is in a conducting state and is communicated with a circuit between the south bridge chip and an interface corresponding to the network card;
pulling down the high level output by the control circuit through the low level output by one GPIO pin corresponding to the south bridge chip;
and the interface corresponding to the network card receives the low level output by the south bridge chip and stops working.
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