CN106297708A - A kind of method reducing display panels display inequality - Google Patents
A kind of method reducing display panels display inequality Download PDFInfo
- Publication number
- CN106297708A CN106297708A CN201610811293.0A CN201610811293A CN106297708A CN 106297708 A CN106297708 A CN 106297708A CN 201610811293 A CN201610811293 A CN 201610811293A CN 106297708 A CN106297708 A CN 106297708A
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- Prior art keywords
- circuit
- transfer
- signal
- demultiplexed signal
- demultiplexed
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0291—Details of output amplifiers or buffers arranged for use in a driving circuit
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
Abstract
The present invention provides a kind of and reduces the method that display panels display is uneven, the method includes: according to demultiplexed signal direction of transfer, demultiplexing circuit is divided into multi-level pmultistage circuit, uses signal compensation circuit that the circuit being positioned at rear class on demultiplexed signal direction of transfer is carried out signal compensation.The method is by adding signal compensation circuit in demultiplexing circuit, reduce and drive signal in demultiplexed signal time delay after RC circuit in demultiplexing circuit, thus the phenomenon that the display panels display that reduces signal lag difference that RC circuit causes and cause is uneven, improve the display effect of liquid crystal panel.
Description
Technical field
The present invention relates to technical field of liquid crystal display, particularly relate to a kind of reduce the uneven method of LCD panel display and
System.
Background technology
The development maked rapid progress along with small-medium size electronical display industry, the undersized LCD liquid crystal display screen of people's centering
The quality requirements of resolution more and more higher.The raising of display quality and the transfer rate of video data and the integrity of signal
Suffer from the contact of interwoveness.General employing switching tube realizes driving, but, when using switch controlled switch, owing to opening
Close pipe overcurrent-overvoltage poor ability, if not taking reliable protective measure cisco unity malfunction, therefore, for control circuit electricity
Pressure climbing is excessive, it is ensured that switching tube safe operation, often at switching tube two ends parallel RC circuits (resistance-capacitance network), utilizes electric capacity two
Terminal voltage mutability can not limit voltage build-up rate, it is to avoid cross the damage flowing switch tube.But, owing to RC circuit exists
Time delay, therefore, there is time delay, available liquid crystal control panel in the output signal of the RC circuit being caused to pass through switching tube and parallel connection thereof
Demultiplexing circuit as it is shown in figure 1, circuit horizontal left, center, right three part output signal sequence contrast as shown in Figure 2.
Fig. 1 shows that the signal of the most conventional LCD display drives configuration diagram.Fig. 2 shows and Fig. 1 pair
The demultiplexed signal time diagram answered.
By Fig. 1 and Fig. 2, it can be seen that the waveform of the signal of the circuit output at demultiplexing circuit two ends is square wave,
Along with the increase of the RC circuit passed through, there is time delay in output signal, so that the time delay of the signal of mid portion circuit output is high
In the time delay of two ends, left and right output signal, cause the signal that display panels shows asynchronous, i.e. display panels shows
Show inequality, affect display effect.
But, along with the demand of the aspects such as high PPI (number of pixels) and low-power consumption, the RC circuit in display panels is more
Coming the most, therefore, the display causing display floater is uneven, affects display effect.Corresponding demultiplexing circuit causes
The display effect impact of voltage inequality counter plate is increasing.
Summary of the invention
For in above-mentioned prior art, in the demultiplexing circuit of display panels, generally use RC circuit to switch
Pipe carries out overcurrent protection, but, owing to RC circuit exists time delay, demultiplexing signal circuit two ends input, through multiple
Through multiple RC circuit while switching tube, cause along with the RC circuit passed through increases, when the RC circuits present of process reaches one
After determined number, demultiplexed signal adding up through time delay, there is time delay in various degree in the signal of demultiplexing circuit output,
Thus cause the RC circuit of the demultiplexed signal process that the two end portions of demultiplexing circuit inputs less, produce time delay relatively
Little, demultiplexed signal transmission to multichannel de-multiplexing circuitry mid portion time, owing to have passed through multistage RC circuit, the signal of output with
The signal of the two end portions output of demultiplexing circuit is compared and be there is serious delay inequality, causes display panels to show not
All, thus affecting the defect of image display quality, the present invention proposes and reduces the method that display panels display is uneven.
According to the problem existing for the present invention, it is provided that reduce the method that display panels display is uneven, described method
Including:
Demultiplexing circuit is divided into multi-level pmultistage circuit according to demultiplexed signal direction of transfer, uses signal compensation circuit
The circuit being positioned at rear class on demultiplexed signal direction of transfer is carried out signal compensation.
Preferably: use signal compensation circuit that the circuit of rear class on demultiplexed signal direction of transfer is carried out signal compensation
Method is: pool of buffer device of connecting between the most adjacent two-stage circuit.Every grade of circuit all includes that one or more groups is respectively used to
Drive R sub-pixel, G sub-pixel and the switching tube of B sub-pixel.
Often group buffer include three buffers, the demultiplexed signal input of the switching tube of each sub-pixel all with one
Buffer is connected.Preferably: use signal compensation circuit that the circuit being positioned at rear class on demultiplexed signal direction of transfer is carried out letter
Number method compensated is: be positioned on demultiplexed signal direction of transfer two groups of phase inverters in parallel on the circuit of prime.
Demultiplexing circuit is divided into three grades, left, center, right circuit according to demultiplexed signal direction of transfer, wherein, left and right
Two-stage circuit is to be positioned at the circuit of prime on demultiplexed signal direction of transfer, and middle rank circuit is that demultiplexed signal direction of transfer is upper
Circuit in rear class.
Described often group phase inverter includes the circuit that two inverter series of three routes are constituted, often two inverter series of route
The circuit constituted is used for the demultiplexed signal line with the way pixel being positioned at front stage circuits on demultiplexed signal direction of transfer also
Connection.
Preferably: use signal compensation circuit that the circuit being positioned at rear class on demultiplexed signal direction of transfer is carried out signal benefit
The method repaid is: be positioned on demultiplexed signal direction of transfer two groups of holding wires in parallel on the circuit of prime.
Demultiplexing circuit is divided into three grades, left, center, right circuit according to demultiplexed signal direction of transfer, wherein, left and right
Two-stage circuit is to be positioned at the circuit of prime on demultiplexed signal direction of transfer, and middle rank circuit is that demultiplexed signal direction of transfer is upper
Circuit in rear class.
Two groups of holding wires include that three holding wires, every holding wire are used for and are positioned at prime on demultiplexed signal direction of transfer
The demultiplexed signal line parallel of one way pixel of circuit.
Compared with prior art, such scheme has following following advantage or a beneficial effect:
The method of reduction display panels of the present invention display inequality is by adding signal in demultiplexing circuit
Compensate circuit, reduce drive signal in demultiplexed signal time delay after RC circuit in demultiplexing circuit, thus
The phenomenon that the display panels display that reduces signal lag difference that RC circuit causes and cause is uneven, improves liquid crystal panel
Display effect.
The present invention uses the method for serial or parallel connection signal compensation circuit to realize low display panels display inequality；Use
The mode of buffer is increased in demultiplexing circuit, pool of buffer device of connecting between the most adjacent two-stage circuit, make solution
Multiplexed signals is maked corrections through buffer after every stage circuit again, reduces RC circuit and causes the impact of time delay, thus
The signal that the circuit reducing the circuit being positioned at prime in demultiplexing circuit on signal transfer direction and be positioned at rear class exports
The delay inequality existed because the RC circuit quantity of input signal process is different, so that the delay inequality mutation between output signal
Little.
Second method is that the signal input part at two ends, demultiplexing circuit left and right all draws holding wire connection two-stage
Phase inverter, the signal output part of two-stage phase inverter connects into demultiplexing circuit zone line, thus reduces demultiplexing
The time delay that in circuit, the signal of zone line output causes because of RC circuit, so that output signal is defeated after demultiplexing circuit
The delay difference gone out reduces.
Use the mode adding lead-in wire, make signal be directly connected to into demultiplexing circuit and be positioned at demultiplexed signal transmission side
To the circuit of rear class part, thus reduce in demultiplexing circuit the signal of signal transfer direction late-class circuit output and draw because of RC
The time delay risen, so that the delay difference between output signal reduces.Avoid the problem that display floater display is uneven, improve
The display effect of display panels.
Above-mentioned technical characteristic can combine in any suitable manner or be substituted, as long as can reach by the technical characteristic of equivalence
To the purpose of the present invention.
Accompanying drawing explanation
Hereinafter based on embodiment reference accompanying drawing, the present invention will be described in more detail.Wherein:
Fig. 1 shows the signal de-multiplexing circuitry configuration diagram of LCD display the most conventional in prior art；
Fig. 2 shows the clock signal comparison diagram of three the subregion outputs in the left, center, right corresponding with Fig. 1 circuit；
Fig. 3 shows the electrical block diagram of pool of buffer device of connecting between the most adjacent two-stage circuit；
Fig. 4 shows the clock signal comparison diagram of three the subregion outputs in left, center, right that Fig. 3 circuit is corresponding；
Fig. 5 shows that the structure of two signal input two ends extraction signals connection two-stage phase inverters is shown about demultiplexing
It is intended to；
Fig. 6 shows the comparison diagram of the oscillogram of three the subregion output signals in left, center, right that Fig. 5 circuit is corresponding；
Fig. 7 shows that the structure of two signal input two ends extraction signals connection two-stage phase inverters is shown about demultiplexing
It is intended to；In figure, F is phase inverter；
Fig. 8 shows the clock signal comparison diagram of three the subregion outputs in left, center, right that Fig. 7 circuit is corresponding.
In Fig. 1, Fig. 3, Fig. 5 and Fig. 7, T1, T2 and T3 are three tunnel demultiplexed signal, S1, S2 ... Sn-1, Sn are n road electricity
Source signal.
Detailed description of the invention
Below in conjunction with accompanying drawing, the invention will be further described.
In the prior art, the employing control mode that drives of display panels is frequently utilized that the time-lag action control of RC circuit
Switching tube processed slowly turns on, and then the electric current flowing through switching tube is served effective inhibitory action, it is therefore prevented that switching tube is because of electricity
Flow through damage that is big and that cause, effectively protect switching tube, but, the time-lag action of RC circuit result in after this circuit defeated
The signal gone out produces time delay, causes the circuit being positioned at the display floater demultiplexing circuit left and right sides and is positioned at display floater
There is delay inequality in the circuit output signal in the middle of demultiplexing circuit, causes the phenomenon that display panels display is uneven.
The problem affecting display effect, therefore, embodiments of the invention propose three kinds and reduce the side that display panels display is uneven
Method.
Embodiment 1:
Fig. 3 shows in embodiment 1, connects one group and delay in demultiplexing circuit between the most adjacent two-stage circuit
Rush the electrical block diagram of device, pool of buffer device of connecting between the most adjacent two-stage circuit.Every grade of circuit all includes one group
Or multicomponent Yong Yu not drive R sub-pixel, G sub-pixel and the drive circuit of B sub-pixel.Often group drive circuit all includes three points
Yong Yu not drive R sub-pixel, G sub-pixel and the switching tube of B sub-pixel, and the two ends of each switching tube all and are connected with RC circuit.
Often group buffer include three buffers, the demultiplexed signal input of the switching tube of each sub-pixel all with a buffer string
Connection.
The delay produced through every stage circuit is maked corrections by buffer, reduce delay that RC causes to circuit about
Both sides and the delay inequality of intermediate output signal.
From the figure 3, it may be seen that every grade of circuit, a buffer of all connecting before the driving signal of each sub-pixel, it is achieved step by step
Buffering, makes corrections to signal step by step, after correction, and the output signal ripple of subregion, liquid crystal display area left, center, right three
Shape, it is to avoid signal lag；If Fig. 4 is after Fig. 3 circuit, the sequential letter of left part, mid portion and right part output
Number comparison diagram.Known to Fig. 4, between every grade of circuit after serial buffer, shown in the clock signal of output signal and Fig. 2
The clock signal of available circuit output is compared, and the clock signal of de-multiplexing circuitry mid portion output is effectively improved.
In embodiment 1, the mode using serial buffer is that the signal lag produced after RC is carried out technology correction
Mode, which effectively avoids the time delay of signal, and this simple in construction, can be used for driving by many groups in the structure shown here
One group can also be used for driving the switching tube of three sub-pixels as one-level by the switching tube of three sub-pixels as stage circuit
Circuit, in such manner, it is possible to realize the synchronism output of signal, is effectively reduced the delay of signal.Described three groups are used for driving sub-picture
The switching tube of element is for driving the switching tube of R sub-pixel, for driving the switching tube of G sub-pixel and for driving B sub-pixel
Switching tube.
Embodiment 2:
Fig. 5 shows in embodiment 2, be positioned in the front stage circuits of demultiplexing circuit signal direction of transfer in parallel two groups anti-
Phase device, is i.e. positioned at circuit two groups of phase inverters in parallel respectively in region, the left and right sides in Fig. 5；This kind is about demultiplexing circuit
Both sides input signal end is all drawn holding wire and is connected two-stage phase inverter, and the signal of output connects into zone line circuit, thus drops
The time delay that in low demultiplexing circuit, zone line output signal causes because of RC, so that output signal is through demultiplexing electricity
The delay difference that road exports after driving reduces.
As shown in Figure 5, the circuit in the region, the left and right sides of de-multiplexing circuitry is (before being i.e. positioned at demultiplexed signal direction of transfer
The circuit of level) difference two groups of phase inverters in parallel, described often group inverter circuit all includes that two inverter series of three routes are constituted
Circuit, the circuit that often two inverter series of route are constituted is used to and is positioned on the left of viewing area or a road of right side area
The demultiplexed signal line parallel of sub-pixel.
Fig. 6 is that circuit left field, zone line and the right side area after Fig. 4 circuit structure is (due to demultiplexed signal
For by de-multiplexing circuitry de-multiplexing circuitry two ends to intermediate transfer, therefore on signal transfer direction, prime is left field and right side
Region, on demultiplexed signal direction of transfer, rear class is zone line) comparison diagram of signal output waveform, liquid crystal panel viewing area
Two ends, left and right input out signal end and all draw the zone line circuit connecting viewing area after holding wire connects two-stage phase inverter,
The waveform of output signal is effectively improved compared with the waveform that the available circuit shown in Fig. 2 exports.Avoid and made by RC
There is delay inequality in the circuit output signal become, the problem affecting display panels display effect.Effectively raise liquid crystal
Show the display effect of panel.
Embodiment 3:
Fig. 7 shows in embodiment 3, uses the mode adding lead-in wire, does not change demultiplexing circuit overall structure, only exist
Two ends, demultiplexing circuit left and right input signal end is all drawn holding wire and is directly connected to electricity in the middle of demultiplexing circuit
Road is (owing to demultiplexed signal is that therefore signal transfer direction is gone forward to intermediate transfer by de-multiplexing circuitry de-multiplexing circuitry two ends
Level is left field and right side area, and on demultiplexed signal direction of transfer, rear class is zone line), thus reduce demultiplexing
The time delay that in circuit, intermediate circuit output signal causes because of RC, so that the delay difference between output signal reduces.Avoid
The problem that display floater display is uneven, improves the display effect of display panels.
As shown in Figure 7, at the region, the left and right sides of circuit difference two groups of holding wires in parallel, often group holding wire all includes three
Holding wire, every holding wire for be positioned on the left of viewing area or right side subregion circuit (is i.e. positioned at demultiplexed signal transmission
The circuit of direction prime) the drive signal line of a way pixel in parallel.
Fig. 8 is circuit left field, right side area and the signal waveform pair of zone line output after Fig. 7 circuit structure
Being to intermediate transfer than figure by de-multiplexing circuitry de-multiplexing circuitry two ends due to demultiplexed signal, therefore signal transfer direction is gone forward
Level is left field and right side area, and on demultiplexed signal direction of transfer, rear class is zone line), liquid crystal panel viewing area is left
Right two ends input out signal end all draw holding wire be directly connected to connect viewing area zone line circuit, the ripple of output signal
Shape is compared with the clock signal that the available circuit shown in Fig. 2 exports, and the clock signal of de-multiplexing circuitry mid portion output obtains
Effective improvement.Avoid the output signal caused by RC circuit and there is delay inequality, affect display panels display effect
Problem.Effectively raise the display effect of display panels.
Method described in embodiment 2 and embodiment 3 is the multichannel reduced in the middle of display panels in viewing area and demultiplexes
By the demultiplexed signal of circuit through the mode of RC quantity, input signal is made to be directly inputted to many directly or through two-stage phase inverter
The signal input part of the late-class circuit of road de-multiplexing circuitry signal transfer direction, decreases the time delay of output signal, and then reaches
Solving the effect of the uneven problem of display panels display, this kind of method is simply effective, and can at display panels
Many group holding wires or reverser group are drawn in demultiplexing circuit two ends, are divided into by the demultiplexing circuit of display panels
Multiple electronic circuits, by by the double-end holding wire of demultiplexing circuit of display panels respectively with multistage electronic circuit
Signal input part is connected, and is so capable of the effect that each local output signal synchronizes.
Based on above-mentioned analysis, it is seen that the method that the present embodiment reduces display panels display uneven can be brought the most useful
Effect:
The described method of the present embodiment is simple to operate.Have only to by going here and there in display panels demultiplexing circuit
Input signal is directly input in circuit the rear class being positioned on demultiplexed signal direction of transfer by connection buffer or parallel signal line
In circuit.Guarantee that the signal being input to demultiplexing circuit zone line does not exist time delay, so, avoid output signal
The problem that time delay is big, thus ensure the display effect of liquid crystal display.
Claims (10)
1. reduce the method that display panels display is uneven, it is characterised in that described method includes:
Demultiplexing circuit is divided into multi-level pmultistage circuit according to demultiplexed signal direction of transfer, uses signal compensation circuit to solution
The circuit being positioned at rear class on multiplexed signals direction of transfer carries out signal compensation.
Method the most according to claim 1, it is characterised in that use signal compensation circuit to demultiplexed signal direction of transfer
The circuit of upper rear class carries out the method for signal compensation: pool of buffer device of connecting between the most adjacent two-stage circuit.
Method the most according to claim 2, it is characterised in that every grade of circuit all includes that one or more groups is respectively used to drive
R sub-pixel, G sub-pixel and the switching tube of B sub-pixel.
Method the most according to claim 3, it is characterised in that often group buffer includes three buffers, each sub-pixel
The demultiplexed signal input of switching tube all connect with a buffer.
Method the most according to claim 1, it is characterised in that use signal compensation circuit to demultiplexed signal direction of transfer
On be positioned at the circuit of rear class and carry out the method for signal compensation and be: be positioned on demultiplexed signal direction of transfer on the circuit of prime also
Join two groups of phase inverters.
Method the most according to claim 5, it is characterised in that demultiplexing circuit is according to demultiplexed signal direction of transfer
Being divided into three grades, left, center, right circuit, wherein, left and right two-stage circuit is to be positioned at the electricity of prime on demultiplexed signal direction of transfer
Road, middle rank circuit is the circuit being positioned at rear class on demultiplexed signal direction of transfer.
Method the most according to claim 5, it is characterised in that described often group phase inverter includes two phase inverter strings of three routes
The circuit that connection is constituted, the circuit that often two inverter series of route are constituted is used for and is positioned at prime on demultiplexed signal direction of transfer
The demultiplexed signal line parallel of one way pixel of circuit.
Method the most according to claim 1, it is characterised in that use signal compensation circuit to demultiplexed signal direction of transfer
On be positioned at the circuit of rear class and carry out the method for signal compensation and be: be positioned on demultiplexed signal direction of transfer on the circuit of prime also
Join two groups of holding wires.
Method the most according to claim 8, it is characterised in that demultiplexing circuit is according to demultiplexed signal direction of transfer
Being divided into three grades, left, center, right circuit, wherein, left and right two-stage circuit is to be positioned at the electricity of prime on demultiplexed signal direction of transfer
Road, middle rank circuit is the circuit being positioned at rear class on demultiplexed signal direction of transfer.
Method the most according to claim 9, it is characterised in that two groups of holding wires include three holding wires, every holding wire
For the demultiplexed signal line parallel with the way pixel being positioned at front stage circuits on demultiplexed signal direction of transfer.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610811293.0A CN106297708A (en) | 2016-09-08 | 2016-09-08 | A kind of method reducing display panels display inequality |
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| CN201610811293.0A CN106297708A (en) | 2016-09-08 | 2016-09-08 | A kind of method reducing display panels display inequality |
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| CN201610811293.0A Pending CN106297708A (en) | 2016-09-08 | 2016-09-08 | A kind of method reducing display panels display inequality |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106997249A (en) * | 2017-03-15 | 2017-08-01 | 武汉华星光电技术有限公司 | A kind of display panel and its fault testing method with touch controllable function |
| CN109272965A (en) * | 2018-11-28 | 2019-01-25 | 厦门天马微电子有限公司 | Display panel and display device |
| CN109754769A (en) * | 2019-03-18 | 2019-05-14 | 武汉华星光电技术有限公司 | The driving method of display panel |
| CN114550669A (en) * | 2022-03-01 | 2022-05-27 | 福建华佳彩有限公司 | Driving method for compensating Data signal to improve panel ghost |
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| CN114550669A (en) * | 2022-03-01 | 2022-05-27 | 福建华佳彩有限公司 | Driving method for compensating Data signal to improve panel ghost |
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Application publication date: 20170104 |
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| RJ01 | Rejection of invention patent application after publication |