CN106294235B - A kind of synchronous method based on poll/interruption real-time virtual radio data - Google Patents
A kind of synchronous method based on poll/interruption real-time virtual radio data Download PDFInfo
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/366—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using a centralised polling arbiter
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Abstract
The present invention provides a kind of synchronous method based on poll/interruption real-time virtual radio data, write-in transmitting-receiving instruction in the related FPGA including physical layer state machine in virtual radio electric system in device PCI；FPGA in device PCI is judged as transmission instruction or receives instruction；If receiving instruction, FPGA receives data and received data is transferred in the circle queue in PC, and by poll or interruption, reads the valid data in circle queue；If sending instruction, whenever storing N number of effective BLOCK data block in circle queue, the valid data in the circle queue in PC are read the DMA data area in FPGA by FPGA.Synchronous method based on poll/interruption real-time virtual radio data of the invention solves in the virtual radio electric system based on RTX and Windows data synchronization problems between PC and RCB.
Description
Technical field
The present invention relates to the synchronous technical fields of virtual radio data, more particularly to a kind of based on poll/interruption
The synchronous method of real-time virtual radio data.
Background technique
The data synchronization problems between application program in hardware and PC are one of the difficult points of virtual radio electric system.Mesh
Before, there is poll and interrupts two kinds of method of data synchronization.In the prior art, the most commonly used is the method for data synchronization based on poll,
For example application number 201410484793.9, denomination of invention are " to implement the pci bus data side of synchronization of extension subsystem based on RTX
Method " Chinese invention patent in a kind of pci bus method of data synchronization based on RTX real-time extension subsystem disclosed, including with
Host computer is installed XP operating system, slave computer installation RTX real-time extension subsystem by lower step, step (1)；Step (2) is incited somebody to action
The driving of exploitation device PCI in RTX real-time extension subsystem, to carry out the real-time Data Transmission in pci bus, data transmission
Using DMA mode；Step (3) establishes soft interrupt mechanism in the driving of the device PCI in RTX real-time extension subsystem；Step
(4), the RTX real-time extension subsystem of the XP operating system of host computer and slave computer, it is real according to the soft interrupt mechanism of establishing of foundation
Existing data synchronous communication.But in this method, RTX needs the mark of continuous poll bottom hardware, substantially or the side of poll
Formula does not give full play to the real-time characteristic of RTX.
Method of data synchronization based on interruption is realized by the driver in exploitation PC.Such as application No. is
201210004050.8, entitled " method of data synchronization and system in software radio system based on pci bus "
Chinese invention patent discloses the method for data synchronization based on pci bus in a kind of software radio system, the software radio
System includes processor module, radio-frequency module and the Interface Controller being connected between the processor module and the radio-frequency module
Module, wherein between the processor module and the interface control module by pci bus be connected, the method includes with
Lower step: the interface control module generates temporal information according to the clock of the radio-frequency module；The interface control module root
Interruption is generated according to the temporal information, and interrupt signal is sent to the processor module by the pci bus；The processing
The interrupt response program of device module receives the temporal information according to the interrupt signal, and triggers phase in software radio system
The physical layer of wireless system modulation answered or demodulation process and higher-layer protocols program, and according to the temporal information at
Reason；The read and/or write of corresponding data is completed by the pci bus, and is cached in the interface control module, with
The reception and/or transmission of data are completed by the radio-frequency module according to the temporal information.The advantages of this method is can to show
Write the utilization rate for improving processor；The disadvantage is that realize it is complicated, due to being realized under the general-purpose operating system, be easy by hardware interrupts and
It is synchronous can not to provide real-time data for the thread interrupt of high priority.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of based on poll/interruption reality
When virtual radio data synchronous method, for solving host (PC) in the virtual radio electric system based on RTX and Windows
The data synchronization problems between radio frequency board (RCB).
In order to achieve the above objects and other related objects, the present invention provides a kind of real-time virtual radio number based on poll
According to synchronous method, circle queue in PC includes 32 pairs for storing several BLOCK data blocks, each BLOCK data block
The last one invalid bit of IQ two-way sampled data, each circuit-switched data forms information bit；First information bit is flag bit, is indicated
Whether data are effective, and second information bit is a day wire size, for showing transmission/reception data antenna；The last one information bit
It is timestamp, for recording the time point of sampling when receiving data；
The synchronous method of the real-time virtual radio data based on poll is the following steps are included: step S11, virtual nothing
Physical layer state machine is instructed according to transmitting-receiving in line electric system, and transmitting-receiving is written in the register in related FPGA in device PCI
Instruction；Step S12, the instruction in the FPGA detected register in device PCI is judged as transmission instruction or receives instruction；If
It is to receive instruction, is transferred to step S13；If sending instruction, it is transferred to step S14；Step S13, FPGA receives data and will receive
Data be transferred in the circle queue in PC, and in received size of data for the first time more than the size of a BLOCK data block
When triggering interrupt；PC responds the interruption, opens poll thread, and continuous poll circle queue reads the significant figure in circle queue
According to and be transmitted to next communication module or upper-layer protocol and carry out subsequent processing；Step S14, whenever being stored in circle queue
When N number of effective BLOCK data block, a mark is just written in PC in FPGA；FPGA is according to the mark, by the circle queue in PC
In valid data read the DMA data area in FPGA, and send feedback frame in the stipulated time.
According to the synchronous method of the above-mentioned real-time virtual radio data based on poll, in which: each BLOCK data
The size of block is 128Bytes, and the bit wide of sampling is 16bits.
According to the synchronous method of the above-mentioned real-time virtual radio data based on poll, in which: in the step S13,
Received data are packaged into BLOCK data block by FPGA, and last position that first road I of each BLOCK is arranged is 0,
The day wire size and timestamp of BLOCK data block are set simultaneously.
According to the synchronous method of the above-mentioned real-time virtual radio data based on poll, in which: at the beginning of the circle queue
Whole position is all 1 when beginningization；In the step S13, in reading circle queue after the data of BLOCK data block, by BLOCK number
1 is set as according to all positions of block.
According to the synchronous method of the above-mentioned real-time virtual radio data based on poll, in which: in PC and FPGA respectively
It is set with time-out time T；If FPGA can't detect data in time-out time T, just stop receiving data；If PC is in time-out
It can't detect data in time T, then interrupt poll thread.
Meanwhile the synchronous method of the present invention also provides a kind of real-time virtual radio data based on interruption, the ring in PC
Shape queue is for storing several BLOCK data blocks, and each BLOCK data block includes 32 pairs of IQ two-way sampled datas, per all the way
The last one invalid bit of data forms information bit；First information bit is flag bit, indicates whether data are effective, second letter
Ceasing position is a day wire size, for showing transmission/reception data antenna；The last one information bit is timestamp, for receiving number
According to when record sampling time point；
The synchronous method of the real-time virtual radio data based on interruption the following steps are included:
Step S21, physical layer state machine is instructed according to transmitting-receiving in virtual radio electric system, the correlation into device PCI
Write-in transmitting-receiving instruction in the register of FPGA, and interrupt interval is set；
Step S22, the instruction in the FPGA detected register in device PCI is judged as transmission instruction or receives instruction；
If receiving instruction, it is transferred to step S23；If sending instruction, it is transferred to step S24；
Step S23, FPGA receives data and received data is transferred in the circle queue in PC, and works as received number
When according to the interrupt interval for reaching setting, triggering is interrupted；PC responds the interruption, and reads the valid data in circle queue, transmission
Subsequent processing is carried out to next communication module or upper-layer protocol；
Step S24, whenever storing N number of valid data block in circle queue, a mark is just written in PC in FPGA；
FPGA reads the DMA data area in FPGA according to the mark, by the valid data in the circle queue in PC, and in regulation
Between send feedback frame.
According to the synchronous method of the above-mentioned real-time virtual radio data based on interruption, in which: each BLOCK data
The size of block is 128Bytes, and the bit wide of sampling is 16bits.
According to the synchronous method of the above-mentioned real-time virtual radio data based on interruption, in which: the interrupt interval is
The size of 100 BLOCK data blocks.
According to the synchronous method of the above-mentioned real-time virtual radio data based on interruption, in which: in the step S23,
Received data are packaged into BLOCK data block by FPGA, and last position that first road I of each BLOCK is arranged is 0；
The day wire size and timestamp of the BLOCK data block are set simultaneously.
According to the synchronous method of the above-mentioned real-time virtual radio data based on interruption, in which: circle queue is initial
Whole position is all 1 when change；It, will after the valid data read in circle queue in BLOCK data block in the step S23
All positions of BLOCK data block are set as 1.
As described above, in the synchronous method of the invention based on poll/interruption real-time virtual radio data:
The data method of synchronization based on poll has following beneficial technical effect:
(11) poll thread is realized based on real time operating system RTX (Real Time eXtension), can be shielded all
Windows hardware interrupts and high priority interruption, to reduce the probability that poll thread is suspended, and then reduce significant figure
According to capped possibility；
(12) in poll inquiry and reading data, time-out time is set, if poll thread pool is not in time-out time
To data, then the thread is terminated, to significantly improve the utilization rate of CPU；
(13) data structure of BLOCK a kind of is devised, timestamp therein has recorded the sampling time point for receiving data,
If necessary to send feedback frame at the appointed time, the timestamp that data can be received according to the last one, which calculates, sends feedback frame
Time, and the time point and feedback frame are transmitted to FPGA, wait it is to be sent, to improve the real-time of system.
The data method of synchronization based on interruption has following beneficial technical effect:
(21) real-time characteristic of RTX is made full use of, it is synchronous based on implement of interruption function data, hence it is evident that improve the treatment effeciency of CPU；
(22) by setting interrupt interval, requirement of the different communication protocol to data processing can be compatible with；
(23) interrupt latency in RTX is in Microsecond grade, and the Interrupt Service Routine priority with higher of RTX, from
And significantly improve the synchronous real-time of data；
(24) data structure for devising a kind of BLOCK is counted by recording the timestamp of the last one received BLOCK
The sending time of feedback frame to be sent is calculated, and the Time Transmission is put into transmission instead to FPGA, FPGA at the time of sending
Frame is presented, to meet real-time as defined in agreement.
Detailed description of the invention
Fig. 1 is shown as the structural schematic diagram of the virtual radio electric system in the prior art based on RTX；
Fig. 2 is shown as the synchronous structural schematic diagram of the data between PC and RCB of the invention；
Fig. 3 is shown as the structural schematic diagram of BLOCK data block of the invention；
Fig. 4 is shown as the flow chart of the synchronous method of the real-time virtual radio data of the invention based on poll；
Fig. 5 is shown as the flow chart of the synchronous method of the real-time virtual radio data of the invention based on interruption.
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
It should be noted that the basic conception that only the invention is illustrated in a schematic way is illustrated provided in the present embodiment,
Then only shown in schema with it is of the invention in related component rather than component count, shape and size when according to actual implementation draw
System, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its assembly layout kenel can also
It can be increasingly complex.
As shown in Figure 1, the application journey in the realization framework of virtual radio electric system, in hardware components (such as RCB) and RTX
It is one of technological difficulties of the framework that data between sequence, which synchronize,.Data synchronization problems between PC and RCB refer in RCB and PC
Data interaction problem, pass to the application program in PC to subsequent place including the data after receiving RCB in receive process
By the application program in PC, treated that data are sent in RCB in reason and transmission process, with to be sent.It is main in RCB
Function is realized by FPGA.Therefore, the data of PC according to the present invention namely PC and FPGA synchronous with the data of RCB are same
Step.
In virtual radio electric system, the data synchronization structure between RCB and PC is as shown in Figure 2.Specifically, RCB is utilized
The data received on antenna are transferred in the circle queue in PC by the mode of DMA by pci bus；Meanwhile it is virtual in PC
Treated that data are stored in circle queue for radio upper-layer protocol, is then transferred in RCB by way of DMA.
In order to realize in the virtual radio electric system based on RTX and Windows data synchronization problems between PC and RCB, this
Invention devises a kind of block data structure BLOCK, and the size of BLOCK data block can be set as needed.Due to PC and radio frequency
Data transmission between board is to be realized by pci bus, and the transmission of the data of pci bus is according to TLP (switching layer information
Packet) format transmission.PCI provides that the size of TLP is 64-1024Bytes, and processing is transmitted by pci bus in PC
Data are carried out as unit of 128Bytes.Therefore, the present invention sets the size of a BLOCK data block as 128Bytes.
In virtual radio electric system, the bit wide of sampling is 16bits, is divided into IQ two-way.Therefore, in virtual radio electric system with
(128*8)/(16*2)=32 sampled point is packaged into BLOCK data block.The format of BLOCK data block is as shown in Figure 3.
Specifically, as follows for the structure of each BLOCK data block:
1, each BLOCK data block includes 32 pairs of IQ sampled datas, and the bit wide of sampling is 16bits, BLOCK data block
Size be 128Bytes.
2, either the road I or the road Q, effective bit wide are 12bits or 14bits.
3, in each BLOCK data block, the last one invalid bit of each circuit-switched data is taken to form information bit；Wherein
One information bit is flag bit, accounts for 1bit, and 0 indicates that data are effective, and 1 indicates data invalid；Second information bit is a day wire size, is accounted for
7bits, for show send data antenna, or show receive data antenna；The last one information bit is timestamp, is accounted for
56bits, for when receiving data, recording the time point of sampling.
Wherein, timestamp is mainly used for controlling the sending time of data block.Such as some agreements regulation receives end of data
It needs to send a feedback frame (ACK frame) in the stipulated time.At this moment it can parse the last one BLOCK number of the data received
According to the timestamp of block, the time for sending feedback frame is calculated；Then feedback frame and sending time are passed into FPGA, FPGA simultaneously
Feedback frame is sent in correct time point by timing.If the time restriction of not stringent transmission feedback frame, timestamp can
To ignore.
The synchronous method of real-time virtual radio data of the invention includes two kinds of data methods of synchronization of poll and interruption.Under
Face illustrates two kinds of data methods of synchronization respectively.
Embodiment one
In the synchronous method of the real-time virtual radio data of the invention based on poll, the circle queue in PC is used for
Several BLOCK data blocks are stored, the size of each BLOCK data block is 128Bytes, including 32 pairs of IQ two-way hits
According to the bit wide of sampling is 16bits；And in each BLOCK data block, the last one invalid bit of each circuit-switched data is formed
Information bit；First information bit is flag bit, indicates whether data are effective, and second information bit is a day wire size, is sent out for showing
Send/receive the antenna of data；The last one information bit is timestamp, for recording the time point of sampling when receiving data.
Referring to Fig. 4, the synchronous method of the real-time virtual radio data of the invention based on poll the following steps are included:
Step S11, physical layer state machine is instructed according to transmitting-receiving in virtual radio electric system, the correlation in device PCI
Write-in transmitting-receiving instruction in register in FPGA.
Step S12, the instruction in the FPGA detected register in device PCI is judged as transmission instruction or receives instruction；
If receiving instruction, it is transferred to step S13；If sending instruction, it is transferred to step S14.
Step S13, FPGA receives data and by received data in the way of DMA, is transferred in PC by pci bus
Circle queue in, and in received size of data for the first time more than the size of a BLOCK data block when triggering interrupt；PC response
The interruption, opens poll thread, and continuous poll circle queue reads the valid data in circle queue and is transmitted to next logical
Believe that module or upper-layer protocol carry out subsequent processing.
Wherein, received data are packaged into BLOCK data block by FPGA, and first road I of each BLOCK is set
Last position is 0, i.e. the flag bit of setting BLOCK data block is 0, to show that the data in the data block are effective；It is arranged simultaneously
The day wire size and timestamp of the BLOCK data block.
Specifically, when received data reach the size of a BLOCK data block for the first time, FPGA is triggered in one
It is disconnected, to trigger the poll thread in PC.It should be noted that FPGA only meets a BLOCK number in received data for the first time
It is interrupted according to being triggered when block size.
Poll thread in PC judges the BLOCK data block by the way that whether the flag bit in inspection BLOCK data block is 0
Whether effectively；If it is valid, read the valid data in the BLOCK data block and be transferred to next communication module or on
Layer protocol makees subsequent processing, and sets 1 for all positions of BLOCK data block；If invalid, the poll thread of PC continues
The validity for detecting next BLOCK data block, until data receiver terminates.
In the present invention, it is all 1 that circle queue, which is whole positions in initialization, is read in circle queue reading thread
1 also is set by its whole position after the data of BLOCK data block.This can be passed through to read circle queue next time and be
Whether the flag bit for detecting BLOCK data block is 1, to judge the validity of data.
It should be noted that time-out time T has been set separately in PC and FPGA；If FPGA is detected in time-out time T
Less than data, just stop receiving data；If PC can't detect data in time-out time T, poll thread is interrupted, to mention
The utilization rate of high CPU avoids unnecessary idle running.
Poll thread in PC is realized based on real-time oss RTX.Poll thread will not be by the hard of Windows system
Part interrupts and the thread of high priority interrupts, so that significantly reducing data is not read just capped possibility, significantly improves
The real-time of data processing.
Step S14, whenever storing N number of effective BLOCK data block in circle queue, a mark is just written in PC in FPGA
Will；FPGA is according to the mark, in the way of DMA, is read the valid data in the circle queue in PC by pci bus
DMA data area in FPGA, and feedback frame is sent in the stipulated time.
Wherein, N does not have specific scope limitation, can according to need, and is arranged to different sizes.For different communication
Different sizes is arranged in agreement, to reach the optimal of real-time and performance.
Wherein, the poll thread in PC sends the time of feedback frame according to the information bit judgement in BLOCK data block, and will
The time is sent to FPGA, and FPGA sends the ACK feedback frame by timing on correct time point.
In one embodiment of the present of invention, the virtual radio based on RTX realizes 802.11 serial protocol of wireless local area network.
Agreement provides after having received data, must send an ACK frame in 16us.Therefore, terminate when data are sent, the poll line in PC
Journey judges receiving time by the timestamp of the last one BLOCK of parsing FPGA transmission, and calculates and send feedback frame
Time, i.e., the time on timestamp add 16us, then send FPGA for the time, FPGA is by timing, accurate
The ACK feedback frame is sent on time point.
Embodiment two
In the synchronous method of the real-time virtual radio data of the invention based on interruption, the circle queue in PC is used for
Several BLOCK data blocks are stored, the size of each BLOCK data block is 128Bytes, including 32 pairs of IQ two-way hits
According to the bit wide of sampling is 16bits；And in each BLOCK data block, the last one invalid bit of each circuit-switched data is formed
Information bit；First information bit is flag bit, indicates whether data are effective, and second information bit is a day wire size, is sent out for showing
Send/receive the antenna of data；The last one information bit is timestamp, for recording the time point of sampling when receiving data.
Referring to Fig. 5, the synchronous method of the real-time virtual radio data of the invention based on interruption the following steps are included:
Step S21, physical layer state machine is instructed according to transmitting-receiving in virtual radio electric system, the correlation into device PCI
Write-in transmitting-receiving instruction in the register of FPGA, and interrupt interval is set.
Specifically, interrupt interval can be set as needed.Preferably, interrupt interval is set as 100 BLOCK data
The size of block, that is, 3200 sampled points.The every data for receiving 3200 sampled points of FPGA, i.e., triggering is primary interrupts.
Step S22, the instruction in the FPGA detected register in device PCI is judged as transmission instruction or receives instruction；
If receiving instruction, it is transferred to step S23；If sending instruction, it is transferred to step S24.
Step S23, FPGA receives data and by received data in the way of DMA, is transferred in PC by pci bus
Circle queue in, and when received data reach the interrupt interval of setting, triggering is interrupted；PC responds the interruption, and reads
Valid data in circle queue, are transferred to next communication module or upper-layer protocol carries out subsequent processing.
Received data are packaged into BLOCK data block by FPGA, and be arranged each BLOCK first road I it is last
One is 0, i.e. the flag bit of setting BLOCK data block is 0, to show that the data in the data block are effective；Setting should simultaneously
The day wire size and timestamp of BLOCK data block.
Preferably, when the received data of FPGA are more than 3200 sampled points, i.e. 100 BLOCK, just triggering one interrupts.
Corresponding interrupt handling program responds the interruption in PC, and from the significant figure read in 100 BLOCK data blocks in circle queue
According to and the data of reading being transferred to next communication module or upper-layer protocol and carry out subsequent processing, and by BLOCK data
All positions of block are set as 1；The interrupt handling program is hung up simultaneously, waits the arrival interrupted next time.
It is all 1 that circle queue, which is whole positions in initialization, is reading the BLOCK data block in thread reading circle queue
1 also is set by its whole position after data.This is can to pass through detection BLOCK data to read circle queue next time and be
Whether the flag bit of block is 1, to judge the validity of data.
It should be noted that being set with time-out time T in FPGA；If FPGA can't detect number in time-out time T
According to just stopping receives data and avoids unnecessary idle running to improve the utilization rate of CPU.
Step S24, whenever storing N number of valid data block in circle queue, a mark is just written in PC in FPGA；
FPGA is according to the mark, in the way of DMA, is read the valid data in the circle queue in PC by pci bus
DMA data area in FPGA, and feedback frame is sent in the stipulated time.
Wherein, N does not have specific scope limitation, can according to need, and is arranged to different sizes.For different communication
Different sizes is arranged in agreement, to reach the optimal of real-time and performance.
Specifically, once data transmission terminates, the Interrupt Service Routine in PC passes through the last one of parsing FPGA transmission
The timestamp of BLOCK data block judges receiving time, calculates the time for sending feedback frame, and send the time to
FPGA, FPGA send feedback frame on correct time point by timing.
One embodiment of the present of invention: the virtual radio based on RTX realizes 802.11 serial protocol of wireless local area network.Association
View regulation must send an ACK frame in 16us after having received data.Therefore, the interruption clothes at the end of data are sent, in PC
Business routine judges receiving time by the timestamp of the last one BLOCK of parsing FPGA transmission, and calculates transmission feedback frame
Time, i.e., time on timestamp adds 16us, then sends FPGA for the time.FPGA is by timing, accurate
Time point on send the feedback frame.
In conclusion in the synchronous method of the invention based on poll/interruption real-time virtual radio data, based on wheel
Poll thread is realized based on real time operating system RTX in the data method of synchronization of inquiry, can be shielded in all Windows hardware
Disconnected and high priority interruption to reduce the probability that poll thread is suspended, and then reduces the capped possibility of valid data；
In poll inquiry and reading data, time-out time is set, if poll thread pool is less than data, then eventually in time-out time
Only thread, to significantly improve the utilization rate of CPU；Devise the data structure of BLOCK a kind of, timestamp record therein
The sampling time point for receiving data can receive number according to the last one if necessary to send feedback frame at the appointed time
According to timestamp calculate and send time of feedback frame, and the time point and feedback frame are transmitted to FPGA, wait it is to be sent, to improve
The real-time of system.The data method of synchronization based on interruption makes full use of the real-time characteristic of RTX, same based on implement of interruption function data
Step, hence it is evident that improve the treatment effeciency of CPU；By setting interrupt interval, different communication protocol can be compatible with to data processing
It is required that；Interrupt latency in RTX is in Microsecond grade, and the Interrupt Service Routine priority with higher of RTX, to significantly mention
The synchronous real-time of high data；The data structure for devising a kind of BLOCK, by record the last one received BLOCK when
Between stab, calculate the sending time of feedback frame to be sent, and by the Time Transmission to FPGA, FPGA is sent instead on time point
Frame is presented, to meet real-time as defined in agreement.So the present invention effectively overcomes various shortcoming in the prior art and has height
Spend value of industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (10)
1. a kind of synchronous method of the real-time virtual radio data based on poll, it is characterised in that: the circle queue in PC is used
In storing several BLOCK data blocks, each BLOCK data block includes 32 pairs of IQ two-way sampled datas, and each circuit-switched data is most
The latter invalid bit forms information bit；First information bit is flag bit, indicates whether data are effective, and second information bit is day
Wire size, for showing transmission/reception data antenna；The last one information bit is timestamp, for recording when receiving data
The time point of sampling；
The synchronous method of the real-time virtual radio data based on poll the following steps are included:
Step S11, physical layer state machine is instructed according to transmitting-receiving in virtual radio electric system, in the related FPGA in device PCI
Register in write-in transmitting-receiving instruction；
Step S12, the instruction in the FPGA detected register in device PCI is judged as transmission instruction or receives instruction；If
Instruction is received, step S13 is transferred to；If sending instruction, it is transferred to step S14；
Step S13, FPGA receives data and received data is transferred in the circle queue in PC, and big in received data
It is small for the first time more than the size of a BLOCK data block when triggering interrupt；PC responds the interruption, opens poll thread, continuous poll
Circle queue, read the valid data in circle queue and be transmitted to next communication module or upper-layer protocol carry out it is subsequent
Processing；
Step S14, whenever storing N number of effective BLOCK data block in circle queue, a mark is just written in PC in FPGA；
FPGA reads the DMA data area in FPGA according to the mark, by the valid data in the circle queue in PC, and in regulation
Between send feedback frame.
2. the synchronous method of the real-time virtual radio data according to claim 1 based on poll, it is characterised in that: every
The size of one BLOCK data block is 128Bytes, and the bit wide of sampling is 16bits.
3. the synchronous method of the real-time virtual radio data according to claim 1 based on poll, it is characterised in that: institute
It states in step S13, received data are packaged into BLOCK data block by FPGA, and first road I of each BLOCK is set
Last position is 0, while the day wire size and timestamp of BLOCK data block is arranged.
4. the synchronous method of the real-time virtual radio data according to claim 1 based on poll, it is characterised in that: institute
Whole position is all 1 when stating circle queue initialization；In the step S13, the data of BLOCK data block in reading circle queue
Afterwards, 1 is set by all positions of BLOCK data block.
5. the synchronous method of the real-time virtual radio data according to claim 1 based on poll, it is characterised in that: PC
With time-out time T has been set separately in FPGA；If FPGA can't detect data in time-out time T, just stop receiving data；
If PC can't detect data in time-out time T, poll thread is interrupted.
6. a kind of synchronous method of the real-time virtual radio data based on interruption, it is characterised in that: the circle queue in PC is used
In storing several BLOCK data blocks, each BLOCK data block includes 32 pairs of IQ two-way sampled datas, and each circuit-switched data is most
The latter invalid bit forms information bit；First information bit is flag bit, indicates whether data are effective, and second information bit is day
Wire size, for showing transmission/reception data antenna；The last one information bit is timestamp, for recording when receiving data
The time point of sampling；
The synchronous method of the real-time virtual radio data based on interruption the following steps are included:
Step S21, physical layer state machine is instructed according to transmitting-receiving in virtual radio electric system, the related FPGA's into device PCI
Write-in transmitting-receiving instruction in register, and interrupt interval is set；
Step S22, the instruction in the FPGA detected register in device PCI is judged as transmission instruction or receives instruction；If
Instruction is received, step S23 is transferred to；If sending instruction, it is transferred to step S24；
Step S23, FPGA receives data and received data is transferred in the circle queue in PC, and when received data reach
To setting interrupt interval when, triggering interrupt；PC responds the interruption, and reads the valid data in circle queue, is transferred to down
One communication module or upper-layer protocol carry out subsequent processing；
Step S24, whenever storing N number of valid data block in circle queue, a mark is just written in PC in FPGA；FPGA root
According to the mark, the valid data in the circle queue in PC are read into the DMA data area in FPGA, and send in the stipulated time
Feedback frame.
7. the synchronous method of the real-time virtual radio data according to claim 6 based on interruption, it is characterised in that: every
The size of one BLOCK data block is 128Bytes, and the bit wide of sampling is 16bits.
8. the synchronous method of the real-time virtual radio data according to claim 6 based on interruption, it is characterised in that: institute
State the size that interrupt interval is 100 BLOCK data blocks.
9. the synchronous method of the real-time virtual radio data according to claim 6 based on interruption, it is characterised in that: institute
It states in step S23, received data are packaged into BLOCK data block by FPGA, and first road I of each BLOCK is set
Last position is 0；The day wire size and timestamp of the BLOCK data block are set simultaneously.
10. the synchronous method of the real-time virtual radio data according to claim 6 based on interruption, it is characterised in that:
Circle queue whole position in initialization is all 1；In the step S23, from having in reading BLOCK data block in circle queue
After imitating data, 1 is set by all positions of BLOCK data block.
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