CN106293824A - A kind of from the method and device processing chip upgrade - Google Patents
A kind of from the method and device processing chip upgrade Download PDFInfo
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- CN106293824A CN106293824A CN201610633613.8A CN201610633613A CN106293824A CN 106293824 A CN106293824 A CN 106293824A CN 201610633613 A CN201610633613 A CN 201610633613A CN 106293824 A CN106293824 A CN 106293824A
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- chip
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- processing chip
- promoter region
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
Abstract
The present invention relates to apply the storage inside of processing equipment to receive program and to keep the method and device of program, particularly relate to a kind of method and device from process chip upgrade with verification ROMPaq accuracy.The invention provides a kind of method from process chip upgrade, including: obtain upgrading software kit by principal series irrespective of size chip；Described upgrading software kit is loaded into from processing chip carrier the first promoter region；Described first promoter region comprises currently used from processing chip mastery routine；First promoter region upgrading software kit is verified, generates the first check code, it is judged that the first check code is the most correct；If the first check code is the most i.e. upgraded, if the first check code is incorrect, do not upgrade.The method that the present invention provides there is upgrading before the inspection of upgrading data packet make because of upgrading before upgrading package data mistake or the effect that reduces of the failed probability of the imperfect upgrading caused and can normally be again started up the function upgraded after upgrading unsuccessfully.
Description
Technical field
The present invention relates to apply the storage inside of processing equipment to receive program and to keep the method and device of program, especially
Relate to a kind of method and device from process chip upgrade with verification ROMPaq accuracy.
Background technology
In smart machine, except principal series irrespective of size (SOC) chip, also have share main SOC part function from
Process chip.From processing chip, to be typically due to the risk of upgrading relatively big, and can not actively recover original after upgrading unsuccessfully and drive
The reasons such as dynamic software, are typically not configured to actively to upgrade from the upgrading processing chip.In order to avoid controlling chaotic and system wind
Danger, main SOC and the circumferential component that the most all can only draw oneself up from process chip, and can not directly control others' periphery
Parts.Due to main SOC cannot directly control from process chip controls from process chip software carrier, from process chip without
Method directly controls the Network Interface Module that main SOC controls so that on available circuit architecture basics, be attached to main SOC's
OTA software upgrading cannot be directly carried out from processing chip.From process chip during upgrading, as data transmission fails occurs
Or data transmission makes a mistake, causing upgrading the most also is from the emphasis processed chip upgrade and difficult point.
As a example by current intelligent TV set, current high-end TV majority uses a main SOC to process chip plus one
Being specifically designed to the chip that rear end image quality processes, the pattern of this one-plus-one is designed.Main SOC processes at chip and rear end image quality
The software of reason chip is stored in different storage mediums.Rear end image quality processes chip, is mainly used in promoting TV rear end
Disposal ability, improves the dynamic range of LCD TV picture, dynamic contrast, colour gamut, definition and fluidity of motion etc., for
Picture quality of television plays vital effect.
TV will be unable to after dispatching from the factory that rear end image quality is processed chip etc. to carry out large-scale software upgrading or utilizes the Internet
Software upgrading is completed by user oneself, say, that: the solution of the lifting of some image quality effects or leak (BUG) will be unable to lead to
The mode crossing software upgrading allows the TV dispatched from the factory improve.Rear end image quality process chip, due to its particularity, once rises
Level failure, then need after-sales service personnel to tear TV bonnet open and keep in repair, and this needs to waste substantial amounts of human cost；And OTA
Upgrading is again large-scale a kind of upgrading mode, once upgrades and substantial amounts of TV unsuccessfully will be caused to go wrong, and this will cause
Catastrophic consequence, so the OTA upgrading that rear end image quality processes chip must have safety measure.
Summary of the invention
It is an object of the invention to provide a kind of side from process chip upgrade with verification upgrading software kit accuracy
Method and device.
The invention provides a kind of method from process chip upgrade, including:
Upgrading software kit is obtained by principal series irrespective of size chip；
Described upgrading software kit is loaded into from processing chip carrier the first promoter region；
Described first promoter region comprises currently used from processing chip mastery routine；
First promoter region upgrading software kit is verified, generates the first check code, it is judged that the first check code is the most correct；
If the first check code is the most i.e. upgraded, if the first check code is incorrect, do not upgrade.
The present invention obtains by the way of processing chip upgrade software kit by principal series irrespective of size chip, it is achieved that from processing chip
Remain able to carry out online upgrading by principal series irrespective of size chip under the situation not having network process module, it is not necessary to increase any
Hardware, reduces manually installed time cost.By the way of check code verifies, judge that upgrading software kit is the most correct, such as school
Test failure not upgrade, thus reduce the upgrading failure caused because upgrading package data is incorrect, it is to avoid be improper
Upgrading；Can be effectively improved from the success rate processing chip software upgrading through verification successfully upgrading software packet upgrade.
Accompanying drawing explanation
Accompanying drawing herein is merged in description and constitutes the part of this specification, it is shown that meet the enforcement of the present invention
Example, and in description together for explaining the principle of the present invention.
Fig. 1 is according to the involved in the present invention system architecture being embodied as environment and connection diagram；
Fig. 2, Fig. 3 are the high-level schematic functional block diagram of two kinds of update devices in Fig. 1；
Fig. 4 is the circuit theory schematic diagram of first embodiment；
Fig. 5 is to apply a kind of I2C of the utilization bus in circuit shown in Fig. 4 to from processing the method that chip is upgraded
Schematic flow sheet；
Fig. 6 is the circuit theory schematic diagram of the second embodiment；
Fig. 7 is to apply a kind of I2C of the utilization bus in circuit shown in Fig. 6 to from processing the method that chip is upgraded
Schematic flow sheet；
Fig. 8 is from the software flow schematic diagram processing chip startup program in Fig. 5 and 7.
Wherein reference: 11-update device, 12-authorized client, 13-server, 14-the Internet, 22-download mould
Block, 23-programming module, 24-AKU detection module and 25-restart module.
Detailed description of the invention
Here in detail exemplary embodiment will be performed explanation, its example represents in the accompanying drawings.Explained below relates to
During accompanying drawing, unless otherwise indicated, the same numbers in different accompanying drawings represents same or analogous key element.Following exemplary embodiment
Described in embodiment do not represent all embodiments consistent with the present invention.On the contrary, they are only with the most appended
The example of the apparatus and method that some aspects that described in detail in claims, the present invention are consistent.
First, the basis of the present invention is described:
1, I2C bus (I2C bus, Inter-IC bus) is the two two-way continuous buses of line, it is provided that integrated circuit
Between communication line.I2C bus is a kind of Serial Extension technology, and interface line is few, and control mode simplifies, device packing forms
Little, traffic rate relatively advantages of higher, it is widely used in various interchip communication.The present invention at utmost keeps original circuit to tie
Structure and system, the I2C bus that on hardware, Reasonable Arrangement increases the most on circuit boards, this is that those skilled in the art are easy to reality
Existing, the most additionally increase other hardware costs.
2, after double startup technology is upgrading when the software of the first promoter region has error in data, can select from being not corrupted
For backup the second promoter region start.If the first promoter region and the second promoter region use at a memorizer or mould
Dividing multiple logical partition in block to solve, it is possible on the basis of not increasing any hardware cost, solution OTA upgrades and unsuccessfully leads
The rear end image quality caused processes the technical problem that chip cannot start.
3, the inventive method and device be served only in specific product need software upgrading from process chip, such as: rear end
Image quality processes chip.But, the most all of from process chip all need software upgrading, if from process chip software the most steady
Fixed, change probability can be ignored, and just need not improve circuit and software complexity, increases system burden, reduces system overall
Reliability.
4, principal series irrespective of size chip (main SOC) is to realize multiple circuit on one chip, it is possible to independently work, here
Multiple circuit is exactly the various circuit operating signal.Main SOC is an integrated circuit having application-specific target, wherein comprises
Holonomic system also has the full content of embedded software.Main SOC can include CPU, clock circuit, intervalometer, interrupt control unit, string
The Logic Cores such as parallel interface, other ancillary equipment, I/O port and the adhesive logic between various IP kernels；Various volatile,
The memorizeies such as non-volatile and Cache；And analog circuit used in ADC, DAC, PLL and some high speed circuits.
Second, involved in the present invention environment and the update device of being embodied as be described:
Fig. 1 is according to the involved in the present invention system architecture being embodied as environment and connection diagram.
With reference to Fig. 1, this is embodied as environment and includes: the Internet 14 and the authorized client 12 of access the Internet 14, clothes
Business device 13 and at least one update device 11.
Server 13, is used for storing software upgrade package, and provides network to download；
Authorized client 12, is connected with server 13 by the Internet, for by no problem to be upgraded through test
Software kit be distributed to correspondence server 13 in；
At least one update device 11, is connected with server 13 by the Internet, is used for obtaining software upgrade package to need
Upgrading from process chip of software upgrading, i.e. principal series irrespective of size chip (hereinafter referred to as " main SOC ") must band network interface mould
Block.
Wherein: server 13 can be the OTA server following strictly OTA specification and requirement, it is also possible to be that other are similar to
Server, such as: the upgrade server of Fructus Mali pumilae system.Equally, software upgrade package can be OTA software upgrade package, it is also possible to be
Other similar software upgrade package.
Authorized client 12 can be the computer of networking, and mandate need be had could to issue new software.In general, phase
Using same server 13 with the same product of producer, the server 13 of different manufacturers is different.
Fig. 2, Fig. 3 are the high-level schematic functional block diagram of two kinds of update devices in Fig. 1.Such as, update device 11 can be TV
Machine, Set Top Box, panel computer, mobile phone, router etc..
With reference to Fig. 2, in one exemplary embodiment, update device 11 can include following assembly: a download module
22,23, AKU inspection module 24 of a programming module and one restart module 25；With reference to Fig. 3, exemplary at another
In embodiment, update device 11 can include following assembly: 22, programming module 23 of a download module and an AKU
Inspection module 24.
Download module 22, is connected with version detection module, for downloading from a server higher than currently from processing chip
The upgrading software kit of software version；Download module 22 includes main SOC and connected Network Interface Module.
Programming module 23, is connected with described download module, including main SOC, from processing chip, from processing chip software carrier
With I2C bus, it is connected with described download module, for writing download from processing chip from the upgrading software kit processing chip
In software carrier；Concrete, for directly being write download by I2C bus by main SOC from the upgrading software kit processing chip
Enter from processing chip software carrier or via after processing chip transfer, by from processing chip write from processing chip software
In carrier；
Principal series irrespective of size chip (main SOC) downloads from a server upgrading software kit by own network interface module.Network
Interface module for will upgrading software kit locally downloading from server, include, but are not limited to WLAN (WIFI), the 3rd
For mobile communication (3G), the 4th generation mobile communication (4G) etc..
From process chip include, but are not limited to liquid crystal display screen sequencing contro (TCON) chip, television backlight driving chip and after
End image quality processes chip.
It is independent solid-state memory or the memory module integrated with other circuit from processing chip software carrier,
Such as: from the memory module processed chip, independent solid-state memory includes: electric erasable program storage (EEPROM),
Nonvolatile flash memory (NORFlash) etc..
AKU inspection module 24, is connected with described programming module, for the upgrading software kit downloaded being judged, data are
No correctly；
Restart module 25, be connected with described programming module, for software restarting from processing chip.
May also include version detection module, for detect in the webserver from process chip upgrading software kit version
Number whether higher than currently from the software version processing chip；Version detection module includes main SOC and connected network interface
Module.
In this exemplary embodiment, in update device 11 from process chip and need upgrade from process chip
All only one of which.
In another exemplary embodiment, in update device 11 from process chip is multiple, but need upgrade from
Process chip only one of which.
In another exemplary embodiment, in update device 11 from process chip is multiple, need upgrade from from
Reason chip also more than one.
The update device main difference of this update device 11 and traditional main SOC software of only upgrading is: 1, AKU inspection
To the upgrading software kit downloaded, module 24 is for judging that data are the most correct；2, programming module 23 includes main SOC, from processing core
Sheet, from processing chip software carrier and I2C bus.
3rd, below in conjunction with implementing of two specific embodiments detailed description present invention:
First embodiment
Fig. 4 is the circuit theory schematic diagram of first embodiment.It is to from processing the not requirement of chip software carrier, the suitableeest
Wide by scope.
With reference to Fig. 4, the physical circuit of update device 11 may include that a main SOC, the network of one or more main SOC
Interface module, one or more from processing chip and software carrier thereof.
Main SOC and need software upgrading all include I2C interface from processing chip, they are by laying on circuit board
I2C bus connects.
The NORFlash without I2C interface is used, from processing chip and corresponding NORFlash from processing chip software carrier
Connected by SPI interface.Each only have one piece of NORFlash from process chip.Only have one piece in the present embodiment from processing chip
Need upgrading: rear end image quality processes chip.
SPI is the abbreviation of Serial Peripheral Interface (SPI) (Serial Peripheral Interface).SPI, is a kind of high speed
, full duplex, the communication bus of synchronization, process chip and NOR Flash memory this interface of many employings.NORFlash stores
Device is provided with write-protect, and processing data in chip reading NOR Flash memory need not drive, and need drive during programming data.
Fig. 5 is to apply a kind of I2C of the utilization bus in circuit shown in Fig. 4 to from processing the method that chip is upgraded
Schematic flow sheet.It is still by from processing chip by the software upgrade package write from the main SOC biography of I2C bus transfer from processing core
Sheet software carrier, mainly includes that main SOC end processes step and processes step from processing die terminals, relative complex on processing.
As it is shown in figure 5, this carries out in the method upgraded from processing chip being that rear end image quality processes chip, specifically include following
Step:
500) start；
501) will issue from processing chip OTA AKU or be uploaded to OTA server；
502) from the OTA AKU version of process chip during in each online network television, main SOC obtains OTA server, and
According to measuring from process chip software version need upgrade by OTA than self the Supreme People's Procuratorate on server；
503) upgrading is prompted the user whether by man machine interface？User selects upgrading, enters next step；Do not carry out
OTA upgrades, and enters step 509)；
504) main SOC downloads OTA AKU from OTA server；
505) main SOC transmits OTA AKU by I2C to from process chip；
506) from processing chip reception OTA AKU；
507) from processing the chip normal boot partition by the OTA AKU programming that receives to NORFlash；If burning
Write as merit, the most directly terminated；If programming is unsuccessful, enter step 508)；
508) from processing chip software reset, that calls the employing double startup technology shown in Fig. 8 starts journey from process chip
Sequence, this program with in the second embodiment from process chip start program identical, it implements step at Unify legislation below；
509) terminate.
Wherein: step 501 is performed by authorized client 12, step 502-505 is controlled to perform by main SOC, step 506-508
By from processing chip controls execution.
In step 501, when image quality process chip software in rear end needs to carry out OTA upgrading, first will through test not
Problematic software kit to be upgraded is distributed to the OTA upgrade server of company by authorized client 12.
In step 502, the TV of user's family correspondence model is when being connected on network, and the OTA of main SOC upgrades
By network, functional software detects that server end has the rear end image quality to this model TV to process chip and carries out the need of OTA upgrading
Ask；That is: increase in tradition OTA upgrade function software from processing chip software version detection code；
In step 503, on man-machine (UI) interface of TV, eject corresponding prompting, ask user to be confirmed whether to agree to
Carry out the OTA software upgrading of rear end image quality chip；
In step 504, if user selects to agree to, then by network, the OTA of server end is upgraded under software kit
It is downloaded on the storage medium of TV；
In step 505, after OTA upgrading software kit has been downloaded, by I2C bus and corresponding agreement, after notice
End image quality processes chip and carries out OTA software upgrading, and the transmission of OTA upgrading data packet is processed to rear end image quality by I2C bus
Chip；
In step 506, after rear end image quality processes the OTA upgrade command that chip receives main SOC, open in internal memory
Warding off a block buffer, the data transmitted by I2C preserve to relief area；
In step 507, after being transmitted, rear end image quality processes chip by the OTA AKU programming in relief area extremely
The normal boot partition of NOR Flash memory is upgraded；
In step 508, restart and can complete rear end image quality and process the OTA upgrade function of chip from processing chip.
In the first embodiment, the NORFlash of band I2C interface can be used from processing chip software carrier, substitute without
The NORFlash of I2C interface.
In the first embodiment, from process chip software carrier can use other solid-state memories and with from process chip
Corresponding interface, substitute without the NORFlash of I2C interface and SPI interface.
In the first embodiment, can use from processing solid-state storage module replacement chip from process chip software carrier
NORFlash and SPI interface without I2C interface.
In the first embodiment, can be liquid crystal display screen sequencing contro (TCON) chip or television backlight drives from processing chip
Dynamic chip, substitutes rear end image quality and processes chip, but owing to corresponding software is stablized, need not be upgraded, do not use.
In the first embodiment, if desired, from process chip can be multiple.
In first embodiment step 506, can use from the physical buffer module processing chip, substitute memory is opened up
Relief area.
In first embodiment, step 508, start program from process chip can not use double startup, such step 507
In, the OTA AKU programming that receives to NORFlash can be substituted the programming normal boot partition to NORFlash,
But the most do not back up boot partition, once upgrade and unsuccessfully will start, therefore cannot ensure that liter level security is with reliable.
Second embodiment
Fig. 6 is the circuit theory schematic diagram of the second embodiment.It requires must to connect by band I2C from process chip software carrier
Mouthful, such narrow application range but control simple, efficiency high.
With reference to Fig. 6, the physical circuit of update device 11 may include that a main SOC, the network of one or more main SOC
Interface module, one or more from processing chip and software carrier thereof.
Main SOC, need software upgrading all include I2C interface from processing chip software carrier from processing chip and correspondence,
They are connected by the I2C bus laid on circuit board.
The NORFlash of band I2C interface is used, from processing chip with corresponding NORFlash still from process chip software carrier
Connected by SPI interface.Each only have one piece of NORFlash from process chip.Only have one piece in the present embodiment and need upgrading
From processing chip: rear end image quality processes chip.
Fig. 7 is to apply a kind of I2C of the utilization bus in circuit shown in Fig. 4 to from processing the method that chip is upgraded
Schematic flow sheet.It directly by from process chip send request main SOC software upgrade package is write direct from process from I2C bus
Chip software carrier, mainly only includes main SOC end and processes step, processes simple.
As it is shown in fig. 7, this carries out in the method upgraded from processing chip being that rear end image quality processes chip, specifically include following
Step:
700) start；
701) will issue from processing chip OTA AKU or be uploaded to OTA server；
702) from the OTA AKU version of process chip during in each online network television, main SOC obtains OTA server, and
According to measuring from process chip software version need upgrade by OTA than self the Supreme People's Procuratorate on server；
703) upgrading is prompted the user whether by man machine interface？User selects upgrading, enters next step；Do not carry out
OTA upgrades, and enters step 708)；
704) from processing the chip main SOC of request from OTA server download OTA AKU；
705) main SOC is asked will to download the complete direct programming of OTA AKU from process by I2C bus from process chip
The normal promoter region of the NORFLASH of chip；
706), after programming, main SOC is notified from processing chip by I2C bus；
707) from processing chip software reset, that calls the employing double startup technology shown in Fig. 8 starts journey from process chip
Sequence, this program with in first embodiment from process chip start program identical, it implements step at Unify legislation below；
708) terminate.
Wherein: step 701 is performed by authorized client 12, step 702-706 is asked main SOC to control to hold by from process chip
OK, step 707 is by from processing chip controls execution.
In step 701, when image quality process chip software in rear end needs to carry out OTA upgrading, first will through test not
Problematic software kit to be upgraded is distributed to the OTA upgrade server of company.
In a step 702, the TV of user's family correspondence model is when being connected on network, and from processing, chip request is main
By network, the OTA upgrade function software of SOC detects that server end has the rear end image quality to this model TV to process core
Sheet carries out the demand of OTA upgrading；
In step 703, on man-machine (UI) interface of TV, eject corresponding prompting, ask user to be confirmed whether to agree to
Carry out the OTA software upgrading of rear end image quality chip；
In step 704, if user selects to agree to, then by network, the OTA of server end is upgraded under software kit
It is downloaded on the storage medium of TV；
In step 705, after OTA upgrading software kit has been downloaded, by I2C bus and corresponding agreement, from process
Chip asks main SOC OTA upgrading data packet to be write direct from the NORFLASH processing chip；
In step 707, start according to the notice software again that programming is complete from processing chip, restart from processing chip
Rear end image quality can be completed and process the OTA upgrade function of chip.
In a second embodiment, from process chip software carrier use band I2C interface NORFlash, so can by from
Process chip and ask main SOC write.
In a second embodiment, other solid-state memories of band I2C interface can be used from process chip software carrier, replace
NORFlash for band I2C interface.
In a second embodiment, can be liquid crystal display screen sequencing contro (TCON) chip or television backlight drives from processing chip
Dynamic chip, substitutes rear end image quality and processes chip, but owing to corresponding software is stablized, need not be upgraded, do not use.
In a second embodiment, if desired, from process chip can be multiple.
In the second embodiment step 705, start program from process chip can not use double startup, such step 706
In, the OTA AKU programming that receives to NORFlash can be substituted the programming normal boot partition to NORFlash.
In first and second embodiments from process chip start program
This startup program uses double startup technology, by loading from process chip and controlling to perform, the most as shown in Figure 8, and bag
Include following steps:
800) start；
801) System guides；
802) normal promoter region upgrading software kit is carried out CRC check and judges that upgrading package data is the most correct？It is no,
Enter step 803)；It is then to enter step 805)；
803) start from backup promoter region；
804) send from processing chip software upgrading failure notification to main SOC, enter step 806)；
805) start from normal promoter region；
806) terminate.
In step 801, System guides is commonly called as BOOT, such as: guide file in computer operating system, when system start-up
Need load before operating system.
In step 802, normal promoter region is also known as the first promoter region, and the first promoter region is for depositing currently used main journey
Sequence.
In step 803, backup promoter region is also known as the second promoter region, and the second promoter region is for depositing currently used main journey
The backup of sequence；Still can start from backup promoter region from processing chip upgrade failure, owing to backup promoter region is at escalation process
It is not destroyed, has the most fully ensured upgrading security and the reliability.First promoter region is two different things with the second promoter region
Different Logic subregion in reason memory space or an amount of physical memory.
In step 804, after processing chip upgrade failure, notify that main SOC upgrades again, due to notice in time, such energy
Infinitely postponed after once upgrading unsuccessfully before avoiding.
In step 805, also include checking that backup promoter region mastery routine version is the most consistent with normal promoter region, differ
Cause, again back up the mastery routine after the upgrading of normal promoter region.
In the first and second embodiment steps 802, System guides district stores original checksums code, original checksums code and liter
Level software kit obtains through principal series irrespective of size chip and is sent to System guides district.Original checksums code can be taked same with upgrading software kit
Step or asynchronous mode transmit.
In the first and second embodiment steps 802, even-odd check, Hemingway displays verification or User Defined can be used
Algorithm, substitute CRC check.Use any of the above-described kind of verification mode to obtain the first check code, and draw with from process chip carrier
The original checksums code leading subregion compares, and as the first check code differs with original checksums code, then verifies not by not entering
Row software upgrading, prompting customer upgrade is not carried out.As the first check code is same with original checksums code-phase, then by verifying and rising
Level, the currently used mastery routine deposited in the first promoter region replaces with the mastery routine in upgrading software kit；In escalation process such as
Upgrading unsuccessfully, use the method carrying out starting from the second promoter region to avoid to start from the first promoter region, the second promoter region is deposited
Be placed with the backup of currently used mastery routine, due to mastery routine currently used in the second promoter region backup at escalation process not
Destroyed, the most fully ensure upgrading security and the reliability.
In the first and second embodiment, the ultimate principle of double startup technology is that flash memory NOR Flash memory is divided into three
Individual logical partition: System guides " zloader " subregion, normal boot partition and backup subregion.System guides " zloader " subregion
In deposit the code that circulation (CRC) verifies, it first passes through the mode of CRC check and determines that the mastery routine of normal boot partition is
No have error in data, the most normally starts without mistake；When finding error in data, it is standby that software can select from memory device
Part subregion starts, thus on the basis of not increasing any hardware cost, solves OTA and upgrades and unsuccessfully cause rear end image quality
Process the technical problem that chip cannot start.
In the examples above, System guides " zloader " subregion can deposit parity check code, Hemingway displays verification generation
Code or user-defined algorithmic code, substitute and deposit CRC check code.
In the examples above, flash memory NOR Flash memory can also be divided into two logical partitions by double startup technology:
Normal boot partition and backup subregion (System guides and CRC code are all located at normal boot partition, can not change), substitute above-mentioned
One NOR Flash memory is divided into three logical partitions, but which increases System guides and CRC code is altered risk.
In the examples above, double startup technology can also use two or three NOR Flash memory, substitutes one
Individual NOR Flash memory is divided into two or three logical partitions.
It should be appreciated that the invention is not limited in precision architecture described above and illustrated in the accompanying drawings, and
And various modifications and changes can performed without departing from the scope.The scope of the present invention is only limited by appended claim.
Claims (10)
1. the method from process chip upgrade, it is characterised in that including:
Upgrading software kit is obtained by principal series irrespective of size chip；
Described upgrading software kit is loaded into from processing chip carrier the first promoter region；
Described first promoter region comprises currently used from processing chip mastery routine；
The upgrading software kit being loaded into the first promoter region is verified, generates the first check code, it is judged that the first check code is the most just
Really；If the first check code is the most i.e. upgraded, if the first check code is incorrect, do not upgrade.
It is the most according to claim 1 from the method processing chip upgrade, it is characterised in that:
Described from process chip carrier also include boot partition；
Described boot partition storage original checksums code, is contrasted with original checksums code by described first check code, it is judged that the first school
Test code the most correct.
It is the most according to claim 2 from the method processing chip upgrade, it is characterised in that:
Described from process chip carrier also include the second promoter region；
Described second promoter region storage is from the stand-by program processing chip initiation mastery routine；
If upgrading unsuccessfully, recovered to from processing chip backup mastery routine software by the second promoter region stand-by program.
It is the most according to claim 3 from the method processing chip upgrade, it is characterised in that:
After upgrading successfully, also include checking the step that the second promoter region mastery routine version is the most consistent with the first promoter region；
If inconsistent, the first promoter region mastery routine be copied to the second promoter region and again back up.
5. according to any one described in Claims 1-4 from the method processing chip upgrade, it is characterised in that: described upgrading is soft
Part bag is loaded into from processing chip carrier employing twin wire serial bus communication.
It is the most according to claim 5 from the method processing chip upgrade, it is characterised in that:
Principal series irrespective of size chip by twin wire universal serial bus is given to is connected with twin wire universal serial bus from process chip, then by
From processing chip software carrier or direct by twin wire universal serial bus by the write of described upgrading software kit from processing chip
By described upgrading software kit write be connected with twin wire universal serial bus from process chip software carrier.
7. according to any one described in Claims 1-4 from the method processing chip upgrade, it is characterised in that: principal series irrespective of size core
Sheet downloads from a server upgrading software kit by own network interface module.
8. according to any one described in Claims 1-4 from the method processing chip upgrade, it is characterised in that: principal series irrespective of size core
Sheet is determined whether this model from the upgrading software kit processing chip model by network detection server；If in server
From the version number of the upgrading software kit processing chip higher than from processing software version number chip, principal series irrespective of size chip is automatically or root
Upgrading software kit is manually downloaded in the instruction selecting upgrading according to user.
9. according to the method from process chip upgrade described in any one of claim 3 or 4, it is characterised in that: first starts
District and the Different Logic subregion that the second promoter region is in two different amount of physical memory or an amount of physical memory；Institute
Stating carrier is solid-state memory or solid-state storage module.
10. the device from process chip upgrade, it is characterised in that including:
Download module, for downloading from a server from the upgrading software kit processing chip by principal series irrespective of size chip；
Programming module, is connected with described download module, for writing download from process from the upgrading software kit processing chip
In chip software carrier the first promoter region；First promoter region comprises currently used from processing chip mastery routine；
AKU inspection module, is connected with described programming module, for the upgrading software kit being loaded into the first promoter region is carried out school
Test, generate the first check code, it is judged that the first check code is the most correct；If the first check code is the most i.e. upgraded, if the first school
Test code incorrect, do not upgrade.
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| CN107608693A (en) * | 2017-09-04 | 2018-01-19 | 深圳英飞拓科技股份有限公司 | version upgrading method and terminal device |
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| CN111638900A (en) * | 2020-05-15 | 2020-09-08 | 哈尔滨市科佳通用机电股份有限公司 | IAP (Internet access protocol) online upgrading method for locomotive signal equipment |
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| CN111787378B (en) * | 2020-06-28 | 2022-06-28 | 海信视像科技股份有限公司 | Software upgrading method applied to remote control device and remote control device |
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| CN113254048A (en) * | 2021-06-21 | 2021-08-13 | 深之蓝(天津)水下智能科技有限公司 | Method, device and equipment for updating boot program and computer readable medium |
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| CN116795452A (en) * | 2023-07-20 | 2023-09-22 | 龙芯中科(北京)信息技术有限公司 | Method, device and equipment for determining compatibility of driving program |
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