CN106292983B - Dual-power supply circuit of USB storage system - Google Patents

Dual-power supply circuit of USB storage system Download PDF

Info

Publication number
CN106292983B
CN106292983B CN201610675788.5A CN201610675788A CN106292983B CN 106292983 B CN106292983 B CN 106292983B CN 201610675788 A CN201610675788 A CN 201610675788A CN 106292983 B CN106292983 B CN 106292983B
Authority
CN
China
Prior art keywords
power supply
pole
tube
storage system
usb
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201610675788.5A
Other languages
Chinese (zh)
Other versions
CN106292983A (en
Inventor
高臣
郑雍
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tianjin Embedtec Co Ltd
Original Assignee
Tianjin Embedtec Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tianjin Embedtec Co Ltd filed Critical Tianjin Embedtec Co Ltd
Priority to CN201610675788.5A priority Critical patent/CN106292983B/en
Publication of CN106292983A publication Critical patent/CN106292983A/en
Application granted granted Critical
Publication of CN106292983B publication Critical patent/CN106292983B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/263Arrangements for using multiple switchable power supplies, e.g. battery and AC
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/141Battery and back-up supplies

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The invention relates to a dual-power supply circuit of a USB storage system, which comprises a system power supply 5V power supply, a USB power supply 5V power supply, a first NMOS (N-channel metal oxide semiconductor) tube, a second NMOS tube, a first PMOS tube, a second PMOS tube, a first resistor and a second resistor. The invention adopts two NMOS tubes to form an interlocking circuit, so that the output mode can be controlled and selected according to different power supply modes, thereby realizing that the USB storage system can work by using an external power supply and can also work by using equipment with a USB port reading function in an off-line manner, overcoming the defect that the prior art can not adapt to the system, and having the characteristics of simple structure, reliable work, strong applicability and the like.

Description

Dual-power supply circuit of USB storage system
Technical Field
The invention belongs to the technical field of power supply of a USB storage system, and particularly relates to a dual-power supply circuit of the USB storage system.
Background
At present, when some USB storage systems are applied, the USB storage system exists in a large system with multiple peripherals, the large system supplies power to all single boards, and the USB storage system often needs to work in a single USB power supply state, so as to read data in the USB storage system offline. However, the USB storage system cannot be taken out of the large system alone, and if the USB storage system is directly connected to a USB port of a PC computer or the like or cannot meet the power supply requirement of the entire large system, the USB storage system cannot work normally, which results in a failure in reading.
Disclosure of Invention
The present invention is directed to solve the above-mentioned problems and to provide a dual power supply circuit for a USB storage system, which not only can enable the USB storage system to work with an external power supply, but also can work offline with a device having a USB port reading function.
In order to achieve the purpose, the invention adopts the following technical scheme:
a dual-power supply circuit of a USB storage system comprises a system power supply 5V, a USB power supply 5V, a first NMOS tube, a second NMOS tube, a first PMOS tube, a second PMOS tube, a first resistor and a second resistor; the system power supply 5V power supply is connected with the S pole of a first NMOS tube, the USB power supply 5V power supply is connected with the S pole of a second NMOS tube, one end of a first resistor is connected with the S pole of the first NMOS tube, the other end of the first resistor is connected with the G pole of a first PMOS tube, one end of a second resistor is connected with the S pole of the second NMOS tube, the other end of the second resistor is connected with the G pole of the second PMOS tube, the G pole of the first PMOS tube is connected with the G pole of the second NMOS tube, the D pole of the first PMOS tube is connected with the G pole of the first NMOS tube, the S pole of the first PMOS tube is grounded, the G pole of the second PMOS tube is connected with the G pole of the first NMOS tube, the D pole of the second PMOS tube is connected with the G pole of the second NMOS tube, the S pole of the second PMOS tube is grounded, and the D pole of the first NMOS tube is connected with the D pole of the second NMOS tube and then connected with the power supply.
Compared with the prior art, the invention adopts the two NMOS tubes to form the interlocking circuit, so that the output mode can be controlled and selected according to different power supply modes, thereby realizing that the USB storage system can work by using an external power supply and can also work by using equipment with a USB port reading function in an off-line manner, overcoming the defect that the prior art cannot be adapted in the system, and having the characteristics of simple structure, reliable work, strong applicability and the like.
Drawings
FIG. 1 shows a schematic diagram of a dual power supply circuit of a USB memory system according to the present invention.
Detailed Description
The essential features and advantages of the invention will be further explained below with reference to examples, but the invention is not limited to the examples listed.
Referring to fig. 1, a dual power supply circuit of a USB storage system is an interlocking power management circuit, including:
the power supply circuit comprises a system power supply 5V power supply 1, a USB power supply 5V power supply 2, a first NMOS tube 4, a second NMOS tube 5, a first PMOS tube 6, a second PMOS tube 7, a first resistor 8 and a second resistor 9;
the system power supply 5V power supply 1 is connected with the S pole of a first NMOS tube 4, the USB power supply 5V power supply 2 is connected with the S pole of a second NMOS tube 5, one end of a first resistor 8 is connected with the S pole of the first NMOS tube 4, the other end of the first resistor 8 is connected with the G pole of a first PMOS tube 6, one end of a second resistor 9 is connected with the S pole of the second NMOS tube 5, the other end of the second resistor 9 is connected with the G pole of the second PMOS tube 7, the G pole of the first PMOS tube 6 is connected with the G pole of the second NMOS tube 5, the D pole of the first PMOS tube 6 is connected with the G pole of the first NMOS tube 4, the S pole of the first PMOS tube 6 is grounded, the G pole of the second PMOS tube 7 is connected with the G pole of the first NMOS tube 4, the D pole of the second PMOS tube 7 is connected with the G pole of the second NMOS tube 5, the S pole of the second PMOS tube 7 is grounded, and the D pole of the first NMOS tube 4 is connected with the D pole of the second NMOS tube 5 and then connected with the USB storage system.
And the first NMOS tube 4 is used for conducting a system power supply 5V power supply 1 to the power supply input end 3 of the USB storage system. And the second NMOS tube 5 is used for conducting the USB power supply 5V power supply 2 to the USB storage system power supply input end 3.
The first PMOS tube 6 is used for controlling the opening and closing of the first NMOS tube 4, and the second PMOS tube 7 is used for controlling the opening and closing of the first NMOS tube 6.
The first resistor 8 is used for controlling the first PMOS transistor 6 to be opened and closed, and the second resistor 9 is used for controlling the second PMOS transistor 7 to be opened and closed.
When the system power supply 5V power supply 1 supplies power and the USB power supply 5V power supply 2 does not supply power, the G pole of the first PMOS tube 6 is pulled up through the first resistor 8, so that the first PMOS tube 6 is conducted, the first NMOS tube 4 is conducted, and the system power supply 5V power supply 1 is transmitted to the USB storage system power supply input end 3 through the first NMOS tube 4. Meanwhile, the first PMOS tube 6 is conducted, so that the G pole of the second PMOS tube 7 is pulled down, the second PMOS tube 7 is turned off, the second NMOS tube 5 is also turned off, the power supply input end 3 of the USB storage system cannot influence the USB power supply 5V power supply 2, and the USB storage system can normally work.
When the USB 5V power supply 2 supplies power and the system 5V power supply 1 does not supply power, the second resistor 9 pulls up the G pole of the second PMOS tube 7 to conduct the second PMOS tube 7, so that the second NMOS tube 5 is conducted, and the USB 5V power supply 2 is transmitted to the USB storage system power supply input end 3 through the second NMOS tube 5. Meanwhile, the second PMOS tube 7 is conducted, so that the G pole of the first PMOS tube 6 is pulled down, the first PMOS tube 6 is turned off, the first NMOS tube 4 is also turned off, the power supply input end 3 of the USB storage system cannot output the power supply 5V power supply 1 of the system, the USB storage system can work normally, the power supply 5V power supply 2 of the USB storage system cannot supply power to an external system, and the equipment (such as a PC (personal computer) and the like) for supplying the USB power cannot be influenced.
The circuit of the invention is mainly used in a system of which the USB storage system needs to work off line, in particular to the circuit when other functional modules in the system and the USB storage system use the same power supply.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (1)

1. A dual-power supply circuit of a USB storage system is characterized by comprising a system power supply 5V power supply, a USB power supply 5V power supply, a first NMOS tube, a second NMOS tube, a first PMOS tube, a second PMOS tube, a first resistor and a second resistor; the system power supply 5V power supply is connected with the S pole of a first NMOS tube, the USB power supply 5V power supply is connected with the S pole of a second NMOS tube, one end of a first resistor is connected with the S pole of the first NMOS tube, the other end of the first resistor is connected with the G pole of a first PMOS tube, one end of a second resistor is connected with the S pole of the second NMOS tube, the other end of the second resistor is connected with the G pole of the second PMOS tube, the G pole of the first PMOS tube is connected with the G pole of the second NMOS tube, the D pole of the first PMOS tube is connected with the G pole of the first NMOS tube, the S pole of the first PMOS tube is grounded, the G pole of the second PMOS tube is connected with the G pole of the first NMOS tube, the D pole of the second PMOS tube is connected with the G pole of the second NMOS tube, the S pole of the second PMOS tube is grounded, and the D pole of the first NMOS tube is connected with the D pole of the second NMOS tube and then connected with the power supply.
CN201610675788.5A 2016-08-17 2016-08-17 Dual-power supply circuit of USB storage system Active CN106292983B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610675788.5A CN106292983B (en) 2016-08-17 2016-08-17 Dual-power supply circuit of USB storage system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610675788.5A CN106292983B (en) 2016-08-17 2016-08-17 Dual-power supply circuit of USB storage system

Publications (2)

Publication Number Publication Date
CN106292983A CN106292983A (en) 2017-01-04
CN106292983B true CN106292983B (en) 2020-03-17

Family

ID=57678574

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610675788.5A Active CN106292983B (en) 2016-08-17 2016-08-17 Dual-power supply circuit of USB storage system

Country Status (1)

Country Link
CN (1) CN106292983B (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103793033A (en) * 2012-10-29 2014-05-14 鸿富锦精密工业(武汉)有限公司 USB power supply circuit
CN104252216A (en) * 2013-06-28 2014-12-31 鸿富锦精密工业(武汉)有限公司 Anti-creeping USB (universal serial bus) power supply circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101515860B1 (en) * 2005-10-17 2015-05-04 삼성전자 주식회사 Usb circuit device for preventing reverse current from external device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103793033A (en) * 2012-10-29 2014-05-14 鸿富锦精密工业(武汉)有限公司 USB power supply circuit
CN104252216A (en) * 2013-06-28 2014-12-31 鸿富锦精密工业(武汉)有限公司 Anti-creeping USB (universal serial bus) power supply circuit

Also Published As

Publication number Publication date
CN106292983A (en) 2017-01-04

Similar Documents

Publication Publication Date Title
US11202358B2 (en) Discharge method and circuit for USB connector
TWI639083B (en) Usb peripheral device detection on an unpowered bus
US9977475B2 (en) Over voltage protection for a communication line of a bus
JP4944214B2 (en) Peripheral device and operation method thereof
TWI574149B (en) Interface supply circuit
US9141575B2 (en) Power supply circuit for universal serial bus interface
US9207697B2 (en) Control chip and connection module utilizing the same
TWI474179B (en) System for connecting multiple devices
CN106292983B (en) Dual-power supply circuit of USB storage system
US9564888B2 (en) Voltage generation apparatus
EP3039506B1 (en) Power management in a circuit
US20160274650A1 (en) Interface supply circuit
US7359995B2 (en) Peripheral device connection current compensation circuit
TW201626130A (en) Voltage adjust apparatus for electronic device
US20170093388A1 (en) Over voltage tolerant circuit
TWI744581B (en) Electronic device and powering method thereof
US20140210537A1 (en) Electronic device
CN102808795A (en) Fan control circuit
US9742396B2 (en) Core voltage reset systems and methods with wide noise margin
TW201617770A (en) Fan supply circuit
TWI590022B (en) Circuit for transforming voltage
US9229502B2 (en) Fast wake-up of differential receivers using common mode decoupling capacitors
TWI740632B (en) Computer apparatus and power gating circuit
KR20120098303A (en) Data transmission circuit
US20190229731A1 (en) Power gating circuit for holding data in logic block

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant