CN106168926B

CN106168926B - Memory allocation method based on linux partner system

Info

Publication number: CN106168926B
Application number: CN201610338920.3A
Authority: CN
Inventors: 朱宗卫
Original assignee: Individual
Current assignee: Individual
Priority date: 2016-05-20
Filing date: 2016-05-20
Publication date: 2023-07-07
Anticipated expiration: 2036-05-20
Also published as: CN106168926A

Abstract

The invention discloses a memory allocation method based on a linux partner system, which is characterized by comprising the steps of distinguishing and marking idle blocks according to memory banks in advance, and preferentially allocating the idle blocks with the same bank number according to the bank number sequence when an application program applies for a memory. The PASR algorithm based on the Bank-active memory allocation strategy effectively reduces the power consumption in the standby state of the system and improves the battery endurance capacity of the mobile equipment.

Description

Memory allocation method based on linux partner system

Technical Field

The invention belongs to the technical field of standby power consumption optimization of embedded equipment, and particularly relates to a memory allocation method based on a linux partner system.

Background

Along with the rapid development of smart phones, the contradiction between the power consumption and the performance of traditional computers has been highlighted on smart phones for a long time, and the following main reasons are: first, the improvement speed of the performance of the smart phone far exceeds the development speed of a common computer. Thanks to the technological accumulation in traditional computers, the speed of smart phone CPUs has experienced an abnormally rapid growth in the last few years. Second, the rise in battery manufacturing technology is far behind the rise in power demand. Compared with the rapid increase of the calculation speed of the smart phone, the increase of the capacity of the mobile phone battery is very slow, mainly because the manufacturing process of the mobile phone battery is slow to develop, which is far behind the development speed of the integrated circuit for CPU manufacturing. In addition, the volume of a smart phone is greatly limited due to its essential characteristics as a mobile device. Under the trend of lighter and thinner global smart phone manufacturing, the body of the smart phone can be called as "the body of the smart phone is full of money", and each space is utilized to the greatest extent. The difficulty of optimizing or improving the manufacturing process of the battery to meet the electric quantity requirement of the smart phone which is rapidly developed is increasing depending on the structural design of the smart phone, and a new means for improving the cruising ability of the smart phone is not easy to solve.

As a memory of the smart phone, its energy consumption occupies a considerable specific gravity of the energy consumption of the whole phone, especially in a standby state. Unlike SRAM, DRAM requires periodic self-refresh to maintain the data it holds from being lost. The current self-refresh policy for DRAMs is global self-refresh, i.e., self-refresh the entire DRAM periodically. If a portion of the DRAM does not hold data, it is apparent that periodic self-refresh for that portion of the DRAM is unnecessary, which results in wasted power consumption. The local array self-refresh (PASR) strategy of DRAM can solve this problem well. PASR means that only banks storing data are periodically self-refreshed for the entire DRAM.

However, linux is now physically discrete. For the memory requirements of the kernel, linux memory management systems tend to allocate from memory areas of low physical addresses; while memory requirements for user processes tend to be allocated from memory regions of high physical addresses. And as the process continues to create and dissipate the reciprocating cycle, the problem of fragmentation in the memory is unavoidable, which also aggravates the degree of discretization of the physical memory. The present invention is derived therefrom.

Disclosure of Invention

The invention aims to provide a memory allocation method based on a linux partner system, which solves the problems that the existing linux partner system in the prior art has higher power consumption, and hard migration aggregation of a large amount of memory data can bring about small system overhead, and meanwhile, memory data loss and the like can cause influence on the stability and safety of the system.

In order to solve the problems in the prior art, the technical scheme provided by the invention is as follows:

a memory allocation method based on a linux partner system is characterized by comprising the steps of marking the memory bank numbers of idle blocks according to different memory banks in advance, and preferentially allocating the idle blocks with the same bank numbers according to the bank numbers when an application program applies for a memory.

In a preferred technical scheme, after the memory bank numbers are marked by the method, an idle block linked list with the same idle block level (order) and different bank numbers is formed, wherein the idle block levels are 0, 1,2, 3, 4, 5, 6, 7, 8, 9 and 10 in sequence, and idle blocks with the corresponding idle block levels sequentially comprise 1,2,4,8, 16, 32, 64, 128, 256, 512 and 1024 continuous idle page frames.

In a preferred technical scheme, in the method, idle block levels (orders) are divided according to a splitting rule of a linux partner system, the idle block levels are sequentially 0, 1,2, 3, 4, 5, 6, 7, 8, 9 and 10, and each idle block sequentially comprises idle page frames with the sizes of 1,2,4,8, 16, 32, 64, 128, 256, 512 and 1024 continuous idle page frames.

In a preferred technical scheme, when an application program applies for a memory, traversing idle blocks with the same bank number according to the priority sequence of idle block levels; if the idle blocks with the same level are found, the traversal is terminated; otherwise, traversing the idle block of the next bank number according to the bank number, and circulating until the idle block meeting the requirement is found or the allocation fails to return.

In the preferred technical scheme, when an application program applies for the memory, traversing idle blocks with the same level according to the priority sequence of the bank numbers; if the idle blocks with the same level are found, the traversal is terminated; otherwise, continuing to traverse the idle block of the next level, and circulating until the idle block meeting the requirement is found or the allocation fails to return.

In the preferred technical scheme, when the memory is initialized in the method, if the application program requests the memory to find the idle blocks with the same level, the linux partner system splits the idle blocks into the idle blocks with the next level of the partner according to the order from the higher level to the lower level; if the application program requests the memory to still find the idle blocks meeting the requirement, the method continues to split until the idle blocks with the same level are found.

In the preferred technical scheme, if the application releases the memory in the method, whether the partner block of the released memory idle block is idle or not is judged; if the partner block is an idle block, the idle block is merged according to the merging rule of the linux partner system; this is looped until no merging can take place.

The invention also aims at a memory refreshing method of the linux system equipment, which is characterized in that the method comprises the step of closing refreshing of the whole memory bank according to self-refreshing configuration of a memory part array when the memory block of the whole bank is an idle block and the linux system equipment is in a deep sleep state.

In a preferred technical scheme, the method further comprises the step of closing the self-refresh configuration of the memory part array when the linux system equipment wakes up from a deep sleep state or enters a shallow sleep state, and refreshing the whole memory bank again.

According to the division of the linux partner system, all the idle page frames are grouped into 11 types of idle block linked lists, each idle block linked list sequentially comprises 1,2,4,8, 16, 32, 64, 128, 256, 512 and 1024 continuous idle page frames, and the order of the idle block linked lists is 0, 1,2, 3, 4, 5, 6, 7, 8, 9 and 10.

Partner system

The partner system is the core of Linux physical memory management. The buddy system groups all free page frames into 11 block linked lists, each block linked list containing 1,2,4,8, 16, 32, 64, 128, 256, 512, and 1024 consecutive page frames, respectively. The maximum request for 1024 page frames corresponds to a contiguous RAM block of 4MB size. The physical address of the first page frame of each block is an integer multiple of the block size. For example, a block of size 16 page frames has a start address that is a multiple of 16 x 4096 (which is the size of a regular page).

Assume that a block of 256 page frames (i.e., 1 MB) is to be requested. The algorithm first checks the linked list of 256 page frames for a free block. If there are no such blocks, the algorithm will find the next larger page block, i.e., find a free block in a linked list of 512 page frames. If such a block is present, the kernel splits the 512 page frame block into two equal parts, half serving as a request, and the other half inserted into a linked list of 256 page frames. If no free block is found in the block chain table of 512 page frames, then the search for a larger free block, a 1024 page frame free block, is continued. If such a block exists, the kernel divides 1024 page frame blocks into two equal parts of 512 page frame blocks, inserts one of the 512 page frame blocks into a linked list of 512 page frame blocks, and continues dividing the other 512 page frame blocks into two equal parts of 256 page frame blocks, one of which is inserted into a linked list of 256 page frame blocks, and the other serves to fulfill the request. If the linked list of 1024 page frames is still empty, the algorithm discards the concurrency error signal.

The reverse process of the above process is the release process of the page frame block and is the result of the name of the algorithm. The kernel attempts to merge a pair of idle partner blocks of size b into a single block of size 2 b. Two blocks that meet the following conditions are called partners: a. two blocks have the same size, denoted b, b their physical addresses are consecutive, c the physical address of the first page frame of the first block is a multiple of 2 x b x 4096. The algorithm is iterative and if it successfully merges the released blocks, it will attempt to merge blocks of size 2b to again attempt to form larger blocks.

The physical memory of each memory node (node) is divided into 3 management areas (zones): ZONE_DMA (0-16M), ZONE_NORMAL (16M-896M), ZONE_HIGHEMEM (896M-MAX). By dividing into different management areas, the kernel defines a hierarchy of memory, and first attempts to allocate "inexpensive" memory when there is a memory request. If it fails, it gradually tries to allocate "more expensive" memory, depending on access speed and capacity.

High-end memory (zonehmem) is the cheapest since the kernel does not depend in part on the memory allocated from this memory domain, and if the high-end memory domain is exhausted, there is no side effect on the kernel, which is why the high-end memory is allocated preferentially. The case of the NORMAL memory domain (zon_normal) is different. Many kernel data structures must be stored in this memory domain and cannot be placed in high-end memory domains. Thus if the normal memory is completely exhausted, the kernel is exposed to an emergency. So as long as the memory of the high-end memory domain is not used up, the memory is not allocated from the normal memory domain. The most expensive is the DMA memory domain (zon DMA) because it is used for data transfer between peripherals and the system. Therefore, the allocation of memory from the memory domain is the last resort.

Each management area is divided into a plurality of free_areas according to the difference of the free memory block levels (orders). The c language pseudocode of the memory management area is as follows:

struct zone {

……

/*

* Free memory blocks of different sizes

*/

struct free_area[MAX_ORDER];

……

};

struct free_area {

struct list_head free_list[MIGRATE_TYPES];

unsigned long nr_free;

};

It can be seen that each free_area is divided into a plurality of free_lists according to different migration types (migrattypes). nr_free represents the number of all free blocks in the free_area. Where migrattype is not considered, this does not have an impact on the bank. Thus, an organizational chart of the Linux partner system is shown in FIG. 1. If a memory domain with 2 page frames is requested, the partner algorithm searches the free block in the free_list linked list of free_area [1] firstly, and if the free block is found, the partner algorithm returns directly; otherwise, searching, decomposing and distributing the tree_list linked list of the tree_area with larger tree_area according to the algorithm logic until the distribution request is met or the distribution fails.

Memory allocation strategy for aggregation (Bank-Intertive)

The Linux partner system simply and efficiently manages the allocation and release of the memory. The memory centralized allocation strategy for the Bank aggregation in the technical scheme of the invention is to allocate memory blocks in the specified banks according to requirements when the memory is allocated by modifying the partner system, so as to achieve the allocation effect of the Bank aggregation.

The structure organization of the existing partner system does not have the concept of a Bank, so that the existing partner system cannot sense the existence of the Bank, and memory allocation of the Bank aggregation cannot be achieved. The bank of the invention is a logic bank, namely an L-bank, and the inside of the SDRAM is a memory array. The memory array and the table are the same in retrieval principle, a Row (Row) is designated first, and then a Column (Column) is designated, so that a required memory cell can be accurately found, which is the basic principle of memory chip addressing. The memory array is a Logical Bank (L-Bank).

According to the technical scheme, the structure organization of the linux partner system is modified, a layer of Bank structure is added, free_list is subdivided, idle blocks are reorganized, and the idle blocks are hung in the corresponding bank_free_list according to the Bank numbers of the idle blocks. Fig. 2 is a structural organization diagram of the linux partner system after modification. For the free memory blocks with the same order, the free memory blocks are suspended in the same free_list linked list in the original partner system without distinction; the modified partner system hangs these free blocks on different free_lists according to their different Bank numbers.

The modified linux partner system does not delete some data structures related to the original partner system structure organization, but only adds some data structures to assist in realizing a memory allocation strategy of Bank aggregation (Bank-interive).

Typical implementations are as follows, adding a member bank_free_list in struct free_area, as shown in the following C language pseudocode:

struct free_area {

……

/*

* Dividing the free blocks in a free list into a plurality of Bank free lists according to different Bank numbers

* Wherein NR_BANKS_PASR represents the number of BANKS

*/

struct list_head bank_free_list[MIGRATE_TYPES][NR_BANKS_PASR];

……

};

The member bank_list is added in the struct page as shown in the following C language pseudocode:

struct page {

……

/*

* This bank _ list field holds pointers to adjacent elements in the bank _ free _ list,

* That is, the free blocks in the bank_free_list are linked by the bank_list field in the struct page

*/

struct list_head bank_list;

……

};

By adding the bank_free_list and the bank_list, the idle blocks in one free_list are divided into a plurality of bank_free_lists according to different Bank numbers; and the bank_list field stores pointers to adjacent elements in the bank_free_list linked list, and each free block in the bank_free_list is linked by the bank_list field in the struct page. Thus, the bank numbers are seamlessly inserted into the idle block chain table of the partner system, and the method can be used as a basis for realizing bank aggregation.

Memory allocation policy

From the angle of selecting the banks, the sub-allocation strategies can be divided into a plurality of allocation strategies such as allocation according to the increasing order or the decreasing order of the Bank numbers, allocation of the designated banks, allocation according to the utilization rate of the banks and the like; from the perspective of the extent of Bank aggregation, the sub-allocation strategy can be divided into an Order-Bank strategy (conservative strategy) and a Bank-Order strategy (aggressive strategy). The sub-allocation policies divided from two angles may be combined into one complete allocation policy every two.

The allocation strategy is explained in connection with fig. 2. It is assumed that the Order-Bank policy and the Bank-Order policy are combined, respectively, according to the Bank number ascending Order allocation.

Strategy

Assuming that a free block of 1 page frame is required, the free_area [0] - > bank [0] is firstly searched in the bank_free_list, and if the free block meeting the requirement exists, the method directly returns. If not, the method searches in the bank_free_list of the free_area [0] - > bank [1] and traverses the bank [2] and the bank_free_list of the bank [3] … in sequence until the free block meeting the requirement is found. If not found in free_area [0], the method searches in free_area [1] and free_area [2] … … again, and the search sequence is the same as that in free_area [0] until the request is met or the allocation fails to return.

Strategy

Assuming that a free block of 1 page frame is required, the free_area [0] - > bank [0] is firstly searched in the bank_free_list, and if the free block meeting the requirement exists, the method directly returns. If not, the method searches in the bank_free_list of the free_area [1] - > bank [0] and traverses the bank_free_list of the bank [0] in the free_area [2] and the free_area [3] … … sequentially until the free block meeting the requirement is found. If not found in the bank [0] of each free_area, searching in the bank [1] of each free_area, wherein the searching sequence is the same as that of the bank [1] until the request is met or the allocation fails to return.

And how the memory allocation strategy based on the bank aggregation is used in the real linux intelligent device. The invention provides an implementation mode for realizing power consumption optimization of a linux intelligent device, in particular to optimization of memory power consumption. In a specific implementation, the technical scheme of the invention is illustrated by taking Android intelligent equipment as an example.

PASR configuration in standby flow

To perform PASR control, first, there should be free banks, and in order to achieve a better energy saving effect, as many banks as possible should be free. According to the Linux physical memory layout, only the discrete memory layout is adjusted, and the memory data is gathered and migrated, so that as many banks as possible can be free, and effective PASR control can be performed, so that a better energy-saving effect is achieved. The memory data aggregation and migration is to aggregate the effective data in the memory to some banks so as to free up as many banks as possible. The most direct method for realizing memory data aggregation and migration is to transfer hard aggregation of memory data to some banks and free other banks when the system is about to perform PASR control. However, the hard migration aggregation for a large amount of memory data may bring about not only small system overhead, but also various problems that the stability and safety of the system are affected due to the loss of the memory data.

Aiming at the problem of hard aggregation and migration of memory data, the technical scheme of the invention provides a memory allocation strategy of Bank aggregation (Bank-active). According to the strategy, by modifying the Linux memory management system, memory data are gathered on certain banks as much as possible in a memory allocation stage, and the power consumption benefit brought by PASR is greatly improved.

The configuration involves security issues of the memory data, so how to select PASR configuration opportunities is important. The creation, running and extinction of the process in the system are often accompanied by the allocation and release of the memory, so that the memory is always in a relatively active state, which is unfavorable for PASR configuration. In the early_suspend (light sleep) state of Android, part of processes still run, and only when the processes enter the Suspend (deep sleep) state of standard Linux, all processes except the working process are frozen, at the moment, the system basically does not have memory allocation and release operations, the memory state is relatively calm, PASR configuration can be carried out, and refresh operation of part of idle banks is stopped to reduce memory power consumption in standby. When the system is awakened from the sleep state, the reset configuration of the PASR should be performed first, and the refresh operation of the idle banks is started, because the system often performs a large amount of memory allocation at this time, if the memory allocation falls into the idle banks for which the refresh operation is not started, partial memory data is lost, and even more serious consequences are brought.

Timing of configuration

In standard Linux, dormancy mainly includes three main steps: (1) freezing user-mode processes and kernel-mode tasks; (2) And calling a callback function of the suspend of the registered device, wherein the calling sequence is according to the registration sequence when the driver is loaded. (3) The hibernation core device and the CPU being put into a hibernation state to freeze the process is that the kernel sets the state of all processes in the process list to stop and keeps the context of all processes down. When these processes are thawed, they are unaware that they have frozen themselves, simply continuing execution. From the above analysis, the setting time of the PASR should be selected before the core device enters the sleep state, and similarly, the core device should immediately execute the reset operation of the PASR after being awakened, and open the refresh operation of the idle Bank. By analyzing the P6s platform kernel source code (version number 3.0.8), the code position of the system entering the dormant state is determined, as shown in the following C language pseudo code:

/*

*File:arch/arm/mach-hi6620/pwrctrl/sleepMgr/pwrctrl_sleep.c

*/

s32_t pwrctrl_deep_sleep(suspend_state_t state)

{

……

pwrctrl_asm_deep_sleep_entry ();// sleep entry function

……

}

The pwrctrl_asm_deep_sleep_entry function is written by assembly language, is an entry for the system to completely enter a sleep state, and should perform PASR setting and close the self-refresh operation of the idle Bank before executing the function; the system is awakened and returns from the function, so that the PASR reset operation is performed immediately after the function, and the self-refresh operation of the idle Bank is restarted.

PASR setup before system dormancy

In the memory allocation strategy of the Bank aggregation, the page frame use condition in each Bank is counted in real time. When PASR is set, firstly, the idle banks are identified according to the page frame use condition in each Bank, and then the self-refresh of the idle banks is closed by reading and writing registers related to the self-refresh of the banks. The core operation steps are as follows, as indicated by the following C language pseudocode:

/*

*File:arch/arm/mach-hi6620/pwrctrl/sleepMgr/pwrctrl_sleep.c

*/

static void __iomem *REG_BASE_DDRC_DMC0_VIRT = 0;

int pasr_set_segment(int rank)

{

……

for(i = 0+rank_tmp*8; i<(rank_tmp+1)*8; i++)

{

if (nr_free_pages_per_bank [ i ] > =32768)// determining if bank [ i ] is idle

{

segment_tmp = i % 8;

segment_tmp = 1<<segment_tmp;

segment |= segment_tmp;

}

……

value= (segment < < 16) | (0 x11< < 8) | (rank < < 4) |0 x 2;// free bank set)

……

Writing/writing an idle bank set to a self-refresh control register turns off its self-refresh operation

writel(value, \ SOC_MDDRC_DMC_DDRC_CFG_SFC_ADDR(REG_BASE_DDRC_DMC0_VIRT));

……

return 0;

}

When the idle bank set is judged to be available, the idle bank set is written into the self-refresh control register to close the self-refresh operation. The self-refresh control register facilitates PASR reset after late system wakeup.

PASR reset after system wake-up

Compared with the PASR setting before dormancy, the PASR resetting operation after the system awakening is simpler, because the self-refreshing operation of all banks is only required to be set into an on state, and the idle banks of which the self-refreshing operation is closed are not required to be searched in detail and then are opened, and the operation flow is as shown in the following C language pseudo code:

/*

*File:arch/arm/mach-hi6620/pwrctrl/sleepMgr/pwrctrl_sleep.c

*/

int pasr_reset_segment(void)

{

……

value=0x0| (0x11 < < 8) | (0x3 < < 4) |0x2;// set of all banks)

……

Setting self-refresh of all banks to on state

writel(value, SOC_MDDRC_DMC_DDRC_CFG_SFC_ADDR(REG_BASE_DDRC_DMC0_VIRT));

……

return 0;

}

The PASR configuration in the standby process is completed by respectively calling the pasr_set_segment function and the pasr_reset_segment function before and after the sleep-wake function pwrctrl_asm_deep_sleep_entry, as shown in the following C language pseudo code:

/*

*File:arch/arm/mach-hi6620/pwrctrl/sleepMgr/pwrctrl_sleep.c

*/

s32_t pwrctrl_deep_sleep(suspend_state_t state)

{

……

self-refresh of hollow bank in/off rank0

Self-refresh of hollow bank in/off rank1

pwrctrl_asm_deep_sleep_entry();

Self-refresh of the/on bank

……

}

The method is to close the PASR configuration information, such as to empty the temporary storage information of the self-refresh control register, and then set all banks to be in the self-refresh state.

Compared with the scheme in the prior art, the invention has the advantages that:

the invention is based on the memory allocation strategy of Bank aggregation (Bank-interive), and the original memory allocation strategy of the Linux partner system is modified so that the memory allocation can achieve better aggregation effect relative to the Bank. Experiments on multiparty platforms prove that the aggregation effect is quite good. The PASR control is matched, the standby power consumption optimization benefit under the P6s platform reaches 23%, and the effectiveness and the practicability of the PASR algorithm are reflected. In a word, the PASR algorithm based on the Bank-active memory allocation strategy effectively reduces the power consumption in the standby state of the system and improves the battery endurance capacity of the mobile equipment.

Drawings

The invention is further described below with reference to the drawings and examples.

FIG. 1 is an original organization chart of a Linux partner system.

Fig. 2 is an organization chart of the modified linux partner system.

Fig. 3 shows the memory allocation result of the original memory allocation strategy.

FIG. 4 is a memory allocation diagram of a bank-order allocation strategy for allocation according to bank utilization.

FIG. 5 shows the usage of each segment after the system is started and stabilized.

FIG. 6 is a view of the use of segments to launch an application.

FIG. 7 is a diagram illustrating the use of each segment to launch multiple applications.

Detailed Description

The above-described aspects are further described below in conjunction with specific embodiments. It should be understood that these examples are illustrative of the present invention and are not intended to limit the scope of the present invention. The implementation conditions employed in the examples may be further adjusted depending on the conditions of the particular system, and the implementation conditions not noted are typically those in routine experiments.

Examples

Purpose of experiment

The memory allocation strategy of the Bank aggregation (Bank-integrated) realizes centralized memory allocation relative to the Bank by modifying the Linux partner system and adding a layer of Bank structure on the basis of the original structure organization. The purpose of this experiment was to test and verify the memory aggregation effect of the allocation policy.

Experiment platform

Software platform: windows XP (host) +VMware (virtual machine) +android-x86;

the experiment platform is to install a VMware virtual machine on a windows XP host machine, and run an android-x86 system in the virtual machine, so that the test and verification of the strategy are completed.

The following describes the experimental platform in detail.

The (host) adopts a 500G hard disk with a CPU model number of Intel Core2 Quad Q8400,4G internal memory.

(virtual machine) for which 2 processors are configured in the hardware environment of the host machine, 1 core per processor, 2G memory, 20G hard disk

The virtual memory specification is as follows:

DDR size 2GByte,2 rank, there are 8 banks in each rank, and the data bit is wide 32 bits, inside 4 DIEs, and every DIE data bit is wide 16 bits, and every rank comprises 2 DIEs, and two 16 bits splice into 32 bits. Table 1 is a DRAM address mapping scheme, and 1-bit rank and 3-bit Bank together constitute 16 banks.

Table 1 DRAM address mapping scheme

rank	row	bank	column	DW
					Number of bits	1	14	3	11	2
				Fixed as 2' b00

Android-x86 uses the ics-x86 version, which is based on Android4.0 (Ice Cream Sandwich).

Experimental method

The content of the test is the memory allocation in the whole process of system startup, namely the memory allocation required by the operation of the system. And after the system is started and runs stably, inserting a memory statistics module to perform statistics of memory allocation conditions. When the module is unloaded, the statistical structure of the memory allocation situation is output on the terminal.

Experimental results and analysis

Various allocation strategies mentioned by the allocation strategy are tested, and a bank-order allocation strategy for allocation according to the bank utilization rate is taken as an example, and an experimental result is analyzed.

Bank_no in fig. 3 and 4 indicates a Bank number, nr_alloc_pages indicates the number of allocated page frames in the Bank, and nr_free_pages indicates the number of free page frames in the Bank. total_nr_free_pages and total_nr_alloc_pages represent the number of free page frames and the number of allocated page frames, respectively, in the entire system. Comparing fig. 3 with fig. 4, it can be seen that: the original memory allocation strategy cannot sense the existence of the Bank, and the memory allocation is random and discrete relative to the Bank; in the band-Order allocation strategy for allocating according to the band utilization rate, the bands 9-15 are basically free, 40% of the page frames are allocated on the band 8 (26203/64086), and the aggregation effect is quite obvious.

Aggregation effect and power consumption benefit verification under platform

The prior experiments are partially performed in a virtual environment due to the limitation of the platform. The section transfers the PASR algorithm to the P6s platform for experimental testing in the real environment, including the verification of the aggregation effect of the Bank-responsive memory allocation strategy and the verification of the power consumption income brought by the aggregation effect.

The platform is provided with a Haisikirin 910 four-core processor with a main frequency of 1.6 GHZ, and the running memory RAM capacity is 2GB. The address mapping pattern of the memory DRAM is shown in Table 1.

Through looking up the chip manual and discussion analysis, the PASR controllable granularity of DRAM under P6s platform is segment (first 3 bits in row) or bank. In order to ensure that the contiguous memory blocks within the controllable granularity unit are large enough to meet the memory allocation request as much as possible, the present PASR algorithm selects segments as the basic control unit for the PASR. The effects of the Bank-Interive memory allocation policies (according to segment utilization allocation, segments with high utilization are preferentially allocated) under 3 application scenarios such as starting an application program and starting a plurality of application programs after the system is started are tested below.

FIG. 5 shows the usage of each segment after the system is started and stabilized. It can be seen that segment2, segment7 through segment12 are all completely idle. FIG. 6 is a view of the usage of each segment after the system has been started and stabilized. As can be seen, the memory allocation is focused on segment7 and segment8, segment2, segments 9 through 12 remain completely idle.

FIG. 7 is a use case of each segment to continue launching an application. As can be seen, memory allocation continues to focus on segment7 and segment8, where segment7 is more fully allocated, segment2, and segments 9 through 12 remain fully idle.

The experimental data show that the Bank-interactive memory allocation strategy also shows excellent aggregation allocation effect under the P6s platform, and fully uses occupied segments to idle more segments for PASR control. In combination with PASR configuration in the Android standby flow, self-refresh of idle segments is closed when the system enters a standby state, and power consumption benefits are tested, so that in the original standby state, the average current of the system is 2.60mA, and after PASR control based on a Bank-active memory allocation strategy is started, the average current is reduced to 2.00mA, and the benefits reach 23%. The analysis causes can easily find that 7 segments are completely idle after the system is started smoothly (as shown in fig. 5), and the PASR control turns off the self-refresh operation of the 7 idle segments by configuring the relevant registers, thus bringing the above power consumption benefits.

The above embodiments are provided to illustrate the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the present invention and implement the same according to the present invention, not to limit the scope of the present invention. All equivalent changes or modifications made according to the spirit of the present invention should be included in the scope of the present invention.

Claims

1. The memory allocation method based on the linux partner system is characterized by comprising the steps of marking the free blocks with memory bank numbers according to different memory banks in advance, and preferentially allocating the free blocks with the same bank number according to the bank numbers when an application program applies for a memory; the method comprises the steps of marking memory bank numbers to form a free block linked list of different bank numbers of the same free block level (order), wherein the free block level is 0, 1,2, 3, 4, 5, 6, 7, 8, 9 and 10 in sequence, and the free blocks of the corresponding free block level sequentially comprise continuous free page frames with the sizes of 1,2,4,8, 16, 32, 64, 128, 256, 512 and 1024.

2. The memory allocation method according to claim 1, wherein the idle block levels (orders) in the method are divided according to a split rule of a linux partner system, the idle block levels are sequentially 0, 1,2, 3, 4, 5, 6, 7, 8, 9, 10, and each idle block sequentially contains 1,2,4,8, 16, 32, 64, 128, 256, 512, and 1024 consecutive idle page frames.

3. The memory allocation method according to claim 1, wherein when an application program applies for memory, the method traverses idle blocks with the same bank number according to the priority order of idle block levels; if the idle blocks with the same level are found, the traversal is terminated; otherwise, traversing the idle block of the next bank number according to the bank number, and circulating until the idle block meeting the requirement is found or the allocation fails to return.

4. The memory allocation method according to claim 1, wherein when an application program applies for memory, the method traverses idle blocks of the same level according to the priority order of bank numbers; if the idle blocks with the same level are found, the traversal is terminated; otherwise, continuing to traverse the idle block of the next level, and circulating until the idle block meeting the requirement is found or the allocation fails to return.

5. The memory allocation method according to claim 1, wherein when the memory is initialized in the method, if the application program requests the memory to find the idle blocks with the same level, the linux partner system splits the idle blocks into the idle blocks with the next level of the partner according to the order from the higher level to the lower level; if the application program requests the memory to still find the idle blocks meeting the requirement, the method continues to split until the idle blocks with the same level are found.

6. The memory allocation method according to claim 1, wherein if the application releases the memory, it is determined whether the partner block of the released memory free block is free; if the partner block is an idle block, the idle block is merged according to the merging rule of the linux partner system; this is looped until no merging can take place.