CN106156763B - Fingerprint identification module and fingerprint identification method - Google Patents
Fingerprint identification module and fingerprint identification method Download PDFInfo
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- CN106156763B CN106156763B CN201610675857.2A CN201610675857A CN106156763B CN 106156763 B CN106156763 B CN 106156763B CN 201610675857 A CN201610675857 A CN 201610675857A CN 106156763 B CN106156763 B CN 106156763B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1306—Sensors therefor non-optical, e.g. ultrasonic or capacitive sensing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/1347—Preprocessing; Feature extraction
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/1347—Preprocessing; Feature extraction
- G06V40/1359—Extracting features related to ridge properties; Determining the fingerprint type, e.g. whorl or loop
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Abstract
The invention discloses a fingerprint identification module and a fingerprint identification method, wherein the fingerprint identification module comprises a fingerprint acquisition circuit, a compensation circuit, a noise suppression circuit, an integral operation circuit, a digital-to-analog conversion circuit and a controller; the output end of the fingerprint acquisition circuit is a node A and is connected with the input end of the integral operation circuit, the output end of the integral operation circuit is connected with the fingerprint input end of the controller through a digital-to-analog conversion circuit, the output end of the compensation circuit is connected with the compensation end of the fingerprint acquisition circuit, the compensation control end of the compensation circuit is connected with the compensation circuit control end of the controller, the test signal output end of the noise suppression circuit is connected with the node A, and the test control end of the noise suppression circuit is connected with the noise test control end of the controller. The invention can amplify the signal difference between the fingerprint valley signal and the fingerprint ridge signal through the compensation circuit, and can eliminate the fingerprint noise in the circuit through the noise suppression circuit so as to realize more accurate fingerprint identification.
Description
Technical Field
The invention relates to the field of fingerprint identification, in particular to a charge transfer type fingerprint identification module and a fingerprint identification method based on the fingerprint identification module.
Background
Fingerprints have become almost the pronoun of biometric identification due to their lifetime invariance, uniqueness and convenience. Fingerprint identification refers to identification by comparing minutiae of different fingerprints. Fingerprint identification technology relates to a plurality of subjects such as image processing, pattern recognition, computer vision, mathematical morphology, wavelet analysis and the like. The fingerprints of each person are different, namely the fingerprints are obviously different among the ten fingers of the same person, so that the fingerprints can be used for identity authentication. Because the directions of each time of stamping are not completely the same, different force points can bring different degrees of deformation, a large number of fuzzy fingerprints exist, and the key of the fingerprint identification technology is how to correctly extract the characteristics and realize correct matching.
Disclosure of Invention
The invention aims to: in view of the above problems, an exemplary embodiment of a charge transfer type fingerprint recognition module amplifies a signal difference between a fingerprint valley signal and a fingerprint ridge signal by a compensation circuit, and eliminates fingerprint noise in the circuit by a noise suppression circuit to realize more accurate fingerprint recognition. The invention also provides a fingerprint identification method.
The technical scheme adopted by the invention is as follows: a fingerprint identification module comprises a fingerprint acquisition circuit, a compensation circuit, a noise suppression circuit, an integral operation circuit, a digital-to-analog conversion circuit and a controller; the output end of the fingerprint acquisition circuit is a node A and is connected with the input end of the integral operation circuit, the output end of the integral operation circuit is connected with the fingerprint input end of the controller through a digital-to-analog conversion circuit, the output end of the compensation circuit is connected with the compensation end of the fingerprint acquisition circuit, the compensation control end of the compensation circuit is connected with the compensation circuit control end of the controller, the test signal output end of the noise suppression circuit is connected with the node A, and the test control end of the noise suppression circuit is connected with the noise test control end of the controller.
Based on the above embodiment, further, the fingerprint acquisition circuit of the present invention includes a first signal source, an external electrode, a detection sensor, and an isolation electrode, wherein a power end of the external electrode is connected to the first signal source, an output end of the external electrode is connected to a first input end of the detection sensor, a second input end of the detection sensor is connected to an output end of the isolation electrode, an input end of the isolation electrode is connected to a compensation end of the fingerprint acquisition circuit, and an output end of the detection sensor is connected to a node a.
Based on any of the above embodiments, further, the compensation circuit of the present invention includes a voltage buffer and a compensation signal source, an input end of the voltage buffer is connected to an output end of the compensation signal source, an output end of the voltage buffer is connected to an output end of the compensation circuit, and a control end of the compensation signal source is connected to a control end of the compensation circuit of the controller.
Based on any of the above embodiments, further, the voltage buffer of the present invention includes a buffer amplifier, a voltage controller, a level shifter, a distortion feedback circuit, and a constant current source.
The first end of the voltage controller is connected with a working power supply end VDD, the second end of the voltage controller is connected with the first end of the buffer amplifier, and the third end of the voltage controller is connected with the second end of the buffer amplifier through the level shifter.
The second end of the buffer amplifier is also connected with the input end Vin of the voltage buffer, and the third end of the buffer amplifier is connected with the output end Vout of the voltage buffer.
The first end of the constant current source is connected with the third end of the buffer amplifier, the second end of the constant current source is connected with the input end Vin of the voltage buffer through the distortion feedback circuit, the third end of the constant current source is butted with the analog ground, and the bias end of the constant current source is connected with the bias voltage Vb.
Based on any of the above embodiments, further, the voltage buffer of the present invention includes a PMOS transistor M1, a PMOS transistor M2, a PMOS transistor M3, a PMOS transistor M4, a capacitor C1, and a capacitor C2.
The drain electrode of the PMOS tube M1 is connected with the working power supply end, the source electrode thereof is connected with the drain electrode of the PMOS tube M2, and the grid electrode thereof is connected with the input end of the voltage buffer through a capacitor C1.
The grid electrode of the PMOS pipe M2 is connected with the input end of the voltage buffer, and the source electrode of the PMOS pipe M2 is connected with the output end of the voltage buffer.
The drain of the PMOS transistor M3 is connected to the output terminal of the voltage buffer, the source thereof is connected to the drain of the PMOS transistor M4, and the gate thereof is connected to the bias voltage terminal Vb 3.
The drain of the PMOS transistor M4 is connected to the source of the PMOS transistor M3 through a capacitor C2, the source thereof is connected to analog ground, and the gate thereof is connected to the bias voltage terminal Vb 4.
Based on any of the above embodiments, further, the noise suppression circuit of the present invention includes a second signal source and a noise suppression capacitor, a first end of the noise suppression capacitor is connected to the node a, a second end of the noise suppression capacitor is connected to the second signal source, and a capacitance setting end of the noise suppression capacitor is connected to a noise test control end of the controller.
Based on any of the above embodiments, further, the integrating operational circuit of the present invention includes an operational amplifier, a feedback capacitor, a capacitor C3, a resistor R1, a resistor R2, a resistor R3, a zero-setting potentiometer Rw, a fourth switch S4, a fifth switch S5, and a reference signal source.
The inverting input end of the operational amplifier is connected with the normally closed end of a fourth switch S4 through a resistor R1, the first normally open end of the fourth switch S4 is connected with the input end of the integrating operational circuit, and the second normally open end of the fourth switch S4 is butted with the ground; the capacitor C3 is connected in parallel between the inverting input terminal and the output terminal of the operational amplifier, and the output terminal of the operational amplifier is also connected to the inverting input terminal of the operational amplifier through a resistor R3 and a fifth switch S5.
The positive input end of the operational amplifier is connected with a reference signal source through a resistor R2; the output end of the operational amplifier is connected with the output end of the integral operational circuit; a zero-setting potentiometer Rw is connected in parallel between the positive electrode and the negative electrode of the zero-setting end of the operational amplifier; the positive pole of the working voltage of the operational amplifier is connected with the working voltage end + Vc, and the negative pole of the working voltage of the operational amplifier is connected with the working voltage end-Vc; and the control end of the zero-setting potentiometer Rw is connected with the working voltage end-Vc of the operational amplifier.
Based on any of the above embodiments, the present invention further includes a first switch S1, a second switch S2, and a third switch S3, where the first switch is connected between the fingerprint acquisition circuit and the compensation circuit, the second switch is connected between the node a and the fingerprint acquisition circuit, the third switch is connected between the node a and the noise suppression circuit, and control terminals of the first switch S1, the second switch S2, and the third switch S3 are respectively connected to a switch control terminal of the controller to receive corresponding switch control signals.
Based on any of the above embodiments, the present invention further includes a memory and a communication interface both connected to the controller, where the memory is used to store fingerprint data, control parameters and/or control instructions, and the controller performs data interaction with the upper computer through the communication interface.
The invention also proposes a fingerprint identification method based on a fingerprint identification module according to any one of claims 1 to 9, said method comprising the following steps:
s1, charge clearing step: before a finger does not contact the external electrode, the first switch and the second switch are closed, the third switch is disconnected, further, for the integral operation circuit, the fifth switch is closed, the fourth switch is closed to the first normally open end, and charges in the fingerprint acquisition circuit, the compensation circuit and the integral operation circuit are cleared;
s2, noise detection step: the second switch is disconnected, the third switch is closed, the controller sets an initial capacitance value for the noise suppression capacitor through the noise test control end, the second signal source outputs a square wave signal or a sine wave signal to enable the noise suppression capacitor to generate a preset charge amount, a noise detection signal is output, the noise detection signal is transmitted to the controller through the integrating operation circuit and the digital-to-analog conversion circuit, the controller judges whether the noise detection signal is half of the maximum range of the digital-to-analog converter or not, and if not, the capacitance value of the noise suppression capacitor is adjusted until the condition is met;
s3, fingerprint signal acquisition step: when a finger contacts the external electrode, the first switch, the second switch and the third switch are closed, the first signal source sends out a square wave signal, the square wave signal passes through the external electrode and then is changed into a fingerprint signal V1 to be detected, the fingerprint signal V1 is coupled to the detection sensor through a parasitic capacitor Cp1 between the external electrode and the detection sensor, and the detection sensor outputs a charge difference signal between the external electrode and the isolation electrode;
s4, signal compensation step: the controller controls the compensation circuit to output a compensation signal V2, and changes a positive half cycle signal and a negative half cycle signal in the fingerprint signal V1 to be detected, wherein the value of the compensation signal V2 is the average value of the values of the negative half cycle signals;
s5, noise suppression step: the second signal source outputs a square wave signal or a sine wave signal, a predetermined electric charge amount is generated on the noise suppression capacitor, a noise suppression signal is output, and common mode noise in the fingerprint signal is suppressed;
s6, an integral operation step: the integral operation circuit receives the compensated superposed signal of the fingerprint signal V1 to be detected and the noise suppression signal, and outputs a fingerprint integral signal after a preset integral period length;
and S7, the digital-to-analog converter performs digital-to-analog conversion on the fingerprint integral signal and forwards the fingerprint integral signal to the controller, the controller calculates to obtain a corresponding pixel image according to the voltage value, and then generates an acquired fingerprint image according to the pixel image of each external electrode.
In summary, due to the adoption of the technical scheme, the invention has the beneficial effects that: according to the charge transfer type fingerprint identification module and the fingerprint identification method, the signal difference between a fingerprint valley signal and a fingerprint ridge signal can be amplified through the compensation circuit, and fingerprint noise in the circuit can be eliminated through the noise suppression circuit, so that fingerprints can be identified more accurately.
Drawings
The invention will now be described, by way of example, with reference to the accompanying drawings, in which:
FIG. 1 is a block diagram of a fingerprint recognition module according to the present invention.
FIG. 2 is a circuit block diagram of a voltage buffer according to the present invention.
Fig. 3 is a circuit schematic of the voltage buffer of the present invention.
Fig. 4 is a circuit schematic diagram of an integrating operation circuit in the present invention.
Detailed Description
All of the features disclosed in this specification, or all of the steps in any method or process so disclosed, may be combined in any combination, except combinations of features and/or steps that are mutually exclusive.
Any feature disclosed in this specification (including any accompanying claims, abstract) may be replaced by alternative features serving equivalent or similar purposes, unless expressly stated otherwise. That is, unless expressly stated otherwise, each feature is only an example of a generic series of equivalent or similar features.
As shown in fig. 1, fig. 1 illustrates a fingerprint identification module, which mainly includes a fingerprint acquisition circuit, a compensation circuit, a noise suppression circuit, an integral operation circuit, a digital-to-analog conversion circuit, and a controller. When collecting the fingerprint signal, the invention provides the compensation signal through the compensation circuit, amplifies the signal difference of the fingerprint valley signal and the fingerprint ridge signal collected by the fingerprint collection circuit, carries out charge compensation, improves the accuracy of fingerprint identification, and improves the imaging quality of the fingerprint image. The invention can also eliminate the fingerprint noise in the circuit through the noise suppression circuit so as to filter the fingerprint noise in the collected fingerprint signal and further improve the accuracy of fingerprint identification and imaging quality.
The output end of the fingerprint acquisition circuit is a node A and is connected with the input end of the integral operation circuit, the output end of the integral operation circuit is connected with the fingerprint input end of the controller through a digital-to-analog conversion circuit, the output end of the compensation circuit is connected with the compensation end of the fingerprint acquisition circuit, the compensation control end of the compensation circuit is connected with the compensation circuit control end of the controller, the test signal output end of the noise suppression circuit is connected with the node A, and the test control end of the noise suppression circuit is connected with the noise test control end of the controller.
Based on the above embodiment, further, the fingerprint acquisition circuit of the present invention includes a first signal source, an external electrode, a detection sensor, and an isolation electrode, wherein a power end of the external electrode is connected to the first signal source, an output end of the external electrode is connected to a first input end of the detection sensor, a second input end of the detection sensor is connected to an output end of the isolation electrode, an input end of the isolation electrode is connected to a compensation end of the fingerprint acquisition circuit, and an output end of the detection sensor is connected to a node a.
Based on any of the above embodiments, further, the compensation circuit of the present invention includes a voltage buffer and a compensation signal source, an input end of the voltage buffer is connected to an output end of the compensation signal source, an output end of the voltage buffer is connected to an output end of the compensation circuit, and a control end of the compensation signal source is connected to a control end of the compensation circuit of the controller.
Based on any of the above embodiments, further, as shown in fig. 2, fig. 2 is a block diagram illustrating a structure of a voltage buffer according to the present invention, where the voltage buffer mainly includes a buffer amplifier, a voltage controller, a level shifter, a distortion feedback circuit, and a constant current source.
The first end of the voltage controller is connected with a working power supply end VDD, the second end of the voltage controller is connected with the first end of the buffer amplifier, and the third end of the voltage controller is connected with the second end of the buffer amplifier through the level shifter.
The second end of the buffer amplifier is also connected with the input end Vin of the voltage buffer, and the third end of the buffer amplifier is connected with the output end Vout of the voltage buffer.
The first end of the constant current source is connected with the third end of the buffer amplifier, the second end of the constant current source is connected with the input end Vin of the voltage buffer through the distortion feedback circuit, the third end of the constant current source is butted with the analog ground, and the bias end of the constant current source is connected with the bias voltage Vb.
Based on any of the above embodiments, further, as shown in fig. 3, fig. 3 illustrates a schematic circuit diagram of the voltage buffer of the present invention, which may include a PMOS transistor M1, a PMOS transistor M2, a PMOS transistor M3, a PMOS transistor M4, a capacitor C1, and a capacitor C2. The PMOS transistor M1 is equivalent to a voltage controller, the PMOS transistor M2 is equivalent to a buffer amplifier, the PMOS transistor M3 and the PMOS transistor M4 are equivalent to a common-source common-gate constant current source, the capacitor C1 is equivalent to a level shifter, and the capacitor C2 is equivalent to a distortion feedback circuit.
The drain electrode of the PMOS tube M1 is connected with the working power supply end, the source electrode thereof is connected with the drain electrode of the PMOS tube M2, and the grid electrode thereof is connected with the input end of the voltage buffer through a capacitor C1.
The grid electrode of the PMOS pipe M2 is connected with the input end of the voltage buffer, and the source electrode of the PMOS pipe M2 is connected with the output end of the voltage buffer.
The drain of the PMOS transistor M3 is connected to the output terminal of the voltage buffer, the source thereof is connected to the drain of the PMOS transistor M4, and the gate thereof is connected to the bias voltage terminal Vb 3.
The drain of the PMOS transistor M4 is connected to the source of the PMOS transistor M3 through a capacitor C2, the source thereof is connected to analog ground, and the gate thereof is connected to the bias voltage terminal Vb 4.
Based on any of the above embodiments, further, the noise suppression circuit of the present invention includes a second signal source and a noise suppression capacitor, a first end of the noise suppression capacitor is connected to the node a, a second end of the noise suppression capacitor is connected to the second signal source, and a capacitance setting end of the noise suppression capacitor is connected to a noise test control end of the controller.
Based on any of the above embodiments, further, as shown in fig. 4, the integrating operational circuit of the present invention includes an operational amplifier, a feedback capacitor, a capacitor C3, a resistor R1, a resistor R2, a resistor R3, a zero-setting potentiometer Rw, a fourth switch S4, a fifth switch S5, and a reference signal source.
The inverting input end of the operational amplifier is connected with the normally closed end of a fourth switch S4 through a resistor R1, the first normally open end of the fourth switch S4 is connected with the input end of the integrating operational circuit, and the second normally open end of the fourth switch S4 is butted with the ground; the capacitor C3 is connected in parallel between the inverting input terminal and the output terminal of the operational amplifier, and the output terminal of the operational amplifier is also connected to the inverting input terminal of the operational amplifier through a resistor R3 and a fifth switch S5.
The positive input end of the operational amplifier is connected with a reference signal source through a resistor R2; the output end of the operational amplifier is connected with the output end of the integral operational circuit; a zero-setting potentiometer Rw is connected in parallel between the positive electrode and the negative electrode of the zero-setting end of the operational amplifier; the positive pole of the working voltage of the operational amplifier is connected with the working voltage end + Vc, and the negative pole of the working voltage of the operational amplifier is connected with the working voltage end-Vc; and the control end of the zero-setting potentiometer Rw is connected with the working voltage end-Vc of the operational amplifier.
Closing the fourth switch S4 to the second normally open end, closing the fifth switch S5, performing vibration elimination and zero adjustment on the integral operational circuit, then opening the fifth switch S5, adjusting the zero adjustment potentiometer Rw, and controlling the output time of the operational amplifier. And the fourth switch S4 is connected with the first normally open end, the controller collects the output voltage Vo1 of the operational amplifier, after a certain time, the fourth switch S4 and the second normally open end are closed, the output voltage Vo2 of the operational amplifier is collected, the voltage holding capacity of the integral operational circuit is judged according to the output voltage Vo1 and the output voltage Vo2, if the holding time is less than a preset threshold value, the zero-setting potentiometer Rw is continuously adjusted until the holding time is known to be more than or equal to the preset threshold value, and therefore the integral operational circuit is enabled to maintain a state of high linearity and low drift.
Based on any of the above embodiments, the present invention further includes a first switch S1, a second switch S2, and a third switch S3, where the first switch is connected between the fingerprint acquisition circuit and the compensation circuit, the second switch is connected between the node a and the fingerprint acquisition circuit, the third switch is connected between the node a and the noise suppression circuit, and control terminals of the first switch S1, the second switch S2, and the third switch S3 are respectively connected to a switch control terminal of the controller to receive corresponding switch control signals.
Based on any of the above embodiments, the present invention further includes a memory and a communication interface both connected to the controller, where the memory is used to store fingerprint data, control parameters and/or control instructions, and the controller performs data interaction with the upper computer through the communication interface.
The working principle of the invention is as follows: a plurality of external electrodes are arranged on the finger contact surface of the fingerprint identification module to form an electrode array, when a finger contacts the fingerprint identification module, the external electrodes collect fingerprint signals of the finger, including fingerprint valley signals and fingerprint ridge signals, and the fingerprint valley signals and the fingerprint ridge signals are different due to the fact that the heights of the fingerprint valley and the fingerprint ridge are different, and the difference values of the fingerprint valley signals and the fingerprint ridge signals are also different.
The invention specifically comprises the following steps:
s1, charge clearing step: before the finger does not contact the external electrode, the first switch and the second switch are closed, the third switch is disconnected, further, for the integral operation circuit, the fifth switch is closed, the fourth switch is closed to the first normally open end, and charges in the fingerprint acquisition circuit, the compensation circuit and the integral operation circuit are cleared.
S2, noise detection step: and the second switch is switched off, the third switch is switched on, the controller sets an initial capacitance value for the noise suppression capacitor through the noise test control end, the second signal source outputs a square wave signal or a sine wave signal to enable the noise suppression capacitor to generate a preset charge amount, a noise detection signal is output, the noise detection signal is transmitted to the controller through the integrating operation circuit and the digital-to-analog conversion circuit, the controller judges whether the noise detection signal is half of the maximum range of the digital-to-analog converter or not, and if not, the capacitance value of the noise suppression capacitor is adjusted until the condition is met.
S3, fingerprint signal acquisition step: when a finger contacts the external electrode, the first switch, the second switch and the third switch are closed, the first signal source sends out a square wave signal, the square wave signal passes through the external electrode and then is changed into a fingerprint signal V1 to be detected, the fingerprint signal V1 is coupled to the detection sensor through a parasitic capacitor Cp1 between the external electrode and the detection sensor, and the detection sensor outputs a charge difference signal between the external electrode and the isolation electrode.
S4, signal compensation step: the controller controls the compensation circuit to output the compensation signal V2, and changes the positive half cycle signal and the negative half cycle signal in the fingerprint signal V1 to be detected, wherein the value of the compensation signal V2 is the average value of the values of the negative half cycle signals, so that when the compensation signal V2 is coupled to the isolation electrode, the value of the negative half cycle signal in the fingerprint signal V1 to be detected output by the detection sensor is approximately equal to zero.
When a finger touches an external electrode, not only is the parasitic capacitance Cp1 between the external electrode and the detection sensor changed, but the finger also acts as a noise source to introduce noise into a subsequent circuit, thereby affecting fingerprint identification and failing to identify a correct fingerprint image.
S5, noise suppression step: the second signal source outputs a square wave signal or a sine wave signal, a predetermined charge amount is generated on the noise suppression capacitor, a noise suppression signal is output, and common mode noise in the fingerprint signal is suppressed.
S6, an integral operation step: and the integral operation circuit receives the compensated superposed signal of the fingerprint signal V1 to be detected and the noise suppression signal, and outputs a fingerprint integral signal after a preset integral period length.
And S7, the digital-to-analog converter performs digital-to-analog conversion on the fingerprint integral signal and forwards the fingerprint integral signal to the controller, the controller calculates to obtain a corresponding pixel image according to the voltage value, and then generates an acquired fingerprint image according to the pixel image of each external electrode.
The invention can directly output the fingerprint image data through the communication interface, can also compare the collected fingerprint image with the preset fingerprint image in the memory, and outputs the corresponding identity verification instruction through the communication interface.
The invention is not limited to the foregoing embodiments. The invention extends to any novel feature or any novel combination of features disclosed in this specification and any novel method or process steps or any novel combination of features disclosed.
Claims (8)
1. A fingerprint identification module, comprising: the fingerprint acquisition circuit comprises a fingerprint acquisition circuit, a compensation circuit, a noise suppression circuit, an integral operation circuit, a digital-to-analog conversion circuit and a controller; the output end of the fingerprint acquisition circuit is a node A and is connected with the input end of the integral operation circuit, the output end of the integral operation circuit is connected with the fingerprint input end of the controller through a digital-to-analog conversion circuit, the output end of the compensation circuit is connected with the compensation end of the fingerprint acquisition circuit, the compensation control end of the compensation circuit is connected with the compensation circuit control end of the controller, the test signal output end of the noise suppression circuit is connected with the node A, and the test control end of the noise suppression circuit is connected with the noise test control end of the controller;
the noise suppression circuit comprises a second signal source and a noise suppression capacitor, wherein the first end of the noise suppression capacitor is connected with the node A, the second end of the noise suppression capacitor is connected with the second signal source, and the capacity value setting end of the noise suppression capacitor is connected with the noise test control end of the controller;
the fingerprint data acquisition device further comprises a memory and a communication interface which are connected with the controller, the memory is used for storing fingerprint data, control parameters and/or control instructions, and the controller performs data interaction with the upper computer through the communication interface.
2. The fingerprint identification module of claim 1, wherein: the fingerprint acquisition circuit comprises a first signal source, an external electrode, a detection sensor and an isolation electrode, wherein the power end of the external electrode is connected with the first signal source, the output end of the external electrode is connected with the first input end of the detection sensor, the second input end of the detection sensor is connected with the output end of the isolation electrode, the input end of the isolation electrode is connected with the compensation end of the fingerprint acquisition circuit, and the output end of the detection sensor is connected with a node A.
3. The fingerprint identification module of claim 1, wherein: the compensation circuit comprises a voltage buffer and a compensation signal source, wherein the input end of the voltage buffer is connected with the output end of the compensation signal source, the output end of the voltage buffer is connected with the output end of the compensation circuit, and the control end of the compensation signal source is connected with the control end of the compensation circuit of the controller.
4. A fingerprint recognition module according to claim 3, wherein: the voltage buffer comprises a buffer amplifier, a voltage controller, a level shifter, a distortion feedback circuit and a constant current source;
the first end of the voltage controller is connected with a working power supply end VDD, the second end of the voltage controller is connected with the first end of the buffer amplifier, and the third end of the voltage controller is connected with the second end of the buffer amplifier through the level shifter;
the second end of the buffer amplifier is also connected with the input end Vin of the voltage buffer, and the third end of the buffer amplifier is connected with the output end Vout of the voltage buffer;
the first end of the constant current source is connected with the third end of the buffer amplifier, the second end of the constant current source is connected with the input end Vin of the voltage buffer through the distortion feedback circuit, the third end of the constant current source is butted with the analog ground, and the bias end of the constant current source is connected with the bias voltage Vb.
5. A fingerprint recognition module according to claim 3, wherein: the voltage buffer comprises a PMOS tube M1, a PMOS tube M2, a PMOS tube M3, a PMOS tube M4, a capacitor C1 and a capacitor C2;
the drain electrode of the PMOS tube M1 is connected with a working power supply end, the source electrode of the PMOS tube M2 is connected with the drain electrode of the PMOS tube M2, and the grid electrode of the PMOS tube M1 is connected with the input end of the voltage buffer through a capacitor C1;
the grid electrode of the PMOS pipe M2 is connected with the input end of the voltage buffer, and the source electrode of the PMOS pipe M2 is connected with the output end of the voltage buffer; the drain electrode of the PMOS tube M3 is connected with the output end of the voltage buffer, the source electrode of the PMOS tube M3 is connected with the drain electrode of the PMOS tube M4, and the grid electrode of the PMOS tube M3 is connected with a bias voltage terminal Vb 3;
the drain of the PMOS transistor M4 is connected to the source of the PMOS transistor M3 through a capacitor C2, the source thereof is connected to analog ground, and the gate thereof is connected to the bias voltage terminal Vb 4.
6. The fingerprint identification module of claim 1, wherein: the integrating operation circuit comprises an operational amplifier, a feedback capacitor, a capacitor C3, a resistor R1, a resistor R2, a resistor R3, a zero-setting potentiometer Rw, a fourth switch S4, a fifth switch S5 and a reference signal source;
the inverting input end of the operational amplifier is connected with the normally closed end of a fourth switch S4 through a resistor R1, the first normally open end of the fourth switch S4 is connected with the input end of the integrating operational circuit, and the second normally open end of the fourth switch S4 is butted with the ground; the capacitor C3 is connected in parallel between the inverting input end and the output end of the operational amplifier, and the output end of the operational amplifier is also connected with the inverting input end of the operational amplifier through a resistor R3 and a fifth switch S5;
the positive input end of the operational amplifier is connected with a reference signal source through a resistor R2; the output end of the operational amplifier is connected with the output end of the integral operational circuit; a zero-setting potentiometer Rw is connected in parallel between the positive electrode and the negative electrode of the zero-setting end of the operational amplifier; the positive pole of the working voltage of the operational amplifier is connected with the working voltage end + Vc, and the negative pole of the working voltage of the operational amplifier is connected with the working voltage end-Vc; and the control end of the zero-setting potentiometer Rw is connected with the working voltage end-Vc of the operational amplifier.
7. The fingerprint identification module of claim 1, wherein: the fingerprint identification circuit further comprises a first switch S1, a second switch S2 and a third switch S3, wherein the first switch is connected between the fingerprint acquisition circuit and the compensation circuit, the second switch is connected between the node A and the fingerprint acquisition circuit, the third switch is connected between the node A and the noise suppression circuit, and control ends of the first switch S1, the second switch S2 and the third switch S3 are respectively connected with a switch control end of the controller to receive corresponding switch control signals.
8. A fingerprint identification method, characterized in that the method is based on a fingerprint identification module according to any one of claims 1-7, the method comprising the following steps:
s1, charge clearing step: before a finger does not contact the external electrode, the first switch and the second switch are closed, the third switch is disconnected, further, for the integral operation circuit, the fifth switch is closed, the fourth switch is closed to the first normally open end, and charges in the fingerprint acquisition circuit, the compensation circuit and the integral operation circuit are cleared;
s2, noise detection step: the second switch is disconnected, the third switch is closed, the controller sets an initial capacitance value for the noise suppression capacitor through the noise test control end, the second signal source outputs a square wave signal or a sine wave signal to enable the noise suppression capacitor to generate a preset charge amount, a noise detection signal is output, the noise detection signal is transmitted to the controller through the integral operation circuit and the digital-to-analog conversion circuit, the controller judges whether the noise detection signal is half of the maximum range of the digital-to-analog converter, and if not, the capacitance value of the noise suppression capacitor is adjusted until the controller judges that the noise detection signal is half of the maximum range of the digital-to-analog converter;
s3, fingerprint signal acquisition step: when a finger contacts the external electrode, the first switch, the second switch and the third switch are closed, the first signal source sends out a square wave signal, the square wave signal passes through the external electrode and then is changed into a fingerprint signal V1 to be detected, the fingerprint signal V1 is coupled to the detection sensor through a parasitic capacitor Cp1 between the external electrode and the detection sensor, and the detection sensor outputs a charge difference signal between the external electrode and the isolation electrode;
s4, signal compensation step: the controller controls the compensation circuit to output a compensation signal V2, and changes a positive half cycle signal and a negative half cycle signal in the fingerprint signal V1 to be detected, wherein the value of the compensation signal V2 is the average value of the values of the negative half cycle signals;
s5, noise suppression step: the second signal source outputs a square wave signal or a sine wave signal, a predetermined electric charge amount is generated on the noise suppression capacitor, a noise suppression signal is output, and common mode noise in the fingerprint signal is suppressed;
s6, an integral operation step: the integral operation circuit receives the compensated superposed signal of the fingerprint signal V1 to be detected and the noise suppression signal, and outputs a fingerprint integral signal after a preset integral period length;
and S7, the digital-to-analog converter performs digital-to-analog conversion on the fingerprint integral signal and forwards the fingerprint integral signal to the controller, the controller calculates to obtain a corresponding pixel image according to the voltage value, and then generates an acquired fingerprint image according to the pixel image of each external electrode.
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| CN108475179B (en) * | 2016-12-27 | 2020-10-23 | 华为技术有限公司 | Fingerprint acquisition method, fingerprint acquisition device and terminal |
| CN107092407B (en) * | 2017-04-12 | 2023-10-03 | 北京集创北方科技股份有限公司 | Inductive capacitance measuring device |
| CN108735175B (en) * | 2018-05-29 | 2021-02-09 | 京东方科技集团股份有限公司 | Compensation structure, display panel, display device and compensation method |
| CN111144176A (en) * | 2018-11-05 | 2020-05-12 | 上海海栎创微电子有限公司 | Capacitive fingerprint pixel detection circuit and detection method |
| US11497411B2 (en) * | 2018-11-23 | 2022-11-15 | Mediatek Inc. | Circuit applied to bio-information acquisition system |
| CN111027516B (en) * | 2019-12-25 | 2024-01-26 | 北京集创北方科技股份有限公司 | Biological characteristic image acquisition device, biological characteristic image acquisition method and intelligent equipment |
| TWI720762B (en) * | 2019-12-25 | 2021-03-01 | 大陸商北京集創北方科技股份有限公司 | Biological characteristic collection circuit and method, information processing device with the circuit, and information processing device using the method |
| CN113051964B (en) * | 2019-12-26 | 2024-06-28 | 速博思股份有限公司 | High-accuracy fingerprint detection method |
| CN113785300B (en) * | 2020-04-10 | 2024-07-26 | 京东方科技集团股份有限公司 | Fingerprint identification detection circuit, control method thereof and fingerprint identification control chip |
| CN111476203B (en) * | 2020-04-30 | 2022-09-20 | 厦门天马微电子有限公司 | Array substrate, display panel, display device and fingerprint identification method |
| CN112560640B (en) * | 2020-12-08 | 2024-07-26 | 京东方科技集团股份有限公司 | Fingerprint acquisition circuit, driving method, fingerprint sensor and fingerprint acquisition equipment |
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