CN106155938B - Postpone the cache replacement method and device of PCM memory service life - Google Patents
Postpone the cache replacement method and device of PCM memory service life Download PDFInfo
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- CN106155938B CN106155938B CN201610466832.1A CN201610466832A CN106155938B CN 106155938 B CN106155938 B CN 106155938B CN 201610466832 A CN201610466832 A CN 201610466832A CN 106155938 B CN106155938 B CN 106155938B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
- G06F12/121—Replacement control using replacement algorithms
- G06F12/123—Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
Abstract
The present invention provides a kind of cache replacement method and device for postponing PCM memory service life, comprising: multiple caches blocks are arranged, and are divided into multiple set, obtain LRU chain corresponding to each storage set of blocks；When having detected the insertion of new memory block, judges to determine that new memory block is inserted into using missing incorporation way is read or write, be then inserted into new memory block in corresponding set；It has deposited that memory block is accessed to read hit when detecting, and when the clean set of blocks of affiliated low access frequency or the clean set of blocks of high access frequency, then memory block has been moved in corresponding set；When detect need to for go out deposited memory block when, successively the LRU chain of each set is detected, if detect first non-empty LRU chain, by the memory block on LRU position for go out.A kind of cache replacement method and device postponing PCM memory service life provided by the invention is each provided with and more fully protects for dirty piece and clean block by distinguishing to dirty piece and clean block in all treatment processes of cache block.
Description
Technical field
The present invention relates to Computer Systems Organization technical field more particularly to a kind of delay PCM memory service lifes
Cache replacement method and device.
Background technique
With the popularization of multiple nucleus system and the development of data-intensive applications, computer memory system needs bigger storage
Capacity meets actual demand, wherein crucial is a little to increase memory size.
Current computer memory system mostly uses greatly DRAM memory.DRAM memory can be by reducing single storage unit
Integrated level is improved, so that bigger memory capacity is obtained, but as DRAM memory cell reduces to a certain extent, it is further
It is very big to increase the difficulty that DRAM memory faces.
Use novel storage material that DRAM is replaced to become a current research hotspot as memory.It novel deposits at these
It stores up in material, phase change memory (PCM) has many advantages, such as that storage density is high, low in energy consumption and non-volatile to be closed extensively because of it
Note, but the erasable number of PCM is limited, if being directly used as memory has the too short problem of service life.There are many research works
Extend PCM memory service life from different perspectives, wherein optimization cache replacement policy is a kind of effective ways, it passes through
Additional Protection is provided for dirty piece in cache to reduce and be replaced the dirty number of blocks of going out, to reduce the amount of writing back to PCM memory.
Cache can be divided into new block insertion to the processing of data block, access is hit, degrading (it is preferential to reduce useless piece of protection
Grade) and select for block Four processes are gone out.The existing cache replacement policy for PCM memory does not all contain dirty piece of protection
All cache treatment processes are covered, the method that they protect dirty piece is mainly when new block is inserted into and accesses hit, compared to completely
Block does not repartition dirty piece and clean block, this will lead to cache can to the dirty piece of higher protection priority of setting in downgrade processing
It can still be selected when there is a large amount of clean blocks for going out dirty piece.
Summary of the invention
The present invention provides a kind of cache replacement method and device for postponing PCM memory service life, for solving existing skill
The too short problem of PCM memory service life in art.
In a first aspect, the present invention provides a kind of cache replacement method for postponing PCM memory service life, comprising:
Multiple caches blocks are set, and each memory block is divided into the clean set of blocks of low access frequency, low access frequency
The dirty set of blocks of rate, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency；
In every class memory block, according to memory block last time, the accessed time is ranked up, and obtains each memory block
The corresponding LRU chain of set, wherein last time access time, the memory block nearest apart from current time was MRU in LRU chain
Block, the last time access time memory block farthest apart from current time are LRU block；
When having detected the insertion of new memory block, if it is slotting to judge that determining new memory block is carried out using reading missing incorporation way
Enter, then new memory block is arranged on the MRU position of the low clean set of blocks LRU chain of access frequency, and regenerate corresponding LRU
Chain；If judgement determines that new memory block is inserted into using missing incorporation way is write, new memory block is arranged in low access frequency
On the MRU position of dirty set of blocks LRU chain, and regenerate corresponding LRU chain；
When detecting that having deposited memory block is accessed hit, hit mode is read if having deposited memory block described in judgement is determining and having used
Be hit, and it is described deposited the low clean set of blocks of access frequency or the clean set of blocks of high access frequency belonging to memory block, then will
It deposits memory block to be moved on the MRU position of the clean block LRU chain of high access frequency, and regenerates corresponding LRU chain；If other
Situation will then have been deposited memory block and be moved on the MRU position of dirty piece of LRU chain of high access frequency, and regenerated corresponding LRU
Chain；
It is successively dirty to the clean set of blocks of low access frequency, low access frequency when memory block need to have been deposited for out one by detecting
The LRU chain of set of blocks, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency is detected, if detecting first
When non-empty LRU chain, the memory block on the LRU position in the LRU chain is gone out, and to the corresponding memory block collection of the LRU chain
Conjunction regenerates corresponding LRU chain.
Preferably, when detecting first non-empty LRU chain, the memory block on the LRU position in the LRU chain is replaced
Out, after and regenerating corresponding LRU chain to the corresponding storage set of blocks of the LRU chain, further includes:
If judgement determines for dirty piece of low access frequency belonging to the memory block gone out, by the clean set of blocks LRU of high access frequency
Memory block in chain on LRU position is moved on the MRU position in the low clean set of blocks LRU chain of access frequency, while height being visited
Ask the position MRU that the memory block in the dirty set of blocks LRU chain of frequency on LRU position is moved in the low dirty set of blocks LRU chain of access frequency
It sets, and regenerates corresponding LRU chain.
Preferably, when detecting first non-empty LRU chain, the memory block on the LRU position in the LRU chain is replaced
Out, after and regenerating corresponding LRU chain to the corresponding storage set of blocks of the LRU chain, further includes:
If judgement determines for the high clean block of access frequency belonging to the memory block gone out, by the dirty set of blocks LRU of high access frequency
Memory block in chain on LRU position is moved on the MRU position in the low dirty set of blocks LRU chain of access frequency, and is regenerated pair
The LRU chain answered.
Second aspect, the present invention provide a kind of cache alternative for postponing PCM memory service life, comprising:
Configuration module is divided into the low clean block of access frequency for multiple caches blocks to be arranged, and by each memory block
Set, the dirty set of blocks of low access frequency, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency；
Sorting module, for being ranked up, being obtained according to the time that memory block last time is accessed in every class memory block
Obtain LRU chain corresponding to each storage set of blocks, wherein last time access time is nearest apart from current time in LRU chain
Memory block be MRU block, the last time access time memory block farthest apart from current time is LRU block；
It is inserted into module, for when having detected the insertion of new memory block, determining new memory block to be drawn using missing is read if judging
Enter mode to be inserted into, then new memory block is arranged on the MRU position of the low clean set of blocks LRU chain of access frequency, and again
Generate corresponding LRU chain；If judgement determines that new memory block is inserted into using missing incorporation way is write, new memory block is arranged
On the MRU position of the dirty set of blocks LRU chain of low access frequency, and regenerate corresponding LRU chain；
Access modules, for detect deposited memory block accessed hit when, if judgement, which determines, described has been deposited memory block
It is hit using hit mode is read, and described to have deposited the low clean set of blocks of access frequency or high access frequency belonging to memory block clean
Set of blocks will then have been deposited memory block and be moved on the MRU position of the clean block LRU chain of high access frequency, and regenerated corresponding
LRU chain；If other situations, then it will deposit memory block and be moved on the MRU position of dirty piece of LRU chain of high access frequency, and again
Generate corresponding LRU chain；
For module out, for detect need to be for going out one and deposit memory block when, successively to the clean set of blocks of low access frequency,
The LRU chain of the dirty set of blocks of low access frequency, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency is detected, if
When detecting first non-empty LRU chain, the memory block on the LRU position in the LRU chain is gone out, and to the LRU chain pair
The storage set of blocks answered regenerates corresponding LRU chain.
Preferably, described to be also used to for module out: if judgement determines for dirty piece of low access frequency belonging to the memory block gone out,
Memory block in the clean set of blocks LRU chain of high access frequency on LRU position is moved to the low clean set of blocks LRU chain of access frequency
In MRU position on, while the memory block in the dirty set of blocks LRU chain of high access frequency on LRU position is moved to low access frequency
On MRU position in the dirty set of blocks LRU chain of rate, and regenerate corresponding LRU chain.
Preferably, described to be also used to for module out: if judgement determines for the high clean block of access frequency belonging to the memory block gone out,
Then the memory block in the dirty set of blocks LRU chain of high access frequency on LRU position is moved in the low dirty set of blocks LRU chain of access frequency
MRU position on, and regenerate corresponding LRU chain.
As shown from the above technical solution, a kind of cache replacement method postponing PCM memory service life provided by the invention
And device is that dirty piece and clean block are equal by distinguishing to dirty piece and clean block in all treatment processes of cache block
It provides and more fully protects, realize under the premise of not influencing overall performance, effectively reduce the amount of writing back to PCM memory,
Extend service life.
Detailed description of the invention
Fig. 1 is the process signal of the cache replacement method for the delay PCM memory service life that one embodiment of the invention provides
Figure；
Fig. 2 is the structural representation of the cache alternative for the delay PCM memory service life that one embodiment of the invention provides
Figure.
Specific embodiment
With reference to the accompanying drawings and examples, specific embodiments of the present invention will be described in further detail.Implement below
Example is not intended to limit the scope of the invention for illustrating the present invention.
Fig. 1 shows a kind of cache replacement method of delay PCM memory service life of one embodiment of the invention offer,
Include:
S11, the multiple caches blocks of setting, and each memory block is divided into the clean set of blocks of low access frequency, low visit
Ask the dirty set of blocks of frequency, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency.
In this step, it should be noted that can have multiple caches blocks in system stored procedures
Whether (cache block) is modified according to the temperature of the access degree of each memory block, and storage data in block, by each memory block
It is divided into the clean set of blocks of low access frequency, the dirty set of blocks of low access frequency, the clean set of blocks of high access frequency and high access frequency
Dirty set of blocks.It is each storage set of blocks in can be similar memory block.
S12, in every class memory block, according to memory block last time, the accessed time is ranked up, and acquisition is each deposited
Store up LRU chain corresponding to set of blocks, wherein the last time access time memory block nearest apart from current time in LRU chain
For MRU block, the last time access time memory block farthest apart from current time is LRU block.
In this step, it should be noted that since multiple memory blocks may be present in each storage set of blocks, therefore need to be to every
Memory block in a set is ranked up.The embodiment of the present invention can be arranged according to the memory block last time accessed time
Sequence embodies access time domain, while obtaining LRU chain corresponding to each storage set of blocks.Wherein, in LRU chain last
Secondary access time is MRU block apart from the closer memory block of current time, which is MRU position.Last time is visited
Ask that the farther away memory block of time gap current time is LRU block, which is LRU position.
S13, when having detected the insertion of new memory block, if judgement determines that new memory block is carried out using missing incorporation way is read
Insertion, then new memory block is arranged on the MRU position of the low clean set of blocks LRU chain of access frequency, and regenerate corresponding
LRU chain；If judgement determines that new memory block is inserted into using missing incorporation way is write, by the setting of new memory block in low access frequency
On the MRU position of the dirty set of blocks LRU chain of rate, and regenerate corresponding LRU chain.
In this step, it should be noted that in new memory block insertion process, when detecting the insertion of new memory block,
It first has to judge that the new memory block is inserted into using reading missing incorporation way insertion, or using missing incorporation way is write.
It is inserted into, then new memory block is arranged in low access when the determining new memory block of judgement lacks incorporation way using reading
On the MRU position of the clean set of blocks LRU chain of frequency, and simultaneously the memory block once on MRU position be arranged in new memory block it
Before.After insertion, new LRU chain is regenerated to the storage set of blocks.
When judgement determines that new memory block is inserted into using missing incorporation way is write, then by the setting of new memory block in low access
On the MRU position of the dirty set of blocks LRU chain of frequency, and the memory block once on MRU position is arranged in front of new memory block simultaneously.
After insertion, new LRU chain is regenerated to the storage set of blocks.
S14, when detect deposited memory block accessed hit when, if judgement determines the memory block of having deposited using reading hit
Mode is hit, and it is described deposited the low clean set of blocks of access frequency or the clean set of blocks of high access frequency belonging to memory block, then
Memory block will have been deposited to be moved on the MRU position of the clean block LRU chain of high access frequency, and regenerated corresponding LRU chain；If
Other situations will then have been deposited memory block and be moved on the MRU position of dirty piece of LRU chain of high access frequency, and regenerated corresponding
LRU chain.
In this step, it should be noted that store in set of blocks during having deposited memory block accessed hit, when
When detecting that having deposited memory block is accessed hit, first have to judgement and determine that this has deposited memory block ordered using reading hit mode
In, or other modes is used to be hit.
When judgement determine it is described deposited memory block and be hit using hit mode is read, and described deposited low visit belonging to memory block
It asks the clean set of blocks of frequency or the clean set of blocks of high access frequency, then will deposit memory block and be moved to the clean block of high access frequency
On the MRU position of LRU chain, and the memory block once on MRU position is arranged in front of mobile memory block simultaneously.Movement finishes
Afterwards, new LRU chain is regenerated to the storage set of blocks after movement.
Except other all situations under above situation, it will deposit memory block and be moved to dirty piece of LRU chain of high access frequency
On MRU position, and the memory block once on MRU position is arranged in front of mobile memory block simultaneously, after mobile, to shifting
Storage set of blocks after dynamic regenerates new LRU chain.
S15, when detect need to for go out one deposit memory block when, successively to the clean set of blocks of low access frequency, low access frequently
The LRU chain of the dirty set of blocks of rate, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency is detected, if detecting
When one non-empty LRU chain, the memory block on the LRU position in the LRU chain is gone out, and to the corresponding storage of the LRU chain
Set of blocks regenerates corresponding LRU chain.
In this step, it should be noted that store set of blocks in deposited memory block by for go out during, need successively
It is dirty to the clean set of blocks of low access frequency, the dirty set of blocks of low access frequency, the clean set of blocks of high access frequency and high access frequency
The LRU chain of set of blocks is detected.When detecting first non-empty LRU chain, by depositing on the LRU position in the LRU chain
Block is stored up for going out, and corresponding LRU chain is regenerated to the corresponding storage set of blocks of the LRU chain.
For this step, also need to be explained to the case where may occur below:
If A, judgement determines for dirty piece of low access frequency belonging to the memory block gone out, by the clean set of blocks of high access frequency
Memory block in LRU chain on LRU position is moved on the MRU position in the low clean set of blocks LRU chain of access frequency, and once simultaneously
It is arranged in through the memory block on MRU position before mobile memory block, after mobile, to the storage set of blocks weight after movement
Newly-generated new LRU chain.
Memory block in the dirty set of blocks LRU chain of high access frequency on LRU position is moved to the low dirty set of blocks of access frequency
On MRU position in LRU chain, and the memory block once on MRU position is arranged in front of mobile memory block simultaneously, has been moved
Bi Hou regenerates new LRU chain to the storage set of blocks after movement.
If B, judgement determines for the high clean block of access frequency belonging to the memory block gone out, by the dirty set of blocks of high access frequency
Memory block in LRU chain on LRU position is moved on the MRU position in the low dirty set of blocks LRU chain of access frequency, and once simultaneously
Memory block on MRU position is arranged in front of mobile memory block, after mobile, again to the storage set of blocks after movement
Generate new LRU chain.
A kind of cache replacement method postponing PCM memory service life provided in an embodiment of the present invention, by cache
Dirty piece and clean block are distinguished in all treatment processes of block, is each provided with and more fully protects for dirty piece and clean block
Shield, realizes under the premise of not influencing overall performance, effectively reduces the amount of writing back to PCM memory, extend service life.
Fig. 2 shows one embodiment of the invention provide a kind of delay PCM memory service life cache alternative,
Including configuration module 21, sorting module 22, insertion module 23, access modules 24 and replace module 25, in which:
Configuration module 21, for multiple caches blocks to be arranged, and it is clean that each memory block is divided into low access frequency
Set of blocks, the dirty set of blocks of low access frequency, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency；
Sorting module 22, for being ranked up according to the time that memory block last time is accessed in every class memory block,
Obtain LRU chain corresponding to each storage set of blocks, wherein in LRU chain last time access time apart from current time most
Close memory block is MRU block, and the last time access time memory block farthest apart from current time is LRU block；
It is inserted into module 23, for when having detected the insertion of new memory block, determining that new memory block uses to read missing if judging
Incorporation way is inserted into, then new memory block is arranged on the MRU position of the low clean set of blocks LRU chain of access frequency, lays equal stress on
Newly-generated corresponding LRU chain；If judgement determines that new memory block is inserted into using missing incorporation way is write, new memory block is set
It sets on the MRU position of the dirty set of blocks LRU chain of low access frequency, and regenerates corresponding LRU chain；
Access modules 24, for detect deposited memory block accessed hit when, if judgement determines the storage
Block is hit using hit mode is read, and described to have deposited the low clean set of blocks of access frequency or high access frequency belonging to memory block dry
Net set of blocks will then have been deposited memory block and be moved on the MRU position of the clean block LRU chain of high access frequency, and regenerated correspondence
LRU chain；If other situations, then it will deposit memory block and be moved on the MRU position of dirty piece of LRU chain of high access frequency, laid equal stress on
Newly-generated corresponding LRU chain；
For module 25 out, for detect need to be for going out one and deposit memory block when, successively to the clean block collection of low access frequency
The LRU chain of conjunction, the dirty set of blocks of low access frequency, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency is examined
It surveys, if detect first non-empty LRU chain, the memory block on the LRU position in the LRU chain is gone out, and to the LRU
The corresponding storage set of blocks of chain regenerates corresponding LRU chain.
It is described to be also used to for module out in the case where being likely to occur: if judgement determines for low visit belonging to the memory block gone out
It asks dirty piece of frequency, then the memory block in the clean set of blocks LRU chain of high access frequency on LRU position is moved to low access frequency and done
On MRU position in net set of blocks LRU chain, while the memory block in the dirty set of blocks LRU chain of high access frequency on LRU position being moved
It moves on the MRU position in the low dirty set of blocks LRU chain of access frequency, and regenerates corresponding LRU chain.If judgement determines
Memory block belonging to the high clean block of access frequency, then by the dirty set of blocks LRU chain of high access frequency on LRU position memory block move
It moves on the MRU position in the low dirty set of blocks LRU chain of access frequency, and regenerates corresponding LRU chain.
Since described device of the embodiment of the present invention is identical as the principle of above-described embodiment the method, for more detailed
Explain that details are not described herein for content.
It should be noted that can be by hardware processor (hardware processor) come real in the embodiment of the present invention
Existing related function module.
A kind of cache alternative postponing PCM memory service life provided in an embodiment of the present invention, by cache
Dirty piece and clean block are distinguished in all treatment processes of block, is each provided with and more fully protects for dirty piece and clean block
Shield, realizes under the premise of not influencing overall performance, effectively reduces the amount of writing back to PCM memory, extend service life.
In addition, it will be appreciated by those of skill in the art that although some embodiments described herein include other embodiments
In included certain features rather than other feature, but the combination of the feature of different embodiments mean it is of the invention
Within the scope of and form different embodiments.For example, in the following claims, embodiment claimed is appointed
Meaning one of can in any combination mode come using.
It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and ability
Field technique personnel can be designed alternative embodiment without departing from the scope of the appended claims.In the claims,
Any reference symbol between parentheses should not be configured to limitations on claims.Word "comprising" does not exclude the presence of not
Element or step listed in the claims.Word "a" or "an" located in front of the element does not exclude the presence of multiple such
Element.The present invention can be by means of including the hardware of several different elements and being come by means of properly programmed computer real
It is existing.In the unit claims listing several devices, several in these devices can be through the same hardware branch
To embody.The use of word first, second, and third does not indicate any sequence.These words can be explained and be run after fame
Claim.
Those of ordinary skill in the art will appreciate that: the above embodiments are only used to illustrate the technical solution of the present invention., and
It is non-that it is limited；Although present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art
It is understood that it is still possible to modify the technical solutions described in the foregoing embodiments, either to part of or
All technical features are equivalently replaced；And these are modified or replaceed, it does not separate the essence of the corresponding technical solution this hair
Bright claim limited range.
Claims (6)
1. a kind of cache replacement method for postponing PCM memory service life characterized by comprising
Multiple caches blocks are set, and it is dirty that each memory block is divided into the clean set of blocks of low access frequency, low access frequency
Set of blocks, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency；
In every class memory block, according to memory block last time, the accessed time is ranked up, and obtains each storage set of blocks
Corresponding LRU chain, wherein the last time access time memory block nearest apart from current time is MRU block in LRU chain,
The last time access time memory block farthest apart from current time is LRU block；
When having detected the insertion of new memory block, if judgement determines that new memory block is inserted into using missing incorporation way is read,
New memory block is arranged on the MRU position of the low clean set of blocks LRU chain of access frequency, and regenerates corresponding LRU chain；If
Judgement determines that new memory block is inserted into using missing incorporation way is write, then new memory block is arranged and collects at dirty piece of low access frequency
On the MRU position for closing LRU chain, and regenerate corresponding LRU chain；
When detect deposited memory block accessed hit when, described deposited memory block if judgement determines and ordered using hit mode is read
In, and it is described deposited the low clean set of blocks of access frequency or the clean set of blocks of high access frequency belonging to memory block, then will deposit
Storage block is moved on the MRU position of the clean block LRU chain of high access frequency, and regenerates corresponding LRU chain；If other feelings
Condition will then have been deposited memory block and be moved on the MRU position of dirty piece of LRU chain of high access frequency, and regenerated corresponding LRU chain；
When memory block need to have been deposited for out one by detecting, successively to the clean set of blocks of low access frequency, dirty piece of low access frequency collection
The LRU chain of conjunction, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency is detected, if detecting first non-empty
When LRU chain, the memory block on the LRU position in the LRU chain is gone out, and to the corresponding storage set of blocks weight of the LRU chain
Newly-generated corresponding LRU chain.
2. the method according to claim 1, wherein when detecting first non-empty LRU chain, by the LRU
The memory block on LRU position in chain is replaced, and regenerates corresponding LRU chain to the corresponding storage set of blocks of the LRU chain
Later, further includes:
If judgement determines for dirty piece of low access frequency belonging to the memory block gone out, will be in the clean set of blocks LRU chain of high access frequency
Memory block on LRU position is moved on the MRU position in the low clean set of blocks LRU chain of access frequency, while frequently by height access
Memory block in the dirty set of blocks LRU chain of rate on LRU position is moved on the MRU position in the low dirty set of blocks LRU chain of access frequency,
And regenerate corresponding LRU chain.
3. the method according to claim 1, wherein when detecting first non-empty LRU chain, by the LRU
The memory block on LRU position in chain is replaced, and regenerates corresponding LRU chain to the corresponding storage set of blocks of the LRU chain
Later, further includes:
If judgement determines for the high clean block of access frequency belonging to the memory block gone out, will be in the dirty set of blocks LRU chain of high access frequency
Memory block on LRU position is moved on the MRU position in the low dirty set of blocks LRU chain of access frequency, and is regenerated corresponding
LRU chain.
4. a kind of cache alternative for postponing PCM memory service life characterized by comprising
Configuration module, for being arranged multiple caches blocks, and by each memory block be divided into the clean set of blocks of low access frequency,
The dirty set of blocks of low access frequency, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency；
Sorting module, in every class memory block, the accessed time to be ranked up according to memory block last time, and acquisition is every
LRU chain corresponding to a storage set of blocks, wherein last time access time deposits apart from current time is nearest in LRU chain
Storage block is MRU block, and the last time access time memory block farthest apart from current time is LRU block；
It is inserted into module, for when having detected the insertion of new memory block, determining that new memory block uses to read missing introducing side if judging
Formula is inserted into, then new memory block is arranged on the MRU position of the low clean set of blocks LRU chain of access frequency, and regenerate
Corresponding LRU chain；If judgement determines that new memory block is inserted into using missing incorporation way is write, new memory block is arranged low
On the MRU position of the dirty set of blocks LRU chain of access frequency, and regenerate corresponding LRU chain；
Access modules, for being used if having deposited memory block described in judgement is determining when detecting that having deposited memory block is accessed hit
It reads hit mode to be hit, and described has deposited the low clean set of blocks of access frequency or the clean block collection of high access frequency belonging to memory block
It closes, then will deposit memory block and be moved on the MRU position of the clean block LRU chain of high access frequency, and regenerated corresponding LRU
Chain；If other situations, then it will deposit memory block and be moved on the MRU position of dirty piece of LRU chain of high access frequency, and regenerated
Corresponding LRU chain；
For module out, for detect need to be for going out one and deposit memory block when, successively to the clean set of blocks of low access frequency, low visit
Ask that the LRU chain of the dirty set of blocks of frequency, the clean set of blocks of high access frequency and the dirty set of blocks of high access frequency is detected, if detection
When to first non-empty LRU chain, the memory block on the LRU position in the LRU chain is gone out, and corresponding to the LRU chain
Storage set of blocks regenerates corresponding LRU chain.
5. device according to claim 4, which is characterized in that described to be also used to for module out: if judgement determines
Dirty piece of low access frequency belonging to memory block, then it is the memory block in the clean set of blocks LRU chain of high access frequency on LRU position is mobile
Onto the MRU position in the clean set of blocks LRU chain of low access frequency, while by LRU bit in the dirty set of blocks LRU chain of high access frequency
The memory block set is moved on the MRU position in the low dirty set of blocks LRU chain of access frequency, and regenerates corresponding LRU chain.
6. device according to claim 4, which is characterized in that described to be also used to for module out: if judgement determines
The high clean block of access frequency belonging to memory block, then it is the memory block in the dirty set of blocks LRU chain of high access frequency on LRU position is mobile
Onto the MRU position in the dirty set of blocks LRU chain of low access frequency, and regenerate corresponding LRU chain.
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| CN201610466832.1A CN106155938B (en) | 2016-06-23 | 2016-06-23 | Postpone the cache replacement method and device of PCM memory service life |
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| CN201610466832.1A CN106155938B (en) | 2016-06-23 | 2016-06-23 | Postpone the cache replacement method and device of PCM memory service life |
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| CN104317739A (en) * | 2014-10-28 | 2015-01-28 | 清华大学 | Hybrid memory paging method and device |
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| Title |
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| Roberto Rodr＇ıguez-Rodr＇ıguez 等.Reducing writes in phase-change memory environments by using efficient cache replacement policies.《 Proceeding DATE "13 Proceedings of the Conference on Design, Automation and Test in Europe》.2013,第93-96页. |
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