CN106095626A - Modified model two takes two frameworks - Google Patents
Modified model two takes two frameworks Download PDFInfo
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- CN106095626A CN106095626A CN201610455088.5A CN201610455088A CN106095626A CN 106095626 A CN106095626 A CN 106095626A CN 201610455088 A CN201610455088 A CN 201610455088A CN 106095626 A CN106095626 A CN 106095626A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
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- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
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Abstract
The present invention relates to a kind of modified model two and take two frameworks, including the standby system that main system is identical with main system framework；Main system includes for processing the first data and obtaining the first processing unit of the first result, for processing the first data and obtaining the second processing unit of the second result, for obtaining the first result and the second result and comparing and export the two of the 3rd result and take two comparing units, main system also includes that, to the first processing unit, the monitoring unit of the second processing unit output reference clock, monitoring unit obtains first task data in the first processing unit and obtains the second task data in the second processing unit；Monitoring unit compares first task data and the second task data, and when both do not mate, monitoring unit controls two and takes two comparing units stopping outputs.The present invention monitors the first processing unit and the second processing unit task data in real time, when two processing units monitoring data are inconsistent, directly cuts off output, improves security platform output response speed.
Description
[technical field]
The present invention relates to field of processors, particularly relate to a kind of modified model two and take two frameworks.
[background technology]
Either computer interlock (computer-based interlocking, CBI) or vehicle-mounted row in signaling system
The core row control subsystems such as car automatic protective system (AUTO train protection, ATP), are all based on fail-safe computer
Platform building.Fail-safe computer is on the basis of the system of redundancy, by effective management of systems soft ware, is formed high safe, high
Computer system reliably.
Refering to Fig. 1, existing 2oo2 security architecture is made up of, often four hardware configuration processing units identical with function
Two processing units composition one is two to take two subsystems, and two is that two to take two 26S Proteasome Structure and Functions identical, two be between for active and standby
Redundancy relationship.In each system, two take two processing unit operation independents of two, then take two comparing units two enter processing
Row compares voting, is equivalent to logic and operation, if result is consistent, this is normal output, if inconsistent, judges that this is event
Barrier, automatically switching to another is two to take two subsystems.Two is that the two active and standby structures taking between two have ensured the reliable of whole framework
Property, two take two in two system takes two comparing units and has then ensured the safety of whole framework.
The synchronous method realizing redundant system at present is that software task level synchronizes, two processing units (processing unit 1, places
Reason unit 2) to run identical program but work independently from each other, system is set up within the working cycle and one or more is compared voting
Point, carries out synchronization by the communication between processing unit to task point identical in two CPU and compares, reach to detect two CPU
Work conforming purpose.If it is inconsistent, carry out troubleshooting.When previous task is untreated complete, and latter task arrives
Reaching, the result causing a passage output is last structure, and system availability is poor.Further, phase between two subsystems
Independent operating, lacks the properly functioning monitoring of system mutually.When system race flies, mistake input causes final output error.
[summary of the invention]
For solving foregoing problems, the present invention proposes a kind of modified model two and takes two frameworks, for completion system timing and system
Control function, it is ensured that not output error result.
For reaching object defined above, the present invention adopts the following technical scheme that a kind of modified model two takes two frameworks, including main system
The standby system identical with described main system framework；Described main system includes for processing the first data and obtaining the first result
First processing unit, for processing the first data and obtaining the second processing unit of the second result, is used for obtaining described first knot
Fruit and the second result also compare and export the two of the 3rd result and take two comparing units, it is characterised in that:
Described main system also includes to described first processing unit, the monitoring list of the second processing unit output reference clock
Unit, described monitoring unit obtains first task data in described first processing unit and obtains second in described second processing unit
Task data；Described monitoring unit more described first task data and the second task data, when both do not mate, described prison
Control unit controls described two and takes two comparing units stopping outputs.
First preferred version of the present invention is: described first processing unit and the second processing unit are the process of different framework
Device.
Second preferred version of the present invention is: the framework of described first processing unit is X86, PowerPC, ARM or MIPS.
3rd preferred version of the present invention is: the framework of described second processing unit is X86, PowerPC, ARM or MIPS.
The present invention can reach following technique effect: monitoring unit exports a reference clock, for two processing units
Tasks synchronization.Use reference clock to synchronize to avoid task time in different processor framework inconsistent, reduce design choosing
Type limitation, increases security system framework extensibility；Monitoring the first processing unit and the second processing unit task data in real time,
When two processing units monitoring data are inconsistent, directly cutting off two and take two comparing units outputs, raising security platform exports and rings
Answer speed.
These features of the present invention and advantage will be detailed in following detailed description of the invention, accompanying drawing exposure.
[accompanying drawing explanation]
The present invention is described further below in conjunction with the accompanying drawings:
Fig. 1 is two to take two subsystem architecture figures in prior art of the present invention.
Fig. 2 is the main system Organization Chart that the modified model two of the embodiment of the present invention 1 takes two frameworks.
[detailed description of the invention]
The technical scheme of the embodiment of the present invention is explained and illustrated by the accompanying drawing below in conjunction with the embodiment of the present invention, but under
State embodiment and be only the preferred embodiments of the present invention, and not all.Based on the embodiment in embodiment, those skilled in the art
On the premise of not making creative work, obtained other embodiments, broadly fallen into protection scope of the present invention.
Embodiment 1.
Referring to Fig. 2, a kind of modified model two takes two frameworks, including the standby system that main system is identical with main system framework；Main
System includes for processing the first data and obtaining the first processing unit of the first result, for processing the first data and obtaining the
Second processing unit of two results, is used for obtaining the first result and the second result and comparing and export the two of the 3rd result taking
Two comparing units,
Main system also includes that, to the first processing unit, the monitoring unit of the second processing unit output reference clock, monitoring is single
Unit obtains first task data in the first processing unit and obtains the second task data in the second processing unit；Monitoring unit compares
First task data and the second task data, when both do not mate, monitoring unit controls two and takes two comparing units stopping outputs.
In the case of both are unmatched, monitoring unit can control standby system and take over the process work of main system.Separately,
Switching between main system and standby system, it is also possible to completed by technology of the prior art.
First processing unit and the second processing unit are the processor of different framework.Such as, the first processing unit or second
The framework of processing unit is X86, PowerPC, ARM or MIPS.Two processing unit isomery designs: reduce common cause failure.
The above, the only detailed description of the invention of the present invention, but protection scope of the present invention is not limited thereto, and is familiar with
This those skilled in the art should be understood that the present invention includes but not limited to accompanying drawing and interior described in detailed description of the invention above
Hold.Any it is intended to be included in the scope of claims without departing from the function of the present invention and the amendment of structural principle.
Claims (4)
1. modified model two takes two frameworks, including the standby system that main system is identical with described main system framework；Described principal series
System includes for processing the first data and obtaining the first processing unit of the first result, for processing the first data and obtaining second
Second processing unit of result, for obtaining described first result and the second result and comparing and export the two of the 3rd result
Take two comparing units, it is characterised in that:
Described main system also includes to described first processing unit, the monitoring unit of the second processing unit output reference clock, institute
State monitoring unit obtain first task data in described first processing unit and obtain the second task in described second processing unit
Data；Described monitoring unit more described first task data and the second task data, when both do not mate, described monitoring list
Unit controls described two and takes two comparing units stopping outputs.
The most according to claim 1, modified model two takes two frameworks, it is characterised in that: described first processing unit and second processes
Unit is the processor of different framework.
Modified model two the most according to claim 1 or claim 2 takes two frameworks, it is characterised in that: the framework of described first processing unit
For X86, PowerPC, ARM or MIPS.
Modified model two the most according to claim 1 or claim 2 takes two frameworks, it is characterised in that: the framework of described second processing unit
For X86, PowerPC, ARM or MIPS.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201610455088.5A CN106095626A (en) | 2016-06-21 | 2016-06-21 | Modified model two takes two frameworks |
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| CN201610455088.5A CN106095626A (en) | 2016-06-21 | 2016-06-21 | Modified model two takes two frameworks |
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| CN106095626A true CN106095626A (en) | 2016-11-09 |
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| CN201610455088.5A Pending CN106095626A (en) | 2016-06-21 | 2016-06-21 | Modified model two takes two frameworks |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019080477A1 (en) * | 2017-10-24 | 2019-05-02 | 北京全路通信信号研究设计院集团有限公司 | Computer-based interlocking system and redundancy switching method thereof |
-
2016
- 2016-06-21 CN CN201610455088.5A patent/CN106095626A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019080477A1 (en) * | 2017-10-24 | 2019-05-02 | 北京全路通信信号研究设计院集团有限公司 | Computer-based interlocking system and redundancy switching method thereof |
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Application publication date: 20161109 |
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| RJ01 | Rejection of invention patent application after publication |