CN106059546A - Pulse modulation processing circuit - Google Patents
Pulse modulation processing circuit Download PDFInfo
- Publication number
- CN106059546A CN106059546A CN201610595218.5A CN201610595218A CN106059546A CN 106059546 A CN106059546 A CN 106059546A CN 201610595218 A CN201610595218 A CN 201610595218A CN 106059546 A CN106059546 A CN 106059546A
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- China
- Prior art keywords
- circuit
- voltage
- connects
- signal
- effect transistor
- Prior art date
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- 230000001629 suppression Effects 0.000 claims abstract description 10
- 238000001514 detection method Methods 0.000 claims abstract description 8
- 230000005669 field effect Effects 0.000 claims description 34
- 230000005611 electricity Effects 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 10
- 230000004069 differentiation Effects 0.000 claims description 2
- 238000004080 punching Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 206010021703 Indifference Diseases 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 230000002085 persistent effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
Abstract
The present invention relates to the field of circuit design, and aims to solve technical problems of overshoot output voltage or overhigh negative gain and uncontrollable gain due to unreasonable arrangement of an overshoot suppression circuit. The present invention relates to a pulse modulation processing circuit. The pulse modulation processing circuit mainly comprises a linear compensation drive circuit for receiving an input voltage signal, a first operational amplifier for outputting voltage signal truncation, receiving a feedback signal output by the linear compensation drive circuit and outputting a modulation drive signal to the linear compensation drive circuit, a voltage detection circuit for receiving the modulation drive signal output by the first operational amplifier, and an overshoot detection circuit for receiving the feedback signal output by the linear compensation drive circuit and a detection signal output by the voltage detection circuit. The pulse modulation processing circuit is used for voltage modulation.
Description
Technical field
The present invention relates to circuit design field, be specifically related to a kind of impulse modulation and process circuit.
Background technology
In prior art, Automated condtrol part and motor part use same alternating current power supply, introduce more astable
Property load and substantial amounts of system electromagnetic noise and cross rush the unconventional situations such as signal generation often；Therefore, high efficiency is introduced reasonable
Voltage modulator be necessary.For there being the voltage modulator of punching suppression, such as, it is provided with Zener diode
Manipulator, owing to utilizing indifference chopping way to limit output, which inhibits input signal gain and is not suitable for control chip
Feedback detection；It is provided with the operational amplifier without logic control and the manipulator of field-effect tube structure, when input signal is negative letter
Number source is, exists and unnecessary crosses punching suppression, causes output voltage too low, it is impossible to provide loaded work piece voltage, and this manipulator is examined
When measuring punching generation, there is also the field effect transistor pinch off of outfan not in time.Additionally, pwm circuit has a controlled maximum
Dutycycle, but the gain that neither one is controlled simultaneously.Controllable gain is to need for keeping other element (such as feedback loop) to stablize
Want.Without stability, feedback loop can not produce preferable output signal.Therefore, have controlled maximum duty cycle and
The pwm circuit of controllable gain is worth looking for.
Summary of the invention
For above-mentioned prior art, present invention aim at providing a kind of impulse modulation to process circuit, it aims to solve the problem that existing
The output voltage having technology unreasonable owing to overshoot suppression circuit is arranged and to cause does not meets design and requires and gain is uncontrollable etc.
Technical problem.
For reaching above-mentioned purpose, the technical solution used in the present invention is as follows:
A kind of impulse modulation processes circuit, including charge-discharge circuit, receives initial signal and receives the first reference voltage letter
Number；Differential comparator, receives the second reference voltage signal and receives the initial voltage of charge-discharge circuit output；Voltage output electricity
Road, receives the differentiation voltage signal of differential comparator output and receives initial signal；Also include that voltage overshoot suppresses modulation circuit,
Including linear compensation drive circuit, receive the input voltage signal that voltage follower circuit sends；Described voltage overshoot presses down
Modulation circuit processed, including the first operational amplifier, blocks for output voltage signal, receives linear compensation drive circuit defeated
The feedback signal that goes out also exports modulated drive signal to linear compensation drive circuit；Described voltage overshoot suppression modulation circuit,
Including voltage detecting circuit, receive the modulated drive signal of the first operational amplifier output；Described voltage overshoot suppression
Modulation circuit, the most also included rushing testing circuit, received feedback signal and the voltage detecting of the output of linear compensation drive circuit
The detection signal of circuit output.
In such scheme, described linear compensation drive circuit, including the first field effect transistor, its drain electrode receives input voltage
Signal；First resistance, its one end connects the source electrode of the first field effect transistor；Audion, its emitter stage connects another of the first resistance
Hold and be additionally coupled to its base stage；Second resistance, the colelctor electrode of its one end connecting triode；Lower voltage node, connects the second resistance
The other end；Linear compensation circuit, connects the first field effect transistor.
In such scheme, described linear compensation circuit, including the first diode, its high electrode connects the first field effect transistor
Drain electrode and low electrode connect the grid of the first field effect transistor；Second diode, its high electrode connects the source of the first field effect transistor
Pole and low electrode connect the grid of the first field effect transistor；3rd diode, its low electrode connects the drain electrode of the first field effect transistor；The
Four audions, its low electrode connects the source electrode of the first field effect transistor；Electric capacity, its one end connects the source electrode of the first field effect transistor；Its
In, the 3rd diode, the 4th audion and electric capacity are additionally coupled to the emitter stage of audion.Diode is used for command potential point, draws
Big electric potential difference and reduce rising time and trailing edge time；Electric capacity is used for storing up electric charge, keeps the stability of output.
In such scheme, described voltage detecting circuit, including the first comparator, its high electricity end connects has first with reference to electricity
Pressure node and low electricity terminate into modulated drive signal；Second comparator, its high electricity end connects the second reference voltage node and low
Electrode accesses modulated drive signal；Or door, its input port connects outfan and the output of the first comparator of the second comparator
End.
In such scheme, described mistake rushes testing circuit, and including NAND gate, its input port connects or the outfan of door；
Second operational amplifier, its inverting input connects the 3rd reference voltage node, and in-phase input end accesses feedback signal and defeated
Go out end and be connected to the input port of NAND gate；Second field effect transistor, its grid connects outfan and the leakage of the second operational amplifier
Modulated drive signal is accessed in pole.
In such scheme, the first described operational amplifier, its in-phase input end accesses feedback signal and inverting input
Connect the 3rd reference voltage node.
In such scheme, the second described field effect transistor, its source electrode connects the voltage output end of a processor.
In such scheme, the first described field effect transistor, select depletion type.
In such scheme, the first described operational amplifier or the second operational amplifier, select differential operational amplifier.
Compared with prior art, beneficial effects of the present invention: when excessively rushing signal input, it is possible to the pinch off that powers in time exports
Field effect transistor thus stop and have influence on the next load further；Modulation is controlled by dual operational amplifier, the self feed back of many comparators
Drive signal voltage amplitude and persistent period；Pass through the present invention, it is achieved that linear between dutycycle and the controllable gain of signal
Relation.
Accompanying drawing explanation
Fig. 1 is the voltage overshoot suppression modulation circuit schematic diagram of the present invention；
Fig. 2 is the circuit more preferable embodiment schematic diagram of the present invention；
Fig. 3 is the principle schematic of the present invention；
Fig. 4 is charge-discharge circuit and the voltage follower circuit schematic diagram of the present invention.
Detailed description of the invention
All features disclosed in this specification, or disclosed all methods or during step, except mutually exclusive
Feature and/or step beyond, all can combine by any way.
The present invention will be further described below in conjunction with the accompanying drawings:
Embodiment 1
Such as Fig. 1, described reference voltage node V1-V4, direct voltage source or microcontroller voltage output end all can be used
Power supply, is excessively rushed signal and is introduced by input voltage signal Vin, and depletion field effect transistor Q2 operating conditions is non-modulation state, the most defeated
Enter voltage signal and be directly equal to output voltage signal Vout；For reference voltage node V2, need keep input voltage signal with
The difference of reference voltage node V2 positive voltage is higher than the magnitude of voltage of modulated drive signal；When reference voltage node V3 magnitude of voltage is higher than
The magnitude of voltage of modulated drive signal or when comparator U6 exports high level, and examine at the in-phase input end of operational amplifier U2
Measuring when rushing signal, NAND gate U3A makes field effect transistor Q1 end, and operational amplifier U1 had also detected that simultaneously and crossed punching simultaneously
Signal, during the cut-off of field effect transistor Q1 before have begun to boosting, until triggering depletion field effect transistor Q2 pinch off, served as rushing signal from
When disappearing in input voltage signal Vin, low for output electricity, NAND gate U3A are made field effect transistor Q1 lead by operational amplifier U1, U2
Logical, modulated drive signal is released by effect pipe Q1 and is gradually weakened, and input voltage signal is recovered by depletion field effect transistor Q2
Obtain output voltage signal Vout.
Such scheme can also improve further, as Fig. 2, voltage node Vm and Vp can be controlled by a processor, is used for
Set initial range and regulation is released the time, and additionally include that the power vd D being sequentially connected with, resistance R3, depletion type field are imitated
Should pipe Q4 and synchro switch audion Q5；Depletion field effect transistor Q4 can rush signal detection then crossing, it is provided that voltage is quick
Rise；Synchro switch audion Q5, its base stage accesses voltage node Vs, and voltage node Vs magnitude of voltage to be much smaller than the input of punching
Voltage signal Vin magnitude of voltage but be intended to cross rush time more than junction field threshold voltage, signal can be rushed carry out high level of synchronization with crossing.
Embodiment 2
It is described in detail with reference to Fig. 4.Specifically, charge-discharge circuit 11 includes phase inverter U8, U9 and U10, switchs three poles
Pipe Q5, electric capacity C2, switch triode Q4 and power vd D, inverter group receives initial signal 20 and generates anti-phase rear signal.Each
Switch triode, using the anti-phase rear signal that receives as control signal, controls the disconnection between other two ports or conducting,
And be used on pwm circuit 11 with this.Specifically, after anti-phase, signal is numeral 0, and switch triode Q5 turns on so that power vd D
Electric capacity C2 is charged, so that the voltage linear of the port of electric capacity C2 increases.After anti-phase, signal is numeral 1, switch triode
Q5 disconnects, and switch triode Q4 turns on.Therefore electric capacity C2 is discharged by switch triode Q4, and electric capacity C2 connects differential comparator 12
End point voltage be dramatically reduced to reference voltage 21.Described voltage follower circuit, including current source I1, a pair composition pushes away
Audion Q7, Q8 that draw output circuit structure, that controlled by initial signal, exported the audion of control by differential comparator 12
Q6；Wherein current source I1, audion Q6 and audion Q8 are in the specific implementation according to respective input signal and make conductivity ratio
Relatively, the magnitude of voltage height of input voltage signal Vin is together decided on.
The above, the only detailed description of the invention of the present invention, but protection scope of the present invention is not limited thereto, and any
Belong to those skilled in the art in the technical scope that the invention discloses, the change that can readily occur in or replacement, all answer
Contain within protection scope of the present invention.
Claims (5)
1. an impulse modulation processes circuit, it is characterised in that include
Charge-discharge circuit, receives initial signal and receives the first reference voltage signal；
Differential comparator, receives the second reference voltage signal and receives the initial voltage of charge-discharge circuit output；
Voltage follower circuit, receives the differentiation voltage signal of differential comparator output and receives initial signal；
Also include that voltage overshoot suppresses modulation circuit, including
Linear compensation drive circuit, receives the input voltage signal that voltage follower circuit sends；
Described voltage overshoot suppression modulation circuit, including the first operational amplifier, blocks for output voltage signal, connects
Take-up compensation drive circuit output feedback signal and export modulated drive signal to linear compensation drive circuit；
Described voltage overshoot suppression modulation circuit, including voltage detecting circuit, receives the first operational amplifier output
Modulated drive signal；
Described voltage overshoot suppression modulation circuit, the most also included rushing testing circuit, received linear compensation drive circuit defeated
The feedback signal gone out and the detection signal of voltage detecting circuit output.
A kind of impulse modulation the most according to claim 1 processes circuit, it is characterised in that described linear compensation drives electricity
Road, including
First field effect transistor Q2, its drain electrode receives input voltage signal；
First resistance R1, its one end connects the source electrode of the first field effect transistor Q2；
Audion Q3, its emitter stage connects the other end of the first resistance R1 and is additionally coupled to its base stage；
Second resistance R2, the colelctor electrode of its one end connecting triode Q3；
Lower voltage node VSS, connects the other end of the second resistance R2；
Linear compensation circuit, connects the first field effect transistor Q2.
A kind of impulse modulation the most according to claim 2 processes circuit, it is characterised in that described linear compensation circuit,
Including
First diode D1, its high electrode connects the drain electrode of the first field effect transistor Q2 and low electrode connects the first field effect transistor Q2
Grid；
Second diode D2, its high electrode connects the source electrode of the first field effect transistor Q2 and low electrode connects the first field effect transistor Q2
Grid；
3rd diode D3, its low electrode connects the drain electrode of the first field effect transistor Q2；
4th audion D4, its low electrode connects the source electrode of the first field effect transistor Q2；
Electric capacity C1, its one end connects the source electrode of the first field effect transistor Q2；
Wherein, the 3rd diode D3, the 4th audion D4 and electric capacity C1 are additionally coupled to the emitter stage of audion Q3.
A kind of impulse modulation the most according to claim 1 processes circuit, it is characterised in that described voltage detecting circuit,
Including
First comparator U5, its high electricity end connects has the first reference voltage node V2 and low electricity to terminate into modulated drive signal；
Second comparator U6, its high electricity end connects has the second reference voltage node V3 and low electrode to access modulated drive signal；
Or door U4, its input port connects outfan and the outfan of the first comparator U5 of the second comparator U6.
A kind of impulse modulation the most according to claim 4 processes circuit, it is characterised in that described mistake rushes testing circuit,
Including
NAND gate U3A, its input port connects or the outfan of door U4；
Second operational amplifier U2, its inverting input connects the 3rd reference voltage node V1, and in-phase input end accesses feedback
Signal and outfan are connected to the input port of NAND gate U3A；
Second field effect transistor Q1, its grid connects outfan and the drain electrode access modulated drive signal of the second operational amplifier U2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610595218.5A CN106059546A (en) | 2016-07-26 | 2016-07-26 | Pulse modulation processing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610595218.5A CN106059546A (en) | 2016-07-26 | 2016-07-26 | Pulse modulation processing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106059546A true CN106059546A (en) | 2016-10-26 |
Family
ID=57417553
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610595218.5A Pending CN106059546A (en) | 2016-07-26 | 2016-07-26 | Pulse modulation processing circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106059546A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106856371A (en) * | 2017-02-28 | 2017-06-16 | 重庆西山科技股份有限公司 | push-pull drive device and method with protection |
-
2016
- 2016-07-26 CN CN201610595218.5A patent/CN106059546A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106856371A (en) * | 2017-02-28 | 2017-06-16 | 重庆西山科技股份有限公司 | push-pull drive device and method with protection |
| CN106856371B (en) * | 2017-02-28 | 2023-06-20 | 重庆西山科技股份有限公司 | Push-pull driving device and method with protection |
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| C06 | Publication | ||
| PB01 | Publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20161026 |
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| WD01 | Invention patent application deemed withdrawn after publication |