CN106056051B - Partition scanning type fingerprint processing method - Google Patents
Partition scanning type fingerprint processing method Download PDFInfo
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- CN106056051B CN106056051B CN201610345431.0A CN201610345431A CN106056051B CN 106056051 B CN106056051 B CN 106056051B CN 201610345431 A CN201610345431 A CN 201610345431A CN 106056051 B CN106056051 B CN 106056051B
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- 102100036465 Autoimmune regulator Human genes 0.000 claims abstract description 43
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- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
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Abstract
The embodiment of the invention discloses a partition scanning type fingerprint processing method, which comprises the following steps: configuring a target scanning area, wherein the target scanning area comprises P subarea induction electrode arrays; loading default gains for PGA1 and PGA 2; controlling the scanning of a target scanning area, and determining and configuring a first counteracting configuration signal of the counteracting circuit 1; determining and configuring a first target gain of PGA 1; determining and configuring a second cancellation configuration signal of the cancellation circuit 2; determining and configuring a second target gain of PGA2 based on the ADC output range; controlling the P subarea induction electrode arrays to scan the user fingerprints and collecting P user fingerprint subarea images based on P group collection circuit configuration parameters corresponding to the P subarea induction electrode arrays; executing splicing processing to obtain a user fingerprint image; and sending the user fingerprint image to the fingerprint image caching device. The embodiment of the invention is beneficial to reducing the offset noise of the fingerprint processing device caused by the uneven surface of the protective layer and improving the resolution ratio of fingerprint acquisition of a user.
Description
Technical Field
The invention relates to the technical field of fingerprint processing, in particular to a partition scanning type fingerprint processing method.
Background
As shown in fig. 1, fig. 1 is a diagram illustrating an example of a conventional semiconductor fingerprint acquisition device acquiring a fingerprint of a user. Wherein, the fingerprint acquisition chip (namely the sensor chip) is arranged below the protective layer, and the fingerprint acquisition chip and the sensor chip are adhered together by glue. As shown in fig. 2, fig. 2 is a diagram illustrating a fingerprint sensing principle based on the semiconductor fingerprint sensing sensor shown in fig. 1. Wherein, the finger and the metal electrode on the surface of the fingerprint acquisition chip form a parasitic capacitance. Because the distances from the valleys and the ridges of the finger to the metal electrodes are different, the formed parasitic capacitance is also different, and thus the fingerprint pattern can be reflected by measuring the parasitic capacitance. Because the glue thickness is less, do not consider the influence of glue to parasitic capacitance. The parasitic capacitance between the finger and the metal electrode (hereinafter referred to as finger capacitance Cf) is expressed as: cf ═ Cx ═ Cy)/(Cx + Cy)
Wherein Cx ═ epsilon _ f ═ S)/df, (epsilon _0 ∈ _ x · S)/dx, Cx is the capacitance between the finger and the surface of the protective layer, Cy is the capacitance between the surface of the protective layer and the metal electrode, S is the electrode area, dx is the thickness of the protective layer, df is the distance between the surface of the finger and the surface of the protective layer, epsilon _0 is the vacuum dielectric constant, epsilon _ x is the dielectric constant of the protective layer, and epsilon _ f is the dielectric constant between the finger and the protective layer.
In the research process, the inventor of the technical scheme finds that offset noise is formed because the problem of uneven thickness exists in the manufacturing process of a protective layer and glue in the conventional semiconductor fingerprint acquisition device, and Cy is different at each position of an acquisition array when the surface of the protective layer is uneven, so that the offset noise needs to be offset.
Disclosure of Invention
The embodiment of the invention provides a partition scanning type fingerprint processing method, which aims to improve the resolution of signals of valleys and ridges of a user finger when the user fingerprint is acquired and offset noise generated in the signal processing process.
The embodiment of the invention discloses a partition scanning type fingerprint processing method, which comprises the following steps:
protective layer, glue, fingerprint collection chip, collector, cancellation circuit 1, programmable gain amplifier PGA1, cancellation circuit 2, PGA2, analog-to-digital converter ADC, control chip, wherein:
the protective layer is bonded with the fingerprint acquisition chip through the glue;
the fingerprint acquisition chip comprises N × M induction electrodes, and the N × M induction electrodes form an induction electrode array with N rows and M columns;
the sensing electrodes in the sensing electrode array are connected with the collector through a selection switch, the selection switch is controlled by a row selection enable signal and a column selection enable signal, the collector is connected with the cancellation circuit 1, the cancellation circuit 1 is connected with the PGA1, the PGA1 is connected with the cancellation circuit 2, the cancellation circuit 2 is connected with the PGA2, the PGA2 is connected with the ADC, and the output end of the ADC is connected with the control chip;
the first control signal output end of the control chip is connected with the cancellation circuit 1, the second control signal output end of the control chip is connected with the PGA1, the third control signal output end of the control chip is connected with the cancellation circuit 2, and the first control signal output end of the control chip is connected with the PGA 2;
and the fingerprint image signal output end of the control chip is used for being connected with a fingerprint image caching device.
In the embodiment of the invention, the collector is used for amplifying and converting a capacitance signal of a finger capacitance Cf (a parasitic capacitance between a finger of a user and an induction electrode) into a voltage signal so as to reduce the noise influence of a subsequent circuit and improve the signal-to-noise ratio;
the offset circuit 1 is used for offsetting most offset noise of an input signal, specifically adopts a switched capacitor method to roughly offset the offset signal for one time, and adopts a successive approximation method to make the average value of the output signal of the ADC close to zero, namely the central value of the acquired fingerprint signal close to zero, so as to offset most offset noise;
the PGA1 is configured to amplify the output signal of the cancellation circuit 1 and input the amplified signal into the cancellation circuit 2, and the PGA1 should use a larger gain (larger than the gain of the PGA 2) to reduce the design requirement of the subsequent circuit;
the offset circuit 2 is used for carrying out secondary fine offset on the offset noise by adopting a switched capacitor method, and the same successive approximation method as that in the offset circuit 1 is adopted to enable the central value of the output signal to be approximately equal to zero, so that the residual offset noise in the circuit is further offset;
the PGA2 is used to make appropriate adjustments to the signal amplitude to meet the ADC input range requirements;
the ADC is used for outputting a digital signal to the control chip so that the control chip can perform feedback control based on the received digital signal.
Based on the fingerprint processing device, the partition scanning type fingerprint processing method provided by the embodiment of the invention specifically comprises the following steps:
configuring a target scanning area, wherein the target scanning area comprises P subarea sensing electrode arrays, and P is an integer greater than 1;
loading default gains for the PGA1 and the PGA 2;
controlling the target scanning area to Scan, and determining and configuring a first counteracting configuration signal Scan1[ n1] of the counteracting circuit 1 based on a preset successive approximation strategy;
controlling the target scan area scan to determine and configure a first target gain of the PGA1 based on the ADC output range;
controlling the target scanning area to Scan, and determining and configuring a second counteracting configuration signal Scan2[ n2] of the counteracting circuit 2 based on the preset successive approximation strategy;
controlling the target scan area scan to determine and configure a second target gain of the PGA2 based on the ADC output range;
controlling the P subarea sensing electrode arrays to Scan the user fingerprints and acquire P user fingerprint subarea images based on P groups of acquisition circuit configuration parameters corresponding to the P subarea sensing electrode arrays, wherein the acquisition circuit configuration parameters comprise a first counteracting configuration signal Scan1[ n1], a second counteracting configuration signal Scan2[ n2], a first target gain and a second target gain;
executing splicing processing on the P user fingerprint partition images to obtain user fingerprint images;
and sending the user fingerprint image to the fingerprint image caching device.
It can be seen that, in the sectional scanning type fingerprint processing method provided in the embodiment of the present invention, for offset noise formed by uneven surface of the protective layer, the target scanning area is divided into a plurality of sectional sensing electrode arrays, the surface of the sectional protective layer corresponding to each sectional sensing electrode array is approximately a flat surface, for each sectional sensing electrode array, a primary coarse cancellation is performed through the cancellation circuit 1, a secondary fine cancellation is performed through the cancellation circuit 2, and a reasonable amplitude adjustment is performed on a circuit signal in the fingerprint processing apparatus by matching with the collector, the PGA1, and the PGA2, so that a plurality of sets of configuration parameters of the acquisition circuit corresponding to the plurality of sectional sensing electrode arrays can be obtained, when a user fingerprint is processed, when scanning of different sectional sensing electrode arrays is controlled, the configuration parameters of the acquisition circuit corresponding to the configuration of the acquisition circuit are configured, so as to enable the signal processing circuit of the fingerprint processing apparatus to be in an optimal, after the plurality of user fingerprint subarea images are acquired, the user fingerprint images are obtained by executing splicing processing on the plurality of user fingerprint subarea images, and finally the user fingerprint images are sent to the fingerprint image caching equipment.
In some possible implementations, the cancellation circuit 1 includes: offset the electric capacity gate switch, offset the electric capacity array, feed back integral capacitance Ci, signal acquisition electric capacity Cs, single-ended amplifier, wherein:
the first end of the signal acquisition capacitor Cs is connected with the output end of the collector and corresponds to a first input signal Vin; n input ends of the cancellation capacitor gating switch are used for accessing a second input signal Vcan1 with a phase opposite to that of the input signal Vin, N output ends of the cancellation capacitor gating switch are correspondingly connected with first ends of N cancellation capacitors in a cancellation capacitor array, second ends of the N cancellation capacitors and second ends of the Cs are connected with the first end of the Ci and a negative input end of the single-ended amplifier, and a positive input end of the single-ended amplifier is grounded; the second end of the Ci and the output end of the single-ended amplifier are connected with the PGA 1;
wherein the N canceling capacitors are illustrated as canceling capacitors Cc (N) (N is 1 to N), and the capacitance value of Cc (k) is 2 times the capacitance value of Cc (k-1), k is 2 to N +1, and N is the number of rows of the sensing electrode array;
the gating signal of the cancellation capacitor gating switch is shown as Scan [ n ], and when the Scan [ n ] is effective, the gating signal corresponds to a gating cancellation capacitor Cc (n);
when the gating signal is Scan [ n ], the output directions of the first output caused by Vin and the second output caused by Vcan1 step are opposite, and cancellation is performed, wherein the output voltage after cancellation is:
where Vout is the output voltage after cancellation.
In some possible implementations, the controlling the scanning of the target scanning area and determining and configuring the first cancellation configuration signal Scan1[ n1] of the cancellation circuit 1 based on a preset successive approximation strategy includes:
if the strobe signal Scan [ j ] is currently enabled]The average value of the output of the corresponding ADC is larger than the upper limit 2 of the output of the ADCNadc-1, then determining the currently enabled strobe signal as said currently enabled strobe signal Scan [ j]And controlling the scanning of the target scanning area to obtain the output average value of the ADC;
if the strobe signal Scan [ j ] is currently enabled]The average value of the output of the corresponding ADC is less than or equal to the upper limit 2 of the output of the ADCNadc-1, then determining a first cancellation configuration signal Scan1[ n1] of the cancellation circuit 1]Is Scan [ j]。
In some possible implementations, the PGA1 includes an input resistor Ri, a feedback resistor Rf, and a second single-ended amplifier, where:
a first end of the Ri is connected to an output end of the cancellation circuit 1, a second end of the Ri is connected to an input end of the Rf and a negative input end of the second single-ended amplifier, a control signal input end of the Rf is used for accessing a Gain control signal Gain1[ m ], and the Gain control signal Gain1[ m ] is used for adjusting a resistance value of the Rf; the positive input end of the second single-ended amplifier is grounded; the output end of the second single-ended amplifier and the output end of the Rf are connected with a cancellation circuit 2;
the gain of the amplifying circuit of the PGA1 is as follows:
wherein, gain is the gain of the amplifying circuit of the PGA 1.
With reference to the first aspect, in some possible implementations, the configuring a target scanning area includes:
when receiving a circuit initialization notification sent by a host, configuring a target scanning area;
or,
and when the touch operation of the finger of the user on the protective layer is detected, configuring a target scanning area.
In some possible implementations, the collector includes a switch circuit, the switch circuit is set first when collecting the fingerprint of the user, and outputs a change signal when detecting that the drive signal Vdr applied to the finger of the user has a step, where a transformation amount of the change signal is:
ΔV＝k*Vdr*Cf/(Cf+Cp)
wherein k is a gain factor of the switching circuit, Vdr is a driving signal applied to a user finger, Cf is a parasitic capacitance between the user finger and the sensing electrode, Cp is a parasitic capacitance of the sensing electrode, and the driving signal includes a sine wave or a square wave.
In some possible implementations, the circuit structure of the cancellation circuit 2 is the same as that of the cancellation circuit 1;
the amplification circuit gain of the PGA1 is greater than the amplification circuit gain of the PGA 2.
In some possible implementations, the protective layer includes at least any one of: sapphire cover plate, glass cover plate and pottery.
In some possible implementations, the surface area of the fingerprint acquisition chip is greater than or equal to 1600um2, the center-to-center distance between the sensing electrodes in the fingerprint acquisition chip is 50um, and the resolution of the fingerprint acquisition chip is 508 DPI.
In some possible implementation modes, the ADC is a differential ADC, the input range of the differential ADC is-Vmax to + Vmax, and the output range of the differential ADC is 0-2Nadc-1, the bit width Nadc of the differential ADC is greater than or equal to M;
the fingerprint image caching device comprises a memory and/or a Graphics Processor (GPU).
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a diagram illustrating an example of a conventional semiconductor fingerprint acquisition device for acquiring a user fingerprint according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a fingerprint sensor based on the semiconductor fingerprint sensor shown in FIG. 1 according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a fingerprint processing apparatus according to an embodiment of the present invention;
fig. 4 is a scene diagram and a timing diagram of a reset signal of a collector and a driving signal applied to a finger of a user in a fingerprint processing device according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a cancellation circuit 1 of a fingerprint processing apparatus according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a PGA11 of a fingerprint processing apparatus according to an embodiment of the present invention;
fig. 7 is a flowchart illustrating a partition scanning type fingerprint processing method according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention discloses a partition scanning type fingerprint processing method, which comprises the following steps: configuring a target scanning area, wherein the target scanning area comprises P subarea induction electrode arrays; loading default gains for PGA1 and PGA 2; controlling the scanning of a target scanning area, and determining and configuring a first counteracting configuration signal of the counteracting circuit 1; determining and configuring a first target gain of PGA 1; determining and configuring a second cancellation configuration signal of the cancellation circuit 2; determining and configuring a second target gain of PGA2 based on the ADC output range; controlling the P subarea induction electrode arrays to scan the user fingerprints and collecting P user fingerprint subarea images based on P group collection circuit configuration parameters corresponding to the P subarea induction electrode arrays; executing splicing processing to obtain a user fingerprint image; and sending the user fingerprint image to the fingerprint image caching device. The embodiment of the invention is beneficial to reducing the offset noise of the fingerprint processing device caused by the uneven surface of the protective layer and improving the resolution ratio of fingerprint acquisition of a user.
As described in detail below.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a fingerprint processing device according to an embodiment of the present invention. As shown in the figure, the fingerprint processing device includes:
protective layer, glue, fingerprint collection chip, collector, cancellation circuit 1, programmable gain amplifier PGA1, cancellation circuit 2, PGA2, analog-to-digital converter ADC, control chip, wherein:
the protective layer is bonded with the fingerprint acquisition chip through the glue;
the fingerprint acquisition chip comprises N × M induction electrodes, and the N × M induction electrodes form an induction electrode array with N rows and M columns;
the sensing electrodes in the sensing electrode array are connected with the collector through a selection switch, the selection switch is controlled by a row selection enable signal and a column selection enable signal, the collector is connected with the cancellation circuit 1, the cancellation circuit 1 is connected with the PGA1, the PGA1 is connected with the cancellation circuit 2, the cancellation circuit 2 is connected with the PGA2, the PGA2 is connected with the ADC, and the output end of the ADC is connected with the control chip;
the first control signal output end of the control chip is connected with the cancellation circuit 1, the second control signal output end of the control chip is connected with the PGA1, the third control signal output end of the control chip is connected with the cancellation circuit 2, and the first control signal output end of the control chip is connected with the PGA 2;
and the fingerprint image signal output end of the control chip is used for being connected with a fingerprint image caching device.
In the embodiment of the invention, the collector is used for amplifying and converting a capacitance signal of a finger capacitance Cf (a parasitic capacitance between a finger of a user and an induction electrode) into a voltage signal so as to reduce the noise influence of a subsequent circuit and improve the signal-to-noise ratio;
the offset circuit 1 is used for offsetting most offset noise of an input signal, specifically adopts a switched capacitor method to roughly offset the offset signal for one time, and adopts a successive approximation method to make the average value of the output signal of the ADC close to zero, namely the central value of the acquired fingerprint signal close to zero, so as to offset most offset noise;
the PGA1 is configured to amplify the output signal of the cancellation circuit 1 and input the amplified signal into the cancellation circuit 2, and the PGA1 should use a larger gain (larger than the gain of the PGA 2) to reduce the design requirement of the subsequent circuit;
the offset circuit 2 is used for carrying out secondary fine offset on the offset noise by adopting a switched capacitor method, and the same successive approximation method as that in the offset circuit 1 is adopted to enable the central value of the output signal to be approximately equal to zero, so that the residual offset noise in the circuit is further offset;
the PGA2 is used to make appropriate adjustments to the signal amplitude to meet the ADC input range requirements;
the ADC is used for outputting a digital signal to the control chip so that the control chip can perform feedback control based on the received digital signal.
It can be seen that, in the sectional scanning type fingerprint processing method provided in the embodiment of the present invention, for offset noise formed by uneven surface of the protective layer, the target scanning area is divided into a plurality of sectional sensing electrode arrays, the surface of the sectional protective layer corresponding to each sectional sensing electrode array is approximately a flat surface, for each sectional sensing electrode array, a primary coarse cancellation is performed through the cancellation circuit 1, a secondary fine cancellation is performed through the cancellation circuit 2, and a reasonable amplitude adjustment is performed on a circuit signal in the fingerprint processing apparatus by matching with the collector, the PGA1, and the PGA2, so that a plurality of sets of configuration parameters of the acquisition circuit corresponding to the plurality of sectional sensing electrode arrays can be obtained, when a user fingerprint is processed, when scanning of different sectional sensing electrode arrays is controlled, the configuration parameters of the acquisition circuit corresponding to the configuration of the acquisition circuit are configured, so as to enable the signal processing circuit of the fingerprint processing apparatus to be in an optimal, after the plurality of user fingerprint subarea images are acquired, the user fingerprint images are obtained by executing splicing processing on the plurality of user fingerprint subarea images, and finally the user fingerprint images are sent to the fingerprint image caching equipment.
Further, referring to fig. 4, fig. 4 is a diagram illustrating a scenario and a timing diagram of a reset signal of a collector and a driving signal applied to a finger of a user in a fingerprint processing apparatus according to an embodiment of the present invention; as shown, the collector includes:
the switch circuit is set in advance when collecting the fingerprint of the user, and outputs a change signal when detecting that a drive signal Vdr applied to the finger of the user has a step, and the transformation quantity of the change signal is as follows:
ΔV＝k*Vdr*Cf/(Cf+Cp)
wherein k is a gain factor of the switching circuit, Vdr is a driving signal applied to a user finger, Cf is a parasitic capacitance between the user finger and the sensing electrode, Cp is a parasitic capacitance of the sensing electrode, and the driving signal includes a sine wave or a square wave.
Further, referring to fig. 5, fig. 5 is a schematic structural diagram of a cancellation circuit 1 of a fingerprint processing apparatus according to an embodiment of the present invention, where as shown in the figure, the cancellation circuit 1 includes:
offset the electric capacity gate switch, offset the electric capacity array, feed back integral capacitance Ci, signal acquisition electric capacity Cs, single-ended amplifier, wherein:
the first end of the signal acquisition capacitor Cs is connected with the output end of the collector and corresponds to a first input signal Vin;
n input ends of the cancellation capacitor gating switch are used for accessing a second input signal Vcan1 with a phase opposite to that of the input signal Vin, N output ends of the cancellation capacitor gating switch are correspondingly connected with first ends of N cancellation capacitors in a cancellation capacitor array, second ends of the N cancellation capacitors and second ends of the Cs are connected with the first end of the Ci and a negative input end of the single-ended amplifier, and a positive input end of the single-ended amplifier is grounded;
and the second end of the Ci and the output end of the single-ended amplifier are connected with the PGA 1.
Further, referring to fig. 6, fig. 6 is a schematic structural diagram of a PGA11 of a fingerprint processing apparatus according to an embodiment of the present invention, where the PGA1 includes:
a sampling switched capacitor amplification circuit or a continuous time amplification circuit;
when the PGA1 is a continuous-time amplifier circuit, the PGA1 includes an input resistor Ri, a feedback resistor Rf, and a second single-ended amplifier, in which:
a first end of the Ri is connected with an output end of the cancellation circuit 1, a second end of the Ri is connected with an input end of the Rf and a negative input end of the second single-ended amplifier, a control signal input end of the Rf is used for accessing a Gain control signal Gain1[ m ], and the Gain control signal Gain1[ m ] is used for adjusting the amplification circuit Gain of the PGA 1;
the positive input end of the second single-ended amplifier is grounded;
the output end of the second single-ended amplifier and the output end of the Rf are connected with a cancellation circuit 2.
Optionally, in the embodiment of the present invention, a circuit structure of the cancellation circuit 2 is the same as a circuit structure of the cancellation circuit 1.
Optionally, in an embodiment of the present invention, the gain of the amplifying circuit of the PGA1 is greater than that of the amplifying circuit of the PGA2, so as to reduce design requirements of subsequent circuits.
Optionally, in the embodiment of the present invention, the ADC is a differential ADC, an input range of the differential ADC is from-Vmax to + Vmax, and an output range of the differential ADC is from 0 to 2Nadc-1, the bit width Nadc of the differential ADC is greater than or equal to M.
Optionally, in an embodiment of the present invention, the protective layer at least includes any one of the following: sapphire cover plate, glass cover plate and pottery.
Optionally, in an embodiment of the present invention, a surface area of the fingerprint acquisition chip is greater than or equal to 1600um2, a center-to-center distance between sensing electrodes in the fingerprint acquisition chip is 50um, and a resolution of the fingerprint acquisition chip is 508 DPI.
Optionally, in this embodiment of the present invention, the fingerprint image caching device includes a memory and/or a GPU.
In conjunction with the fingerprint processing device disclosed in the above embodiments, the following describes in detail a partition scanning type fingerprint processing method based on the above fingerprint processing device.
Referring to fig. 7, fig. 7 is a schematic flowchart illustrating a sectional scanning type fingerprint processing method according to an embodiment of the present invention; as shown in fig. 7, the partition scanning type fingerprint processing method specifically includes the following steps:
s701, configuring a target scanning area, wherein the target scanning area comprises P subarea sensing electrode arrays, and P is an integer larger than 1;
s702, loading default gains of the PGA1 and the PGA 2;
wherein the default gain is configurable or re-configurable.
S703, controlling the target scanning area to Scan, and determining and configuring a first counteracting configuration signal Scan1[ n1] of the counteracting circuit 1 based on a preset successive approximation strategy;
s704, controlling the target scanning area to scan, determining and configuring a first target gain of the PGA1 based on the ADC output range;
s705, controlling the target scanning area to Scan, and determining and configuring a second counteracting configuration signal Scan2[ n2] of the counteracting circuit 2 based on the preset successive approximation strategy;
s706, controlling the target scan area to scan, determining and configuring a second target gain of the PGA2 based on the ADC output range;
s707, controlling the P subarea sensing electrode arrays to Scan the user fingerprint and acquire P user fingerprint subarea images based on P groups of acquisition circuit configuration parameters corresponding to the P subarea sensing electrode arrays, wherein the acquisition circuit configuration parameters comprise a first counteracting configuration signal Scan1[ n1], a second counteracting configuration signal Scan2[ n2], a first target gain and a second target gain;
s708, executing splicing processing on the P user fingerprint partition images to obtain user fingerprint images;
it can be understood that, because the surface of the protective layer in the fingerprint processing apparatus may be uneven, which causes offset noise during the acquisition process, in this case, the sensing electrode array may be partitioned, that is, the sensing electrode array is divided into P partitioned sensing electrode arrays, in each partitioned sensing electrode array, the corresponding surface of the protective layer may be assumed to be flat, and the above-mentioned adjusting process of the configuration parameters of the acquisition circuit (the first approach adjusting process of the cancellation circuit 1 and the cancellation circuit 2, and the gain adjusting process of the PGA1 and the PGA 2) is performed for each partitioned sensing electrode array, so as to obtain the configuration parameters of the acquisition circuit corresponding to each partitioned sensing electrode array, thereby further improving the resolution of the fingerprint processing apparatus, and reducing the image of the acquisition precision due to the offset noise.
And S709, sending the user fingerprint image to the fingerprint image caching device.
Wherein, the output signal of the ADC should cover the full range of the ADC as much as possible.
In a specific implementation, the cancellation circuit 1 includes: offset the electric capacity gate switch, offset the electric capacity array, feed back integral capacitance Ci, signal acquisition electric capacity Cs, single-ended amplifier, wherein: the first end of the signal acquisition capacitor Cs is connected with the output end of the collector and corresponds to a first input signal Vin; n input ends of the cancellation capacitor gating switch are used for accessing a second input signal Vcan1 with a phase opposite to that of the input signal Vin, N output ends of the cancellation capacitor gating switch are correspondingly connected with first ends of N cancellation capacitors in a cancellation capacitor array, second ends of the N cancellation capacitors and second ends of the Cs are connected with the first end of the Ci and a negative input end of the single-ended amplifier, and a positive input end of the single-ended amplifier is grounded; the second end of the Ci and the output end of the single-ended amplifier are connected with the PGA 1;
wherein the N canceling capacitors are illustrated as canceling capacitors Cc (N) (N is 1 to N), and the capacitance value of Cc (k) is 2 times the capacitance value of Cc (k-1), k is 2 to N +1, and N is the number of rows of the sensing electrode array;
the gating signal of the cancellation capacitor gating switch is shown as Scan [ n ], and when the Scan [ n ] is effective, the gating signal corresponds to a gating cancellation capacitor Cc (n);
therefore, when the strobe signal is Scan [ n ], the output directions of the first output caused by Vin and the second output caused by Vcan1 step are opposite, and cancellation is performed, and the output voltage after cancellation is:
where Vout is the output voltage after cancellation.
Combining the derived calculation formula of the cancelled output voltage, the step of controlling the scanning of the target scanning area and determining and configuring the first cancellation configuration signal Scan1[ n1] of the cancellation circuit 1 based on a preset successive approximation strategy specifically includes the following steps:
if the strobe signal Scan [ j ] is currently enabled]The average value of the output of the corresponding ADC is larger than the upper limit 2 of the output of the ADCNadc-1, then determining the currently enabled strobe signal as said currently enabled strobe signal Scan [ j]And controlling the scanning of the target scanning area to obtain the output average value of the ADC;
if the strobe signal Scan [ j ] is currently enabled]The average value of the output of the corresponding ADC is less than or equal to the upper limit 2 of the output of the ADCNadc-1, then determining a first cancellation configuration signal Scan1[ n1] of the cancellation circuit 1]Is Scan [ j]。
For example, if N is 8, the cancellation capacitor array in the corresponding cancellation circuit 1 is 8 cancellation capacitors connected in parallel, and when the gating signal Scan [8] of the cancellation capacitor gating switch is valid, the cancellation capacitor gating switch corresponds to the cancellation capacitor Cc (8) with the largest gating capacitance value, and so on, when the gating signal Scan [ N ] of the cancellation capacitor gating switch is valid, the cancellation capacitor gating switch corresponds to the cancellation capacitor Cc (N) with the largest gating capacitance value, and if the value of N1 in the first cancellation configuration signal Scan1[ N1] is 7, the corresponding fingerprint processing device controls the target scanning area to Scan, and based on a preset successive approximation strategy, the specific process of determining and configuring the first cancellation configuration signal Scan1[ N1] of the cancellation circuit 1 is as follows:
enabling a gating signal Scan [8] of a counteracting capacitance gating switch, namely enabling a counteracting capacitance Cc (8) with the largest gating capacitance value corresponding to the counteracting capacitance gating switch, controlling the sensing electrode array to Scan by a control chip, and collecting an output average value of the ADC correspondingly received in the scanning process;
comparing that the average output value of the ADC corresponding to the scanning process is larger than the upper limit 2 of the output range of the ADCNadc-1, then disabling the gating signal Scan [8] of the cancellation capacitor gating switch]；
Enabling a gating signal Scan [7] of the offset capacitor gating switch, namely enabling the offset capacitor Cc (7) with the second largest gating capacitance value corresponding to the offset capacitor gating switch, controlling the sensing electrode array to Scan by the control chip, and collecting the output average value of the ADC correspondingly received in the scanning process;
comparing that the average output value of the ADC corresponding to the scanning process is less than or equal to the upper limit 2 of the output range of the ADC Nadc1, the control chip determines that the value of n1 is 7, and exits the current successive approximation process.
In a specific implementation, the PGA1 includes an input resistor Ri, a feedback resistor Rf, and a second single-ended amplifier, where: a first end of the Ri is connected to an output end of the cancellation circuit 1, a second end of the Ri is connected to an input end of the Rf and a negative input end of the second single-ended amplifier, a control signal input end of the Rf is used for accessing a Gain control signal Gain1[ m ], and the Gain control signal Gain1[ m ] is used for adjusting a resistance value of the Rf; the positive input end of the second single-ended amplifier is grounded; the output end of the second single-ended amplifier and the output end of the Rf are connected with a cancellation circuit 2;
therefore, the gain of the amplifying circuit of the PGA1 can be derived as:
wherein, gain is the gain of the amplifying circuit of the PGA 1.
In a specific implementation, the configuring the target scanning area includes:
when receiving a circuit initialization notification sent by a host, configuring a target scanning area;
or,
and when the touch operation of the finger of the user on the protective layer is detected, configuring a target scanning area.
The partition scanning type fingerprint processing method provided by the embodiment of the invention is described in detail above, and the principle and the embodiment of the invention are explained by applying a specific example, and the description of the embodiment is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (12)
1. A partition scanning type fingerprint processing method is used for a fingerprint processing device and is characterized in that,
the fingerprint processing apparatus includes: protective layer, glue, fingerprint collection chip, collector, offset circuit 1, programmable gain amplifier PGA1, offset circuit 2, programmable gain amplifier PGA2, analog-to-digital converter ADC, control chip, wherein:
the protective layer is bonded with the fingerprint acquisition chip through the glue; the fingerprint acquisition chip comprises N × M induction electrodes, and the N × M induction electrodes form an induction electrode array with N rows and M columns; the sensing electrodes in the sensing electrode array are connected with the collector through a selection switch, the selection switch is controlled by a row selection enable signal and a column selection enable signal, the collector is connected with the cancellation circuit 1, the cancellation circuit 1 is connected with the PGA1, the PGA1 is connected with the cancellation circuit 2, the cancellation circuit 2 is connected with the PGA2, the PGA2 is connected with the ADC, and the output end of the ADC is connected with the control chip; the first control signal output end of the control chip is connected with the cancellation circuit 1, the second control signal output end of the control chip is connected with the PGA1, the third control signal output end of the control chip is connected with the cancellation circuit 2, and the first control signal output end of the control chip is connected with the PGA 2; the fingerprint image signal output end of the control chip is used for connecting a fingerprint image caching device;
the partition scanning type fingerprint processing method comprises the following steps:
configuring a target scanning area, wherein the target scanning area comprises P subarea sensing electrode arrays, and P is an integer greater than 1;
loading default gains for the PGA1 and the PGA 2;
controlling the target scanning area to Scan, and determining and configuring a first counteracting configuration signal Scan1[ n1] of the counteracting circuit 1 based on a preset successive approximation strategy;
controlling the target scan area scan to determine and configure a first target gain of the PGA1 based on the ADC output range;
controlling the target scanning area to Scan, and determining and configuring a second counteracting configuration signal Scan2[ n2] of the counteracting circuit 2 based on the preset successive approximation strategy;
controlling the target scan area scan to determine and configure a second target gain of the PGA2 based on the ADC output range;
controlling the P subarea sensing electrode arrays to Scan the user fingerprints and acquire P user fingerprint subarea images based on P groups of acquisition circuit configuration parameters corresponding to the P subarea sensing electrode arrays, wherein the acquisition circuit configuration parameters comprise a first counteracting configuration signal Scan1[ n1], a second counteracting configuration signal Scan2[ n2], a first target gain and a second target gain;
executing splicing processing on the P user fingerprint partition images to obtain user fingerprint images;
and sending the user fingerprint image to the fingerprint image caching device.
2. The method of claim 1,
the cancellation circuit 1 includes: offset the electric capacity gate switch, offset the electric capacity array, feed back integral capacitance Ci, signal acquisition electric capacity Cs, single-ended amplifier, wherein:
the first end of the signal acquisition capacitor Cs is connected with the output end of the collector and corresponds to a first input signal Vin; n input ends of the cancellation capacitor gating switch are used for accessing a second input signal Vcan1 with a phase opposite to that of the first input signal Vin, N output ends of the cancellation capacitor gating switch are correspondingly connected with first ends of N cancellation capacitors in a cancellation capacitor array, second ends of the N cancellation capacitors and second ends of the Cs are connected with the first end of the Ci and a negative input end of the single-ended amplifier, and a positive input end of the single-ended amplifier is grounded; the second end of the Ci and the output end of the single-ended amplifier are connected with the PGA 1;
wherein the N canceling capacitors are illustrated as canceling capacitors Cc (N), where N is 1 to N, and the capacitance value of Cc (k) is 2 times that of Cc (k-1), k is 2 to N, and N is the number of rows of the sensing electrode array;
the gating signal of the cancellation capacitor gating switch is shown as Scan [ n ], and when the Scan [ n ] is effective, the gating signal corresponds to a gating cancellation capacitor Cc (n);
when the gating signal is Scan [ n ], the output directions of the first output caused by Vin and the second output caused by Vcan1 step are opposite, and cancellation is performed, wherein the output voltage after cancellation is:
where Vout is the output voltage after cancellation.
3. The method according to claim 2, wherein the controlling the scanning of the target scanning area and determining and configuring the first cancellation configuration signal Scan1[ n1] of the cancellation circuit 1 based on a preset successive approximation strategy comprises:
if the strobe signal Scan [ j ] is currently enabled]The average value of the output of the corresponding ADC is larger than the upper limit 2 of the output of the ADCNadc-1, then determining the currently enabled strobe signal as said currently enabled strobe signal Scan [ j]And controlling the scanning of the target scanning area to obtain the output average value of the ADC;
if the strobe signal Scan [ j ] is currently enabled]The average value of the output of the corresponding ADC is less than or equal to the upper limit 2 of the output of the ADCNadc-1, then determining a first cancellation configuration signal Scan1[ n1] of the cancellation circuit 1]Is Scan [ j]And Nadc denotes the bit width of the differential ADC.
4. The method of claim 1, wherein the PGA1 includes an input resistor Ri, a feedback resistor Rf, a second single-ended amplifier, wherein:
a first end of the Ri is connected to an output end of the cancellation circuit 1, a second end of the Ri is connected to an input end of the Rf and a negative input end of the second single-ended amplifier, a control signal input end of the Rf is used for accessing a Gain control signal Gain1[ m ], and the Gain control signal Gain1[ m ] is used for adjusting a resistance value of the Rf; the positive input end of the second single-ended amplifier is grounded; the output end of the second single-ended amplifier and the output end of the Rf are connected with a cancellation circuit 2;
the gain of the amplifying circuit of the PGA1 is as follows:
wherein, gain is the gain of the amplifying circuit of the PGA 1.
5. The method of claim 2, wherein the PGA1 includes an input resistor Ri, a feedback resistor Rf, a second single-ended amplifier, and wherein:
a first end of the Ri is connected to an output end of the cancellation circuit 1, a second end of the Ri is connected to an input end of the Rf and a negative input end of the second single-ended amplifier, a control signal input end of the Rf is used for accessing a Gain control signal Gain1[ m ], and the Gain control signal Gain1[ m ] is used for adjusting a resistance value of the Rf; the positive input end of the second single-ended amplifier is grounded; the output end of the second single-ended amplifier and the output end of the Rf are connected with a cancellation circuit 2;
the gain of the amplifying circuit of the PGA1 is as follows:
wherein, gain is the gain of the amplifying circuit of the PGA 1.
6. The method of claim 3, wherein the PGA1 comprises an input resistor Ri, a feedback resistor Rf, a second single-ended amplifier, wherein:
a first end of the Ri is connected to an output end of the cancellation circuit 1, a second end of the Ri is connected to an input end of the Rf and a negative input end of the second single-ended amplifier, a control signal input end of the Rf is used for accessing a Gain control signal Gain1[ m ], and the Gain control signal Gain1[ m ] is used for adjusting a resistance value of the Rf; the positive input end of the second single-ended amplifier is grounded; the output end of the second single-ended amplifier and the output end of the Rf are connected with a cancellation circuit 2;
the gain of the amplifying circuit of the PGA1 is as follows:
wherein, gain is the gain of the amplifying circuit of the PGA 1.
7. The method of any of claims 1-6, wherein configuring the target scanning area comprises:
when receiving a circuit initialization notification sent by a host, configuring a target scanning area;
or,
and when the touch operation of the finger of the user on the protective layer is detected, configuring a target scanning area.
8. The method according to any one of claims 1 to 6, wherein the collector comprises a switch circuit which is set first when collecting the user fingerprint and outputs a change signal when detecting that the drive signal Vdr applied to the user finger has a step, and the change signal has a transformation quantity of:
ΔV＝k*Vdr*Cf/(Cf+Cp)
wherein k is a gain factor of the switching circuit, Vdr is a driving signal applied to a user finger, Cf is a parasitic capacitance between the user finger and the sensing electrode, Cp is a parasitic capacitance of the sensing electrode, and the driving signal includes a sine wave or a square wave.
9. The method according to any one of claims 1 to 6,
the circuit structure of the cancellation circuit 2 is the same as that of the cancellation circuit 1;
the amplification circuit gain of the PGA1 is greater than the amplification circuit gain of the PGA 2.
10. The method according to any one of claims 1 to 6,
the protective layer includes at least any one of: sapphire cover plate, glass cover plate and pottery.
11. The method according to any one of claims 1 to 6,
the surface area of the fingerprint acquisition chip is larger than or equal to 1600um2The center distance between the induction electrodes in the fingerprint acquisition chip is 50um, and the resolution of the fingerprint acquisition chip is 508 DPI.
12. The method according to any one of claims 1 to 6,
the ADC is a differential ADC, the input range of the differential ADC is-Vmax to + Vmax, and the output range of the differential ADC is 0-2Nadc-1, the bit width Nadc of the differential ADC is greater than or equal to M;
the fingerprint image caching device comprises a memory and/or a Graphics Processor (GPU).
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| CN112580556A (en) * | 2020-12-25 | 2021-03-30 | 北京集创北方科技股份有限公司 | Optical fingerprint acquisition method and device, electronic equipment and storage medium |
| TWI831017B (en) * | 2021-06-09 | 2024-02-01 | 大陸商北京集創北方科技股份有限公司 | Capacitive fingerprint collection module, fingerprint identification device and information processing device |
| CN113361418A (en) * | 2021-06-09 | 2021-09-07 | 北京集创北方科技股份有限公司 | Capacitive fingerprint detection device and terminal equipment |
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| CN104393856B (en) * | 2014-10-24 | 2017-11-28 | 深圳市汇顶科技股份有限公司 | A kind of slope wave generation circuit and its D/A converting circuit, fingerprint recognition system |
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| WO2022055406A1 (en) * | 2020-09-10 | 2022-03-17 | Fingerprint Cards Anacatum Ip Ab | Fingerprint sensor with different measurement circuitry configurations |
| SE544317C2 (en) * | 2020-09-10 | 2022-04-05 | Fingerprint Cards Anacatum Ip Ab | Fingerprint sensor arrangement with different measurement circuitry configurations |
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