CN106055507B - BMC signal transmitting device for USB PD communication - Google Patents

BMC signal transmitting device for USB PD communication Download PDF

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CN106055507B
CN106055507B CN201610613737.XA CN201610613737A CN106055507B CN 106055507 B CN106055507 B CN 106055507B CN 201610613737 A CN201610613737 A CN 201610613737A CN 106055507 B CN106055507 B CN 106055507B
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pmos tube
resistor
tube
signal
nmos tube
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CN106055507A (en
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梁源超
邓琴
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Zhuhai Zhirong Technology Co ltd
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Zhuhai Zhirong Technology Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/017509Interface arrangements

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a BMC signal transmitting device for USB PD communication, which comprises a signal amplitude setting module, a conversion rate control module, a voltage-current conversion module and a transmitting driving module which are connected in sequence; the signal amplitude setting module is used for setting the voltage amplitude of the BMC sending signal and generating a first voltage signal; the conversion rate control module is used for controlling the conversion rate of the high level and the low level of the first voltage signal and generating a second voltage signal with the same amplitude as the first voltage signal and different conversion rate; the voltage-current conversion module is used for converting the second voltage signal into a current signal; and the sending driving module is used for converting the current signal into a BMC sending signal and transmitting the BMC sending signal to the CC line. The invention provides a BMC signal transmitting device which accords with USB PD and USB Type-C protocol specifications for USB PD communication of electronic equipment with a USB Type-C interface, the device has low design technical threshold and flexible and simple debugging, and in addition, the device is easy to integrate on a silicon chip and does not need any off-chip components, so that the device has good market application value.

Description

BMC signal transmitting device for USB PD communication
Technical Field
The invention relates to the technical field of USB power supply and the technical field of serial communication, in particular to a BMC signal transmitting device for USB PD communication.
Background
With the development of electronic technology, the role of the USB interface in the electronic device has evolved. In the early stage of birth, the USB interface takes data transmission as a main function, and has extremely limited power supply capacity. However, the power transfer of USB has now risen to the same importance as data transfer. USB is becoming a standard configuration interface for electronic devices. Hundreds of millions of portable electronic products, MP3 players, smart phones, tablet computers, intelligent wearable devices and the like are used for acquiring electric energy through a USB interface every day.
The power supply capability of the USB interface is improved from USB 1.0 to USB BC 1.2 and from 5V/500mA to 5V/1.5A, so that the power supply requirement of a plurality of portable electronic products is met. Nevertheless, there are still many electronic devices with slightly higher power, such as notebook computers, PC liquid crystal displays, etc., which cannot obtain enough power to maintain their operation through the USB interface. In addition, some scientific and technological personnel with industry perspective hope to replace other power supply interfaces in electronic equipment with USB interfaces, so that the integration level of products is higher, the cost is lower, the ecological circle of the whole electronic industry can be optimized, and the waste of various power supply adapters and power transmission cables is reduced. Thus, the USB PD protocol supporting greater power transfer has evolved. USB PDs support a variety of voltage-current configurations, maximally 100W (20V/5A) of power transfer, while supporting power role switching, so that a substantial portion of electronic devices are enclosed within the USB powered ecological circle.
Traditional USB interfaces (Type-A and Type-B) adopt BFSK (Binary Frequency Shift Keyed) mode, and information is injected onto VBUS through carrier frequency modulation, so that interactive negotiation between a USB PD power supply end and a power receiving end is realized. The communication method uses the power line as a signal transmission channel, and needs AC coupling and impedance isolation, so that the cost is high, the realization difficulty is high, and the method is difficult to popularize in a large range. In the new USB Type-C interface, there is a CC line as a dedicated plug detect and USB PD communication path. The BMC (Biphase Mark Coding) signal carrying the USB PD information is directly loaded on the CC line for transmission. The method is simple and flexible, and is expected to be widely applied in the near future.
Disclosure of Invention
Based on the defects of the prior art, the invention provides a BMC signal transmitting device conforming to USB PD and USB Type-C protocol specifications for USB PD communication of electronic equipment with a USB Type-C interface.
In order to achieve the above purpose, the technical scheme of the invention is as follows:
a BMC signal transmitting device for USB PD communication comprises a signal amplitude setting module, a conversion rate control module, a voltage-current conversion module and a transmitting driving module which are connected in sequence;
the signal amplitude setting module is used for setting the voltage amplitude of the BMC sending signal and generating a first voltage signal;
the conversion rate control module is used for controlling the conversion rate of the high level and the low level of the first voltage signal and generating a second voltage signal with the same amplitude as the first voltage signal and different conversion rate;
the voltage-current conversion module is used for converting the second voltage signal into a current signal;
and the sending driving module is used for converting the current signal into a BMC sending signal and transmitting the BMC sending signal to the CC line.
The voltage amplitude of the first voltage signal is 1.125V, and the allowable deviation is +/-75 mV.
The slew rate control module controls the slew rate of the high and low levels of the first voltage signal so that the rising and falling time of the signal is not less than 300ns.
The circuit of the signal amplitude setting module and the slew rate control module comprises a first amplifier, a first NMOS tube, a first resistor, a second resistor, a first capacitor, a first PMOS tube, a second PMOS tube, a third PMOS tube, a second NMOS tube, a third NMOS tube, a first switch, a second switch and a second capacitor which form a negative feedback loop, wherein the positive phase end of the first amplifier is connected with an external reference voltage vref relative to the ground, the output end of the first amplifier is connected with the grid electrode of the first NMOS tube, the drain electrode of the first NMOS tube is connected with a power supply, the source electrode is connected with a second resistor and the first resistor in series, the other end of the first resistor is grounded, the first end of the first capacitor is connected with the output end of the first amplifier, the second end of the first capacitor is grounded, the source electrode of the first PMOS tube, the source electrode of the second PMOS tube and the source electrode of the third PMOS tube are connected in parallel with the source electrode end of the first NMOS tube, the grid electrode of the first PMOS tube and the drain electrode of the second PMOS tube are connected with the drain electrode of the second PMOS tube and the drain electrode of the second PMOS tube are connected with the drain electrode of the third PMOS tube, the drain electrode of the second PMOS tube is connected with the drain electrode of the second PMOS tube, the drain electrode of the second PMOS tube is connected with the drain electrode of the NMOS tubeThe two capacitors are connected in parallel with a circuit formed by a second switch and a third NMOS tube in series, the sources of the second NMOS tube and the third NMOS tube are grounded, and control signals of the first switch and the second switch are respectively BMC digital signals (data) and reverse signals thereof
The circuit of the voltage-current conversion module and the transmission driving module comprises a second amplifier, a fourth PMOS tube, a fourth NMOS tube, a third resistor, a third capacitor, a fifth PMOS tube, a fifth NMOS tube and a fourth resistor, wherein the positive phase end of the second amplifier is connected to the connection line of the first switch and the second switch, the output end of the amplifier is connected with the grid electrode of the fourth NMOS tube, the source electrode of the fourth NMOS tube is connected with the third resistor in series, the other end of the third resistor is grounded, the drain electrode of the fourth NMOS tube is connected with the drain electrode and the grid electrode of the fourth PMOS tube, the source electrode of the fourth PMOS tube is connected with a power supply, the negative phase end of the second amplifier is connected with the source electrode of the fourth NMOS tube, the output end of the second amplifier is also connected with the first end of the third capacitor, the second end of the third capacitor is grounded, the grid electrode of the fourth PMOS tube is connected with the grid electrode of the fifth PMOS tube, the source electrode of the fifth PMOS tube is connected with the power supply, the other end of the fourth resistor is connected with the drain electrode of the fifth NMOS tube, the fifth NMOS tube is grounded, and the drain electrode of the fifth PMOS tube is connected with the fifth drain electrode of the CC.
The circuit of the signal amplitude setting module and the conversion rate control module comprises a third amplifier, a sixth PMOS tube, a seventh PMOS tube, an eighth PMOS tube, a ninth PMOS tube, a sixth NMOS tube, a seventh NMOS tube, a fourth capacitor, a fifth resistor, a sixth resistor, a third switch and a fourth switch, wherein the positive phase end of the third amplifier is connected with an external reference voltage vdd-vref relative to a power supply, the output end of the third amplifier is connected with the grid electrode of the sixth PMOS tube, the source electrode of the sixth PMOS tube is sequentially connected with the sixth resistor and the fifth resistor in series, the other end of the fifth resistor is connected with the power supply, the drain electrode of the sixth PMOS tube is grounded, the negative phase end of the third amplifier is connected to the connecting line of the fifth resistor and the sixth resistor, the output end of the third amplifier is also connected with the first end of the fourth capacitor, and the other end of the fourth capacitor is connected with the other end of the fourth capacitorThe power supply is connected to the seventh PMOS tube source, the eighth PMOS tube source and the ninth PMOS tube source, the seventh PMOS tube drain and the grid electrode, the eighth PMOS tube grid electrode and the ninth PMOS tube grid electrode are connected with external bias current ibias, the eighth PMOS tube drain is connected with the sixth NMOS tube drain, the sixth NMOS tube drain is connected with the sixth PMOS tube grid electrode, the sixth NMOS tube grid electrode is also connected with the seventh NMOS tube grid electrode, the seventh NMOS tube source is connected with the sixth NMOS tube source and the sixth PMOS tube source, the seventh NMOS tube drain is connected with the ninth PMOS tube drain through a third switch and a fourth switch which are connected in series, a fifth capacitor is connected between the connecting lines of the ninth PMOS tube source and the third switch and the fourth switch in parallel, and control signals of the fourth switch and the third switch are BMC digital signals data and inverted signals thereof respectively
The circuit of the voltage-current conversion module and the transmission driving module comprises a fourth amplifier, a tenth PMOS tube, an eighth NMOS tube, a seventh resistor, an eighth resistor and a sixth capacitor, wherein the positive phase end of the fourth amplifier is connected to the connecting wire of the third switch and the fourth switch, the output end of the fourth amplifier is connected with the grid electrode of the tenth PMOS tube, the drain electrode of the tenth PMOS tube is connected with the eighth resistor in series, the other end of the eighth resistor is connected with the drain electrode of the eighth NMOS tube, the source electrode of the eighth NMOS tube is grounded, the source electrode of the tenth PMOS tube is connected with the seventh resistor in series, the other end of the seventh resistor is connected with a power supply, the negative phase end of the fourth amplifier is connected with the source electrode of the tenth PMOS tube, the output end of the fourth amplifier is also connected with the first end of the sixth capacitor, the other end of the sixth capacitor is connected with the power supply, and the drain electrode of the tenth PMOS tube is connected with the CC line.
The beneficial effects of the invention are as follows: the invention provides a BMC signal transmitting device which accords with USB PD and USB Type-C protocol specifications for USB PD communication of electronic equipment with a USB Type-C interface, the device has low design technical threshold and flexible and simple debugging, and in addition, the device is easy to integrate on a silicon chip and does not need any off-chip components, so that the device has good market application value.
Drawings
FIG. 1 is a schematic diagram of an embodiment of the present invention;
FIG. 2 is a schematic diagram showing a circuit configuration of a signal amplitude setting module and a slew rate control module according to a first embodiment of the present invention;
FIG. 3 is a schematic diagram showing the circuit structures of the voltage-current conversion module and the transmission driving module according to the first embodiment of the present invention;
FIG. 4 is a schematic circuit diagram of a signal amplitude setting module and a slew rate control module according to a second embodiment of the present invention;
fig. 5 is a schematic circuit diagram of a voltage-current conversion module and a transmission driving module according to a second embodiment of the present invention.
Detailed Description
The conception, specific structure, and technical effects produced by the present invention will be clearly and completely described below with reference to the embodiments and the drawings to fully understand the objects, features, and effects of the present invention. It is apparent that the described embodiments are only some embodiments of the present invention, but not all embodiments, and that other embodiments obtained by those skilled in the art without inventive effort are within the scope of the present invention based on the embodiments of the present invention.
As shown in fig. 1, a BMC signal transmitting device for USB PD communication includes a signal amplitude setting module, a slew rate control module, a voltage-current conversion module, and a transmission driving module, which are sequentially connected;
the signal amplitude setting module is used for setting the voltage amplitude of the BMC sending signal and generating a first voltage signal;
the conversion rate control module is used for controlling the conversion rate of the high level and the low level of the first voltage signal and generating a second voltage signal with the same amplitude as the first voltage signal and different conversion rate;
the voltage-current conversion module is used for converting the second voltage signal into a current signal;
and the sending driving module is used for converting the current signal into a BMC sending signal and transmitting the BMC sending signal to the CC line.
The voltage amplitude of the first voltage signal was 1.125V, and the allowable deviation was ±75mv.
The slew rate control module controls the slew rate of the high level and the low level of the first voltage signal so that the rising time and the falling time of the signal are not less than 300ns.
First embodiment: as shown in fig. 2, the circuits of the signal amplitude setting module and the slew rate control module comprise a first amplifier OP1, a first NMOS tube NM1, a first resistor R1, a second resistor R2, a first capacitor C1, a first PMOS tube PM1, a second PMOS tube PM2, a third PMOS tube PM3, a second NMOS tube NM2, a third NMOS tube NM3, a first switch S1, a second switch S2 and a second capacitor C2, the positive ends of the OP1 are connected with an external reference voltage vref, the output end is connected with the gate of the NM1, the drain electrode of the NM1 is connected with a power supply, the sources are connected in series with R2 and R1, the other ends of the R1 are grounded, the negative phase end of OP1 is connected to the connection line between R1 and R2, the first end of C1 is connected to the output end of OP1, the second end of C1 is grounded, the source electrode of PM1, the source electrode of PM2 and the source electrode of PM3 are connected in parallel to the source electrode of NM1, the grid electrode and drain electrode of PM1, the grid electrode of PM2 and the grid electrode of PM3 are connected with the same external bias current ibias, the drain electrode of PM2 is connected with the grid electrode of NM2, the grid electrode of NM2 is connected with the drain electrode of NM3 through serial S1 and S2, the C2 and S2 and NM3 form serial circuits in parallel, the source electrodes of NM2 and NM3 are grounded, and the control signals of S1 and S2 are respectively BMC digital signal data and inverse signals thereof
The circuit to the left of the dotted line is used to generate the voltage amplitude vswing of the BMC transmit signal. The first amplifier OP1, the first NMOS transistor NM1, the first resistor R1, and the second resistor R2 form a negative feedback loop, so that the voltage at the point a is vref. Thus the voltage at point BThe first capacitor C1 is used for frequency compensation of the negative feedback loop. Circuit on right side of dotted line for realizing control of BMC (baseboard management controller) sending signal conversion rateAnd (5) preparing. The first PMOS tube PM1, the second PMOS tube PM2 and the third PMOS tube PM3 form one current mirror, and the NM2 and NM3 form another current mirror. The first switch S1 and the second switch S2 are respectively formed by BMC digital signal data and an inversion signal thereof>And controlling on-off. By adjusting the current through PM3 and NM3, and the capacitance of capacitor C2, the slew rate of the vsiew signal can be controlled.
As shown in fig. 3, the circuit of the voltage-current conversion module and the transmission driving module in the first embodiment includes a second amplifier OP2, a fourth PMOS tube PM4, a fourth NMOS tube NM4, a third resistor R3, a third capacitor C3, a fifth PMOS tube PM5, a fifth NMOS tube NM5, and a fourth resistor R4, the positive phase end of the OP2 is connected to the connection line of the first switch S1 and the second switch S2 shown in fig. 2, the output end of the OP2 is connected to the NM4 gate, the NM4 source is connected in series to the other end of the R3 and to the ground, the NM4 drain is connected to the PM4 drain and the gate, the PM4 source is connected to the power supply, the negative phase end of the OP2 is connected to the NM4 source, the output end of the OP2 is also connected to the first end of the C3, the second end of the C3 is grounded, the PM4 gate is connected to the PM5 gate, the PM5 source is connected to the power supply, the PM5 drain is connected to the other end of the R4, the NM5 drain is grounded, and the PM5 drain is connected to the CC line.
The circuit to the left of the dotted line realizes the voltage-current conversion, and OP2, NM4 and R3 form a negative feedback loop, so that the voltage at point C follows the vsiew. Then, the current flowing through PM4 isPM4 and PM5 form 1: mirror image of N, while R 3 =NR 4 Thus the current I 2 =NI 1 . R4 resistance value is selected to meet the requirement of impedance matching of a transmission line, and the range specified by the USB PD protocol is 33-75Ω. NM5 is a switch tube, and is in an off state when the device does not send BMC signals, so that the plug detection on the CC line and the reception of BMC signals sent by other devices are not affected.
Specific embodiment II: as shown in fig. 4, the circuit of the signal amplitude setting module and the slew rate control module includes a first stageThe three-amplifier OP3, the sixth PMOS tube PM6, the seventh PMOS tube PM7, the eighth PMOS tube PM8, the ninth PMOS tube PM9, the sixth NMOS tube NM6, the seventh NMOS tube NM7, the fourth capacitor C4, the fifth capacitor C5, the fifth resistor R5, the sixth resistor R6, the third switch S3 and the fourth switch S4, the positive phase end of the OP3 is connected with an external reference voltage vdd-vref relative to a power supply, the output end is connected with a PM6 grid, the PM6 sources are sequentially connected with R6 and R5 in series, the other end of the R5 is connected with the power supply, the PM6 drain is grounded, the negative phase end of the OP3 is connected on a connecting line of the R5 and R6, the output end of the OP3 is also connected with the first end of the C4, the other end of the C4 is connected with the power supply, the PM7 source, the PM8 source and the PM9 source are connected with the power supply, the PM7 drain and the grid, the PM8 grid and the PM9 grid are connected with an external bias current ibias, the PM8 drain is connected with the NM6 drain, the NM6 grid, the NM7 grid is also connected with the NM7 grid, the NM6 grid is connected with the drain, the NM6 drain is connected with the drain, the NM7 and the NM6 drain is connected with the NM6 drain, the NM3 and the PM3 drain is connected with the PM3 and the PM 3S 4 through the drain, and the PM3 are connected with the drain, the drain 3 and the PM3 signal C4 is connected with the PM3 signal C4 and the PM3 is connected with the PM3 signal C3 and the PM3 signal C3 and the PM3
The circuit to the left of the dotted line is used to generate the voltage amplitude vswing of the BMC transmit signal. OP3, PM6, R5, and R6 form a negative feedback loop such that the voltage at point A is vdd-vref. The voltage at point B is then vdd-vswing, whereThe circuit to the right of the dotted line enables control of the BMC transmit signal slew rate. Wherein PM7, PM8 and PM9 constitute one current mirror and NM6 and NM7 constitute the other current mirror. The switches S4 and S3 are respectively composed of BMC digital signal data and an inverse signal +.>And controlling on-off. By adjusting the current through PM9 and NM7, and the capacitance of capacitor C5, the slew rate of the vdd-vsiew signal can be controlled.
As shown in fig. 5, the circuit of the voltage-current conversion module and the transmission driving module in the second embodiment includes a fourth amplifier OP4, a tenth PMOS tube PM10, an eighth NMOS tube NM8, a seventh resistor R7, an eighth resistor R8, and a sixth capacitor C6, where the positive phase end of the OP4 is connected to the connection line of S3 and S4, the output end of the OP4 is connected to the gate of the PM10, the drain of the PM10 is connected in series to R8, the other end of the R8 is connected to the drain of NM8, the source of NM8 is grounded, the source of the PM10 is connected in series to R7, the other end of the R7 is connected to the source of the PM10, the output end of the OP4 is also connected to the first end of the C6, the other end of the C6 is connected to the power supply, and the drain of the PM10 is connected to the CC line.
OP4, PM10 and R7 form a negative feedback loop such that the voltage at point C follows vdd-vsiew. Then, the current flowing through R7 isR7=r8, and the selection of the resistance value needs to meet the requirement of impedance matching of the transmission line. NM8 is a switch tube, and is in an off state when the device does not send BMC signals, so that the plug detection on the CC line and the reception of BMC signals sent by other devices are not affected.
It should be noted that the foregoing description is only a preferred embodiment of the present invention, and the present invention is not limited to the foregoing embodiment, and should be construed as falling within the scope of the present invention as long as the technical effects of the present invention are achieved by the same means.

Claims (1)

1. A BMC signal transmitting device for USB PD communication, characterized in that: the device comprises a signal amplitude setting module, a conversion rate control module, a voltage-current conversion module and a transmission driving module which are connected in sequence;
the signal amplitude setting module is used for setting the voltage amplitude of a BMC sending signal and generating a first voltage signal, wherein the voltage amplitude of the first voltage signal is 1.125V, and the allowable deviation is +/-75 mV;
the conversion rate control module is used for controlling the conversion rate of the high level and the low level of the first voltage signal and generating a second voltage signal with the same amplitude as the first voltage signal and different conversion rate;
the voltage-current conversion module is used for converting the second voltage signal into a current signal;
the sending driving module is used for converting the current signal into a BMC sending signal and transmitting the BMC sending signal to the CC line;
the conversion rate control module controls the conversion rate of the high and low levels of the first voltage signal so that the rising time and the falling time of the signal are not less than 300ns;
the circuit of the signal amplitude setting module and the conversion rate control module comprises a first amplifier, a first NMOS tube, a first resistor, a second resistor, a first capacitor, a first PMOS tube, a second PMOS tube, a third PMOS tube, a second NMOS tube, a third NMOS tube, a first switch, a second switch and a second capacitor which form a negative feedback loop, wherein the positive phase end of the first amplifier is connected with an external reference voltage vref relative to the ground, the output end of the first amplifier is connected with the grid electrode of the first NMOS tube, the drain electrode of the first NMOS tube is connected with a power supply, the source electrode is connected with the second resistor and the first resistor in series, the other end of the first resistor is grounded, the negative phase end of the first amplifier is connected to the connecting line between the first resistor and the second resistor, the first end of the first capacitor is connected with the output end of the first amplifier, and the second end of the first capacitor is grounded, the source electrode of the first PMOS tube, the source electrode of the second PMOS tube and the source electrode of the third PMOS tube are connected in parallel to the source electrode end of the first NMOS tube, the grid electrode and the drain electrode of the first PMOS tube, the grid electrode of the second PMOS tube and the grid electrode of the third PMOS tube are connected with the same external bias current ibias, the drain electrode of the second PMOS tube is connected with the drain electrode and the grid electrode of the second NMOS tube, the grid electrode of the second NMOS tube is connected with the grid electrode of the third NMOS tube, the drain electrode of the third PMOS tube is connected with the drain electrode of the third NMOS tube through a first switch and a second switch which are connected in series, the second capacitor is connected with the source electrodes of the second NMOS tube and the third NMOS tube in parallel in a circuit which is connected in series, the control signals of the first switch and the second switch are respectively a digital signal (data) and an inversion signal thereof;
the circuit of the signal amplitude setting module and the conversion rate control module comprises a third amplifier, a sixth PMOS tube, a seventh PMOS tube, an eighth PMOS tube, a ninth PMOS tube, a sixth NMOS tube, a seventh NMOS tube, a fourth capacitor, a fifth resistor, a sixth resistor, a third switch and a fourth switch, wherein the positive phase end of the third amplifier is connected with an external reference voltage vdd-vref relative to a power supply, the output end of the third amplifier is connected with the grid electrode of the sixth PMOS tube, the source electrode of the sixth PMOS tube is sequentially connected with the sixth resistor and the fifth resistor in series, the other end of the fifth resistor is connected with the power supply, the drain electrode of the sixth PMOS tube is grounded, the negative phase end of the third amplifier is connected with the connecting line of the fifth resistor and the sixth resistor, the output end of the third amplifier is also connected with the first end of the fourth capacitor, the other end of the fourth capacitor is connected with the power supply, the seventh PMOS tube source electrode, the eighth PMOS tube source electrode and the ninth PMOS tube source electrode are connected with the power supply, the seventh PMOS tube drain electrode and the grid electrode, the eighth PMOS tube grid electrode and the ninth PMOS tube grid electrode are connected with external bias current ibias, the eighth PMOS tube drain electrode is connected with a sixth NMOS tube drain electrode, the sixth NMOS tube drain electrode is connected with the sixth PMOS tube grid electrode, the sixth NMOS tube grid electrode is also connected with a seventh NMOS tube grid electrode, the seventh NMOS tube source electrode is connected with the sixth NMOS tube source electrode and the sixth PMOS tube source electrode, the seventh NMOS tube drain electrode is connected with the ninth PMOS tube drain electrode through a third switch and a fourth switch which are connected in series, a fifth capacitor is connected between the connecting lines of the ninth PMOS tube source electrode and the third switch and a fourth switch in parallel, and control signals of the fourth switch and the third switch are digital signals (data) and reverse signals thereof respectively;
the circuit of the voltage-current conversion module and the transmission driving module comprises a second amplifier, a fourth PMOS tube, a fourth NMOS tube, a third resistor, a third capacitor, a fifth PMOS tube, a fifth NMOS tube and a fourth resistor, wherein the positive phase end of the second amplifier is connected to the connection line of the first switch and the second switch, the output end of the amplifier is connected with the grid electrode of the fourth NMOS tube, the source electrode of the fourth NMOS tube is connected with the third resistor in series, the other end of the third resistor is grounded, the drain electrode of the fourth NMOS tube is connected with the drain electrode and the grid electrode of the fourth PMOS tube, the source electrode of the fourth PMOS tube is connected with a power supply, the negative phase end of the second amplifier is connected with the source electrode of the fourth NMOS tube, the output end of the second amplifier is also connected with the first end of the third capacitor, the second end of the third capacitor is grounded, the grid electrode of the fourth PMOS tube is connected with the grid electrode of the fifth PMOS tube, the drain electrode of the fifth PMOS tube is connected with the power supply, the other end of the fourth resistor is connected with the drain electrode of the fifth NMOS tube, and the drain electrode of the fifth NMOS tube is grounded, and the drain electrode of the fifth NMOS tube is connected with the fifth drain electrode of the fifth capacitor and the drain electrode of the fifth capacitor is grounded.
The circuit of the voltage-current conversion module and the transmission driving module comprises a fourth amplifier, a tenth PMOS tube, an eighth NMOS tube, a seventh resistor, an eighth resistor and a sixth capacitor, wherein the positive phase end of the fourth amplifier is connected to the connecting wire of the third switch and the fourth switch, the output end of the fourth amplifier is connected with the grid electrode of the tenth PMOS tube, the drain electrode of the tenth PMOS tube is connected with the eighth resistor in series, the other end of the eighth resistor is connected with the drain electrode of the eighth NMOS tube, the source electrode of the eighth NMOS tube is grounded, the source electrode of the tenth PMOS tube is connected with the seventh resistor in series, the other end of the seventh resistor is connected with a power supply, the negative phase end of the fourth amplifier is connected with the source electrode of the tenth PMOS tube, the output end of the fourth amplifier is also connected with the first end of the sixth capacitor, the other end of the sixth capacitor is connected with the power supply, and the drain electrode of the tenth PMOS tube is connected with the CC line.
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