CN106033779B - Rub electronics field effect transistor and logical device and logic circuit using it - Google Patents

Rub electronics field effect transistor and logical device and logic circuit using it Download PDF

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Publication number
CN106033779B
CN106033779B CN201510106205.2A CN201510106205A CN106033779B CN 106033779 B CN106033779 B CN 106033779B CN 201510106205 A CN201510106205 A CN 201510106205A CN 106033779 B CN106033779 B CN 106033779B
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transistor
logical device
friction
electrode
drain electrode
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CN106033779A (en
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张弛
王中林
张丽敏
唐伟
韩昌报
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Beijing Institute of Nanoenergy and Nanosystems
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Beijing Institute of Nanoenergy and Nanosystems
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/84Types of semiconductor device ; Multistep manufacturing processes therefor controllable by variation of applied mechanical force, e.g. of pressure
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
    • H03K19/215EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using field-effect transistors

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  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)

Abstract

The present invention provides a kind of friction electronics field effect transistor and using its logical device and logic circuit.The friction electronics field effect transistor includes: semiconductor body comprising: conductive substrates and the insulating layer and channel layer that are sequentially formed in the conductive substrates;Drain electrode and source electrode, are formed in the two sides of channel layer;Floating gate electrode is formed on the conductive substrates another side opposite with insulating layer, with conductive substrates Ohmic contact;And mobile frictional layer, it is oppositely arranged with floating gate electrode.In the present invention, mobile frictional layer can contact triboelectrification with floating gate electrode under external force, triboelectric charge is generated on floating gate electrode, realize " dynamic interaction " between the two, substitute the external gate voltage in conventional field effect transistor, the purpose for realizing carrier transport characteristic in regulation electronic device, realizes the coupling of mechanical-electronic.

Description

Rub electronics field effect transistor and logical device and logic circuit using it
Technical field
The present invention relates to nanometer and technical field of integrated circuits more particularly to a kind of friction electronics field effect transistor and Using its logical device and logic circuit.
Background technique
Logic circuit is the transmitting and processing of a kind of discrete signal, using binary system as principle, realizes digital signal logic fortune The circuit calculated and operated.Logic circuit only divides high and low level, has interference resistance strong, precision height and the good advantage of confidentiality, extensively It is general to be applied to computer, digital control, communication, automation and instrument etc..It is existing although logic circuit technology is very mature Logic unit device be all " static state ", and almost exclusively through electric signal trigger or start, lack external environment with " dynamic " interaction mechanism of logical device.
2014, the research group that Chinese Academy of Sciences's Beijing nanometer energy is led with system research institute king middle forest academician will rub It wipes nano generator (TENG) to combine with conventional field effect transistor, develops the contact electrification field effect transistor of external force touch-control Pipe.The device can make gate material contact electrification under external force, form electrostatic potential as gate signal, realize to semiconductor The regulation of middle carrier transport characteristic.Contact electrification field effect transistor can derive a series of as a kind of elemental device The human-computer interaction device that can be realized various functions, being thus put forward for the first time friction electronics (Tribotronics), this is new Research field.Friction electronics has coupled triboelectrification effect and characteristic of semiconductor, is the whole new set of applications of friction nanometer power generator; It will be man-machine friendship with piezoelectron together meanwhile as another new way by mechanical input regulation carrier transport The development of mutual Intelligent interfaces provides important foundation.Due to friction nanometer power generator can generate it is more higher than piezoelectric nano generator Output voltage, and its coupling with semiconductor effect, so that contact electrification field effect transistor compares piezoelectron transistor It is selected with broader external force sensing scope and more materials, can be widely used in human-computer interaction, sensor, micro-nano machine The fields such as electric system, nanometer robot and flexible electronic.
Summary of the invention
(1) technical problems to be solved
In view of above-mentioned technical problem, the present invention provides a kind of friction electronics field effect transistor and using its logic Device and logic circuit.
(2) technical solution
According to an aspect of the invention, there is provided a kind of friction electronics field effect transistor.The friction electronics field Effect transistor includes: semiconductor body, drain electrode 4, source electrode 5, floating gate electrode 6 and mobile frictional layer 7.Semiconductor body packet It includes: conductive substrates 3 and the insulating layer 2 and channel layer 1 that are sequentially formed in the conductive substrates.Drain electrode 4 and source electrode 5, are formed in The two sides of channel layer 1.Floating gate electrode 6 is formed on the another side opposite with insulating layer 2 of conductive substrates 3, with 3 Europe of conductive substrates Nurse contact.Mobile frictional layer 7, is oppositely arranged with floating gate electrode 6, can move under external force, connects with the generation of floating gate electrode 6 Touch wiping or separation.Wherein, floating gate electrode 6 and mobile frictional layer 7 are prepared by the material for being located at different location in friction electrode sequence.
According to another aspect of the present invention, a kind of friction electronics logical device is additionally provided, which is characterized in that packet It includes: mobile support plate;And the transistor A and transistor B of floating gate electrode spaced opposite pre-determined distance.Transistor A and crystalline substance Body pipe B is above-mentioned friction electronics field effect transistor.The mobile frictional layer of transistor A and transistor B is fixed on mobile branch The tow sides of fagging, and can be moved in the drive lower edge of the movement support plate perpendicular to the direction of soi wafer, make transistor A Friction is contacted with corresponding floating gate electrode respectively with the mobile frictional layer of transistor B or is separated.
According to a further aspect of the invention, a kind of friction electronics logic inverter is additionally provided.The friction electronics is patrolled Volume NOT gate includes: a logical device, which is the friction electronics logical device of claim 5, in the logical device Transistor A and transistor B be respectively the first transistor and second transistor;Wherein, the grounded drain of the first transistor, second The source level of transistor meets supply voltage Vbias, the source level of the first transistor is connected with the drain electrode of second transistor, connects output end Vout
According to a further aspect of the invention, a kind of friction electronics logical AND gate is additionally provided.The friction electronics is patrolled Collecting with door includes: the first logical device and the second logical device, and first logical device and the second logical device are claim 5 Friction electronics logical device, transistor A and transistor B in first logical device are respectively the first transistor #1 and Two-transistor #2, transistor A and transistor B in second logical device are respectively third transistor #3 and the 4th transistor # 4, in which: the drain electrode of the first transistor #1 is connected to supply voltage Vbias;The source level and third transistor #3 of the first transistor #1 Drain electrode be connected;The drain of second transistor #2 and the 4th transistor #4 are connected with the source level of third transistor #3, connect output end Vout;The source level of second transistor #2 and the 4th transistor #4 ground connection;FAAnd FBThe first logical device and second is respectively acting on to patrol Collect device.
According to a further aspect of the invention, a kind of friction electronics logic sum gate is additionally provided.The friction electronics is patrolled It collects or door includes: the first logical device and the second logical device, first logical device and the second logical device are claim 5 Friction electronics logical device, transistor A and transistor B in first logical device are respectively the first transistor #1 and Two-transistor #2, transistor A and transistor B in second logical device are respectively third transistor #3 and the 4th transistor # 4, in which: the drain electrode of the first transistor #1 and third transistor #3 are connected to supply voltage Vbias;The first transistor #1 and third The source level of transistor #3 is connected with the drain electrode of the 4th transistor #4, meets output end Vout;The drain of second transistor #2 is brilliant with the 4th The source level of body pipe #4 is connected;The source level of second transistor #2 is grounded;FAAnd FBIt is respectively acting on the first logical device and the second logic Device.
According to a further aspect of the invention, a kind of friction electronics logic NAND gate is additionally provided.The friction electronics Logic NAND gate includes: the first logical device and the second logical device, and first logical device and the second logical device are right It is required that 5 friction electronics logical device, transistor A and transistor B in first logical device are respectively the first transistor # 1 and second transistor #2, transistor A and transistor B in second logical device are respectively third transistor #3 and the 4th brilliant Body pipe #4, in which: the drain electrode of the first transistor #1 is connected to the ground;The drain electrode of the source level and third transistor #3 of the first transistor #1 It is connected;The drain of second transistor #2 and the 4th transistor #4 are connected with the source level of third transistor #3, meet output end Vout;The The source level of two-transistor #2 and the 4th transistor #4 meet supply voltage Vbias;FAAnd FBIt is respectively acting on the first logical device and Two logical devices.
According to a further aspect of the invention, a kind of friction electronics logic nor gate is additionally provided.The friction electronics Logic nor gate includes: the first logical device and the second logical device, and first logical device and the second logical device are right It is required that 5 friction electronics logical device, transistor A and transistor B in first logical device are respectively the first transistor # 1 and second transistor #2, transistor A and transistor B in second logical device are respectively third transistor #3 and the 4th brilliant Body pipe #4, in which: the drain electrode of the first transistor #1 and third transistor #3 are connected to the ground;The first transistor #1 and third crystal The source level of pipe #3 is connected with the drain electrode of the 4th transistor #4, meets output end Vout;The drain of second transistor #2 and the 4th crystal The source level of pipe #4 is connected;The source level of second transistor #2 meets supply voltage Vbias;FAAnd FBIt is respectively acting on two friction electronics Logical device.
According to a further aspect of the invention, a kind of friction electronics logic XOR gate is additionally provided.The friction electronics Logic XOR gate includes: the first logical device, the second logical device and third logical device, the crystal in first logical device Pipe A and transistor B is respectively the first transistor #1 and second transistor #2, transistor A and crystal in second logical device Pipe B is respectively third transistor #3 and the 4th transistor #4, and transistor A and transistor B in the third logical device are respectively 5th transistor #5 and the 6th transistor #6, in which: the drain electrode of the source level and third transistor #3 of second transistor #2 is connected to Supply voltage Vbias;The drain electrode of the first transistor #1 and the source level of the 4th transistor #4 are grounded;The source electrode of the first transistor #1, The drain electrode of two-transistor #2 is connected with the drain electrode of the 5th transistor #5;The leakage of the source electrode of third transistor #3, the 4th transistor #4 Pole is connected with the source level of the 6th transistor #6;The drain electrode of the source level and the 6th transistor #6 of 5th transistor #5 is connected, and connects output Hold Vout;FAThe first logical device and the second logical device, F are acted on simultaneouslyBAct on third logical device.
According to a further aspect of the invention, additionally provide a kind of friction electronics logic with or door.The friction electronics Logic is same or door includes: the first logical device, the second logical device and third logical device, the crystal in first logical device Pipe A and transistor B is respectively the first transistor #1 and second transistor #2, transistor A and crystal in second logical device Pipe B is respectively third transistor #3 and the 4th transistor #4, and transistor A and transistor B in the third logical device are respectively 5th transistor #5 and the 6th transistor #6, in which: the drain electrode of the source level and third transistor #3 of second transistor #2 is connected to Ground;The drain electrode of the first transistor #1 and the source level of the 4th transistor #4 meet supply voltage Vbias;The source electrode of the first transistor #1, The drain electrode of two-transistor #2 is connected with the drain electrode of the 5th transistor #5;The leakage of the source electrode of third transistor #3, the 4th transistor #4 Pole is connected with the source level of the 6th transistor #6;The drain electrode of the source level and the 6th transistor #6 of 5th transistor #5 is connected, and connects output Hold Vout;FAThe first logical device and the second logical device, F are acted on simultaneouslyBAct on third logical device.
According to a further aspect of the invention, a kind of logic circuit is additionally provided.The logic circuit includes that at least one is patrolled Collect device.The logical device is above-mentioned friction electronics logical device, friction electronics logic inverter, friction electronics logic With door, friction electronics logic sum gate, friction electronics logic NAND gate, friction electronics logic nor gate, friction electronics Logic XOR gate, or friction electronics logic with or door.
(3) beneficial effect
Electronics field effect transistor and the logical device using it can be seen from the above technical proposal that the present invention rubs It is had the advantages that with logic circuit
(1) mobile frictional layer can contact triboelectrification with floating gate electrode under external force, generate and rub on floating gate electrode Charge is wiped, realizes " dynamic interaction " between the two, substitutes the external gate voltage in conventional field effect transistor, realizes regulation The purpose of carrier transport characteristic in electronic device;
(2) silicon-based semiconductor devices are based on, structure is simple, is easy to make and integrated with existing silicon-based technologies, it is easy to accomplish The micromation and array of device have good modulating properties;
(3) friction electronics logic gate device establishes contacting for external mechanical triggering and CMOS logic level signal, respectively Kind friction electronics logic circuit is able to carry out the logical operation of electromechanical (mechanical-electronic) coupling, realizes external environment and silicon The interaction of base integrated circuit;
(4) device can bear biggish mechanical deformation, have broader mechanical triggering model compared to piezoelectron transistor It encloses and is selected with wider semiconductor material.
Detailed description of the invention
Fig. 1 is the structural schematic diagram according to first embodiment of the invention floating gate formula friction electronics field effect transistor;
Fig. 2 is the working principle diagram of the friction electronics field effect transistor of floating gate formula shown in Fig. 1;
Fig. 3 is the structural schematic diagram according to second embodiment of the invention friction electronics logical device;
Fig. 4 is the equivalent circuit diagram of friction electronics logical device shown in Fig. 3;
Fig. 5 is the equivalent circuit diagram according to third embodiment of the invention friction electronics logic inverter;
Fig. 6 is the equivalent circuit diagram according to fourth embodiment of the invention friction electronics logical AND gate;
Fig. 7 is the equivalent circuit diagram according to fifth embodiment of the invention friction electronics logic sum gate;
Fig. 8 is the equivalent circuit diagram according to sixth embodiment of the invention friction electronics logic NAND gate;
Fig. 9 is the equivalent circuit diagram according to seventh embodiment of the invention friction electronics logic nor gate;
Figure 10 is the equivalent circuit diagram according to eighth embodiment of the invention friction electronics logic XOR gate;
Figure 11 be according to ninth embodiment of the invention rub electronics logic with or door equivalent circuit diagram.
[main element symbol description]
1- channel layer;2- silicon dioxide insulating layer;
3-SOI substrate layer;The first metal electrode of 4- (drain electrode);
The second metal electrode of 5- (source electrode);6- third metal electrode (floating gate electrode);
7- moves frictional layer;#1- the first transistor;
#2- second transistor;#3- third transistor;
The 4th transistor of #4-;The 5th transistor of #5-;
The 6th transistor of #6-.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference Attached drawing, the present invention is described in more detail.It should be noted that in attached drawing or specification description, similar or identical portion Divide and all uses identical figure number.The implementation for not being painted or describing in attached drawing is those of ordinary skill in technical field Known form.In addition, though can provide the demonstration of the parameter comprising particular value herein, it is to be understood that parameter is without definite etc. In corresponding value, but can be similar to be worth accordingly in acceptable error margin or design constraint.It is mentioned in embodiment Direction term, such as "upper", "lower", "front", "rear", "left", "right" etc. are only the directions with reference to attached drawing.Therefore, the side used Protection scope of the present invention is intended to be illustrative and not intended to limit to term.
In the implementation of the present invention, applicant has found for the first time: friction electronics device can be integrated with existing silicon substrate Circuit combines, and is therefore particularly suitable for the friction electronics silicon-based logic circuit of production human-computer interaction.Based on this, the present invention is provided Its logic gates and logic circuit of a kind of floating gate formula friction electron-optical transistor and application, and show based on contact triggering Electromechanics (mechanical-electronic) logical operation, to realize the logical operation of integrated mechanical-electric coupling control.
One, first embodiment
In one embodiment of the invention, a kind of floating gate formula friction electronics field effect transistor is provided.Fig. 1 is root According to the structural schematic diagram of first embodiment of the invention floating gate formula friction electronics field effect transistor.As shown in Figure 1, the floating gate formula The electronics field effect transistor that rubs uses inverted soi wafer.In soi wafer, 3 heavy doping (P of substrate layer+- Si), have very Low resistivity;Upper layer of silicon is P-type silicon (P-Si), as channel layer 1;It is silicon dioxide insulator between substrate layer 3 and channel layer 1 Layer (SiO2)2.Wherein, substrate layer 3 is p-type or N-type heavy doping, and resistivity is less than 0.01 Ω cm after heavy doping.
The first metal electrode (Al) 4 and the second metal electrode (Al) are deposited respectively in the left and right sides of 1 lower surface of channel layer 5, drain electrode and source electrode respectively as field effect transistor, external power supply VDSThe two poles of the earth.The upper surface of substrate layer 3 is coated with one layer of Europe The third metal electrode (Al) 6 of nurse contact, the floating gate electrode as field effect transistor.The floating gate electrode 6 is not led with the external world Line connection is FGS floating gate structure.It is especially noted that floating gate formula friction electronics field effect transistor further includes one mobile Frictional layer 7.The movement frictional layer is high molecular polymer (PTFE) film, and can move vertically (i.e. edge and SOI under external force The vertical direction movement of silicon wafer), friction is contacted with the generation of floating gate electrode 6 or is separated.Wherein, floating gate electrode 6 and mobile frictional layer 7 By the material preparation for being located at different location in friction electrode sequence.
Fig. 2 is the working principle diagram of the friction electron-optical transistor of floating gate formula shown in Fig. 1.In Fig. 2 shown in (a), in external force F Under effect, high molecular polymer film 7 contacts generation friction with floating gate electrode 6, since different electronics fetters ability, macromolecule Thin polymer film 7 is negatively charged, and floating gate electrode 6 is positively charged.At this time due to the mutual constraint of positive and negative charge, on floating gate electrode 6 just Charge will not generate internal electric field in the transistor.In Fig. 2 shown in (b), when external force F is removed, floating gate electrode 6 and polyphosphazene polymer It closes object film 7 to separate, under the action of 6 positive charge of floating gate electrode, transistor internal will generate internal electric field in vertical direction, electricity Field direction is directed toward channel layer 1 by floating gate electrode 6, and channel layer 1 generates charge polarization under interior electric field action, so that on channel layer 1 Attracted by surfaces electronics repels hole, generates depletion layer, the conducting channel width in channel layer 1 is reduced, to reduce channel Electric current I in layer 1DSSize, play the role of regulate and control semiconductor carriers transport.When external force F is acted on again, polyphosphazene polymer Object film 7 is closed to be contacted again with floating gate electrode 6, it is interior in transistor internal vertical direction due to the mutual constraint of positive and negative charge Electric field is decreased to 0, and the conducting channel width in channel layer 1 becomes larger, electric current IDSBecome larger, has returned to the shape as shown in (a) in Fig. 2 State.Therefore, external force F can regulate and control the internal electric field size that floating gate charge is formed in transistor internal, play the role of grid voltage, To realize the regulation of size of current in double of conductor.In Fig. 2 in (a), electric current IDSIt is larger, it is defined as the opening state of transistor State;In Fig. 2 in (b), electric current IDSIt is smaller, it is defined as the closed state of transistor.Wherein, IDSIndicate source and drain (Drain- Source the electric current between).Also, the open state and closed state of floating gate formula friction electron-optical transistor can separately determine Justice.
In the present embodiment, the first metal electrode 4, the second metal electrode 5 and third metal electrode 6 are prepared by Al material. Above-mentioned electrode can also be prepared by other metals or nonmetallic materials, such as: Pt, Au, Ag or ITO (tin indium oxide).
It should be strongly noted that third metal electrode 6 is prepared by Al material in the present embodiment, mobile frictional layer 7 is by height The preparation of Molecularly Imprinted Polymer material, but the present invention is not limited thereto.In the present invention, as long as third metal electrode 6 and mobile friction Layer 7 is the material preparation of the different location in friction electrode sequence, both can contact friction and separation.
Here " friction electrode sequence ", refers to the sequence carried out according to attraction degree of the material to charge, two kinds of materials Material is in the moment to contact with each other, and positive charge more negative material surface of polarity from friction electrode sequence is transferred to friction on the contact surface The material surface of polarity calibration in electrode sequence.So far, there are no a kind of unified theories can completely explain that charge turns The mechanism of shifting, it is considered that, this electric charge transfer is related to the surface work function of material, by electronics or ion in contact surface On transfer and realize electric charge transfer.Needing to further illustrate is that the transfer of charge does not need opposite between two kinds of materials Friction, simply by the presence of contacting with each other.Wherein, above-mentioned " contact charge ", it is poor to refer to that two kinds of friction electrode sequence polarity exist The different material charge that its surface is had after contact rubs and separates, it is considered that, which is only distributed in the table of material Face, distribution depth capacity are only about 10nm.It should be noted that the symbol of contact charge is the symbol of net charge, i.e., in band There are some areas of the material surface of positive contact charge there may be the aggregation zone of negative electrical charge, but the symbol of whole surface net charge It number is positive.
Enumerate herein some insulating materials that can be used for preparing mobile frictional layer 7 and according to friction electrode sequence by positive polarity to Negative polarity sequence: aniline-formaldehyde resin, polyformaldehyde, ethyl cellulose, polyamide 11, polyamide 6-6, wool and its braided fabric, Silk and its fabric, paper, polyethylene glycol succinate, cellulose, cellulose acetate, polyethyleneglycol adipate, poly- adjacent benzene Diformazan diallyl phthalate, regenerated cellulosic sponge, cotton and its fabric, polyurethane elastomer, styrene-acrylonitrile copolymer, benzene Ethylene-butadiene copolymer, wood, hard rubber, acetate, staple fibre, polymethyl methacrylate, polyvinyl alcohol, polyester (terylene), polyisobutene, elastic polyurethane sponge, polyethylene terephthalate, polyvinyl butyral, butadiene-the third Alkene lonitrile copolymer, natural rubber, polyacrylonitrile, poly- (vinylidene chloride-co- acrylonitrile), poly bisphenol carbonic ester, gathers neoprene Chlorine ether, polyvinylidene chloride, poly- (2,6- dimethyl polyphenylene oxide), polystyrene, polyethylene, polypropylene, poly- hexichol Base propane carbonic ester, polyethylene terephthalate, polyimides, polyvinyl chloride, dimethyl silicone polymer, poly- trifluoro chloroethene Alkene, polytetrafluoroethylene (PTFE), Parylene, including Parylene C, Parylene N, Parylene D, Parylene HT and Parylene AF4.
Relative to insulator, conductive material all has the triboelectric characteristics for being easy to lose electronics, in the column of friction electrode sequence It is frequently located at end in table.The common conductive material for being used to prepare floating gate electrode 6 includes metal, conductive oxide or conductive polymer Sub- material.Wherein metal includes gold, silver, platinum, aluminium, nickel, copper, titanium, chromium or selenium, and the alloy formed by above-mentioned metal.It is conductive Oxide common such as AZO (Al-Doped ZnO), ITO (indium tin oxide).
Two, second embodiment
In a second embodiment of the present invention, a kind of friction electronics logical device is provided.Fig. 3 is according to the present invention The structural schematic diagram of second embodiment friction electronics logical device.As shown in figure 3, friction electronics logical device is by two phases Pair the mobile support plate of Transistor-Transistor A (upper transistor) and transistor B (lower transistor) and one form.
Support plate is moved as poly (methyl methacrylate) plate (Glass), the high molecular polymer film of transistor A and transistor B are fixed In the tow sides of the poly (methyl methacrylate) plate.Mobile support plate can vertically move between transistor A and transistor B, make transistor A Friction is contacted with corresponding floating gate electrode respectively with the mobile frictional layer of transistor B or is separated.
Wherein, the drain electrode of transistor B meets supply voltage Vbias, source electrode is connected with the drain electrode of transistor A, meets output end Vout, The source electrode of transistor A is grounded.
The position of middle mobile support plate shown in Fig. 3 is its initial position, and the floating gate electrode distance with transistor B is d, at this time External force F is release conditions, is defined as input state " 0 ";When external force F is application state, mobile support plate external force F act on to Lower movement, contacts with the floating gate electrode of transistor B, and distance is 0, is defined as input state " 1 ".According to floating gate formula friction electronics The working principle of field effect transistor, when external force F is " 0 ", transistor A is opened, and transistor B is closed, at this time VoutFor low level Output, is defined as output state " 0 ";When external force F is " 1 ", transistor A is closed, and transistor B is opened, at this time VoutFor high level Output, is defined as output state " 1 ".Therefore, friction electronics logical device establishes external mechanical force input and logic level The connection of output.Wherein, when the mobile frictional layer of one of transistor A and transistor B is contacted with corresponding floating gate electrode, Wherein another mobile frictional layer with corresponding floating gate electrode distance d between 1mm between 10mm.
Fig. 4 is the equivalent circuit diagram of friction electronics logical device shown in Fig. 3.The electronics as shown in figure 4, the present embodiment rubs It learns logical device (CGL) and is equivalent to a friction nanometer power generator (TENG) and two field-effects with two-way voltage output Transistor (#1, #2).Two output ends of the friction nanometer power generator are respectively connected to the floating gate electricity of two field effect transistors Pole, when external force F is " 0 ", the two output voltage of friction nanometer power generator closes transistor A, and transistor B is opened;When outer When power F is " 1 ", the two output voltage of friction nanometer power generator opens transistor A (#1), and transistor B (#2) is closed.
Work as Vbias=5V, D0When=1.2mm, friction electronics logical device level exports the truth table of corresponding external force F input As shown in Table 1, test result meets CMOS logic level standard.Wherein, D0For the transformation range of distance d.
The truth table of the friction electronics logical device of table one
Three, 3rd embodiment
In third embodiment of the invention, a kind of friction electronics logical device based on second embodiment is provided Friction electronics logic inverter.Fig. 5 is the equivalent circuit diagram according to third embodiment of the invention friction electronics logic inverter.
Referring to figure 5., which includes a logical device (CGL).The logical device (CGL) is the The logical device of two embodiments, only its circuit connecting relation is adjusted.It for convenience, will be in the logical device Transistor A and transistor B are respectively designated as the first transistor and second transistor.
Please continue to refer to Fig. 5, in the present embodiment, the power input of logical device shown in Fig. 4 is exchanged with ground terminal, I.e. by the grounded drain of the first transistor, the source level of second transistor meets supply voltage Vbias, the source level of the first transistor and The drain electrode of two-transistor is connected, and meets output end Vout, as rub electronics logic inverter.
Work as Vbias=5V, D0When=1.2mm, friction electronics logic inverter level exports the truth table of corresponding external force F input As shown in Table 2, test result meets logic inverter characteristic and CMOS logic level standard.
The truth table of the friction electronics logic inverter of table two
Four, fourth embodiment
In the 4th embodiment of the invention, a kind of friction electronics of logical device based on second embodiment is provided Learn logical AND gate.Fig. 6 is the equivalent circuit diagram according to fourth embodiment of the invention friction electronics logical AND gate.
Fig. 6 is please referred to, which includes: the first logical device (CGL1) and the second logical device (CGL2).First logical device (CGL1) and the second logical device (CGL2) are the logical device of second embodiment.In order to Description is convenient, by the first logical device (CGL1) transistor A and transistor B be respectively designated as the first transistor (#1) and the Two-transistor (#2), by the second logical device (CGL2) transistor A and transistor B be respectively designated as third transistor (#3) With the 4th transistor (#4).
Please continue to refer to Fig. 6, the circuit connecting relation of the present embodiment friction electronics logical AND gate is as follows:
(1) drain electrode of the first transistor (#1) is connected to supply voltage Vbias
(2) source level of the first transistor (#1) is connected with the drain electrode of third transistor (#3);
(3) drain of second transistor (#2) and the 4th transistor (#4) is connected with the source level of third transistor (#3), connects Output end Vout
(4) source level of second transistor (#2) and the 4th transistor (#4) is grounded;
FAAnd FBIt is respectively acting on two logical devices (CGL1 and CGL2).
Work as Vbias=5V, D0When=1.2mm, friction electronics logical AND gate level exports corresponding external force FAAnd FBInput Truth table is as shown in Table 3, and test result meets logical AND gate characteristic and CMOS logic level standard.
The truth table of the friction electronics logical AND gate of table three
Five, the 5th embodiment
In the 5th embodiment of the invention, a kind of friction electronics of logical device based on second embodiment is provided Learn logic sum gate.Fig. 7 is the equivalent circuit diagram according to fifth embodiment of the invention friction electronics logic sum gate.
As shown in fig. 7, the friction electronics logic sum gate includes: the first logical device (CGL1) and the second logical device (CGL2).First logical device (CGL1) and the second logical device (CGL2) are logical device shown in Fig. 4.In order to describe It is convenient, by the first logical device (CGL1) transistor A and transistor B be respectively designated as the first transistor (#1) and the second crystalline substance Body pipe (#2), by the second logical device (CGL2) transistor A and transistor B be respectively designated as third transistor (#3) and Four transistors (#4).
Fig. 7 is please referred to, the circuit connecting relation of the present embodiment friction electronics logic sum gate is as follows:
(1) drain electrode of the first transistor (#1) and third transistor (#3) is connected to supply voltage Vbias
(2) the first transistor (#1) and the source level of third transistor (#3) are connected with the drain electrode of the 4th transistor (#4), connect Output end Vout
(3) drain of second transistor (#2) is connected with the source level of the 4th transistor (#4);
(4) the source level ground connection of second transistor (#2);
FAAnd FBIt is respectively acting on two logical devices (CGL1 and CGL2).
Work as Vbias=5V, D0When=1.2mm, friction electronics logic sum gate level exports corresponding external force FAAnd FBInput Truth table is as shown in Table 4, and test result meets logic sum gate characteristic and CMOS logic level standard.
The truth table of the friction electronics logic sum gate of table four
Six, sixth embodiment
In the 6th embodiment of the invention, a kind of friction electronics of logical device based on second embodiment is provided Learn logic NAND gate.The power input of friction electronics logical AND gate shown in fig. 6 is exchanged with ground terminal, as this implementation The friction electronics logic NAND gate of example.
Fig. 8 is the equivalent circuit diagram according to sixth embodiment of the invention friction electronics logic NAND gate.Fig. 8 is please referred to, The present embodiment friction electronics logic NAND gate includes: the first logical device (CGL1) and the second logical device (CGL2).This One logical device (CGL1) and the second logical device (CGL2) are logical device shown in Fig. 4.For convenience, by first Transistor A and transistor B in logical device (CGL1) are respectively designated as the first transistor (#1) and second transistor (#2), will Transistor A and transistor B in second logical device (CGL2) are respectively designated as third transistor (#3) and the 4th transistor (# 4)。
Please continue to refer to Fig. 8, the circuit connecting relation of the present embodiment friction electronics logic NAND gate is as follows:
(1) drain electrode of the first transistor (#1) is connected to the ground;
(2) source level of the first transistor (#1) is connected with the drain electrode of third transistor (#3);
(3) drain of second transistor (#2) and the 4th transistor (#4) is connected with the source level of third transistor (#3), connects Output end Vout
(4) source level of second transistor (#2) and the 4th transistor (#4) meets supply voltage Vbias
FAAnd FBIt is respectively acting on two logical devices (CGL1 and CGL2).
Work as Vbias=5V, D0When=1.2mm, friction electronics logic NAND gate level exports corresponding external force FAAnd FBInput Truth table it is as shown in Table 5, test result meets logic NAND gate characteristic and CMOS logic level standard.
The truth table of the friction electronics logic NAND gate of table five
Seven, the 7th embodiment
In the 7th embodiment of the invention, a kind of friction electronics of logical device based on second embodiment is provided Learn logic nor gate.The power input for the electronics logic sum gate that rubs shown in Fig. 7 is exchanged with ground terminal, as the present embodiment Friction electronics logic nor gate.
Fig. 9 is the equivalent circuit diagram according to seventh embodiment of the invention friction electronics logic nor gate.Fig. 9 is please referred to, The present embodiment friction electronics logic nor gate includes: the first logical device (CGL1) and the second logical device (CGL2).This One logical device (CGL1) and the second logical device (CGL2) are logical device shown in Fig. 4.For convenience, by first Transistor A and transistor B in logical device (CGL1) are respectively designated as the first transistor (#1) and second transistor (#2), will Transistor A and transistor B in second logical device (CGL2) are respectively designated as third transistor (#3) and the 4th transistor (# 4)。
Please continue to refer to Fig. 9, the circuit connecting relation of the present embodiment friction electronics logic nor gate is as follows:
(1) drain electrode of the first transistor (#1) and third transistor (#3) is connected to the ground;
(2) the first transistor (#1) and the source level of third transistor (#3) are connected with the drain electrode of the 4th transistor (#4), connect Output end Vout
(3) drain of second transistor (#2) is connected with the source level of the 4th transistor (#4);
(4) source level of second transistor (#2) meets supply voltage Vbias
FAAnd FBIt is respectively acting on the first logical device (CGL1) and the second logical device (CGL2).
Work as Vbias=5V, D0When=1.2mm, friction electronics logic nor gate level exports corresponding external force FAAnd FBInput Truth table it is as shown in Table 6, test result meets logic nor gate characteristic and CMOS logic level standard.
The truth table of the friction electronics logic nor gate of table six
Eight, the 8th embodiment
In the 8th embodiment of the invention, a kind of friction electronics of logical device based on second embodiment is provided Learn logic XOR gate.Figure 10 is the equivalent circuit diagram according to eighth embodiment of the invention friction electronics logic XOR gate.
Please refer to Figure 10, the present embodiment friction electronics logic XOR gate includes: that the first logical device, (CGL1) second are patrolled Collect device (CGL2) and third logical device (CGL3).Wherein, first logical device (CGL1), the second logical device (CGL2) It is logical device as shown in Figure 4 with third logical device (CGL3).For convenience, by the first logical device (CGL1) In transistor A and transistor B be respectively designated as the first transistor (#1) and second transistor (#2), by the second logical device (CGL2) transistor A and transistor B in are respectively designated as third transistor (#3) and the 4th transistor (#4), by third logic Transistor A and transistor B in device (CGL3) are respectively designated as the 5th transistor (#5) and the 6th transistor (#6).
Please continue to refer to Figure 10, the circuit connecting relation of the present embodiment friction electronics logic XOR gate is as follows:
(1) drain electrode of the source level of second transistor (#2) and third transistor (#3) is connected to supply voltage Vbias
(2) source level of the drain electrode of the first transistor (#1) and the 4th transistor (#4) is grounded;
(3) source electrode of the first transistor (#1), the drain electrode of second transistor (#2) and the 5th transistor (#5) drain electrode phase Even;
(4) source electrode of third transistor (#3), the drain electrode of the 4th transistor (#4) and the 6th transistor (#6) source level phase Even;
The drain electrode of the source level and the 6th transistor (#6) of (5) the 5th transistors (#5) is connected, and meets output end Vout
FAThe first logical device (CGL1) and the second logical device (CGL2), F are acted on simultaneouslyBAct on third logic device Part (CGL3).
Work as Vbias=5V, D0When=1.2mm, friction electronics logic exclusive or gate level exports corresponding external force FAAnd FBInput Truth table it is as shown in Table 7, test result meets logic XOR gate characteristic and CMOS logic level standard.
The truth table of the friction electronics logic XOR gate of table seven
Nine, the 9th embodiment
In the 9th embodiment of the invention, a kind of friction electronics of logical device based on second embodiment is provided Learn logic with or door.The power input of friction electronics logic XOR gate shown in Fig. 10 is exchanged with ground terminal, as originally The friction electronics logic of embodiment with or door.
Figure 11 be according to ninth embodiment of the invention rub electronics logic with or door equivalent circuit diagram.Please refer to figure 11, the present embodiment friction electronics logic with or door include: the first logical device (CGL1), the second logical device (CGL2) and the Three logical devices (CGL3).Wherein, first logical device (CGL1), the second logical device (CGL2) and third logical device It (CGL3) is logical device as shown in Figure 4.For convenience, by the first logical device (CGL1) transistor A and Transistor B is respectively designated as the first transistor (#1) and second transistor (#2), by the crystal in the second logical device (CGL2) Pipe A and transistor B is respectively designated as third transistor (#3) and the 4th transistor (#4), will be in third logical device (CGL3) Transistor A and transistor B is respectively designated as the 5th transistor (#5) and the 6th transistor (#6).
Please continue to refer to Figure 11, the present embodiment friction electronics logic is together or the circuit connecting relation of door is as follows:
(1) drain electrode of the source level of second transistor (#2) and third transistor (#3) is connected to the ground;
(2) source level of the drain electrode of the first transistor (#1) and the 4th transistor (#4) meets supply voltage Vbias
(3) source electrode of the first transistor (#1), the drain electrode of second transistor (#2) and the 5th transistor (#5) drain electrode phase Even;
(4) source electrode of third transistor (#3), the drain electrode of the 4th transistor (#4) and the 6th transistor (#6) source level phase Even;
The drain electrode of the source level and the 6th transistor (#6) of (5) the 5th transistors (#5) is connected, and meets output end Vout
FAThe first logical device (CGL1) and the second logical device (CGL2), F are acted on simultaneouslyBAct on third logic device Part (CGL3).
Work as Vbias=5V, D0When=1.2mm, friction electronics logic is same or gate level exports corresponding external force FAAnd FBInput Truth table it is as shown in Table 8, test result meet logic with or door characteristic and CMOS logic level standard.
Table eight rub electronics logic with or door truth table
Ten, the tenth embodiment
In the tenth embodiment of the invention, provide it is a kind of based on above-mentioned third~nine embodiment logical devices patrol Collect circuit.The logic circuit includes at least the logical device in one or more above-described embodiments.
So far, attached drawing is had been combined ten embodiments of the invention are described in detail.According to above description, this field Technical staff should have clearly to present invention friction electronics field effect transistor and using its logical device and logic circuit The understanding of Chu.
In addition, the above-mentioned definition to each element and method is not limited in the various specific structures mentioned in embodiment, shape Shape or mode, those of ordinary skill in the art simply can be changed or be replaced to it, such as:
(1) third metal electrode 6 can also be that macromolecule polymer material, mobile frictional layer 7 can also be metal material, Channel layer 1 can also be N-type silicon;
(2) other than soi wafer, the matrix of field effect transistor can also be replaced with other forms, such as: substrate layer 3 can be replaced with conductive material flexible, and silicon dioxide insulating layer 2 can be replaced with organic insulating material, and channel layer 1 can To be replaced with organic semiconducting materials.
In conclusion the present invention combines friction nanometer power generator with silicon-based field-effect transistors, proposes one kind and rub Electronics field effect transistor and logical device and logic circuit using it are wiped, CMOS can be converted by external mechanical triggering Logic level signal output.And various combinational logic circuits are proposed on this basis, illustrate the friction electronics of mechanical-electric coupling Logical operation is learned, the interaction of external environment and si-substrate integrated circuit is realized, in human-computer interaction, minute mechanical and electrical system, intelligent machine It is with important application prospects in device people and Internet of Things.
Particular embodiments described above has carried out further in detail the purpose of the present invention, technical scheme and beneficial effects It describes in detail bright, it should be understood that the above is only a specific embodiment of the present invention, is not intended to restrict the invention, it is all Within the spirit and principles in the present invention, any modification, equivalent substitution, improvement and etc. done should be included in guarantor of the invention Within the scope of shield.

Claims (14)

1. a kind of friction electronics logical device characterized by comprising mobile support plate;And floating gate electrode it is opposite and every Open the transistor A and transistor B of pre-determined distance;
Transistor A and transistor B is friction electronics field effect transistor;
The friction electronics field effect transistor includes:
Semiconductor body comprising: conductive substrates (3) and the insulating layer (2) and channel that are sequentially formed in the conductive substrates Layer (1);
Drain (4) and source electrode (5), is formed in the two sides of the channel layer (1);
Floating gate electrode (6) is formed on the conductive substrates (3) and the insulating layer (2) opposite another side, with the conduction Substrate (3) Ohmic contact;And
Mobile frictional layer (7), are oppositely arranged with the floating gate electrode (6), can move under external force, with the floating gate electricity Pole (6) generates contact friction or separation;
Wherein, the floating gate electrode (6) is with the mobile frictional layer (7) by the material system of the different location in friction electrode sequence It is standby;
Wherein, the semiconductor body is soi wafer;
The mobile frictional layer of the transistor A and transistor B is fixed on the tow sides of the mobile support plate, and can be in the shifting The drive lower edge of dynamic support plate is moved perpendicular to the direction of the soi wafer, makes the mobile frictional layer of transistor A and transistor B Friction is contacted with corresponding floating gate electrode respectively or is separated.
2. friction electronics logical device according to claim 1, it is characterised in that:
When the mobile frictional layer (7) contacts friction with the floating gate electrode (6), the mobile frictional layer is negatively charged, described floating Gate electrode is positively charged, for the first state of the friction electronics field effect transistor;
When the mobile frictional layer (7) separates with the floating gate electrode (6), inside the friction electronics field effect transistor Internal electric field is generated, channel layer is directed toward by floating gate electrode in direction, for the second state of the friction electronics field effect transistor;
Wherein, the first state is one of open state and closed state, and second state is open state and pass Closed state is wherein another.
3. friction electronics logical device according to claim 1, which is characterized in that the conductive substrates (3) are by described The substrate layer of soi wafer is obtained through heavy doping, and the insulating layer (2) is the silicon dioxide insulating layer of the soi wafer, the ditch Channel layer (1) is the upper layer of silicon of the soi wafer.
4. friction electronics logical device according to claim 1, which is characterized in that the drain electrode (4), source electrode (5) and Floating gate electrode (6) is prepared by metal material or non-metallic conducting material;The mobile frictional layer contacts friction with floating gate electrode (6) Part prepared by macromolecule polymer material.
5. friction electronics logical device according to claim 1-4, it is characterised in that: the transistor A's Source electrode ground connection;The drain electrode of the transistor B meets supply voltage Vbias, source electrode is connected with the drain electrode of transistor A, meets output end Vout
6. friction electronics logical device according to claim 1-4, it is characterised in that:
The mobile support plate is contacted close to the transistor A, the mobile frictional layer of transistor A with floating gate electrode, and transistor A is opened It opens, transistor B is closed, output end VoutFor low level, the friction electronics logical device is output state " 0 ";
Under external force, mobile support plate is moved towards transistor B, and the mobile frictional layer of transistor B is contacted with floating gate electrode, Transistor B is opened, and transistor A is closed, output end VoutFor described in high level, friction electronics logical device is output state “1”。
7. a kind of friction electronics logic inverter characterized by comprising a logical device, the logical device are claim The described in any item friction electronics logical devices of 1-4, transistor A and transistor B in the logical device are respectively the first crystalline substance Body pipe and second transistor;
Wherein, the grounded drain of the first transistor, the source electrode of second transistor meet supply voltage Vbias, the source electrode of the first transistor It is connected with the drain electrode of second transistor, meets output end Vout
8. a kind of friction electronics logical AND gate characterized by comprising the first logical device and the second logical device, this One logical device and the second logical device are the described in any item friction electronics logical devices of claim 1-4, this first is patrolled Transistor A and transistor B in volume device are respectively the first transistor (#1) and second transistor (#2), second logical device In transistor A and transistor B be respectively third transistor (#3) and the 4th transistor (#4), in which:
The drain electrode of the first transistor (#1) is connected to supply voltage Vbias
The source electrode of the first transistor (#1) is connected with the drain electrode of third transistor (#3);
The drain electrode of second transistor (#2) and the 4th transistor (#4) is connected with the source electrode of third transistor (#3), connects output end Vout
The source electrode of second transistor (#2) and the 4th transistor (#4) ground connection;
FAAnd FBIt is respectively acting on the first logical device and the second logical device.
9. a kind of friction electronics logic sum gate characterized by comprising the first logical device and the second logical device, this One logical device and the second logical device are the described in any item friction electronics logical devices of claim 1-4, this first is patrolled Transistor A and transistor B in volume device are respectively the first transistor (#1) and second transistor (#2), second logical device In transistor A and transistor B be respectively third transistor (#3) and the 4th transistor (#4), in which:
The drain electrode of the first transistor (#1) and third transistor (#3) is connected to supply voltage Vbias
The first transistor (#1) and the source electrode of third transistor (#3) are connected with the drain electrode of the 4th transistor (#4), connect output end Vout
The drain electrode of second transistor (#2) is connected with the source electrode of the 4th transistor (#4);
The source electrode of second transistor (#2) is grounded;
FAAnd FBIt is respectively acting on the first logical device and the second logical device.
10. a kind of friction electronics logic NAND gate characterized by comprising the first logical device and the second logical device, it should First logical device and the second logical device are the described in any item friction electronics logical devices of claim 1-4, this first Transistor A and transistor B in logical device are respectively the first transistor (#1) and second transistor (#2), second logic device Transistor A and transistor B in part are respectively third transistor (#3) and the 4th transistor (#4), in which:
The drain electrode of the first transistor (#1) is connected to the ground;
The source electrode of the first transistor (#1) is connected with the drain electrode of third transistor (#3);
The drain electrode of second transistor (#2) and the 4th transistor (#4) is connected with the source electrode of third transistor (#3), connects output end Vout
The source electrode of second transistor (#2) and the 4th transistor (#4) meets supply voltage Vbias
FAAnd FBIt is respectively acting on the first logical device and the second logical device.
11. a kind of friction electronics logic nor gate characterized by comprising the first logical device and the second logical device, it should First logical device and the second logical device are the described in any item friction electronics logical devices of claim 1-4, this first Transistor A and transistor B in logical device are respectively the first transistor (#1) and second transistor (#2), second logic device Transistor A and transistor B in part are respectively third transistor (#3) and the 4th transistor (#4), in which:
The drain electrode of the first transistor (#1) and third transistor (#3) is connected to the ground;
The first transistor (#1) and the source electrode of third transistor (#3) are connected with the drain electrode of the 4th transistor (#4), connect output end Vout
The drain electrode of second transistor (#2) is connected with the source electrode of the 4th transistor (#4);
The source electrode of second transistor (#2) meets supply voltage Vbias
FAAnd FBIt is respectively acting on two friction electronics logical devices.
12. a kind of friction electronics logic XOR gate characterized by comprising the first logical device, the second logical device and Three logical devices, first logical device, the second logical device and third logical device are that claim 1-4 is described in any item Rub electronics logical device, and the transistor A and transistor B in first logical device are respectively the first transistor (#1) and the Two-transistor (#2), transistor A and transistor B in second logical device are respectively third transistor (#3) and the 4th crystal It manages (#4), the transistor A and transistor B in the third logical device are respectively the 5th transistor (#5) and the 6th transistor (# 6), in which:
The drain electrode of the source electrode and third transistor (#3) of second transistor (#2) is connected to supply voltage Vbias
The source electrode of the drain electrode of the first transistor (#1) and the 4th transistor (#4) ground connection;
The drain electrode of the source electrode, second transistor (#2) of the first transistor (#1) is connected with the drain electrode of the 5th transistor (#5);
The drain electrode of the source electrode of third transistor (#3), the 4th transistor (#4) is connected with the source electrode of the 6th transistor (#6);
The drain electrode of the source electrode and the 6th transistor (#6) of 5th transistor (#5) is connected, and meets output end Vout
FAThe first logical device and the second logical device, F are acted on simultaneouslyBAct on third logical device.
13. a kind of friction electronics logic with or door characterized by comprising the first logical device, the second logical device and the Three logical devices, first logical device, the second logical device and third logical device are that claim 1-4 is described in any item Rub electronics logical device, and the transistor A and transistor B in first logical device are respectively the first transistor (#1) and the Two-transistor (#2), transistor A and transistor B in second logical device are respectively third transistor (#3) and the 4th crystal It manages (#4), the transistor A and transistor B in the third logical device are respectively the 5th transistor (#5) and the 6th transistor (# 6), in which:
The drain electrode of the source electrode and third transistor (#3) of second transistor (#2) is connected to the ground;
The source electrode of the drain electrode of the first transistor (#1) and the 4th transistor (#4) meets supply voltage Vbias
The drain electrode of the source electrode, second transistor (#2) of the first transistor (#1) is connected with the drain electrode of the 5th transistor (#5);
The drain electrode of the source electrode of third transistor (#3), the 4th transistor (#4) is connected with the source electrode of the 6th transistor (#6);
The drain electrode of the source electrode and the 6th transistor (#6) of 5th transistor (#5) is connected, and meets output end Vout
FAThe first logical device and the second logical device, F are acted on simultaneouslyBAct on third logical device.
14. a kind of logic circuit, which is characterized in that including at least one logical device, which is in claim 1-6 Described in any item friction electronics logical devices, friction electronics logic inverter as claimed in claim 7, claim 8 institute Friction electronics logical AND gate, the friction electronics logic sum gate as claimed in claim 9, friction described in any one of claim 10 stated Friction electricity described in friction electronics logic nor gate, claim 12 described in electronics logic NAND gate, claim 11 Son learn friction electronics logic described in logic XOR gate or claim 13 with or door.
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