CN106019015A - Busbar differential protection dead zone fault logic verification method - Google Patents
Busbar differential protection dead zone fault logic verification method Download PDFInfo
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- CN106019015A CN106019015A CN201610436629.XA CN201610436629A CN106019015A CN 106019015 A CN106019015 A CN 106019015A CN 201610436629 A CN201610436629 A CN 201610436629A CN 106019015 A CN106019015 A CN 106019015A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
The invention relates to a busbar differential protection dead zone fault logic verification method. With the method adopted, busbar differential protection can act correctly when a dead zone fault occurs on busbars. The method includes the following steps of: differential current setting: a relay protection department provides differential current ranging from 0 to 20A; verifying busbar joint closing position dead zone test wiring: a tester tests the action time of an II busbar differential element when the switching quantity of an A-phase terminal is inputted and the action time of the II busbar differential element when the switching quantity of a B-phase terminal is inputted, and if the time difference of the action time of the II busbar differential element when the switching quantity of the A-phase terminal is inputted and the action time of the II busbar differential element when the switching quantity of the B-phase terminal is inputted is larger than 50ms, it is indicated that busbar joint breaking position dead zone logic is correct; and verifying busbar joint breaking position dead zone logic test wiring: the tester tests the action time of a I busbar differential element when the switching quantity of the A-phase terminal is inputted, if the action time ranges from 20 to 40ms, it is indicated that busbar joint breaking position dead zone logic is correct.
Description
Technical field
The present invention relates to bus differential protection dead-zone fault logic verification method in power system.
Background technology
At present, being widely applied in the most each power system of microcomputer type bus differential protection, bus differential protecting is by mother
The little differential composition of the most differential and several each section of bus of line.Bus is the most differential is to be broken by except bus and segmentation
The big difference element that the electric current of bus remaining branch roads all beyond the device of road is constituted, its effect is gone back in being to discriminate between bus
Bus external short circuit, but it to cannot distinguish between be which bar bus breaks down.Certain bus little differential be by with this
The difference element that each branch current that bus is connected is constituted, including the bus being associated with this bus
With the electric current of section switch branch road, its effect is can to distinguish in this bus or the outer fault of this bus,
So can be as the selection element of fault bus.For the bus protection of the form such as double-bus, bus section,
If big difference element and certain the little difference element of bus action simultaneously, then this bus is excised, namely " big
Difference sentences bus-bar fault, and little difference selects fault bus ".
For double-bus or the bus differential protection of sectionalized single busbar connection, when fault occurs between bus and mother TA
Or time between section switch and segmentation TA, if the bus differential protection taking no action to chopper side wants malfunction,
And the bus differential protection of TA side wants tripping.Typically between bus and mother TA or section switch with
Between segmentation TA, this segment limit is referred to as dead band.
As a example by the double female wiring shown in Fig. 1.If the TAl of four connecting elements, the homopolar end of TA2, TA3, TA4
All in bus bar side, the homopolar end of mother TA in mother I side, they positive direction electric currentsSuch as solid line in Fig. 2
Shown in arrow.The electric current composition of TA1, TA2, TA3, TA4 is the poorest, by the phasor of positive direction electric current with constitute
Difference current isThe electric current female little difference of composition I of TAl, TA2, TA5, by positive direction
The phasor of electric current and the difference current of composition areThe electric current of TA3, TA4, TA5 constitutes II
Female little difference, due toPositive direction electric current be flow out II female andPositive direction electric current be that to flow into II female,
Therefore by the phasor of positive direction electric current and the difference current constituted beIn mother loop, electric current is mutual
Sensor TA5 is female near I, and chopper 5 is female near II, so female for I little difference is also referred to as the little difference in TA side,
The female little difference of II is referred to as the little difference in chopper side.It is short-circuited in dead band between bus 5 and mother TA5
Time, flow through each elementAs shown in phantom in FIG., they all flow to short dot to electric current.Obviously The poorest difference current is Short circuit current (two sub-values) equal to short dot.TA side (mother I side)
The difference current of little difference isChopper side (mother II side) little difference
Difference current isIt is also equal to short dot
Short circuit current (two sub-values).Respectively connect on tripping chopper side bus so the poorest with little differential work the in chopper side
Element and bus.Owing to the little difference in TA side is failure to actuate, so the protection of TA side bus is motionless, make short circuit
Fault still exists.So being referred to as dead band between bus and mother TA.This short trouble can only
Could be cut by each chopper on the time delay tripping TA side bus that mother failure protection band is longer.Owing to being mother
Line fault, fault current is very big, and on bus, all elements bear the biggest fault current.As can not be quickly excised
Trouble point, is likely to result in current transformer, high-voltage switch gear is because bearing fault current for a long time, and causes electric current mutual
Sensor, high-voltage switch gear explode, and cause electric network from collapsing.
Bus tie dead zone protection philosophy is as follows:
For shortening fault clearing time, ad hoc bus tie dead zone protection.Occur bus as shown in Figure 2 and
Between mother TA during the fault in dead zone range, bus tie dead zone protection can meet following four conditions simultaneously: 1. female
Line differential protection sent out jumping order female for II；2. bus tripping (TWJ=1)；3. the arbitrary phase of mother TA
Still there is electric current；Do not return after the little poor percentage differential element movement of the biggest poor percentage differential element and II mother.
Meet aforementioned four condition simultaneously and go respectively connecting on tripping mother I through compound voltage lockout after the action delay of dead band
Connect element.Being short-circuited in above-mentioned dead band, the poorest and II female little differential work respectively connects on tripping mother's II side bus
After element and bus, first three condition has met.The poorest due to TA1, in TA2, stream has short circuit electricity
Stream, so not returning；The little difference in mother II side due in mother TA5 a direct current have short circuit current, so also one
Directly not returning, such 4th condition can meet.So can be with tripping I through short time delay and compound voltage lockout
Each chopper excision fault on female side bus.
At present, in transformer station's bus differential protection, bus tie dead zone logic is without effective verification method, causes bus that dead band event occurs
During barrier, cause bus differential protection malfunction, expand accident scope.
Summary of the invention
The present invention is to solve the problems referred to above that prior art exists, it is provided that a kind of bus differential protection dead-zone fault logic
Verification method, it is ensured that bus differential protection energy correct operation during bus generation dead-zone fault.
The technical solution of the present invention is:
1, difference current definite value is arranged: being given difference current by relay protection department is 0-20A；
2, the female joint bit die-out logic experimental wiring of checking
In terminal block after differential relaying panel, the cut-in method of the magnitude of current is as follows: a1, b1, c1, n1 terminal is female
Connection TA secondary terminals, a2, b2, c2, n2 terminal is the female little poor TA secondary terminals of I；a3、b3、c3、
N3 terminal is the female little poor TA secondary terminals of II, and tester A phase current IA is passed through mother element, tester B
Phase current IB is passed through mother's I any element, and tester C phase current IC is passed through mother's II any element；
Tester A phase current accesses mother current loop, and tester B phase current accesses mother's I any element current loop,
Tester C phase current accesses mother's II any element current loop；Tester is opened according to sequencing and is held into A phase
Son receives mother's II element tripping operation contact, and tester is opened and received mother's I element tripping operation contact, mother into B phase terminal
Tripping operation contact to mother jump position open into；
3, the female joint bit die-out logic of checking
1), before test, mother is jumped conjunction position and is opened into all disconnecting, and bus differential protection device report " is opened into exception ", and female difference is protected
Protection unit acquiescence bus connection switch is closing position；
2) during test, being passed through fault current, the action of mother II difference element elder generation, by mother tripping operation contact to mother
Jump position open into；Continue to be passed through fault current, now, meet the 3rd condition of envelope mother CT, when mother I unit
Part electric current is more than differential definite value, dead zone protection element movement, and mother I trips；
State 1:IA=IB=IC and more than difference current, same phase；Simulation mother's II troubles inside the sample space, opens into A
Phase terminal upset enters NextState；
State 2:IA=IB=IC and more than difference determine electric current, same phase；Envelope mother CT, IB > difference current definite value,
It is female that dead zone protection element movement jumps I, opens into B phase terminal, stops this state；
By tester measure open into mother's II differential action time during A phase terminal and open into mother II during B phase terminal poor
Dynamic movement time, the time difference is more than 50ms；Show that female joint bit die-out logic is correct；
4, after putting into " fanout operation " pressing plate, directly envelope mother CT, when non-mother element current is more than differential
Bus bar differential prptection operation during current ration；
5, checking mother divides a die-out logic experimental wiring
In terminal block after differential relaying panel, the cut-in method of the magnitude of current is as follows: a1, b1, c1, n1 terminal is female
Connection TA secondary terminals, a2, b2, c2, n2 terminal is the female little poor TA secondary terminals of I；a3、b3、c3、
N3 terminal is the female little poor TA secondary terminals of II, and tester A phase current IA accesses mother current loop, test
Instrument B phase current IB accesses mother's I any element current loop；Tester is opened and is received mother's I tripping operation into A phase terminal
Contact；
6, the female joint bit die-out logic of checking
During test, it is passed through fault current, I female difference element action；
State 1:IA=IB and more than difference current definite value, same phase, I female difference element is opened into A phase terminal
Stop fault；
Being measured by tester opens into mother's I difference element movement time during A phase terminal, and this movement time is
20～40ms, show that mother divides a die-out logic correct.
The invention has the beneficial effects as follows: by above-mentioned verification experimental verification bus tie dead zone relay protective scheme correctness, prevent mother
Line differential protection is in generation bus tie dead zone fault due to protection defect, and the safety that will directly affect power system is steady
Fixed operation, causes serious consequence.By bus tie dead zone failure cause is analyzed, feasible test side is proposed
Method, provides reference and reference for running with attendant.It addition, make full use of the various functions of test device,
Modified test method, realization rate, process of the test, to simplify the debugging efforts of relay protection, improve test effect
Rate.
Accompanying drawing explanation
The double female wiring diagram of Tu1Shi transformer station；
Fig. 2 is the experimental wiring figure of the present invention.
Detailed description of the invention
The technical solution of the present invention is:
1, difference current definite value is arranged: being given difference current by relay protection department is 0-20A；
2, the female joint bit die-out logic experimental wiring of checking
In terminal block after differential relaying panel, the cut-in method of the magnitude of current is as follows: a1, b1, c1, n1 terminal is female
Connection TA secondary terminals, a2, b2, c2, n2 terminal is the female little poor TA secondary terminals of I；a3、b3、c3、
N3 terminal is the female little poor TA secondary terminals of II, and tester A phase current IA is passed through mother element, tester B
Phase current IB is passed through mother's I any element, and tester C phase current IC is passed through mother's II any element；
Tester A phase current accesses mother current loop, and tester B phase current accesses mother's I any element current loop,
Tester C phase current accesses mother's II any element current loop；Tester is opened according to sequencing and is held into A phase
Son receives mother's II element tripping operation contact, and tester is opened and received mother's I element tripping operation contact, mother into B phase terminal
Tripping operation contact to mother jump position open into；
3, the female joint bit die-out logic of checking
1), before test, mother is jumped conjunction position and is opened into all disconnecting, and bus differential protection device report " is opened into exception ", and female difference is protected
Protection unit acquiescence bus connection switch is closing position；
2) during test, being passed through fault current, the action of mother II difference element elder generation, by mother tripping operation contact to mother
Jump position open into；Continue to be passed through fault current, now, meet the 3rd condition of envelope mother CT, when mother I unit
Part electric current is more than differential definite value, dead zone protection element movement, and mother I trips；
State 1:IA=IB=IC and more than difference current, same phase；Simulation mother's II troubles inside the sample space, opens into A
Phase terminal upset enters NextState；
State 2:IA=IB=IC and more than difference determine electric current, same phase；Envelope mother CT, IB > difference current definite value,
It is female that dead zone protection element movement jumps I, opens into B phase terminal, stops this state；
Measured by tester and open into mother's II differential action time during A phase terminal and open into II during B phase terminal
Female differential action time, the time difference is more than 50ms；Show that female joint bit die-out logic is correct；
4, after putting into " fanout operation " pressing plate, directly envelope mother CT, when non-mother element current is more than differential
Bus bar differential prptection operation during current ration；
5, checking mother divides a die-out logic experimental wiring
In terminal block after differential relaying panel, the cut-in method of the magnitude of current is as follows: a1, b1, c1, n1 terminal
For mother TA secondary terminals, a2, b2, c2, n2 terminal is the female little poor TA secondary terminals of I；a3、b3、
C3, n3 terminal is the female little poor TA secondary terminals of II, and tester A phase current IA accesses mother current loop,
Tester B phase current IB accesses mother's I any element current loop；Tester is opened and is received I mother into A phase terminal
Tripping operation contact；
6, the female joint bit die-out logic of checking
During test, it is passed through fault current, I female difference element action；
State 1:IA=IB and more than difference current definite value, same phase, I female difference element is opened into A phase terminal
Stop fault；
Being measured by tester opens into mother's I difference element movement time during A phase terminal, and this movement time is
20～40ms, show that mother divides a die-out logic correct.
As in figure 2 it is shown, the instantiation of the present invention is as follows:
1, difference current definite value is arranged: being given difference current by relay protection department is 2A；
2, the female joint bit die-out logic experimental wiring of checking
In terminal block after differential relaying panel, the cut-in method of the magnitude of current is as follows: a1, b1, c1, n1 terminal
For mother TA secondary terminals, a2, b2, c2, n2 terminal is the female little poor TA secondary terminals of I；a3、b3、
C3, n3 terminal is the female little poor TA secondary terminals of II, and tester A phase current IA is passed through mother element, test
Instrument B phase current IB is passed through mother's I any element, and tester C phase current IC is passed through mother's II any element；
Tester A phase current accesses mother current loop, and tester B phase current accesses mother's I any element current loop,
Tester C phase current accesses mother's II any element current loop；Tester is opened according to sequencing and is held into A phase
Son receives mother's II element tripping operation contact, and tester is opened and received mother's I element tripping operation contact, mother into B phase terminal
Tripping operation contact to mother jump position open into；
3, the female joint bit die-out logic of checking
1), before test, mother is jumped conjunction position and is opened into all disconnecting, and bus differential protection device report " is opened into exception ", and female difference is protected
Protection unit acquiescence bus connection switch is closing position；
2) during test, being passed through fault current, the action of mother II difference element elder generation, by mother tripping operation contact to mother
Jump position open into；Continue to be passed through fault current, now, meet the 3rd condition of envelope mother CT, when mother I unit
Part electric current is more than differential definite value, dead zone protection element movement, and mother I trips；
State 1:IA=IB=IC=2.1A and more than difference current, same phase；Simulation mother's II troubles inside the sample space,
Open and enter NextState into the upset of A phase terminal；
State 2:IA=IB=IC=2.1A and more than difference determine electric current, same phase；Envelope mother CT, IB > differential electricity
Stream definite value, it is female that dead zone protection element movement jumps I, opens into B phase terminal, stops this state；
By tester measure open into mother's II differential action time during A phase terminal and open into mother II during B phase terminal poor
Dynamic movement time, the time difference is more than 50ms；Show that female joint bit die-out logic is correct；
4, after putting into " fanout operation " pressing plate, directly envelope mother CT, when non-mother element current is more than differential
Bus bar differential prptection operation during current ration；
5, checking mother divides a die-out logic experimental wiring
In terminal block after differential relaying panel, the cut-in method of the magnitude of current is as follows: a1, b1, c1, n1 terminal is female
Connection TA secondary terminals, a2, b2, c2, n2 terminal is the female little poor TA secondary terminals of I；a3、b3、c3、
N3 terminal is the female little poor TA secondary terminals of II, and tester A phase current IA accesses mother current loop, test
Instrument B phase current IB accesses mother's I any element current loop；Tester is opened and is received mother's I tripping operation into A phase terminal
Contact；
6, the female joint bit die-out logic of checking
During test, it is passed through fault current, I female difference element action；
State 1:IA=IB=2.5A and more than difference current definite value, same phase, I female difference element is opened into A
Phase terminal stops fault；
Being measured by tester opens into mother's I difference element movement time during A phase terminal, and this movement time is 30ms,
Show that mother divides a die-out logic correct.
These are only the specific embodiment of the present invention, be not limited to the present invention, for this area
For technical staff, the present invention can have various modifications and variations.All within the spirit and principles in the present invention,
Any modification, equivalent substitution and improvement etc. made, should be included within the scope of the present invention.
Claims (1)
1. a bus differential protection dead-zone fault logic verification method, is characterized in that step is as follows:
1), difference current definite value is arranged: being given difference current by relay protection department is 0-20A；
2), the female joint bit die-out logic experimental wiring of checking
In terminal block after differential relaying panel, the cut-in method of the magnitude of current is as follows: a1, b1, c1, n1 terminal
For mother TA secondary terminals, a2, b2, c2, n2 terminal is the female little poor TA secondary terminals of I；a3、b3、
C3, n3 terminal is the female little poor TA secondary terminals of II, and tester A phase current IA is passed through mother element, test
Instrument B phase current IB is passed through mother's I any element, and tester C phase current IC is passed through mother's II any element；
Tester A phase current accesses mother current loop, and tester B phase current accesses mother's I any element current loop,
Tester C phase current accesses mother's II any element current loop；Tester is opened according to sequencing and is held into A phase
Son receives mother's II element tripping operation contact, and tester is opened and received mother's I element tripping operation contact, mother into B phase terminal
Tripping operation contact to mother jump position open into；
3), the female joint bit die-out logic of checking
1), before test, mother is jumped conjunction position and is opened into all disconnecting, and bus differential protection device report " is opened into exception ", and female difference is protected
Protection unit acquiescence bus connection switch is closing position；
2) during test, being passed through fault current, the action of mother II difference element elder generation, by mother tripping operation contact to mother
Jump position open into；Continue to be passed through fault current, now, meet the 3rd condition of envelope mother CT, when mother I unit
Part electric current is more than difference current definite value, dead zone protection element movement, and mother I trips；
State 1:IA=IB=IC and more than difference current definite value, same phase；Simulation mother's II troubles inside the sample space, opens
Enter the upset of A phase terminal and enter NextState；
State 2:IA=IB=IC and more than difference determine electric current, same phase；Envelope mother CT, IB > difference current definite value,
It is female that dead zone protection element movement jumps I, opens into B phase terminal, stops this state；
Measured by tester and open into mother's II difference element movement time during A phase terminal and open into II during B phase terminal
Female difference element movement time, the time difference is more than 50ms；Show that female joint bit die-out logic is correct；
4), put into after " fanout operation " pressing plate, directly envelope mother CT, when non-mother element current is more than differential
Bus bar differential prptection operation during current ration；
5), checking mother divides a die-out logic experimental wiring
In terminal block after differential relaying panel, the cut-in method of the magnitude of current is as follows: a1, b1, c1, n1 terminal
For mother TA secondary terminals, a2, b2, c2, n2 terminal is the female little poor TA secondary terminals of I；a3、b3、
C3, n3 terminal is the female little poor TA secondary terminals of II, and tester A phase current IA accesses mother current loop,
Tester B phase current IB accesses mother's I any element current loop；Tester is opened and is received I mother into A phase terminal
Tripping operation contact；
6), the female joint bit die-out logic of checking
During test, it is passed through fault current, I female difference element action；
State 1:IA=IB and more than difference current definite value, same phase, I female difference element is opened into A phase terminal
Stop fault；
Being measured by tester opens into mother's I difference element movement time during A phase terminal, and this movement time is
20～40ms, show that mother divides a die-out logic correct.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610436629.XA CN106019015A (en) | 2016-06-17 | 2016-06-17 | Busbar differential protection dead zone fault logic verification method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610436629.XA CN106019015A (en) | 2016-06-17 | 2016-06-17 | Busbar differential protection dead zone fault logic verification method |
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| CN106019015A true CN106019015A (en) | 2016-10-12 |
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ID=57088526
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| CN201610436629.XA Pending CN106019015A (en) | 2016-06-17 | 2016-06-17 | Busbar differential protection dead zone fault logic verification method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106655113A (en) * | 2016-12-29 | 2017-05-10 | 许继集团有限公司 | Fault recognition and fault protection method of buscouple dead zone |
| CN108711821A (en) * | 2018-04-12 | 2018-10-26 | 广东电网有限责任公司 | A kind of flexible direct current bridge arm differential protection automatic test approach |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106655113A (en) * | 2016-12-29 | 2017-05-10 | 许继集团有限公司 | Fault recognition and fault protection method of buscouple dead zone |
| CN106655113B (en) * | 2016-12-29 | 2018-11-09 | 许继集团有限公司 | A kind of bus tie dead zone fault identification and fault protecting method |
| CN108711821A (en) * | 2018-04-12 | 2018-10-26 | 广东电网有限责任公司 | A kind of flexible direct current bridge arm differential protection automatic test approach |
| CN108711821B (en) * | 2018-04-12 | 2019-06-11 | 广东电网有限责任公司 | A kind of flexible direct current bridge arm differential protection automatic test approach |
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Application publication date: 20161012 |