CN105991015A - Buffer power supply circuit structure based on digital input circuit - Google Patents
Buffer power supply circuit structure based on digital input circuit Download PDFInfo
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- CN105991015A CN105991015A CN201610511295.8A CN201610511295A CN105991015A CN 105991015 A CN105991015 A CN 105991015A CN 201610511295 A CN201610511295 A CN 201610511295A CN 105991015 A CN105991015 A CN 105991015A
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- circuit
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- field effect
- effect transistor
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
- H02M1/34—Snubber circuits
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0012—Control circuits using digital or numerical techniques
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0016—Control circuits providing compensation of output voltage deviations using feedforward of disturbance parameters
- H02M1/0022—Control circuits providing compensation of output voltage deviations using feedforward of disturbance parameters the disturbance parameters being input voltage fluctuations
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
- Electronic Switches (AREA)
Abstract
The invention discloses a buffer power supply circuit structure based on a digital input circuit, which relates to the technical field of power supplies of intelligent traffic equipment and aims at solving technical problems that power consumption is high; the frequency effect velocity is slow; power-on overshoot happens or voltage compensation is lacked, and particularly, in the case of power-on overshoot, no overshoot feedback exists to timely inform a control chip to perform debugging; and the output voltage logic is fixed existing in the prior art. The structure of the invention comprises an input voltage conversion circuit, a middle-stage adjustment circuit, an output voltage conversion circuit, an overshoot feedback adjustment circuit, a buffer circuit and a load group, wherein the input voltage conversion circuit receives output voltage of the power supply; the middle-stage adjustment circuit receives gain voltage outputted by the input voltage conversion circuit; the output voltage conversion circuit is used for voltage reduction and modulation and receiving voltage signals outputted by the middle-stage adjustment circuit and isolating output DC signals, and comprises a linear compensation circuit. The buffer power supply circuit structure based on a digital input circuit of the invention is used for a stable power supply structure for a traffic light array or other information display devices.
Description
Technical field
The present invention relates to intelligent transportation power technique fields, be specifically related to a kind of buffering based on digital input circuit
Circuit construction of electric power.
Background technology
Prior art receives exchange input, the driving of some linear stable often through circuit of power factor correction
Grid (base stage) the voltage meeting variation abnormality of pipe, causes the punching that powered on of linear stable.The most quick power supply
Power on, the punching that powered on of linear stable can be caused, it can be seen that only use BOOST-BOOST and isolator
Drawback.If overshoot voltage loads pressure voltage higher than it, rushing narrower in width even if crossing, also load can be caused cause
The destruction of life property, reduces the reliability of power supply application;Input voltage is not always for stablize amplitude, for
The power supply of BOOST-BUCK type, lacks the voltage compensation of the BUCK change-over circuit of correspondence, thus causes the next circuit
Electricity shortage triggers restarts, and brings inconvenience.
If additionally, the electric current for driving gate terminal electric capacity is the least, load group's power consumption is big, then export NMOS
Gate terminal voltage and output PMOS gate terminal voltage can not be according to the input voltage to input terminal
Suddenly change and charge or discharge.This is just delayed response, and is therefore delayed the output from lead-out terminal
The response of voltage.In order to make the output voltage from lead-out terminal that the input voltage of input terminal is quickly made sound
Should, need increase for driving the gate terminal electric capacity of the output NMOS forming output part and output PMOS
Electric current.But, because electric current always flows, hamper the reduction of power consumption.As it has been described above, because low-power consumption and
Speedy carding process response is in trade-off relationship, it is difficult to realize meeting the buffer circuit of the two characteristic simultaneously.
Different systems needs different logic 1/0 threshold voltages.Being processor in some load, voltage is less than
5V means logical zero, and means logic 1 more than 15V, simultaneously in some loads as servo-driver,
Voltage means logical zero less than 1V, and means logic 1 more than 4V, if now by processor directly with
Servo-driver connects then can produce the biggest problem.
Summary of the invention
For above-mentioned prior art, present invention aim at providing a kind of buffered sources based on digital input circuit
Circuit structure, it is high that it aims to solve the problem that prior art exists power consumption, and frequency effect speed is slow, and powered on punching or shortage
Voltage compensation, particularly powered on rush time, do not had punching feedback notify in time control chip carry out debugging and
The technical problems such as output voltage logic is fixing.
For reaching above-mentioned purpose, the technical solution used in the present invention is as follows:
A kind of buffered sources circuit structure based on digital input circuit, including power supply, also includes that input voltage turns
Change circuit, receive the output voltage of power supply;Middle rank regulation circuit, receives the increasing of input voltage switching circuit output
Benefit voltage;Output voltage change-over circuit, modulates for blood pressure lowering, including linear compensation circuit, receives middle rank
The voltage signal of regulation circuit output isolation and amplifier direct current signal;Cross and rush feedback regulating circuit, received punching
Direct current signal, and fed back rush signal to output voltage change-over circuit and middle rank regulation circuit;Described voltage letter
Number maximum voltage amplitude range is less than two times of amplitudes of gain voltage;Digital input circuit, receives buffer circuit defeated
The d. c. voltage signal gone out.
In such scheme, described input voltage switching circuit, including the first programmable controller, it is used for the tune that boosts
System;First field effect transistor, is used for the modulation switch that boosts, and receives the output voltage of power supply, receives by the first programming
The Phase synchronization modulating clock that controller is exported relative to electric power output voltage.
In such scheme, described input voltage switching circuit, also include the first inductance, its one end connects power supply
And the other end connects the first field effect transistor;First diode, its high electrode connects the first field effect transistor;Two or two
Pole is managed, and its high electrode connection power supply and low electrode connect the low electrode of the first diode.
In such scheme, described middle rank regulation circuit, including the second programmable controller, adjust for voltage pulse width
System;Second field effect transistor, receives the gain voltage of input voltage switching circuit output, receives the second programming Control
Device output pulsewidth modulation clock and export limit pulsewidth voltage signal;Second inductance, to the electricity limiting pulsewidth
Pressure signal filtering;First electric capacity, the voltage signal lowest amplitude after compensation filter.
In such scheme, described middle rank regulation circuit, also include the first Zener diode, its low electrode connects
Second field effect transistor and high electrode ground connection;3rd field effect transistor, receives the charging letter of the second programmable controller output
Number clock also compensates the electric charge of the first electric capacity.
In such scheme, described output voltage change-over circuit, including the 3rd programmable controller, adjust for blood pressure lowering
System;4th field effect transistor and the 5th field effect transistor, the 4th field effect transistor source electrode connects the 5th field effect transistor drain electrode,
And all receive the blood pressure lowering modulating clock of the 3rd programmable controller output;Second electric capacity and the 3rd electric capacity, be serially connected,
And vacant end is respectively connecting to the 4th field effect transistor and the 5th field effect transistor;4th field effect transistor, the 5th effect
Ying Guan, the second electric capacity and the 3rd electric capacity are by isolator, the 3rd diode and the 4th diode output direct current signal.
In such scheme, described output voltage change-over circuit, its linear compensation circuit includes the 4th electric capacity, its
One end ground connection and the other end connect the drain electrode of the 4th field effect transistor;5th diode, its high electrode ground connection and low electricity
Pole connects the drain electrode of the 4th field effect transistor;6th diode, its high electrode ground connection and low electrode connect the 4th effect
Should the source electrode of pipe;7th diode, its high electrode ground connection and low electrode connect the source electrode of the 5th field effect transistor.
In such scheme, described mistake rushes feedback regulating circuit, and including the second Zener diode, its low electrode connects
Received the direct current signal of punching;Optical coupler, its luminous tube high electrode connects high electrode and the light of the second Zener diode
Quick pipe fed back and rushed signal to output voltage change-over circuit and middle rank regulation circuit.
Described buffer circuit, including
Output unit, described output unit has lead-out terminal, and described lead-out terminal is based on input for output
The output signal of input signal, wherein
In such scheme, described output unit includes: the first transistor, and it has and is connected to described lead-out terminal
A main electrode;And transistor seconds, it has and is connected to described lead-out terminal and is connected to described
One main electrode of the one main electrode of the first transistor, and described buffer circuit includes: the 3rd crystal
Pipe, for reducing the voltage controlling electrode of described the first transistor based on described input signal;4th transistor,
For increasing the voltage controlling electrode of described transistor seconds based on described input signal;First voltage difference detection
Circuit, for detecting described output signal voltage difference on the basis of described input signal;Second voltage difference detection
Circuit, for detecting described input signal voltage difference on the basis of described output signal;First electric current provides single
Unit, for absolute value based on the voltage difference detected by described first voltage difference detection circuits, increases described
The electric current of flowing in third transistor;And second electric current provide unit, for based on by described second voltage difference
The absolute value of the voltage difference that testing circuit is detected, increases the electric current of flowing in described 4th transistor.
In such scheme, described digital input circuit, including bleeder circuit, comparison circuit and reference voltage electricity
Road, described bleeder circuit is sent to comparison circuit after serial signal amplitude limit;Described reference voltage circuit to
Comparison circuit provides the anti-phase reference voltage that can change;Described comparison circuit, its outfan is also associated with
8 bit flash memory single-chip microcomputers of RISC Architecture;Described reference voltage circuit, including single-pole double-throw switch (SPDT);Described
Digital input circuit is also associated with loading group.
Compared with prior art, beneficial effects of the present invention:
Provide the BOOST-BUCK power supply architecture that there is voltage compensation, cross punching feedback, improve the conversion of power supply
Efficiency, drives the output of structure to provide stable linear compensation blood pressure lowering modulation field effect transistor, is obviously reduced
The noise introduced due to nonlinear device (such as isolator, inductance), power supply output is more stable, substantially eliminates
Phenomenon or the waveform jitter phenomenon caused due to overshoot current is constantly restarted due to what electricity shortage caused;Realize same
Time meet reduction power consumption and the buffer circuit of switching rate characteristic with mutual trade-off relationship;Threshold voltage logic
Can provide different reference voltage, threshold voltage logic 1/0 is adjustable.
Accompanying drawing explanation
Fig. 1 is the circuit module schematic diagram of the present invention;
Fig. 2 is the circuit theory schematic diagram of the present invention;
Fig. 3 is buffer circuit principle schematic of the present invention.
Detailed description of the invention
All features disclosed in this specification, or disclosed all methods or during step, except mutually
Beyond the feature repelled and/or step, all can combine by any way.
The present invention will be further described below in conjunction with the accompanying drawings:
Embodiment 1
Described input voltage switching circuit, including the first programmable controller, is used for modulation of boosting;First effect
Should pipe Q1, be used for the modulation switch that boosts, receive the output voltage of power supply, receive relative by the first programmable controller
In the Phase synchronization modulating clock that electric power output voltage is exported.
Described input voltage switching circuit, also includes the first inductance L1, and its one end connects power supply and the other end connects
Connect the first field effect transistor Q1;First diode D3, its high electrode connects the first field effect transistor Q1;Second diode
D2, its high electrode connection power supply and low electrode connect the low electrode of the first diode D3.
Described middle rank regulation circuit, including the second programmable controller, for voltage PWM;Second effect
Should pipe Q2, receive input voltage switching circuit output gain voltage, receive second programmable controller output arteries and veins
Wide modulating clock also exports the voltage signal limiting pulsewidth;Second inductance L2, to the voltage signal filter limiting pulsewidth
Ripple;First electric capacity C1, the voltage signal lowest amplitude after compensation filter.
Described middle rank regulation circuit, also includes the first Zener diode D4, and its low electrode connects the second field effect
Pipe Q2 and high electrode ground connection;3rd field effect transistor Q3, receives the charging signals clock of the second programmable controller output
And compensate the electric charge of the first electric capacity C1.
Described output voltage change-over circuit, including the 3rd programmable controller, modulates for blood pressure lowering;4th effect
Should pipe Q4 and the 5th field effect transistor Q5, the 4th field effect transistor Q4 source electrode connects the 5th field effect transistor Q5 drain electrode, and all
Receive the blood pressure lowering modulating clock of the 3rd programmable controller output;Second electric capacity C2 and the 3rd electric capacity C3, is serially connected,
And vacant end is respectively connecting to the 4th field effect transistor Q4 and the 5th field effect transistor Q5;4th field effect transistor Q4,
Five field effect transistor Q5, the second electric capacity C2 and the 3rd electric capacity C3 pass through isolator T1, the 3rd diode D6 and the four or two
Pole pipe D7 exports direct current signal.
Described output voltage change-over circuit, its linear compensation circuit includes the 4th electric capacity C5, one end ground connection and
The other end connects the drain electrode of the 4th field effect transistor Q4;5th diode D11, its high electrode ground connection and low electrode are even
Connect the drain electrode of the 4th field effect transistor Q4;6th diode D9, its high electrode ground connection and low electrode connect the 4th effect
Should the source electrode of pipe Q4;7th diode D10, its high electrode ground connection and low electrode connect the 5th field effect transistor Q5
Source electrode.
Described mistake rushes feedback regulating circuit, and including the second Zener diode D8, its low electrode received punching
Direct current signal;Optical coupler U1, its luminous tube high electrode connects the high electrode of the second Zener diode D8 and photosensitive
Pipe fed back and rushed signal to output voltage change-over circuit and middle rank regulation circuit.
Embodiment 2
The lead-out terminal " Vo " of buffer circuit connects source terminal and the output having output nmos transistor m1
The source terminal of PMOS transistor m2, forms push-pull type output circuit.In the following description, in order to simply
For the sake of, each MOS transistor is referred to as NMOS or PMOS.Form the output NMOS m1 of output circuit
Drain terminal be connected with power supply.Gate terminal with from power supply provide electric current current/charge-voltage convertor 21,
Connect with the source terminal of PMOS m3.Respectively, the drain terminal of PMOS m3 is connected with reference potential, and
And gate terminal is connected with input terminal " Vout ".In the present embodiment, below execution as described later
Operation: by operation of current/charge-voltage convertor 21 etc., be input to input terminal in response to lifting
The input voltage of " Vout " promotes the output voltage to export from lead-out terminal " Vo ".Form another output
The drain terminal of the output PMOS m2 of circuit is connected with reference potential, gate terminal and Voltage-current conversion electricity
Road 22 connects, and described current/charge-voltage convertor 22 provides to the source terminal of reference potential and NMOS m4
Electric current.Respectively, the drain terminal of NMOS m4 is connected with power supply, and gate terminal and input terminal
" Vout " connects.In the present embodiment, following operation is performed: by the behaviour of current/charge-voltage convertor 22
Making etc., being input to that the input voltage of input terminal " Vout " reduces in response to reduction will be from lead-out terminal
The output voltage that " Vo " exports.Voltage difference detection circuits 10, input terminal " Vout " and outfan are provided
Son " Vo " is connected with described voltage difference detection circuits 10.Voltage difference detection circuits 10 detects input terminal
Voltage difference between the output voltage Vo of the input voltage Vout of " Vout " and lead-out terminal " Vo ".
Voltage difference detection circuits 10 includes differential amplifier circuit 11 and differential amplifier circuit 12.Such as Fig. 1
Shown in, with the input signal inputted with differential amplifier circuit 12 and the opposite polarity polarity of output signal
Described input signal and output signal is inputted to differential amplifier circuit 11.From differential amplifier circuit 11
Output be connected with current/charge-voltage convertor 21, and from differential amplifier circuit 12 output with electricity
Piezo-electric stream change-over circuit 22 connects.
Embodiment 3
Described reference voltage circuit includes a single-pole double-throw switch (SPDT), and the switching of this switch can turn on preset
First anti-phase reference voltage or the connection of the second anti-phase reference voltage, thus this first anti-phase reference that will be connected
Voltage or this second anti-phase reference voltage provide to described comparison circuit, as in order to determine the anti-phase of logic 1/0
Reference voltage.
The above, the only detailed description of the invention of the present invention, but protection scope of the present invention is not limited thereto,
Any those skilled in the art of belonging in the technical scope that the invention discloses, the change that can readily occur in
Or replace, all should contain within protection scope of the present invention.
Claims (9)
1. a buffered sources circuit structure based on digital input circuit, including power supply, it is characterised in that also
Including
Input voltage switching circuit, receives the output voltage of power supply;
Middle rank regulation circuit, receives the gain voltage of input voltage switching circuit output;
Output voltage change-over circuit, modulates for blood pressure lowering, including linear compensation circuit, receives middle rank regulation
The voltage signal of circuit output isolation and amplifier direct current signal;
Cross and rush feedback regulating circuit, received punching direct current signal, and fed back rush signal to output voltage change
Circuit and middle rank regulation circuit;
Buffer circuit, is used for balance the load power consumption and frequency corresponding speed, receives the output of output voltage change-over circuit
Direct current signal;
Digital input circuit, receives the d. c. voltage signal of buffer circuit output.
A kind of buffered sources circuit structure based on digital input circuit the most according to claim 1, it is special
Levy and be, described input voltage switching circuit, including
First programmable controller, is used for modulation of boosting;
First field effect transistor, is used for the modulation switch that boosts, and receives the output voltage of power supply, receives by the first programming
The Phase synchronization modulating clock that controller is exported relative to electric power output voltage.
A kind of buffered sources circuit structure based on digital input circuit the most according to claim 2, it is special
Levy and be, described input voltage switching circuit, also include
First inductance, its one end connects power supply and the other end connects the first field effect transistor;
First diode, its high electrode connects the first field effect transistor;
Second diode, its high electrode connection power supply and low electrode connect the low electrode of the first diode.
A kind of buffered sources circuit structure based on digital input circuit the most according to claim 1, it is special
Levy and be, described middle rank regulation circuit, including
Second programmable controller, for voltage PWM;
Second field effect transistor, receives the gain voltage of input voltage switching circuit output, receives the second programming Control
Device output pulsewidth modulation clock and export limit pulsewidth voltage signal;
Second inductance, to the voltage signal filtering limiting pulsewidth;
First electric capacity, the voltage signal lowest amplitude after compensation filter.
A kind of buffered sources circuit structure based on digital input circuit the most according to claim 4, it is special
Levy and be, described middle rank regulation circuit, also include
First Zener diode, its low electrode connects the second field effect transistor and high electrode ground connection;
3rd field effect transistor, receives the charging signals clock of the second programmable controller output and compensates the first electric capacity
Electric charge.
A kind of buffered sources circuit structure based on digital input circuit the most according to claim 1, it is special
Levy and be, described output voltage change-over circuit, including
3rd programmable controller, modulates for blood pressure lowering;
4th field effect transistor and the 5th field effect transistor, the 4th field effect transistor source electrode connects the 5th field effect transistor drain electrode,
And all receive the blood pressure lowering modulating clock of the 3rd programmable controller output;
Second electric capacity and the 3rd electric capacity, be serially connected, and vacant end is respectively connecting to the 4th field effect transistor and
Five field effect transistor;
4th field effect transistor, the 5th field effect transistor, the second electric capacity and the 3rd electric capacity pass through isolator, the three or two pole
Pipe and the 4th diode output direct current signal.
A kind of buffered sources circuit structure based on digital input circuit the most according to claim 1, it is special
Levy and be, described buffer circuit, including
Output unit, described output unit has lead-out terminal, and described lead-out terminal is based on input for output
The output signal of input signal, wherein
Described output unit includes:
The first transistor, it has the main electrode being connected to described lead-out terminal;And
Transistor seconds, it has and is connected to described lead-out terminal and is connected to the institute of described the first transistor
State a main electrode of a main electrode, and
Described buffer circuit includes:
Third transistor, for reducing the electricity controlling electrode of described the first transistor based on described input signal
Pressure;
4th transistor, for increasing the electricity controlling electrode of described transistor seconds based on described input signal
Pressure;
First voltage difference detection circuits, for detecting described output signal voltage on the basis of described input signal
Difference;
Second voltage difference detection circuits, for detecting described input signal voltage on the basis of described output signal
Difference;
First electric current provides unit, for based on the voltage difference detected by described first voltage difference detection circuits
Absolute value, increases the electric current of flowing in described third transistor;And
Second electric current provides unit, for based on the voltage difference detected by described second voltage difference detection circuits
Absolute value, increases the electric current of flowing in described 4th transistor.
A kind of buffered sources circuit structure based on digital input circuit the most according to claim 1, it is special
Levying and be, described mistake rushes feedback regulating circuit, including
Second Zener diode, its low electrode received the direct current signal of punching;
Optical coupler, its luminous tube high electrode connects the high electrode of the second Zener diode and photosensitive tube fed back punching letter
Number to output voltage change-over circuit and middle rank regulation circuit.
A kind of buffered sources circuit structure based on digital input circuit the most according to claim 1, it is special
Levy and be, described digital input circuit, including bleeder circuit, comparison circuit and reference voltage circuit,
Described bleeder circuit is sent to comparison circuit after serial signal amplitude limit;
Described reference voltage circuit provides the anti-phase reference voltage that can change to comparison circuit;Described comparison
Circuit, its outfan is also associated with 8 bit flash memory single-chip microcomputers of RISC Architecture;
Described reference voltage circuit, including single-pole double-throw switch (SPDT);
Described digital input circuit is also associated with loading group.
Priority Applications (1)
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CN201610511295.8A CN105991015A (en) | 2016-06-30 | 2016-06-30 | Buffer power supply circuit structure based on digital input circuit |
Applications Claiming Priority (1)
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CN201610511295.8A CN105991015A (en) | 2016-06-30 | 2016-06-30 | Buffer power supply circuit structure based on digital input circuit |
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CN201610511295.8A Pending CN105991015A (en) | 2016-06-30 | 2016-06-30 | Buffer power supply circuit structure based on digital input circuit |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108599565A (en) * | 2018-04-26 | 2018-09-28 | 苏州大贝岩电子科技有限公司 | A kind of stereo garage power circuit special based on MEMS sensor |
CN110323932A (en) * | 2018-03-30 | 2019-10-11 | 温州有达电气有限公司 | A kind of intelligent switch based on buffer circuit |
-
2016
- 2016-06-30 CN CN201610511295.8A patent/CN105991015A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110323932A (en) * | 2018-03-30 | 2019-10-11 | 温州有达电气有限公司 | A kind of intelligent switch based on buffer circuit |
CN108599565A (en) * | 2018-04-26 | 2018-09-28 | 苏州大贝岩电子科技有限公司 | A kind of stereo garage power circuit special based on MEMS sensor |
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Application publication date: 20161005 |