CN105978541A - Method capable of realizing fast signal tracking - Google Patents

Abstract

The invention relates to a method capable of realizing fast signal tracking, which is realized in the following manner: a delay unit processes the first signal SIGA with delay to generate a delay signal group composed of n-way delay signals; The m-channel signals are selected from the signal group to form the first input signal group, combined with the second signal SIGB for sampling processing, and a sampling signal group composed of m-channel sampling signals is generated; the judgment unit selects m-channel sub-signals from the delay signal group, so that It corresponds to the sub-signals of m paths in the sampling signal group one by one, and monitors the state of each sub-signal in the sampling signal group according to the judgment rule. Select a sub-signal from the signal as the decision signal and trigger the generation of a decision operation, and use the delay signal group sub-signal corresponding to the decision signal as the output signal SIGO and maintain it until the next decision occurs, so as to realize the tracking of the second signal SIGB.

Description

A Method for Fast Signal Tracking

technical field

The invention relates to a method capable of realizing fast signal tracking.

Background technique

Signal tracking is a common link in communication signal processing. In the past, signal tracking circuits in communication signal processing had the problem of long tracking time. To solve this problem, this patent proposes a method and circuit that can realize fast signal tracking.

Contents of the invention

The purpose of the present invention is to provide a method capable of realizing fast signal tracking, so as to overcome the defects in the prior art. In order to achieve the above object, the technical solution of the present invention is: a method that can realize fast signal tracking, comprising: a delay unit, a sampling unit and a judgment unit, implemented according to the following steps:

Step S1: The delay unit performs delay processing on the first signal SIGA to generate a delayed signal group, the delayed signal group is composed of n sub-signals from DL1 to DLn, and the first signal SIGA and the delayed The signal group is input to the sampling unit, where n is an integer not less than 1;

Step S2: The sampling unit will select m signals from the first signal SIGA and the delayed signal group to form a first input signal group, combine the first input signal group and the second signal SIGB, Perform sampling processing and generate a sampling signal group, the sampling signal group is composed of m-path sub-signals from SP1 to SPm, where m is a positive integer not greater than n;

Step S3: The decision unit receives the delayed signal group and the sampled signal group respectively, and selects m sub-signals from the delayed signal group, and makes them match the m sub-signals SP1 to SPm in the sampled signal group one-to-one correspondence;

Step S4: The judgment unit monitors the state of each sub-signal in the sampled signal group according to the judgment rule, and when the sub-signal in the sampled signal group satisfies the judgment rule, selects the sub-signal from the sampled signal group that satisfies the judgment rule Select one sub-signal from the sub-signals as a decision signal and trigger a decision operation, and according to the correspondence determined in step S3, use the sub-signal of the delay signal group corresponding to the decision signal as the output signal SIGO and maintain it until the next decision occur.

In an embodiment of the present invention, in the step S1, the sub-signals DL1 to DLn in the delay signal group are respectively different from the first signal SIGA by the first delay amount to the nth delay amount, and the The first delay amount to the nth delay amount are increased sequentially.

In an embodiment of the present invention, in the step S2, the sampling unit uses the second signal SIGB as a sampling clock to sample each sub-signal in the first input signal group to generate the sample signal group.

In an embodiment of the present invention, in the step S4, the decision unit respectively detects the voltage state of each sub-signal in the sampling signal group, and when any two adjacent channels of the sampling signal group sub-signal voltage state On the contrary, the trigger generates a decision operation.

In an embodiment of the present invention, when tracking the rising edge of the second signal SIGB, in the step S4, when the voltage states of the sub-signals of the two adjacent sampling signal groups are respectively high level and low level, The operation of generating the criterion is triggered.

In an embodiment of the present invention, in the step S2, the sampling unit uses each sub-signal in the first input signal group as a sampling clock to sample the second signal SIGB to generate the Group of sampled signals.

In an embodiment of the present invention, in the step S4, the decision unit respectively detects the voltage state of each sub-signal in the sampling signal group, and when any two adjacent channels of the sampling signal group sub-signal voltage state On the contrary, the trigger generates a decision operation.

In an embodiment of the present invention, when tracking the rising edge of the second signal SIGB, in the step S4, when the voltage states of the sub-signals of the two adjacent sampling groups are respectively low level and high level, trigger Generate the criterion operation.

Compared with the prior art, the present invention has the following beneficial effects: the method proposed by the present invention can realize fast signal tracking, and can quickly generate an output signal to realize the tracking of the second signal.

Description of drawings

Fig. 1 is a kind of circuit that can realize fast signal tracking in the present invention.

FIG. 2 is a timing sequence of various signals when the sampling unit does not use the second signal as the sampling clock to perform rising edge sampling in an embodiment of the present invention.

FIG. 3 is a timing sequence of various signals when the sampling unit uses the second signal as the sampling clock to perform rising-edge sampling in an embodiment of the present invention.

FIG. 4 is a timing sequence of various signals when the sampling unit uses the second signal as the sampling clock to perform rising-edge sampling in another embodiment of the present invention.

detailed description

The technical solution of the present invention will be specifically described below in conjunction with the accompanying drawings.

The circuit capable of realizing fast signal tracking in the present invention is composed of a delay unit, a sampling unit, and a decision unit, and its structure is shown in FIG. 1 .

Further, the delay unit performs delay processing on the input clock signal SIGA, and generates n-way delay signals <DL1:DLn> to form a delay signal group, wherein n is not less than 1; delaying the first signal SIGA, the second signal SIGB, and n-way The signal group is input to the sampling unit, and the sampling unit selects m-channel signals from the first signal SIGA and the delay signal group to form the first input signal group, and combines with the second signal SIGB to complete the sampling process, and produces m-channel sampling signals<SP1: The sampling signal group formed by SPm>, wherein m is not greater than n but greater than 0; the sampling signal group is input to the judgment unit, and the judgment unit selects m path sub-signals from the delay signal group to make it match the m path sub-signals in the sampling signal group Signals SP1 to SPm correspond one-to-one, and select a delay signal group sub-signal as the output signal SIGO according to the state of the sub-signal <SP1:SPm> in the sampling signal group.

Further, in this embodiment, the sub-signals are selected in any manner or selected according to preset rules.

Further, in this embodiment, let n be 5, that is, the delay unit generates 5 delay signals, wherein each signal has a different delay amount relative to the first signal SIGA, named <DL1:DL5>, Preferably, the amount of delay is gradually increased, as shown in FIGS. 2 and 3 .

Further, in this embodiment, the sampling circuit selects 5 delayed signals to form the first input signal group, and can choose two working modes:

(1) The first method is to use the selected 5-channel signal as the sampling clock to sample the rising edge of the second signal SIGB to generate 5-channel sampling signal, the command is <SP1:SP5>, and the process is shown in Figure 2 ;

(2) The second method is to use the second signal SIGB as the sampling clock to sample the rising edge of the selected 5 signals to generate 5 sampling signals. The command is <SP1:SP5>, and the process is shown in Figure 3 .

Further, in this embodiment, the judgment unit performs judgment processing according to the sampling signal <SP1:SP5>, and when the judgment unit finds that the voltage states of any two adjacent sampling signals in <SP1:SP5> are opposite, it triggers a judgment Operation; the decision unit selects one sampling signal from two adjacent sampling signals with different voltage states as a criterion signal, and uses the delayed signal corresponding to the sampling signal of this road as an output signal SIGO, and maintains this mapping relationship, until the next judgment processing occurs.

Further, in this embodiment, if it is necessary to realize the rising edge tracking of the second signal SIGB and the sampling unit uses each sub-signal in the first input signal group as the sampling clock, then when the voltage states of two adjacent sampling signals are When the level is low or high, the trigger generates a criterion operation. If it is necessary to track the rising edge of the second signal SIGB and the sampling unit uses the second signal SIGB as the sampling clock, when the voltage states of two adjacent sampling signals are high level and low level respectively, a criterion operation is triggered.

Further, in this embodiment, if it is necessary to track the rising edge of the second signal SIGB and the sampling unit uses the selected 5 signals as the sampling clock to sample the rising edge of the second signal SIGB, and generate a sampling signal < SP1 :SP5>, and correspond <SP1:SP5> to <DL1:DL5> one by one; assuming that the voltage states of two adjacent sampling signals SP3 and SP4 are opposite, where SP3 is low voltage and SP4 is high voltage, the decision unit will SP4 is used as a decision signal, and the delay signal DL4 corresponding to SP4 is mapped to generate an output signal SIGO. The whole process is shown in FIG. 2 .

Further, in this embodiment, if it is necessary to track the rising edge of the second signal SIGB and the sampling unit uses the second signal SIGB as the sampling clock to sample the rising edge of the selected 5 signals, and generate a sampling signal <SP1 :SP5>, and correspond <SP1:SP5> to <DL1:DL5> one by one; assuming that the voltage states of two adjacent sampling signals SP3 and SP4 are opposite, where SP3 is high voltage and SP4 is low voltage, the decision unit will SP4 is used as a decision signal, and the delay signal DL4 corresponding to SP4 is mapped to generate an output signal SIGO. The whole process is shown in FIG. 3 .

Further, in another embodiment, the sampling circuit selects the first input signal SIGA and the four delayed signals <SP1:SP4> to form the first input signal group, and the sampling unit uses the second signal SIGB as the sampling clock pair to select The 5-way signals are sampled on the rising edge to generate the sampling signal <SP1:SP5>; the judgment unit corresponds to <SP1:SP5> and <DL1:DL5> one by one, and assumes that the voltage states of the two adjacent sampling signals SP4 and SP5 are opposite , where SP4 is a high voltage and SP5 is a low voltage, the decision unit uses SP5 as a decision signal, and maps the delay signal DL5 corresponding to SP5 to generate an output signal SIGO. The whole process is shown in Figure 4.

The above are the preferred embodiments of the present invention, and all changes made according to the technical solution of the present invention, when the functional effect produced does not exceed the scope of the technical solution of the present invention, all belong to the protection scope of the present invention.

Claims (8)

1. one kind can realize fast signal follow the tracks of method, it is characterised in that including: a delay cell, a sampling unit and One decision unit, realizes in accordance with the following steps:

Step S1: described delay unit carries out delay process to the first signal SIGA, produces and postpones signal group, described delay signal Group is made up of the n way signal of DL1 to DLn, and inputs described first signal SIGA and described delay signal group to described Sampling unit, wherein, n is the integer not less than 1；

Step S2: described sampling unit will pick out m road signal structure from described first signal SIGA and described delay signal group Become the first input signal group, in conjunction with described first input signal group and described secondary signal SIGB, carry out sampling processing, and produce Sampled signal group, described sampled signal group is made up of the m way signal of SP1 to SPm, and wherein, m is the positive integer of no more than n；

Step S3: described decision unit receives described delay signal group and described sampled signal group respectively, and from described delay Signal group is picked out m way signal, is allowed to and m way signal SP1 to SPm one_to_one corresponding in described sampled signal group；

Step S4: the state of each subsignal in described sampled signal group is monitored by described decision unit according to decision rule, When described sampled signal group neutron signal meets decision rule, by from the described sampled signal group subsignal meeting decision rule In pick out 1 way signal and as decision signal and trigger generation decision operation, the corresponding relation determined according to step S3, by institute State the described delay signal group subsignal corresponding to decision signal as output signal SIGO and to maintain to adjudicating generation next time.

A kind of method realizing fast signal tracking the most according to claim 1, it is characterised in that in described step S1 In, the subsignal DL1 to DLn in described delay signal group differs the first retardation extremely respectively relative to described first signal SIGA N-th retardation, and described first retardation is incremented by order to described n-th retardation.

A kind of method realizing fast signal tracking the most according to claim 1, it is characterised in that in described step S2 In, described sampling unit using described secondary signal SIGB as sampling clock, respectively to each son in described first input signal group Signal is sampled, and generates described sampled signal group.

A kind of method realizing fast signal tracking the most according to claim 3, it is characterised in that in described step S4 In, described decision unit detects the voltage status of each subsignal in described sampled signal group respectively, and when arbitrary neighborhood two-way institute State sampled signal group subsignal voltage status contrary time, trigger produce decision operation.

A kind of method realizing fast signal tracking the most according to claim 4, it is characterised in that when to described second The rising edge of signal SIGB is followed the trail of, when described adjacent two-way sampled signal group subsignal voltage status difference in the most described step S4 During for high level and low level, trigger and produce the operation of described criterion.

A kind of method realizing fast signal tracking the most according to claim 1, it is characterised in that in described step S2 In, described sampling unit will use in described first input signal group that each subsignal is respectively as sampling clock, to described second Signal SIGB samples, and generates described sampled signal group.

A kind of method realizing fast signal tracking the most according to claim 6, it is characterised in that in described step S4 In, described decision unit detects the voltage status of each subsignal in described sampled signal group respectively, and when arbitrary neighborhood two-way institute State sampled signal group subsignal voltage status contrary time, trigger produce decision operation.

A kind of method realizing fast signal tracking the most according to claim 7, it is characterised in that when to described second The rising edge of signal SIGB is followed the trail of, the lowest when described adjacent two-way sampling group's subsignal voltage status in the most described step S4 When level and high level, trigger and produce the operation of described criterion.