CN105956994A - Graph processing method and device based on rasterized superposition analysis - Google Patents
Graph processing method and device based on rasterized superposition analysis Download PDFInfo
- Publication number
- CN105956994A CN105956994A CN201610319581.4A CN201610319581A CN105956994A CN 105956994 A CN105956994 A CN 105956994A CN 201610319581 A CN201610319581 A CN 201610319581A CN 105956994 A CN105956994 A CN 105956994A
- Authority
- CN
- China
- Prior art keywords
- polygon
- result
- polygonal
- discrete grid
- grid block
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Image Generation (AREA)
Abstract
The embodiment of the invention provides a graph processing method and a device based on rasterized superposition analysis in order to solve a problem in the prior art that the computation efficiency rapidly decreases along with increase in the number of polygon vertices. The graph processing method comprises the steps of computing bounding rectangles of superposition computation results of two vector polygons participating in superposition computation, carrying out spatial discretization on the bounding rectangles according to the set discrete grid cell size, parallelly computing an inclusion relation between discrete grid feather points and the two polygons on a computing kernel of a general purpose computation graph processor equipment terminal by adopting a ray method, carrying out matrix element assignment filling according to the inclusion relation between the discrete grid feature points and the two polygons, extracting a discrete grid ordered sequence of result polygon boundaries by adopting a surround boundary tracing algorithm, extracting a center point or a vertex of a discrete grid of the result polygon boundaries so as to construct a result polygon overall pattern spot, computing an area error of the result polygon pattern spot, and carrying out attribute assignment on the result polygon so as to output a superposition computation result.
Description
Technical field
The present invention relates to survey and draw geographical information space analysis field, in particular to a kind of graphic processing method based on rasterizing overlay analysis utilizing graphic processing apparatus to realize and device.
Background technology
Vector polygon overlay analysis is that in mapping area of geographic information, the bottom space on basis analyzes method, is widely used in fields such as complicated geographic modeling, extraction of spatial information, Spatial Data Mining, geography information quick visualizations.Along with becoming increasingly popular of GIS application, the computational efficiency of spacial analytical method is increasingly paid close attention to by people.Algorithm design and the parallel optimization technique of complexity is there is in vector polygon overlay analysis during calculating, wherein computational efficiency and the treatment scale of overlay analysis method are most important to the successful Application of GIS software, efficient algorithm is possible not only to improve the computational efficiency of all kinds of sector application domain analysis model, the emergency response time of all kinds of upper layer application system can also be shortened, promote work efficiency.For improving the computational efficiency of existing vector polygon overlay analysis method, the technology used at present includes that serial overlay analysis calculates process optimization, bottom novel algorithm for polygon clipping optimization, data organization method optimization etc., above-mentioned optimization method is not only difficult to fundamentally overcoming the computational efficiency drawback with polygon vertex quantity increase rapid decrease of polygon overlay analysis method based on Vector operation process, it is also difficult to make full use of the calculating resource of the novel calculating equipment such as general-purpose computations graphic process unit.
Summary of the invention
In view of the foregoing, the embodiment of the present invention provides a kind of graphic processing facility based on rasterizing overlay analysis and method, is applied to graphic processing apparatus and processes two vector polygons.Wherein, described graphic processing method includes:
Carry out said two polygon vector superposed being calculated result polygon according to overlap-add operation operator, calculate said two polygonal outsourcing rectangle respectively according to the result of calculation of overlap-add operation operator；
According to the discrete grid block cell size set, calculated outsourcing rectangle is carried out spatial discretization；
Use ray method, parallel computation discrete grid block characteristic point and the polygonal inclusion relation of said two in the calculating core of the general-purpose computations graphic process unit equipment end of described graphic processing apparatus；
Matrix element assignment filling is carried out according to discrete grid block characteristic point and the polygonal inclusion relation of said two；
Use the discrete grid block ordered sequence extracting the result Polygonal Boundary that superposition calculation obtains around boundary tracking algorithm；
Extract central point or the summit of result Polygonal Boundary discrete grid block, construct result polygon overall diagram speckle；
The area error of result of calculation polygon diagram speckle；
To described result polygon attribute assignment, export superposition calculation result.
Described graphic processing facility includes:
Outsourcing rectangle computing module, for carrying out said two polygon vector superposed being calculated result polygon according to overlap-add operation operator, calculates said two polygonal outsourcing rectangle respectively according to the result of calculation of overlap-add operation operator；
Descretization module, for carrying out spatial discretization according to the discrete grid block cell size set to calculated outsourcing rectangle；
Inclusion relation computing module, uses ray method, parallel computation discrete grid block characteristic point and the polygonal inclusion relation of said two in the calculating core of the general-purpose computations graphic process unit equipment end of described graphic processing apparatus；
Element assignment packing module, for carrying out matrix element assignment filling according to discrete grid block characteristic point and the polygonal inclusion relation of said two；
Border sequence extraction module, for using the discrete grid block ordered sequence extracting the result Polygonal Boundary that superposition calculation obtains around boundary tracking algorithm；
Figure speckle constructing module, for extracting central point or the summit of result Polygonal Boundary discrete grid block, constructs result polygon overall diagram speckle；
Figure speckle error calculating module, for the area error of result of calculation polygon diagram speckle；
Result output module, for described result polygon attribute assignment, exports superposition calculation result.
Compared with prior art, the graphic processing method based on rasterizing overlay analysis of embodiment of the present invention offer and device, achieve the cutting between arbitrary polygon, ask friendship based on three kinds of basic overlap-add operation operators, merge, ask poor combination to be capable of seven kinds of non-weighting polygon overlay analysis algorithms.Meanwhile, supporting discrete grid block output and construct single polygon entirety two kinds of different result way of outputs of output, wherein, the latter can be divided into again two kinds of different types of central point structure ring and summit structure ring.Additionally, also support calculating and the output of relative area error.Under general-purpose computations graphic process unit parallel environment, calculation process makes it maintain stable high concurrency with the lower coupling character of data structure, improves the utilization rate calculating resource.Calculating time overhead linearly to increase with polygon vertex quantity increase, this makes it improve computational efficiency when processing the polygon overlay analysis problem comprising a large amount of summit.
For making the above-mentioned purpose of the present invention, feature and advantage to become apparent, preferred embodiment cited below particularly, and coordinate appended accompanying drawing, it is described in detail below.
Accompanying drawing explanation
In order to be illustrated more clearly that the technical scheme of the embodiment of the present invention, the accompanying drawing used required in embodiment will be briefly described below, it is to be understood that, the following drawings illustrate only certain embodiments of the present invention, therefore the restriction to scope it is not construed as, for those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to obtain other relevant accompanying drawings according to these accompanying drawings.
Fig. 1 is the block diagram of the graphic processing apparatus that present pre-ferred embodiments provides.
Fig. 2 is the flow chart of the graphic processing method based on rasterizing overlay analysis being applied to the graphic processing apparatus shown in Fig. 1 that present pre-ferred embodiments provides.
Fig. 3 is vector polygon discretization schematic diagram.
Fig. 4 is that host side maps schematic flow sheet with general-purpose computations graphic process unit equipment end parallel task.
Fig. 5 is the scanning window schematic diagram used around boundary tracking algorithm.
Fig. 6 is concave vertex, concave crown point, horizontal sides schematic diagram.
Fig. 7 is vector polygon rasterizing overlay analysis result of calculation schematic diagram.
Detailed description of the invention
Below in conjunction with accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only a part of embodiment of the present invention rather than whole embodiments.Generally can with various different configurations arrange and design with the assembly of the embodiment of the present invention that illustrate described in accompanying drawing herein.Therefore, the detailed description to the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of claimed invention below, but is merely representative of the selected embodiment of the present invention.Based on embodiments of the invention, the every other embodiment that those skilled in the art are obtained on the premise of not making creative work, broadly fall into the scope of protection of the invention.
As it is shown in figure 1, be the block diagram of a kind of graphic processing apparatus 100 that present pre-ferred embodiments provides.Described graphic processing apparatus 100 may be, but not limited to, and PC (personal computer, PC), panel computer, server etc. possess the arithmetic facility of pattern analysis and disposal ability.
Described graphic processing apparatus 100 also includes a graphic processing facility 10, memorizer 12 and processor 13.In present pre-ferred embodiments, graphic processing facility 10 includes that at least one can be stored in described memorizer 12 or be solidificated in the software function module in the operating system (operating system, OS) of described graphic processing apparatus 100 with the form of software or firmware (firmware).Described processor 13 may be, but not limited to, general-purpose computations graphic process unit, and it is for performing in described memorizer 12 the performed software module of storage, software function module included by the most described graphic processing facility 10 and computer program etc..In the present embodiment, described graphic processing facility 10 can also be integrated in described operating system, as a part for described operating system.Specifically, described graphic processing facility 10 includes data input module 101, outsourcing rectangle computing module 102, descretization module 103, inclusion relation computing module 104, element assignment packing module 105, border sequence extraction module 106, figure speckle constructing module 107, figure speckle error calculating module 108 and result output module 109.Be it should be noted that in other embodiments, a portion in the above-mentioned functions module that described graphic processing facility 10 includes also can be omitted, or it can also include other more functional modules.
Below in conjunction with Fig. 2, above-mentioned each functional module is described in detail.
Refer to Fig. 2, be the flow chart of the graphic processing method based on rasterizing overlay analysis being applied to the graphic processing apparatus 100 shown in Fig. 1 that present pre-ferred embodiments provides.Idiographic flow shown in Fig. 2 and step will be described in detail below.
Step S01, inputs pending two polygon, then reads and store these two polygonal vector vertex coordinate datas.In the present embodiment, for convenience of description, said two polygon is respectively two different vector polygon figures, is respectively defined as the first polygon and the second polygon, or is respectively defined as target polygon and operation polygon.This step S01 can be performed by described data input module 101.
Step S02, carries out said two polygon vector superposed being calculated result polygon according to overlap-add operation operator, calculates said two polygonal outsourcing rectangle respectively according to the result of calculation of overlap-add operation operator.In the present embodiment, this step S02 can be performed by described outsourcing rectangle computing module 102.
Step S03, carries out spatial discretization according to the discrete grid block cell size set to calculated outsourcing rectangle.In the present embodiment, this step S03 can be performed by described descretization module 103.
Referring to Fig. 3, Fig. 3 is the schematic diagram that vector polygon carries out spatial discretization.Wherein, the P1 in 21 is the target polygon of input, and dotted line frame represents its outsourcing rectangle；22 expressions are that the discrete grid block unit using 6*6 carries out discretization to polygon P1；23 is to use Central Point Method to be filled with the matrix element after discretization, and the foundation of matrix element assignment is: if discrete grid block central point is in P1, the matrix element that this grid is corresponding is entered as 1, is otherwise entered as 0.It should be noted that, the selection of discrete grid block characteristic point is not limited to grid element center point, the upper left of grid, upper right, lower-left and 4, bottom right angle point can also as the characteristic point of grid cell, but during a superposition calculation, the selection of discrete grid block characteristic point should be consistent.It addition, it is identical with said method to the polygonal discretization of operation.
Step S04, uses ray method, calculates parallel computation discrete grid block characteristic point and target polygon and the polygonal inclusion relation of operation in core in general-purpose computations graphic process unit equipment end.In the present embodiment, this step S04 can be performed by described inclusion relation computing module 104.
Owing to the number of grid after discretization generally compares many, calculate all grids and target polygon and operate the time overhead of polygonal inclusion relation would generally be the biggest.Based on this, the embodiment of the present invention uses general-purpose computations graphic process unit parallel computation to accelerate this processing procedure.Run on the algorithm on host side central processing unit and internal storage and data structure needs carry out data mapping and calculate duty mapping ability successful operation in general-purpose computations graphic process unit equipment end.As shown in Figure 4, concurrent program based on general-purpose computations graphic process unit is divided into host side 31 and equipment end 32 two parts, and the former runs on host side central processing unit, is positioned at initiation and the latter end of program.The latter runs on one or more general-purpose computations graphic process unit equipment, has been responsible for large-scale parallel computation task.After target polygon P1 and operation polygon P2 completes polygon discretization according to preceding method, constitute m row, the matrix of n row, the corresponding discrete grid block of each element in matrix, each discrete grid block is owned by a characteristic point, by judging this feature point and two polygonal inclusion relations, compose different integer values for matrix element.In Fig. 4, general-purpose computations graphic process unit equipment uses the form tissue parallel computation task of " thread grid 321/ thread block 322/ thread 323 " three grades of parallel thread structures.Thread grid contains one group of thread block, and each thread block contains again some threads, and substantial amounts of parallel computation task is mapped to executed in parallel in these threads with the form of kernel function.Physically, thread block is corresponding to the stream multiprocessor of general-purpose computations graphic process unit equipment, and each thread is corresponding on a scalar stream processor, and such parallel organization is highly suitable for matrix element is carried out traversal processing.
General-purpose computations graphic process unit performs parallel computation, it is necessary first to definition calculates dimension, determines task division methods；Next needs to be defined on the kernel function of executed in parallel on numerous scalar stream processors of general-purpose computations graphic process unit equipment；Again need according to the calculating dimension defined, will calculate accordingly task L (i, j) be assigned to correspondence thread T (I, j) on；Finally perform parallel computation process.In Fig. 4, the dotted arrow line from matrix element to thread represents calculating duty mapping process.
It should be noted that host side 31 is to the equipment end 32 of general-purpose computations graphic process unit, and reverse data map and copy the data structure needing design specialized.The present invention uses the method that complex data type is decomposed into base data type, realizes above-mentioned two process by element continuous print double array, the form of int array before and after definition.In Fig. 4, the solid arrow line between host side 31 and equipment end 32 represents data and maps and copy procedure.
Use ray method to carry out discrete grid block characteristic point also to include with polygonal inclusion relation parallel computation: travel through each ring polygonal, when point is in the outsourcing rectangle of ring, judge a little whether on the adjacent vertex line constituting polygonal ring, if point being labeled as boundary point on line；If not boundary point, use linear equation to calculate point and certain point line on ray in the horizontal direction and the leap of the boundary sections of ring, add up the leap total degree of this point and looped every the line segment of structure, if total leap number of times can be divided exactly by 2, then put outside ring, otherwise put the inside at ring；Calculate with polygon inclusion relation at general-purpose computations graphic process unit equipment end executed in parallel point.
Step S05, according to discrete grid block characteristic point and described target polygon and operate polygonal inclusion relation and carry out matrix element assignment filling.In the present embodiment, this step S05 can be performed by described element assignment packing module 105.
In the present embodiment, matrix element value filling is carried out according to discrete grid block characteristic point and polygonal inclusion relation, can be after parallel computation process completes, copying result of calculation to host side from general-purpose computations graphic process unit equipment end to resolve, the result data after resolving travels through, is filled to the matrix element value that discrete grid block is corresponding.The concrete mode of amplitude is: when characteristic point is positioned at two polygonal internal simultaneously, matrix element is entered as 3；When characteristic point is only located at target polygonal internal, matrix element is entered as 1；When characteristic point is only located at operation polygonal internal, matrix element is entered as 2；When characteristic point is positioned at target polygon and operation outside of polygon simultaneously, matrix element is entered as 0.
Step S06, uses the discrete grid block ordered sequence extracting the result Polygonal Boundary that superposition calculation obtains around boundary tracking algorithm, the overall polygon diagram speckle of structure.In the present embodiment, this step S06 can be performed by described border sequence extraction module 106.
In the present embodiment, use the discrete grid block ordered sequence extracting superposition calculation result Polygonal Boundary around boundary tracking algorithm, can be from the beginning of top left hand element, use and according to order from left to right, from top to bottom, discrete grid block matrix is traveled through around boundary tracking algorithm, extract the discrete grid block ordered sequence of result Polygonal Boundary.
It should be noted that the flow process around boundary tracking algorithm is by the order traversal to grid cell, finding out the entrance of all outer shrouds of result polygon, each entrance defines 1 outer shroud and points to 0 or the pointer of multiple internal ring.Often complete the structure of an outer shroud, search for internal ring the most therein.The construction process of ring uses and starts to complete around the mode followed the trail of clockwise from entrance grid, repeats said process, until all outer shrouds are constructed complete, algorithm terminates.Detailed process is as follows:
(1) first traveling through grid cell according to rule from top to bottom, from left to right, each grid of process is all marked as having accessed state；After running into first grid not being accessed for having desired type value, it is marked as entrance grid, creating a new outer shroud object RE and using entrance grid as head node join RE, now forerunner and the successor node of head node is all empty, starts around the process following the trail of structure ring simultaneously；
(2) each tracking started from head node all uses centered by current grid, size be 3 × 3 window be scanned (as shown in Figure 5), advance to the direct of travel of current grid based on previous grid and determine the search original position of window, cycling among windows grid clockwise is started from search original position, the grid of first desired type found is next node, it is added into RE end and is labeled as accessing state, the forerunner that current node is new node is set simultaneously, new node is the follow-up of current node, moving window continues above-mentioned window scanning procedure to new node.In Fig. 5, the window center grid of 3 × 3 is current node, numbered 0, on the left of 0 node, grid starts to encode clockwise and is followed successively by 1～8, solid arrow represents the direction of advance (namely trend of net boundary) from previous node to current node, the dotted arrow surrounding window represents the cincture tracking order of window scanning under the conditions of current direction of advance, and Δ r and Δ c is respectively the difference of current grid and the row, column number of previous grid；
(3) when the head node that node is RE obtained is found in window scanning, marker loop RE closes, and the tracking structure ring process with this node as entrance completes.Continuing to perform the search tracing process of internal ring inside ring RE, the internal ring searched adds the vector<T>container of named holes in RE, and the island within internal ring will obtain as tracked during follow-up traversal with the outer shroud of RE same level；
(4) from the beginning of next (right side) grid at a upper entrance grid, continue traversal residue grid cell, until completing the traversal of all grids, finding out all of outer shroud and internal ring that each outer shroud is comprised, terminating around boundary tracking algorithm.
Being summarized as follows of said method: initially set up the scanning window of 3*3, travels through the matrix element that discrete grid block is corresponding according to order from top to bottom, from left to right；Follow the trail of stroke rule according to window scanning to extract, assemble result polygonal boundary mesh sequence；According to boundary mesh central point structure ring method construct result polygonal overall diagram speckle；Result polygonal overall diagram speckle is constructed according to boundary mesh summit structure ring method and summit linking rule.
Step S07, extracts central point or the summit of result Polygonal Boundary discrete grid block, constructs result polygon overall diagram speckle.In the present embodiment, this step S07 can be performed by described figure speckle constructing module 107.
The method summary of described structure polygon overall diagram speckle is as follows: initially sets up the scanning window of 3*3, travels through, according to order from top to bottom, from left to right, the matrix element that discrete grid block is corresponding；Follow the trail of stroke rule according to window scanning to extract, assemble result polygonal boundary mesh sequence；According to boundary mesh central point structure ring method construct result polygonal overall diagram speckle；Result polygonal overall diagram speckle is constructed according to boundary mesh summit structure ring method and summit linking rule.
In the embodiment of the present invention, hole is the form of expression of polygon internal ring, comprises the superposition cutting between the complex polygon on hole, island around boundary tracking algorithm support.I.e. starting at this outer shroud inner search internal ring after completing the search procedure of an outer shroud, the mode of employing figure speckle boundary crossover number statistics judges whether Current Scan window grid is positioned at Current outer loop.Boundary crossover method of counting is to judge, along the intersection point number of a direction (present invention chooses horizontal direction) Yu Polygonal Boundary, the method whether this point is surrounded by polygon by statistics certain point, only relative to ray algorithm, the boundary crossover method of counting operation that the present invention uses is discrete grid block and the sequence being made up of according to certain order one group of discrete grid block.
During calculating around boundary tracking algorithm, needs process three kinds of unusual grid composite types as shown in Figure 6: concave vertex 51, concave crown point 52, horizontal sides 53, and a kind of false horizontal sides grid composite type 54.Under first three unusual grid combination condition, scanning from left to right, that all will not change outer shroud and scanning window grid when crossing over outer shroud border comprises state.False horizontal sides refers to grid all on ring, but discontinuous horizontal adjacent mesh combination on ring.Shape such as two grids of A, B in 54, due to the two adjacent but on ring discontinuous, the most do not constitute boundary crossover condition, false horizontal sides is generally only made up of two adjacent mesh.
Step S08, the area error of result of calculation polygon diagram speckle.In the present embodiment, can contrast with using Vatti algorithm that said two polygon is carried out calculated result polygon, the area error of result of calculation polygon diagram speckle.In the present embodiment, this step S08 can be performed by described figure speckle error calculating module 108.
In the present embodiment, the relative area error that computation gridization processes, Vatti algorithm can be used to calculate target polygon and operate the polygonal polygonal graphics area of overlay analysis result, contrast with the area using algorithm proposed by the invention to calculate gained figure, calculating relative area error amount e according to below equation, this step is option, namely, in other embodiments, this step S08 can be omitted.Calculate shown in the formula such as following formula (1) of described error amount e:
Step S09, to described result polygon attribute assignment, exports superposition calculation result.In the present embodiment, this step S09 can be performed by described result output module 109.
In the present embodiment, after result polygon attribute assignment, export in different forms, can be the polygonal attribute assignment of result according to three kinds of different rules, be respectively retain target polygon and operation polygon key element all fields, only retain target polygon and operation polygon key element have to element id field, only retain target polygon and operation polygon key element id field.After completing attribute assignment, as it is shown in fig. 7, according to discrete grid block 61/62, central point structure ring 63,64 3 kinds of multi-form output superposition calculation results of discrete grid block summit structure ring.
In sum, the technical scheme that the embodiment of the present invention provides, achieve the cutting between arbitrary polygon, ask friendship based on three kinds of basic overlap-add operation operators, merge, ask poor combination to be capable of seven kinds of non-weighting polygon overlay analysis algorithms, support the result way of output that various ways is different: discrete grid block exports, export the result polygon with discrete grid block form tissue；Construct the output of single polygon entirety, export the overall polygon diagram speckle formed according to boundary mesh central point structure ring, two kinds of different types of central point structure ring and summit structure ring can be divided into the most again.The most also support calculating and the output of relative area error, export the overall polygon diagram speckle formed with boundary mesh summit structure ring method.Under general-purpose computations graphic process unit parallel environment, calculation process makes it maintain stable high concurrency with the lower coupling character of data structure, improves the utilization rate calculating resource.Calculating time overhead linearly to increase with polygon vertex quantity increase, this makes it improve computational efficiency when processing the polygon overlay analysis problem comprising a large amount of summit.
The above; being only the detailed description of the invention of the present invention, but protection scope of the present invention is not limited thereto, any those familiar with the art is in the technical scope that the invention discloses; change can be readily occurred in or replace, all should contain within protection scope of the present invention.Therefore, protection scope of the present invention should described be as the criterion with scope of the claims.
Claims (10)
1. a graphic processing method based on rasterizing overlay analysis, is applied to graphic processing apparatus and enters two vector polygons
Row processes, it is characterised in that described graphic processing method includes:
Carry out said two polygon vector superposed being calculated result polygon, according to overlap-add operation according to overlap-add operation operator
The result of calculation of operator calculates said two polygonal outsourcing rectangle respectively；
According to the discrete grid block cell size set, calculated outsourcing rectangle is carried out spatial discretization；
Use ray method, parallel computation in the calculating core of the general-purpose computations graphic process unit equipment end of described graphic processing apparatus
Discrete grid block characteristic point and the polygonal inclusion relation of said two；
Matrix element assignment filling is carried out according to discrete grid block characteristic point and the polygonal inclusion relation of said two；
Use the discrete grid block ordered sequence extracting the result Polygonal Boundary that superposition calculation obtains around boundary tracking algorithm；
Extract central point or the summit of result Polygonal Boundary discrete grid block, construct result polygon overall diagram speckle；
The area error of result of calculation polygon diagram speckle；
To described result polygon attribute assignment, export superposition calculation result.
2. graphic processing method based on rasterizing overlay analysis as claimed in claim 1, it is characterised in that described according to setting
Fixed discrete grid block cell size carries out the step of spatial discretization to calculated outsourcing rectangle, including:
The discrete grid block unit using 6*6 carries out discretization to said two polygon respectively；And
Use Central Point Method that the matrix element after discretization is filled with, wherein, if discrete grid block central point is in polygon,
The matrix element that this grid is corresponding is entered as 1, is otherwise entered as 0；After completing the polygonal discretization of said two, respectively constitute
The matrix of m row, n row, the corresponding discrete grid block of each element in matrix, each discrete grid block has a characteristic point,
By judging this feature point and two polygonal inclusion relations, compose different integer values for matrix element.
3. graphic processing method based on rasterizing overlay analysis as claimed in claim 2, it is characterised in that described employing is penetrated
Collimation method, calculates parallel computation discrete grid block characteristic point and said two polygon in core in general-purpose computations graphic process unit equipment end
Inclusion relation, including:
Travel through each ring polygonal, when point is in the outsourcing rectangle of ring, it is judged that whether point is in the phase constituting polygonal ring
On adjacent vertices line, if point being labeled as boundary point on line；
If not boundary point, use linear equation calculate point and the boundary sections of certain point line on ray in the horizontal direction and ring across
More property, adds up the leap total degree of this point and looped every the line segment of structure, if total leap number of times can be divided exactly by 2, then puts at ring
Outside, otherwise puts the inside at ring；
Calculate with polygon inclusion relation at general-purpose computations graphic process unit equipment end executed in parallel point.
4. graphic processing method based on rasterizing overlay analysis as claimed in claim 3, it is characterised in that said two is many
Limit shape includes target polygon and operation polygon, described according to discrete grid block characteristic point and the polygonal inclusion relation of said two
Carry out matrix element assignment filling, including:
When characteristic point is positioned at two polygonal internal simultaneously, matrix element is entered as 3；
When characteristic point is only located at target polygonal internal, matrix element is entered as 1；
When characteristic point is only located at operation polygonal internal, matrix element is entered as 2；
When characteristic point is positioned at target polygon and operation outside of polygon simultaneously, matrix element is entered as 0.
5. graphic processing method based on rasterizing overlay analysis as claimed in claim 4, it is characterised in that described structure is tied
The really step of polygon overall diagram speckle, including:
Set up the scanning window of 3*3, according to order from top to bottom, from left to right, the matrix element that discrete grid block is corresponding is carried out
Traversal；
Follow the trail of stroke rule according to window scanning to extract, assemble result polygonal boundary mesh sequence；
According to boundary mesh central point structure ring method construct result polygonal overall diagram speckle；
Result polygonal overall diagram speckle is constructed according to boundary mesh summit structure ring method and summit linking rule.
6. graphic processing method based on rasterizing overlay analysis as claimed in claim 5, it is characterised in that described set up 3*3
Scanning window, the step matrix element that discrete grid block is corresponding traveled through according to order from top to bottom, from left to right,
Including:
Statistical boundary grid crosses over number of times, uses the counting method of crossing over of ray method to realize Boundary Recognition and the structure of complex polygon；
When searching for polygonal outer shroud, false horizontal sides grid combination is identified and special handling.
When searching for polygonal internal ring, concave vertex, concave crown point and 3 kinds of unusual grid combinations of horizontal sides are identified and process.
7. graphic processing method based on rasterizing overlay analysis as claimed in claim 1, it is characterised in that described calculating is tied
Really the area error of polygon diagram speckle includes:
Contrast with using Vatti algorithm that said two polygon is carried out calculated result polygon, calculate and export
The area error of result polygon diagram speckle.
8. graphic processing method based on rasterizing overlay analysis as claimed in claim 1, it is characterised in that described output is folded
Add result of calculation, including:
Export the result polygon with discrete grid block form tissue；
Export the overall polygon diagram speckle formed according to boundary mesh central point structure ring；And
Export the overall polygon diagram speckle formed with boundary mesh summit structure ring method.
9. a graphic processing facility based on rasterizing overlay analysis, is applied to graphic processing apparatus and enters two vector polygons
Row processes, it is characterised in that described graphic processing facility includes:
Outsourcing rectangle computing module, for carrying out said two polygon vector superposed being calculated knot according to overlap-add operation operator
Really polygon, calculates said two polygonal outsourcing rectangle respectively according to the result of calculation of overlap-add operation operator；
Descretization module, for carrying out spatial discretization according to the discrete grid block cell size set to calculated outsourcing rectangle；
Inclusion relation computing module, uses ray method, in the general-purpose computations graphic process unit equipment end of described graphic processing apparatus
Calculate parallel computation discrete grid block characteristic point and the polygonal inclusion relation of said two in core；
Element assignment packing module, for carrying out matrix element according to discrete grid block characteristic point and the polygonal inclusion relation of said two
Element assignment is filled；
Border sequence extraction module, extracts the result Polygonal Boundary that obtains of superposition calculation for using around boundary tracking algorithm
Discrete grid block ordered sequence；
Figure speckle constructing module, for extracting central point or the summit of result Polygonal Boundary discrete grid block, structure result polygon is whole
Body figure speckle；
Figure speckle error calculating module, for the area error of result of calculation polygon diagram speckle；
Result output module, for described result polygon attribute assignment, exports superposition calculation result.
10. graphic processing facility based on rasterizing overlay analysis as claimed in claim 9, it is characterised in that described figure speckle is by mistake
Difference computing module is by carrying out what calculated result polygon contrasted with using Vatti algorithm to said two polygon
Mode, calculates and exports the area error of result polygon diagram speckle.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610319581.4A CN105956994A (en) | 2016-05-13 | 2016-05-13 | Graph processing method and device based on rasterized superposition analysis |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610319581.4A CN105956994A (en) | 2016-05-13 | 2016-05-13 | Graph processing method and device based on rasterized superposition analysis |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105956994A true CN105956994A (en) | 2016-09-21 |
Family
ID=56912231
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610319581.4A Pending CN105956994A (en) | 2016-05-13 | 2016-05-13 | Graph processing method and device based on rasterized superposition analysis |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105956994A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106530208A (en) * | 2016-11-22 | 2017-03-22 | 中国人民解放军理工大学 | GPU-based method for calculating random polygon intersection area |
| CN106709857A (en) * | 2016-11-22 | 2017-05-24 | 中国人民解放军理工大学 | Arbitrary polygon intersection area calculation method based on probability statistics |
| CN106952324A (en) * | 2017-04-07 | 2017-07-14 | 山东理工大学 | The parallel overlap-add procedure device and method of vector polygon rasterizing |
| CN107193923A (en) * | 2017-05-16 | 2017-09-22 | 中国科学院遥感与数字地球研究所 | A kind of method and system of two-dimentional geographical space rapid vector superposition |
| CN109829019A (en) * | 2018-12-11 | 2019-05-31 | 北京地拓科技发展有限公司 | A kind of data transfer device of vector data, device and electronic equipment |
| CN110322556A (en) * | 2019-04-29 | 2019-10-11 | 武汉大学 | A kind of high-speed, high precision arrow grid Overlap Analysis method based on border cuts |
| CN112818074A (en) * | 2020-11-12 | 2021-05-18 | 中国国土勘测规划院 | Complex multi-inner-ring vector graphic space superposition optimization method |
| CN115294235A (en) * | 2022-10-08 | 2022-11-04 | 广州中望龙腾软件股份有限公司 | Bitmap-based graphic filling method, terminal and storage medium |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120320087A1 (en) * | 2011-06-14 | 2012-12-20 | Georgia Tech Research Corporation | System and Methods for Parallelizing Polygon Overlay Computation in Multiprocessing Environment |
| CN104821013A (en) * | 2015-05-11 | 2015-08-05 | 武汉大学 | Method and system for specific surface area extraction based on geodetic coordinate system digital elevation model |
-
2016
- 2016-05-13 CN CN201610319581.4A patent/CN105956994A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120320087A1 (en) * | 2011-06-14 | 2012-12-20 | Georgia Tech Research Corporation | System and Methods for Parallelizing Polygon Overlay Computation in Multiprocessing Environment |
| CN104821013A (en) * | 2015-05-11 | 2015-08-05 | 武汉大学 | Method and system for specific surface area extraction based on geodetic coordinate system digital elevation model |
Non-Patent Citations (5)
| Title |
|---|
| JUNFU FAN等: "DWSI: an approach to solving the polygon intersection-spreading problem with a parallel union algorithm at the feature layer level", 《BOLETIM DE CIÊNCIAS GEODÉSICAS》 * |
| 周培德: "《计算几何 算法分析与设计》", 31 March 2000 * |
| 崔树林: "基于GPU的并行矢量数据分析与索引技术研究", 《中国博士学位论文全文数据库信息科技辑》 * |
| 范俊甫等: "RaPC：一种基于栅格化思想的多边形裁剪算法及其误差分析", 《测绘学报》 * |
| 陈振杰等: "矢量多边形栅格化算法快速并行化方法研究", 《遥感信息》 * |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106530208A (en) * | 2016-11-22 | 2017-03-22 | 中国人民解放军理工大学 | GPU-based method for calculating random polygon intersection area |
| CN106709857A (en) * | 2016-11-22 | 2017-05-24 | 中国人民解放军理工大学 | Arbitrary polygon intersection area calculation method based on probability statistics |
| CN106530208B (en) * | 2016-11-22 | 2019-04-09 | 中国人民解放军理工大学 | A kind of arbitrary polygon intersecting area calculation method based on GPU |
| CN106709857B (en) * | 2016-11-22 | 2019-12-10 | 中国人民解放军理工大学 | method for calculating intersection area of any polygon based on probability statistics |
| CN106952324A (en) * | 2017-04-07 | 2017-07-14 | 山东理工大学 | The parallel overlap-add procedure device and method of vector polygon rasterizing |
| CN107193923A (en) * | 2017-05-16 | 2017-09-22 | 中国科学院遥感与数字地球研究所 | A kind of method and system of two-dimentional geographical space rapid vector superposition |
| CN107193923B (en) * | 2017-05-16 | 2021-01-29 | 中国科学院遥感与数字地球研究所 | Method and system for quickly superposing vectors in two-dimensional geographic space |
| CN109829019A (en) * | 2018-12-11 | 2019-05-31 | 北京地拓科技发展有限公司 | A kind of data transfer device of vector data, device and electronic equipment |
| CN110322556A (en) * | 2019-04-29 | 2019-10-11 | 武汉大学 | A kind of high-speed, high precision arrow grid Overlap Analysis method based on border cuts |
| CN112818074A (en) * | 2020-11-12 | 2021-05-18 | 中国国土勘测规划院 | Complex multi-inner-ring vector graphic space superposition optimization method |
| CN112818074B (en) * | 2020-11-12 | 2023-03-10 | 中国国土勘测规划院 | Complex multi-inner-ring vector graphic space superposition optimization method |
| CN115294235A (en) * | 2022-10-08 | 2022-11-04 | 广州中望龙腾软件股份有限公司 | Bitmap-based graphic filling method, terminal and storage medium |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105956994A (en) | Graph processing method and device based on rasterized superposition analysis | |
| Nishizeki et al. | Planar graph drawing | |
| Giachetta | A framework for processing large scale geospatial and remote sensing data in MapReduce environment | |
| Chiang et al. | Dynamic algorithms in computational geometry | |
| KR101764615B1 (en) | Spatial knowledge extractor and extraction method | |
| CN106952324A (en) | The parallel overlap-add procedure device and method of vector polygon rasterizing | |
| Cottafava et al. | Automatic contour map | |
| CN101719154A (en) | Grid structure-based spatial index establishing method and grid structure-based spatial index establishing system | |
| CN102542035A (en) | Polygonal rasterisation parallel conversion method based on scanning line method | |
| Liao et al. | Cluster-based visual abstraction for multivariate scatterplots | |
| CN106021480A (en) | Parallel space declustering method and system based on mesh declustering | |
| CN106447777A (en) | Three-dimensional topological relation expressing and mapping achieved under support of Boolean operation | |
| Frank et al. | Chorochronos: A research network for spatiotemporal database systems | |
| CN101533525B (en) | Method for analyzing the overlay of point and face | |
| CN110489511B (en) | Contour line edge-contact elevation error correction method and system, electronic device and medium | |
| Teng et al. | IDEAL: a vector-raster hybrid model for efficient spatial queries over complex polygons | |
| Zhou et al. | A parallel method to accelerate spatial operations involving polygon intersections | |
| CN113034515A (en) | Bounding box tree-based polygon clipping method, electronic device and storage medium | |
| Wang et al. | OST: a heuristic-based orthogonal partitioning algorithm for dynamic hierarchical data visualization | |
| CN113902755B (en) | Laser filling method and device for zigzag-based multilayer outline pattern | |
| Lu et al. | Geometric reasoning in sketch-based volumetric decomposition framework for hexahedral meshing | |
| Zhang et al. | One way to fill all the concave region in grid-based map | |
| Krumpe et al. | Computing curved area labels in near-real time | |
| CN110807820A (en) | Collision detection method and system in 2D (two-dimensional) drawing | |
| Jones et al. | Triangulated spatial models and neighbourhood search: an experimental comparison with quadtrees |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20160921 |
|
| RJ01 | Rejection of invention patent application after publication |