CN105915382A - Highly visualized panorama adjustable platform based Ethernet port connection method - Google Patents
Highly visualized panorama adjustable platform based Ethernet port connection method Download PDFInfo
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- CN105915382A CN105915382A CN201610273381.XA CN201610273381A CN105915382A CN 105915382 A CN105915382 A CN 105915382A CN 201610273381 A CN201610273381 A CN 201610273381A CN 105915382 A CN105915382 A CN 105915382A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
- H04L41/0813—Configuration setting characterised by the conditions triggering a change of settings
- H04L41/082—Configuration setting characterised by the conditions triggering a change of settings the condition being updates or upgrades of network functionality
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0876—Aspects of the degree of configuration automation
- H04L41/0886—Fully automatic configuration
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0889—Techniques to speed-up the configuration process
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- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Automation & Control Theory (AREA)
- Small-Scale Networks (AREA)
Abstract
The invention discloses a highly visualized panorama adjustable platform based Ethernet port connection method, comprising the following steps: adding a parallel detection function to one PHY at any end of the equipment at two ends of a link to ensure that equipment at two ends of the link contains one PHY chip fully aware of the working mode of the PHY chip at the other end; and adjusting the working mode of the PHY chip in the equipment at one end to the working mode of the PHY chip at the other end. According to the invention, PHY chip equipment is made compatible and connected with each other so that the PHY chip becomes compatible with 100BASE-FX and 1000BASE-X physical layer protocols and 100BASE-FX/1000BASE/X self-adaptive protocols.
Description
Technical field
The present invention relates to intelligent substation network equipment docking technique field, particularly relate to a kind of based on height visualization panorama
The Ethernet interface docking calculation of debugging platform.
Background technology
What the optical Ethernet in transformer station also had extensive application at present is 100M optical Ethernet and 1000M optical Ethernet, with
The increase of IED equipment and the exponential growth of message data, the demand of the network bandwidth is day by day increased by user, 1000M light
It is trend of the times that Ethernet substitutes 100M optical Ethernet, and intelligent substation height visualization panorama debugging platform i.e. carries 1000M light
Ethernet interface.But during 1000M optical Ethernet substitutes 100M optical Ethernet, it is contemplated that investment cost problem, often
Optical fiber two ends will not be replaced by the equipment of 1000M optical Ethernet simultaneously, but by changing Access Layer, tether layer, core step by step
The mode of central layer equipment carries out upgrade job, owing to the speed of the two interface is different, and 100M optical Ethernet interface data rate
Time 125Mbps, and 1250Mbps during 1000M optical Ethernet interface data rate, it is impossible to directly link is set up in docking, so at this
1000M optical Ethernet equipment and the technical problem of 100M optical Ethernet equipment interconnection is certainly existed during individual.
Summary of the invention
It is an object of the invention to provide a kind of Ethernet interface docking calculation based on height visualization panorama debugging platform, it is possible to
The different optical Ethernet interface of design speed docks, and this technology also is able to realize supporting auto negotiation and not supporting simultaneously
Automatically connection is set up between the 1000M optical Ethernet interface of auto negotiation.
The technical solution used in the present invention is:
A kind of Ethernet interface docking calculation based on height visualization panorama debugging platform, comprises the following steps that
A: using the FPGA comprising PHY chip to dock, the described FPGA comprising PHY chip mainly comprises five parts, point
Be not ethernet interface circuit, 100BASE-FX transceiver, 1000BASE-SX transceiver, 100BASE-FX/1000BASE-X from
Adapt to and configuration interface；PCS layer in physical layer based on 100BASE-FX transceiver and 1000BASE-SX transceiver, PMA layer and
The structure of pmd layer and agreement, extract, identify pattern and the speed of existing reception code stream:
B: when the instruction of PMA layer has signal when receiving, and parallel detection process opens 100BASE-FX and 1000BASE-SX simultaneously
The serial data alignment function of PMA layer:
Based on PMA layer design nrzi encoding and decoding, it is corresponding that the data stream of NRZI pattern is become PCS layer link by PMA layer
Available data stream；
PCS layer is carried out the conversion between serial data and parallel data, recovered clock signal and serial number from serial data
According to alignment；
After the serial data alignment function instruction alignment of C: any one PMA layer, just whole PHY chip is switched to instruction alignment
The identical mode of operation of that PMA layer, namely alignment function adjusts mode of operation and the opposite end of local device PHY chip
Join；
D: final, when two PMA layers all indicate alignment, is then switched to the mode of operation of 1000BASE-SX by all of PHY chip；
Described step A specifically includes following steps:
A1: i.e. PCS layer in Physical Coding Layer, by the 8bit/10bit data of gmii interface according to the rule encoding of 8B/10B
For the data set of 10bit/8bit mono-group, and generate carrier sense and collision detection signal to support that semiduplex MAC layer uses,
Management autonegotiation process；
A2: physical medium extra play, i.e. transmits the PMA layer data set by 10bit mono-group of data between PCS layer and pmd layer
Mutually change with serial data, provide data loopback for pmd layer simultaneously.
Local terminal and two, opposite end realize supporting that the PHY chip of automatic adaptive functions normally sets up link, give tacit consent to Working mould
Formula is set to 1000BASE-SX, identical for ensureing the transmission original state of two equipment, it is to avoid occur that circulation is locked.
Described light mouth includes building hardware platform with the fpga chip of serial high-speed transceiver for core, it is achieved 1000M
Optical Ethernet and the docking of 100M optical Ethernet interface.
The present invention is by increasing parallel detection function in the PHY of any one end of both link ends equipment, it is ensured that link two
The equipment of end there is a PHY chip can clearly know the mode of operation of opposite end PHY chip, subsequently by PHY in local device
The mode of operation of chip is mated with opposite end, sets up connection by PHY chip equipment is carried out compatibility, finally realizes PHY chip
The PHY of 100BASE-FX, 1000BASE-SX can be supported, support 100BASE-FX/1000BASE-X self adaptation association
View.Be applied to the O&M of secondary system of intelligent substation by the intelligentized mode of the network equipment during, improve intelligence change
Port allocative efficiency during network upgrade is regenerated in power station, the high-efficiency operation for site operation provides convenient.This method can
To be extensively incorporated on ethernet PHY chip, it is achieved 100M optical Ethernet and the self adaptation of 1000M optical Ethernet, thus save
Port setup time during upgrading network equipment.
Accompanying drawing explanation
Fig. 1 is the flow chart of the present invention.
Detailed description of the invention
As it is shown in figure 1, a kind of Ethernet interface docking calculation based on height visualization panorama debugging platform, include following step
Rapid:
A: using the FPGA comprising PHY chip to dock, the described FPGA comprising PHY chip mainly comprises five parts, point
Be not ethernet interface circuit, 100BASE-FX transceiver, 1000BASE-SX transceiver, 100BASE-FX/1000BASE-X from
Adapt to and configuration interface；PCS layer in physical layer based on 100BASE-FX transceiver and 1000BASE-SX transceiver, PMA layer and
The structure of pmd layer and agreement, extract, identify pattern and the speed of existing reception code stream: wherein, 100BASE-FX transceiver bag
Include: 1OOBASE-FX receptor, mainly complete the work of 1OOBASE-FX PMA layer.Firstly the need of from the 125Mbps received
Serial differential data stream ten recover the clock signal of 125MHz, then the differential signal of this 125Mbps is carried out NRZI solution
Code, finally data decoded to NRZI carry out alignment operation, and then output link status signal is to 1OO/1O00M optical Ethernet
Automatic adapter.
1OOBASE_FX sends out connected device, in order to sending-serial differential data of individual 125Mbps, its differential data stream sent
Encode for the 4B/5B after having carried out nrzi encoding.When transmitter does not has data to need the when of needing and send to send IDLE code stream
To maintain the connection of link.
Described IOOOBASE_X transceiver includes: 1000BASE-SX receptor, mainly completes 10DOBASE-X physical layer
Function firstly the need of the serial data stream from the 125Gbps received recovers the clock signal of 125Gbps, then to this
The serial data of individual 125Gbps carries out alignment operation, and the data and then alignd carry out 8B/1OB decoding, last output link shape
State signal is to 100/1000M optical Ethernet automatic adaptation device.
1O00BASEX transmitter, in order to send the serial differential data of 125Gbps, its data sent are that 8B/1OB compiles
Serial data after Ma；The when that transmitter not having data to send, need to send IDLE code stream to maintain the company of data link
Connect.
Described 1OOBASE-FX/1000BASE-SX self adaptation, be used for resolving 100BASE-FX transceiver and
The shape will of 1000BASE-SX sink device, adjusts 100BASE-FX transceiver and the mode of operation of IO00BASE-X transceiver.
Realize 1000M optical Ethernet interface and dock and perform data exchange with 100M optical Ethernet interface, high by serial
The fpga chip of speed transceiver realizes logic function.
Described step A specifically includes following steps:
A1: i.e. PCS layer in Physical Coding Layer, by the 8bit/10bit data of gmii interface according to the rule encoding of 8B/10B
For the data set of 10bit/8bit mono-group, and generate carrier sense and collision detection signal to support that semiduplex MAC layer uses,
Management autonegotiation process；
A2: physical medium extra play, i.e. transmits the PMA layer data set by 10bit mono-group of data between PCS layer and pmd layer
Mutually change with serial data, provide data loopback for pmd layer simultaneously；
B: when the instruction of PMA layer has signal when receiving, and parallel detection process opens 100BASE-FX and 1000BASE-SX simultaneously
The serial data alignment function of PMA layer: based on PMA layer design nrzi encoding and decoding, PMA layer is by the data stream of NRZI pattern
It is converted into the data stream that PCS layer link correspondence is available；
PCS layer is carried out the conversion between serial data and parallel data, recovered clock signal and serial number from serial data
According to alignment；
After the serial data alignment function instruction alignment of C: any one PMA layer, just whole PHY chip is switched to instruction alignment
The identical mode of operation of that PMA layer, namely alignment function adjusts mode of operation and the opposite end of local device PHY chip
Join；
D: final, when two PMA layers all indicate alignment, is then switched to the mode of operation of 1000BASE-SX by all of PHY chip；
PHY mode of operation truth table under adaptive model, as shown in table 1.
Table 1
Local terminal and two, opposite end realize supporting that the PHY chip of automatic adaptive functions normally sets up link, and default mode of operation sets
It is set to 1000BASE-SX, identical for ensureing the transmission original state of two equipment, it is to avoid to occur that circulation is locked.
Hardware platform is built for core, it is achieved 1000M optical Ethernet and 100M with the fpga chip of serial high-speed transceiver
Optical Ethernet interface docks.Ethernet interface circuit realize optical signal to the conversion of the signal of telecommunication and the signal of telecommunication turning to optical signal
Change.Recipient's upwards optical-electrical converter converts optical signals to the high speed serial differential signal of telecommunication and is supplied to FPGA process, sender
Upwards the high-speed differential serial data that FPGA exports are converted into optical signal to be sent on optical fiber link.
This patent is intended on the basis of secondary system of intelligent substation height visualization panorama debugging platform design two kinds of speed
The method of the optical Ethernet interface docking of rate, this technology also is able to realize supporting auto negotiation and not supporting auto negotiation simultaneously
1000M optical Ethernet interface between automatically set up connection, it is possible to during being applied to the O&M of secondary system of intelligent substation,
The port allocative efficiency being effectively improved in substation network upgrade and replacement process.The design can be that 1G/10G optical Ethernet connects
Mouthful, 10G/40G optical Ethernet interface realizes the network upgrade of automatic butt and same pattern and provides reference.Pass through the network equipment
During intelligentized mode is applied to the O&M of secondary system of intelligent substation, improves network upgrade in intelligent substation and change
Port allocative efficiency during Dai, the high-efficiency operation for site operation provides convenient.
Claims (4)
1. an Ethernet interface docking calculation based on height visualization panorama debugging platform, it is characterised in that: include following step
Rapid:
A: using the FPGA comprising PHY chip to dock, the described FPGA comprising PHY chip mainly comprises five parts, point
Be not ethernet interface circuit, 100BASE-FX transceiver, 1000BASE-SX transceiver, 100BASE-FX/1000BASE-X from
Adapt to and configuration interface；PCS layer in physical layer based on 100BASE-FX transceiver and 1000BASE-SX transceiver, PMA layer and
The structure of pmd layer and agreement, extract, identify pattern and the speed of existing reception code stream:
B: when the instruction of PMA layer has signal when receiving, and parallel detection process opens 100BASE-FX and 1000BASE-SX simultaneously
The serial data alignment function of PMA layer:
Based on PMA layer design nrzi encoding and decoding, it is corresponding that the data stream of NRZI pattern is become PCS layer link by PMA layer
Available data stream；
PCS layer is carried out the conversion between serial data and parallel data, recovered clock signal and serial number from serial data
According to alignment；
After the serial data alignment function instruction alignment of C: any one PMA layer, just whole PHY chip is switched to instruction alignment
The identical mode of operation of that PMA layer, namely alignment function adjusts mode of operation and the opposite end of local device PHY chip
Join；
D: final, when two PMA layers all indicate alignment, is then switched to the mode of operation of 1000BASE-SX by all of PHY chip.
Ethernet interface docking calculation based on height visualization panorama debugging platform the most according to claim 1, its feature exists
In: described step A specifically includes following steps:
A1: i.e. PCS layer in Physical Coding Layer, by the 8bit/10bit data of gmii interface according to the rule encoding of 8B/10B
For the data set of 10bit/8bit mono-group, and generate carrier sense and collision detection signal to support that semiduplex MAC layer uses,
Management autonegotiation process；
A2: physical medium extra play, i.e. transmits the PMA layer data set by 10bit mono-group of data between PCS layer and pmd layer
Mutually change with serial data, provide data loopback for pmd layer simultaneously.
Ethernet interface docking calculation based on height visualization panorama debugging platform the most according to claim 2, its feature exists
In: local terminal and two, opposite end realize supporting that the PHY chip of automatic adaptive functions normally sets up link, and default mode of operation is arranged
For 1000BASE-SX, it is used for ensureing that the transmission original state of two equipment is identical, it is to avoid occur that circulation is locked.
Ethernet interface docking calculation based on height visualization panorama debugging platform the most according to claim 3, its feature exists
In: described light mouth includes building hardware platform with the fpga chip of serial high-speed transceiver for core, it is achieved 1000M luminiferous ether
Net and the docking of 100M optical Ethernet interface.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610273381.XA CN105915382A (en) | 2016-04-28 | 2016-04-28 | Highly visualized panorama adjustable platform based Ethernet port connection method |
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| CN201610273381.XA CN105915382A (en) | 2016-04-28 | 2016-04-28 | Highly visualized panorama adjustable platform based Ethernet port connection method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117648135A (en) * | 2024-01-30 | 2024-03-05 | 麒麟软件有限公司 | Direct connection method for device data link layer under Linux |
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2016
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| WO2009021118A2 (en) * | 2007-08-07 | 2009-02-12 | Net Optics, Inc. | Enhanced communication network tap port aggregator arrangement and methods thereof |
| CN101170418A (en) * | 2007-12-05 | 2008-04-30 | 杭州华三通信技术有限公司 | Realization method, system and interface device for Ethernet electric interface compatibility |
Non-Patent Citations (1)
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| 杨春梅: ""基于FPGA芯片的1000M光以太网自适应技术的设计与实现"", 《中国优秀硕士学位论文全文数据库信息科技辑》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117648135A (en) * | 2024-01-30 | 2024-03-05 | 麒麟软件有限公司 | Direct connection method for device data link layer under Linux |
| CN117648135B (en) * | 2024-01-30 | 2024-04-09 | 麒麟软件有限公司 | Direct connection method for device data link layer under Linux |
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Application publication date: 20160831 |
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