CN105915233B - Coding method and device and interpretation method and device - Google Patents
Coding method and device and interpretation method and device Download PDFInfo
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- CN105915233B CN105915233B CN201610184645.4A CN201610184645A CN105915233B CN 105915233 B CN105915233 B CN 105915233B CN 201610184645 A CN201610184645 A CN 201610184645A CN 105915233 B CN105915233 B CN 105915233B
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
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- H—ELECTRICITY
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- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
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Abstract
The invention discloses a kind of coding method, the coding method includes: that information code is generated input matrix I；Obtain the n unit circle matrix that generator matrix G is decomposed；N is the positive integer more than or equal to 2；Each unit circle matrix is subjected to multiplying with the input matrix I respectively；Each multiplication result is subjected to add operation, generates the coding output matrix O of the information code.Meanwhile the invention also discloses a kind of code device, coding/decoding method and decoding apparatus.Using technical solution of the present invention, scramble time and decoding time can be saved, improves code efficiency and decoding efficiency.
Description
Technical field
The present invention relates to encoding and decoding technique fields, and in particular to a kind of coding method and device and interpretation method and device.
Background technique
Density circular matrix coding is one of information coding method, i.e. information code I with density cycle characteristics
Generator matrix G is encoded, and through operation output matrix O, operational formula is as follows:
Wherein,
In generator matrix G, g0~gqIn contain
Have several 1, and next line is the ring shift right of lastrow.
In practical application, need to store generator matrix G, in order to reduce memory space, the method generallyd use is only to store
The first row G of generator matrix G0=[g0 g1 ... gq], o is obtained with 1 clock and information code I operation0Afterwards, to G0It is recycled
It moves to right, calculates o1, and so on, after Q=q+1 clock, it can be deduced that whole coding results.But this method makes
Required clock number is larger when must encode, and relatively time-consuming, affects code efficiency.Similarly, to using the coding method
When coding result is decoded, required clock number is also larger, also can be more time-consuming, to influence decoding efficiency.
Summary of the invention
In view of this, coding can be saved present invention contemplates that provide a kind of coding method and device and interpretation method and device
Time and decoding time improve code efficiency and decoding efficiency.
In order to achieve the above objectives, the technical scheme of the present invention is realized as follows:
The present invention provides a kind of coding methods, which comprises
Information code is generated into input matrix I；
Obtain the n unit circle matrix that generator matrix G is decomposed；N is the positive integer more than or equal to 2；
Each unit circle matrix is subjected to multiplying with the input matrix I respectively；
Each multiplication result is subjected to add operation, generates the coding output matrix O of the information code.
In above scheme, it is preferable that the generator matrix G has density cycle characteristics；
Wherein,
In the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
In above scheme, it is preferable that the method also includes:
Preset generator matrix G；
The generator matrix G is resolved into n unit circle matrix；Wherein,
Each unit circle matrix is the matrix of q+1 row, q+1 column, and in each unit circle matrix, the 1st row
Only one element of vector is that 1, remaining element is 0；And i+1 row vector be each element of the i-th row row vector successively
Move to right the vector that a position obtains；I is positive integer, and 1≤i≤q；Q is the positive integer more than or equal to 2.
In above scheme, it is preferable that described that the generator matrix G is resolved into n unit circle matrix, comprising:
Obtain the number that the element in generator matrix G in the first row is 1 and the position that element is 1；
The number that element in the first row is 1 is determined as to the value of n；
Based on the element in the first row in the generator matrix G be 1 number and element be 1 the unit of position n follow
Ring matrix.
In above scheme, it is preferable that the element based in the first row in the generator matrix G be 1 number and
The unit circle matrix of position n that element is 1, comprising:
The position for being 1 according to the element in the generator matrix G in the first row, determines in the n unit circle matrix
The first row element be 1 position；
After determining the position that the element of the first row of each unit circle matrix is 1, by each unit circle matrix
Other elements position in the first row in addition to element 1 is set as 0；
For each unit circle matrix undetermined, the 1st row vector each element is successively moved to right into a position and is obtained
2nd row vector, and so on, i-th of row vector each element is successively moved to right into a position and obtains i+1 row vector, is obtained
To n unit circle matrix.
The present invention also provides a kind of coding/decoding methods, which comprises
The coding output matrix O received is splitted into the sum of n matrixes to be decoded；N is the positive integer more than or equal to 2；
Determine any one matrix to be decoded, and lookup and institute in the n unit circle matrix that generator matrix G is decomposed
State the corresponding unit circle matrix of matrix to be decoded；
Obtain unit circle inverse of a matrix matrix corresponding with the matrix to be decoded；
Unit circle inverse of a matrix matrix corresponding with the matrix to be decoded is multiplied with the matrix to be decoded
Method operation obtains decoded output matrix I.
In above scheme, it is preferable that the generator matrix G has density cycle characteristics；
Wherein,
In the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
In above scheme, it is preferable that the method also includes:
Obtain the n unit circle matrix that generator matrix G and generator matrix G used by encoding is resolved into；
Store the n unit circle matrix that the generator matrix G and generator matrix G are resolved into.
The present invention also provides a kind of code device, described device includes:
First processor, for information code to be generated input matrix I；
Second processor, the n unit circle matrix decomposed for obtaining generator matrix G；N is more than or equal to 2
Positive integer；
First arithmetic device, for each unit circle matrix to be carried out multiplying with the input matrix I respectively；
Second arithmetic device, for each multiplication result to be carried out add operation, the coding for generating the information code is defeated
Matrix O out.
In above scheme, it is preferable that the generator matrix G has density cycle characteristics；
Wherein,
In the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
In above scheme, it is preferable that the code device further include:
Third processor, is used for:
Preset generator matrix G；
The generator matrix G is resolved into n unit circle matrix；Wherein,
Each unit circle matrix is the matrix of q+1 row, q+1 column, and in each unit circle matrix, the 1st row
Only one element of vector is that 1, remaining element is 0；And i+1 row vector be each element of the i-th row row vector successively
Move to right the vector that a position obtains；I is positive integer, and 1≤i≤q；Q is the positive integer more than or equal to 2.
In above scheme, it is preferable that the third processor is also used to:
Obtain the number that the element in generator matrix G in the first row is 1 and the position that element is 1；
The number that element in the first row is 1 is determined as to the value of n；
Based on the element in the first row in the generator matrix G be 1 number and element be 1 the unit of position n follow
Ring matrix.
In above scheme, it is preferable that the third processor is also used to:
The position for being 1 according to the element in the generator matrix G in the first row, determines in the n unit circle matrix
The first row element be 1 position；
After determining the position that the element of the first row of each unit circle matrix is 1, by each unit circle matrix
Other elements position in the first row in addition to element 1 is set as 0；
For each unit circle matrix undetermined, the 1st row vector each element is successively moved to right into a position and is obtained
2nd row vector, and so on, i-th of row vector each element is successively moved to right into a position and obtains i+1 row vector, is obtained
To n unit circle matrix.
The present invention also provides a kind of decoding apparatus, described device includes:
Fourth processor, the coding output matrix O for will receive split into the sum of n matrixes to be decoded；N be greater than or
Positive integer equal to 2；
5th processor, for determining any one matrix to be decoded, and the n unit decomposed in generator matrix G is followed
Unit circle matrix corresponding with the matrix to be decoded is searched in ring matrix；
Third arithmetic unit, for obtaining unit circle inverse of a matrix matrix corresponding with the matrix to be decoded；
4th arithmetic unit, for will unit circle inverse of a matrix matrix corresponding with the matrix to be decoded and it is described to
Decoding matrix carries out multiplying, obtains decoded output matrix I.
In above scheme, it is preferable that the generator matrix G has density cycle characteristics；
Wherein,
In the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
In above scheme, it is preferable that described device further include:
Receiver is followed for obtaining the n unit that generator matrix G and generator matrix G used by coding is resolved into
Ring matrix；
Memory, the n unit circle matrix resolved into for storing the generator matrix G and generator matrix G.
Coding method provided by the invention and device and its corresponding coding/decoding method and decoding apparatus, information code is generated
Input matrix I；Obtain the n unit circle matrix that generator matrix G is decomposed；N is the positive integer more than or equal to 2；It will be each
Unit circle matrix carries out multiplying with the input matrix I respectively；Each multiplication result is subjected to add operation, it is raw
At the coding output matrix O of the information code.In this way, required clock number when coding or decoding can be saved, coding effect is improved
Rate and decoding efficiency.
Detailed description of the invention
Fig. 1 is the implementation process schematic diagram of coding method of the embodiment of the present invention；
Fig. 2 is the implementation process schematic diagram of coding/decoding method of the embodiment of the present invention；
Fig. 3 is the structural schematic diagram of code device of the embodiment of the present invention；
Fig. 4 is the structural schematic diagram of decoding apparatus of the embodiment of the present invention.
Specific embodiment
In order to more fully hereinafter understand the features of the present invention and technology contents, with reference to the accompanying drawing to reality of the invention
It is now described in detail, appended attached drawing purposes of discussion only for reference, is not used to limit the present invention.
In the following implementation of coding method provided by the invention and device and its corresponding coding/decoding method and decoding apparatus
In example, main thought is:
Product using information code matrix and unit circle matrix is this characteristic of the displacement of information code recycle ratio, will be had
There is the generator matrix G of density cycle characteristics to be decomposed into the sum of n unit circle matrix, it may be assumed that
That is, G=submatrix 0+ ...+submatrix n-1, in above-mentioned formula, submatrix 0 isSub- square
Battle array n-1 be
Specifically, submatrix 0 ..., submatrix n-1 be unit circle matrix；Each unit circle matrix is q+1
The matrix of row, q+1 column, and in each unit circle matrix, the 1st only one element of row vector is that 1, remaining element is
0；And i+1 row vector is that each element of the i-th row row vector successively moves to right the vector that a position obtains；I is positive integer,
And 1≤i≤q；Q is the positive integer more than or equal to 2.
In the generator matrixIn, in the first row include at least two 1, at least one
0；And+1 row of jth is the ring shift right of jth row；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
The technical solution of the present invention is further elaborated in the following with reference to the drawings and specific embodiments.
Embodiment one
Fig. 1 is the implementation process schematic diagram of coding method of the embodiment of the present invention, is applied to the first equipment, at the present invention one
In preferred embodiment, the coding method is mainly comprised the steps that
Step 101: information code is generated into input matrix I.
Here, the information code refers to original information symbol.
In general, the information code is array form, the information code of array form is exported according to matrix form, that is, is generated defeated
Enter matrix.
For example, input matrix I can be expressed as
Step 102: obtaining the n unit circle matrix that generator matrix G is decomposed；N is the positive integer more than or equal to 2.
In a specific sub- embodiment, n unit circle matrix that the acquisition generator matrix G is decomposed, comprising:
The n unit circle matrix that generator matrix G is decomposed is obtained from local storage；Or
Obtain n unit circle matrix being decomposed of generator matrix G from the second equipment, wherein second equipment for
The equipment of the first equipment connection.
For example, second equipment can be long-range or cloud equipment, such as Cloud Server.
Preferably, the generator matrix G has density cycle characteristics；The generator matrix G is expressed as:
In the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
Preferably, before executing step 102 or step 101, the method also includes:
Preset generator matrix G；
The generator matrix G is resolved into n unit circle matrix；Wherein,
Each unit circle matrix is the matrix of q+1 row, q+1 column, and in each unit circle matrix, the 1st row
Only one element of vector is that 1, remaining element is 0；And i+1 row vector be each element of the i-th row row vector successively
Move to right the vector that a position obtains；I is positive integer, and 1≤i≤q；Q is the positive integer more than or equal to 2.
That is, the n unit circle matrix that generator matrix G is resolved into is stored in advance, in this way, wait need
When using the n unit circle matrix, it can obtain in time；Relative to only storing for the generator matrix G, can save point
Solve the time.
It is described that the generator matrix G is resolved into n unit circle matrix in a specific sub- embodiment, may include:
Obtain the number that the element in generator matrix G in the first row is 1 and the position that element is 1；
The number that element in the first row is 1 is determined as to the value of n；
Based on the element in the first row in the generator matrix G be 1 number and element be 1 the unit of position n follow
Ring matrix.
In a specific sub- embodiment, the element based in the first row in the generator matrix G be 1 number and
The unit circle matrix of position n that element is 1, comprising:
The position for being 1 according to the element in the generator matrix G in the first row, determines in the n unit circle matrix
The first row element be 1 position；
After determining the position that the element of the first row of each unit circle matrix is 1, by each unit circle matrix
Other elements position in the first row in addition to element 1 is set as 0；
For each unit circle matrix undetermined, the 1st row vector each element is successively moved to right into a position and is obtained
2nd row vector, and so on, i-th of row vector each element is successively moved to right into a position and obtains i+1 row vector, is obtained
To n unit circle matrix.
For example,So, the number that element is 1 in the first row is 2, therefore, n=2,
The position that element is 1 in the first row is the column of the first row the 2nd, the column of the first row the 4th；So, in 2 unit circle matrixes of generation
In, the column of the first row the 2nd are distinguished in the position that the first row element is 1, the first row the 4th arranges, and 2 unit circle matrixes are set respectively
For submatrix G0, submatrix G1；
So, the row vector of the first row of submatrix G0 can be denoted as [0 10 0] or [0 00 1]；The of submatrix G1
The row vector of a line can be denoted as [0 00 1] or [0 10 0]；And then it can be obtained according to the characteristic of unit circle matrixThat is,
Step 103: each unit circle matrix is subjected to multiplying with the input matrix I respectively.
Still by taking above-mentioned example as an example, ifSo,
Step 104: each multiplication result being subjected to add operation, generates the coding output matrix O of the information code.
Still by taking above-mentioned example as an example,
It should be noted that the product calculation for each unit circle matrix and input matrix needs a clock.Cause
This, according to parallel computation, i.e., each unit circle matrix carries out product calculation with input matrix respectively simultaneously, then, it is only necessary to
Want a clock that can find out coding output matrix O；According to serial computing, i.e., each unit circle matrix sequentially respectively with it is defeated
Enter matrix and carries out product calculation, then, need n clock that can find out coding output matrix O.
In this example embodiment, according to parallel calculating method, while the operation of matrix multiple twice is carried out, it is only necessary at 1
Clock can find out coding output matrix O；According to serial computing method, the operation of matrix multiple is sequentially carried out twice, it is only necessary to 2
A clock can find out coding output matrix O.
In the background technology it has been noted that needing Q=q+1 clock according to existing matrix coder method, and use
The method of the embodiment of the present invention, required clock number are 1~n, wherein n≤q.Table 1 show optimization before with optimization after needed for
The contrast table of clock number, as shown in table 1,
| Required clock | |
| Before optimization | Q=q+1 |
| After optimization | 1~n；Wherein, n≤q |
Table 1
In conclusion required clock number greatly reduces using the method for the embodiment of the present invention.
In the present embodiment, first equipment can be the equipment for needing to carry out coded treatment.
In embodiments of the present invention, information code is generated into input matrix I；The n unit that generator matrix G is decomposed is obtained to follow
Ring matrix；N is the positive integer more than or equal to 2；Each unit circle matrix is subjected to multiplication fortune with the input matrix I respectively
It calculates；Each multiplication result is subjected to add operation, generates the coding output matrix O of the information code；In this way, volume can be saved
Required clock number when code, improves code efficiency.
Embodiment two
Relative to coding method described in embodiment one, the embodiment of the invention also provides it is a kind of by coded result into
The decoded verification method of row.
Fig. 2 is the implementation process schematic diagram of coding/decoding method of the embodiment of the present invention, is applied to third equipment, at the present invention one
In preferred embodiment, the coding/decoding method is mainly comprised the steps that
Step 201: the coding output matrix O received is splitted into the sum of n matrixes to be decoded；N is more than or equal to 2
Positive integer.
Preferably, before executing step 201, the method also includes:
Obtain the n unit circle matrix that generator matrix G and generator matrix G used by encoding is resolved into；
Store the n unit circle matrix that the generator matrix G and generator matrix G are resolved into.
Preferably, the generator matrix G has density cycle characteristics；
Wherein,
In the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
Still by embodiment one for example for be illustrated, used when if knowing codingWherein, Output matrixSo, output matrix O is splitted into two matrixes to be decoded, i.e.,
Step 202: determining any one matrix to be decoded, and in the n unit circle matrix that generator matrix G is decomposed
Search unit circle matrix corresponding with the matrix to be decoded.
Still by taking above-mentioned example as an example, it is assumed that the matrix to be decoded selected forIt finds and the square to be decoded
The corresponding unit circle matrix of battle array is
Step 203: obtaining unit circle inverse of a matrix matrix corresponding with the matrix to be decoded；
In a specific embodiment, acquisition unit circle inverse of a matrix square corresponding with the matrix to be decoded
Gust, may include:
Inverse operation is done to the unit circle matrix corresponding with the matrix to be decoded.
In another specific embodiment, acquisition unit circle inverse of a matrix corresponding with the matrix to be decoded
Matrix, comprising: searched in local storage or obtain inverse matrix corresponding with the unit circle matrix from the 4th equipment.Its
In, the 4th equipment is the equipment connecting with third equipment.For example, the 4th equipment can be long-range or cloud set
It is standby, such as Cloud Server.
That is, can be stored in advance in local storage or the 4th equipment unit circle matrix and with the list
The corresponding inverse matrix of position circular matrix.
It so, it is possible to save the time for doing inverse matrix operation.
Still by taking above-mentioned example as an example, the inverse operation of G0 is sought according to inversion operation method, therefore
Step 204: will be with the corresponding unit circle inverse of a matrix matrix of matrix to be decoded and the square to be decoded
Battle array carries out multiplying, obtains decoded output matrix I.
Still by taking above-mentioned example as an example,Obtain former decoding
Output matrix I.
In conclusion required clock number greatly reduces using the method for the embodiment of the present invention.
In the present embodiment, the third equipment can be the equipment for needing to be decoded processing.
In embodiments of the present invention, the coding output matrix O received is splitted into the sum of n matrixes to be decoded；It determines and appoints
One matrix to be decoded of meaning, and lookup and the matrix phase to be decoded in the n unit circle matrix that generator matrix G is decomposed
Corresponding unit circle matrix；Inverse operation is done to the unit circle matrix corresponding with the matrix to be decoded；Will with institute
It states the corresponding unit circle inverse of a matrix matrix of matrix to be decoded and the matrix to be decoded carries out multiplying, decoded
Output matrix I；In this way, required clock number when decoding can be saved, decoding efficiency is improved.
Embodiment three
Fig. 3 is the structural schematic diagram of code device of the embodiment of the present invention, as shown in figure 3, the code device includes:
First processor 31, for information code to be generated input matrix I；
Second processor 32, the n unit circle matrix decomposed for obtaining generator matrix G；N is more than or equal to 2
Positive integer；
First arithmetic device 33, for each unit circle matrix to be carried out multiplying with the input matrix I respectively；
Second arithmetic device 34 generates the coding of the information code for each multiplication result to be carried out add operation
Output matrix O.
In above scheme, the generator matrix G has density cycle characteristics；
Wherein,
In the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
Preferably, the code device further include:
Third processor 35, is used for:
Preset generator matrix G；
The generator matrix G is resolved into n unit circle matrix；Wherein,
Each unit circle matrix is the matrix of q+1 row, q+1 column, and in each unit circle matrix, the 1st row
Only one element of vector is that 1, remaining element is 0；And i+1 row vector be each element of the i-th row row vector successively
Move to right the vector that a position obtains；I is positive integer, and 1≤i≤q；Q is the positive integer more than or equal to 2.
Preferably, the third processor 35, is also used to:
Obtain the number that the element in generator matrix G in the first row is 1 and the position that element is 1；
The number that element in the first row is 1 is determined as to the value of n；
Based on the element in the first row in the generator matrix G be 1 number and element be 1 the unit of position n follow
Ring matrix.
Preferably, the third processor 35, is also used to:
The position for being 1 according to the element in the generator matrix G in the first row, determines in the n unit circle matrix
The first row element be 1 position；
After determining the position that the element of the first row of each unit circle matrix is 1, by each unit circle matrix
Other elements position in the first row in addition to element 1 is set as 0；
For each unit circle matrix undetermined, the 1st row vector each element is successively moved to right into a position and is obtained
2nd row vector, and so on, i-th of row vector each element is successively moved to right into a position and obtains i+1 row vector, is obtained
To n unit circle matrix.
Wherein, first processor 31, second processor 32, first arithmetic device 33, second arithmetic device 34, third processor
35, it can integrate corresponding to same processor, or respectively correspond different processors, wherein the processor includes executable
Code, the executable code are stored in a storage medium, and the processor can be deposited by communication interfaces such as buses with described
Be connected in storage media, when executing the corresponding function of specific each module, read from the storage medium and run it is described can
Execute code.The storage medium is preferably non-moment storage medium for storing the part of the executable code.
It will be appreciated by those skilled in the art that in the code device of the embodiment of the present invention each device function, before can refer to
It states the associated description of coding method and understands, each device in the code device of the embodiment of the present invention, it can be by realizing that the present invention is real
It applies the analog circuit of function described in example and realizes, it can also be by executing the software of function described in the embodiment of the present invention in intelligence
Can operation in terminal and realize.
Code device described in the present embodiment can save required clock number when coding, improve code efficiency.
Example IV
Fig. 4 is the structural schematic diagram of decoding apparatus of the embodiment of the present invention, as shown in figure 4, the decoding apparatus includes:
Fourth processor 41, the coding output matrix O for will receive split into the sum of n matrixes to be decoded；N be greater than
Or the positive integer equal to 2；
5th processor 42, for determining any one matrix to be decoded, and the n unit decomposed in generator matrix G
Unit circle matrix corresponding with the matrix to be decoded is searched in circular matrix；
Third arithmetic unit 43, for obtaining unit circle inverse of a matrix matrix corresponding with the matrix to be decoded；
4th arithmetic unit 44, for will unit circle inverse of a matrix matrix corresponding with the matrix to be decoded with it is described
Matrix to be decoded carries out multiplying, obtains decoded output matrix I.
In a specific embodiment, the third arithmetic unit 43, is specifically used for:
Inverse operation is done to the unit circle matrix corresponding with the matrix to be decoded.
In another specific embodiment, the third arithmetic unit 43 is specifically used for:
It is searched in local storage or obtains inverse matrix corresponding with the unit circle matrix from the 4th equipment.Wherein,
4th equipment is the equipment connecting with third equipment.For example, the 4th equipment can be long-range or cloud equipment, such as
Cloud Server.
In above scheme, the generator matrix G has density cycle characteristics；
Wherein,
In the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
Preferably, the decoding apparatus further include:
Receiver 45, for obtaining the n unit for encoding used generator matrix G and generator matrix G and being resolved into
Circular matrix；
Memory 46, the n unit circle matrix resolved into for storing the generator matrix G and generator matrix G.
Wherein, fourth processor 41, the 5th processor 42, third arithmetic unit 43, the 4th arithmetic unit 44, receiver 45, deposit
Reservoir 46, can integrate corresponding to same processor, or respectively correspond different processors, wherein the processor includes can
Code is executed, the executable code is stored in a storage medium, and the processor can pass through the communication interfaces such as bus and institute
It states in storage medium and is connected, when executing the corresponding function of specific each module, read from the storage medium and run institute
State executable code.The storage medium is preferably non-moment storage medium for storing the part of the executable code.
It will be appreciated by those skilled in the art that in the decoding apparatus of the embodiment of the present invention each device function, before can refer to
It states the associated description of coding/decoding method and understands, each device in the decoding apparatus of the embodiment of the present invention, it can be by realizing that the present invention is real
It applies the analog circuit of function described in example and realizes, it can also be by executing the software of function described in the embodiment of the present invention in intelligence
Can operation in terminal and realize.
Decoding apparatus described in the present embodiment can save required clock number when decoding, improve decoding efficiency.
The embodiment of the present invention also describes a kind of coding/decoding apparatus, wherein the coding/decoding apparatus includes as shown in Figure 3
Code device and decoding apparatus as shown in Figure 4, details are not described herein.
In several embodiments provided by the present invention, it should be understood that disclosed method, apparatus and electronic equipment,
It may be implemented in other ways.Apparatus embodiments described above are merely indicative, for example, the unit is drawn
Point, only a kind of logical function partition, there may be another division manner in actual implementation, such as: multiple units or components can
To combine, or it is desirably integrated into another system, or some features can be ignored or not executed.In addition, shown or discussed
The mutual coupling of each component part or direct-coupling or communication connection can be through some interfaces, equipment or unit
Indirect coupling or communication connection can be electrical, mechanical or other forms.
Above-mentioned unit as illustrated by the separation member, which can be or may not be, to be physically separated, aobvious as unit
The component shown can be or may not be physical unit, it can and it is in one place, it may be distributed over multiple network lists
In member；Some or all of units can be selected to achieve the purpose of the solution of this embodiment according to the actual needs.
In addition, each functional unit in various embodiments of the present invention can be fully integrated in one processing unit, it can also
To be each unit individually as a unit, can also be integrated in one unit with two or more units；It is above-mentioned
Integrated unit both can take the form of hardware realization, can also realize in the form of hardware adds SFU software functional unit.
Those of ordinary skill in the art will appreciate that: realize that all or part of the steps of above method embodiment can pass through
The relevant hardware of program instruction is completed, and program above-mentioned can be stored in a computer readable storage medium, the program
When being executed, step including the steps of the foregoing method embodiments is executed；And storage medium above-mentioned include: movable storage device, it is read-only
Memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or
The various media that can store program code such as person's CD.
If alternatively, the above-mentioned integrated unit of the embodiment of the present invention is realized in the form of software function module and as independence
Product when selling or using, also can store in a computer readable storage medium.Based on this understanding, this hair
Substantially the part that contributes to existing technology can body in the form of software products in other words for the technical solution of bright embodiment
Reveal and, which is stored in a storage medium, including some instructions are with so that a computer is set
Standby (can be personal computer, server or network equipment etc.) executes the whole of each embodiment the method for the present invention
Or part.And storage medium above-mentioned includes: that movable storage device, ROM, RAM, magnetic or disk etc. are various can store journey
The medium of sequence code.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, protection scope of the present invention should be based on the protection scope of the described claims.
Claims (14)
1. a kind of coding method, which is characterized in that the described method includes:
Information code is generated into input matrix I；
Obtain the n unit circle matrix that generator matrix G is decomposed；N is the positive integer more than or equal to 2；
Each unit circle matrix is subjected to multiplying with the input matrix I respectively；
Each multiplication result is subjected to add operation, generates the coding output matrix O of the information code；
The method also includes:
Preset generator matrix G；
The generator matrix G is resolved into n unit circle matrix；Wherein,
Each unit circle matrix is the matrix of q+1 row, q+1 column, and in each unit circle matrix, the 1st row vector
Only one element is that 1, remaining element is 0；And i+1 row vector is that each element of the i-th row row vector successively moves to right
The vector that one position obtains；I is positive integer, and 1≤i≤q；Q is the positive integer more than or equal to 2.
2. according to coding method described in claim l, which is characterized in that the generator matrix G has density cycle characteristics；
Wherein, in the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
3. coding method according to claim 1, which is characterized in that described that the generator matrix G is resolved into n unit
Circular matrix, comprising:
Obtain the number that the element in generator matrix G in the first row is 1 and the position that element is 1；
The number that element in the first row is 1 is determined as to the value of n；
Based on the element in the first row in the generator matrix G be 1 number and element be 1 the unit circle square of position n
Battle array.
4. coding method according to claim 3, which is characterized in that described based in the first row in the generator matrix G
Element be 1 number and element be 1 the unit circle matrix of position n, comprising:
The position for being 1 according to the element in the generator matrix G in the first row determines the in the n unit circle matrix
The position that the element of a line is 1；
After determining the position that the element of the first row of each unit circle matrix is 1, by the first of each unit circle matrix
Other elements position in row in addition to element 1 is set as 0；
For each unit circle matrix undetermined, the 1st row vector each element is successively moved to right into a position and obtains the 2nd
Row vector, and so on, i-th of row vector each element is successively moved to right into a position and obtains i+1 row vector, obtains n
Unit circle matrix.
5. a kind of coding/decoding method, which is characterized in that the described method includes:
The n unit circle matrix resolved into according to generator matrix G, by the coding output matrix O received split into it is described
The sum of one-to-one n matrixes to be decoded of unit circle matrix；N is the positive integer more than or equal to 2；
Determine any one matrix to be decoded, and in the n unit circle matrix that generator matrix G is decomposed search with it is described to
The corresponding unit circle matrix of decoding matrix；
Obtain unit circle inverse of a matrix matrix corresponding with the matrix to be decoded；
Multiplication fortune will be carried out with the corresponding unit circle inverse of a matrix matrix of matrix to be decoded and the matrix to be decoded
It calculates, obtains decoded output matrix I.
6. coding/decoding method according to claim 5, which is characterized in that the generator matrix G has density cycle characteristics；
Wherein, in the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
7. coding/decoding method according to claim 5, which is characterized in that at the n resolved into according to generator matrix G
Unit circle matrix splits into the coding output matrix O received a to be decoded with the one-to-one n of unit circle matrix
Before the sum of matrix, the method also includes:
Obtain the n unit circle matrix that generator matrix G and generator matrix G used by encoding is resolved into；
Store the n unit circle matrix that the generator matrix G and generator matrix G are resolved into.
8. a kind of code device, which is characterized in that described device includes:
First processor, for information code to be generated input matrix I；
Second processor, the n unit circle matrix decomposed for obtaining generator matrix G；N is just whole more than or equal to 2
Number；
First arithmetic device, for each unit circle matrix to be carried out multiplying with the input matrix I respectively；
Second arithmetic device generates the coding output square of the information code for each multiplication result to be carried out add operation
Battle array O；
The code device further include: third processor is used for:
Preset generator matrix G；
The generator matrix G is resolved into n unit circle matrix；Wherein,
Each unit circle matrix is the matrix of q+1 row, q+1 column, and in each unit circle matrix, the 1st row vector
Only one element is that 1, remaining element is 0；And i+1 row vector is that each element of the i-th row row vector successively moves to right
The vector that one position obtains；I is positive integer, and 1≤i≤q；Q is the positive integer more than or equal to 2.
9. code device according to claim 8, which is characterized in that the generator matrix G has density cycle characteristics；
Wherein, in the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
10. code device according to claim 8, which is characterized in that the third processor is also used to:
Obtain the number that the element in generator matrix G in the first row is 1 and the position that element is 1；
The number that element in the first row is 1 is determined as to the value of n；
Based on the element in the first row in the generator matrix G be 1 number and element be 1 the unit circle square of position n
Battle array.
11. code device according to claim 10, which is characterized in that the third processor is also used to:
The position for being 1 according to the element in the generator matrix G in the first row determines the in the n unit circle matrix
The position that the element of a line is 1；
After determining the position that the element of the first row of each unit circle matrix is 1, by the first of each unit circle matrix
Other elements position in row in addition to element 1 is set as 0；
For each unit circle matrix undetermined, the 1st row vector each element is successively moved to right into a position and obtains the 2nd
Row vector, and so on, i-th of row vector each element is successively moved to right into a position and obtains i+1 row vector, obtains n
Unit circle matrix.
12. a kind of decoding apparatus, which is characterized in that described device includes:
Fourth processor, the n unit circle matrix for being resolved into according to generator matrix G export the coding received
Matrix O the sum of is splitted into the one-to-one n of unit circle matrix matrix to be decoded；N is just whole more than or equal to 2
Number；
5th processor, for determining any one matrix to be decoded, and the n unit circle square decomposed in generator matrix G
Unit circle matrix corresponding with the matrix to be decoded is searched in battle array；
Third arithmetic unit, for obtaining unit circle inverse of a matrix matrix corresponding with the matrix to be decoded；
4th arithmetic unit, for will unit circle inverse of a matrix matrix corresponding with the matrix to be decoded with it is described to be decoded
Matrix carries out multiplying, obtains decoded output matrix I.
13. decoding apparatus according to claim 12, which is characterized in that the generator matrix G has density cycle characteristics；
Wherein, in the generator matrix G, in the first row include at least two 1, at least one 0；And+1 row of jth is jth row
Ring shift right；J is positive integer, and 1≤j≤q；Q is the positive integer more than or equal to 2.
14. decoding apparatus according to claim 12, which is characterized in that described device further include:
Receiver, for obtaining the n unit circle square for encoding used generator matrix G and generator matrix G and being resolved into
Battle array；
Memory, the n unit circle matrix resolved into for storing the generator matrix G and generator matrix G.
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