CN105873295A - Voltage-stabilizing type white LED denoising driving system based on pulse shaping circuit - Google Patents
Voltage-stabilizing type white LED denoising driving system based on pulse shaping circuit Download PDFInfo
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- CN105873295A CN105873295A CN201610380696.4A CN201610380696A CN105873295A CN 105873295 A CN105873295 A CN 105873295A CN 201610380696 A CN201610380696 A CN 201610380696A CN 105873295 A CN105873295 A CN 105873295A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
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Abstract
The invention discloses a voltage-stabilizing type white LED denoising driving system based on a pulse shaping circuit. The denoising driving system is characterized by being mainly composed of a driving chip U, the phase shaping circuit, a capacitor C1, a filtering circuit, a capacitor C5 and the like, the phase shaping circuit is connected with a TRIG pin of the driving chip U, the negative electrode of the capacitor C1 is grounded, the positive electrode of the capacitor C1 is connected with the pulse shaping circuit after sequentially passing through a resistor R1 and a resistor R2, the filtering circuit is connected between the positive electrode of the capacitor C1 and the driving chip U in series, the positive electrode of the capacitor C5 is connected with the filtering circuit after passing through a resistor R6, and the negative electrode of the capacitor C5 is grounded. The NE555 integrated chip is combined with a novel peripheral circuit, the system can eliminate the phase difference of currents and reduce high-frequency self-excitation, the denoising capacity of the system is improved, and the current noises produced in work of the system are reduced. Waveforms of input currents can be adjusted, fluctuation of the system in the work process is avoided, and therefore the stability of the system can be greatly improved.
Description
Technical field
The present invention relates to electronic applications, specifically refer to a kind of voltage regulation type white light LEDs based on pulse shaper
Noise reduction drive system.
Background technology
At present, due to LED have that energy consumption is low, the feature such as length in service life and safety and environmental protection, it is
Become one of main product of people's life lighting.Along with the universal of LED and people are to quality of life requirement
Improve constantly, this brings new challenge to LED drive system.But, traditional LED drive system
Easily produce high-frequency self-excitation, operationally easily produce the biggest current noise, have a strong impact on the normal of people
Life.
Summary of the invention
It is an object of the invention to overcome traditional LED drive system easily to produce high-frequency self-excitation, operationally
Easily produce the defect of the biggest current noise, it is provided that a kind of voltage regulation type white light based on pulse shaper
LED noise reduction drive system.
The purpose of the present invention is achieved through the following technical solutions: a kind of voltage regulation type based on pulse shaper is white
Light LED noise reduction drive system, mainly by driving chip U, is connected with the TRIG pin of driving chip U
Pulse shaper, minus earth, positive pole sequentially after resistance R1 and resistance R2 with pulse shaper
The electric capacity C1 being connected, is serially connected in the filter circuit between the positive pole of electric capacity C1 and driving chip U, positive pole
Be connected with filter circuit after resistance R6, the electric capacity C5 of minus earth, positive pole and driving chip U's
The electric capacity C3 that CONT pin is connected, negative pole negative pole with electric capacity C5 after resistance R7 is connected, with electricity
Hold the base bias circuit that the positive pole of C1 is connected, and be serially connected in OUT pin and the base of driving chip U
Gate switch between the biasing circuit of pole triggers circuit composition；The RE pin of described driving chip U and VCC
Pin is all connected with filter circuit, its DIS pin and THRE pin and OUT pin all and electric capacity
The positive pole of C5 is connected, its GND pin then negative pole with electric capacity C5 is connected.
Further, described base bias circuit is by amplifier P4, triode VT2, triode VT3, three
Pole pipe VT4, negative pole is connected with the negative pole of amplifier P4, positive pole is then as the input of this base bias circuit
The electric capacity C8 of end, positive pole is connected with the negative pole of amplifier P4, the electric capacity C9 of minus earth, with electric capacity C9
The resistance R18 being in parallel, one end is connected with the positive pole of electric capacity C9, the other end after resistance R20 with three poles
Resistance R19, the P4 pole that the colelctor electrode of pipe VT2 is connected is connected with the positive pole of amplifier P4, N pole then
Diode D8, the N pole being connected with the base stage of triode VT2 is connected with the output of amplifier P4,
Diode D9, P4 pole that P4 pole colelctor electrode with triode VT2 after potentiometer R21 is connected and amplification
The diode D10 that the output of device P4 is connected, N pole is connected with the base stage of triode VT3, positive pole with
The emitter stage of triode VT4 is connected, negative pole base stage with triode VT3 after resistance R22 is connected
Electric capacity C10, the resistance R23 being serially connected between the emitter stage of triode VT2 and the base stage of triode VT4,
One end is connected with the emitter stage of triode VT3, the other end connects while being connected with the negative pole of electric capacity C10
The resistance R24 composition on ground；The base stage of described triode VT2 is connected with the control end of potentiometer R21, it
Emitter stage then colelctor electrode with triode VT4 is connected；The colelctor electrode of described triode VT4 forms this base stage
The output of biasing circuit and trigger with gate switch circuit be connected, its base stage then with the collection of triode VT3
Electrode is connected；The input of described base bias circuit is connected with the positive pole of electric capacity C1.
Described pulse shaper by amplifier P1, amplifier P2, amplifier P3, FET MOS3,
FET MOD4, FET MOS5, positive pole is connected with the negative pole of amplifier P1, negative pole with put
The electric capacity C7 that the positive pole of big device P2 is connected, is serially connected in the positive pole of amplifier P1 and FET MOS3
The drain electrode with FET MOS3 after resistance R15 of resistance R12, N pole between drain electrode is connected, P
Diode D6, P pole ground connection that pole drain electrode with FET MOS5 after resistance R16 is connected, N pole
Zener diode D7, the P pole being connected with the P pole of diode D6 after resistance R17 and FET
The diode D5 that the drain electrode of MOS5 is connected, N pole is connected with the output of amplifier P3, one end with
The output of amplifier P2 is connected, the other end then after resistance R14 output with amplifier P3 be connected
The resistance R13 connect, and N pole is connected with the negative pole of amplifier P2, P pole and FET MOS4
The diode D4 composition that grid is connected；The grid of described FET MOS3 and the output of amplifier P1
End is connected, its source electrode then output with amplifier P2 is connected；The positive pole conduct of described amplifier P2
The input of this pulse shaper is also sequentially connected through resistance R2 positive pole with electric capacity C1 after resistance R1
Connect；The source electrode of described FET MOS4 is connected with the tie point of resistance R13 and resistance R14, its leakage
Pole then output with amplifier P3 is connected；The output of described amplifier P3 and the equal ground connection of negative pole, its
Positive pole then grid with FET MOS5 is connected；The source ground of described FET MOS5；Institute
State the P pole of diode D6 as the output of this pulse shaper and with the TRIG pin of driving chip U
It is connected.
Described filter circuit is connected by the positive pole of one end with electric capacity C1, the other end after resistance R4 with driving
Resistance R3, the N pole that the RE pin of chip U is connected is connected with the positive pole of electric capacity C1, P pole is through electric capacity
The diode D1 of ground connection after C2, and it is serially connected in the positive pole of electric capacity C1 and the VCC pin of driving chip U
Between resistance R5 composition；The N pole of described diode D1 also after resistance R6 with the positive pole of electric capacity C5
It is connected.
Described gate switch trigger circuit by FET MOS1, FET MOS2, triode VT1,
The drain electrode with FET MOS1 after resistance R9 of P pole is connected, N pole after inductance L with base bias
Zener diode D3, P pole ground connection that the output of circuit is connected, N pole after resistance R8 with voltage stabilizing two pole
The Zener diode D2 that the N pole of pipe D3 is connected, negative pole is connected with the P pole of Zener diode D2,
The P pole of the electric capacity C4 that positive pole is connected with the grid of FET MOS1, positive pole and Zener diode D3
Be connected, electric capacity C6 that negative pole is connected with the colelctor electrode of triode VT1, be serially connected in triode VT1's
Resistance R11 between the source electrode of emitter stage and FET MOS2, and one end and FET MOS2
Source electrode be connected, the resistance R10 of other end ground connection composition；The grid of described FET MOS2 with drive
The OUT pin of dynamic chip U is connected, its drain electrode then base stage with triode VT1 is connected；Described three
The base stage of pole pipe VT1 is connected with the source electrode of FET MOS1, its colelctor electrode then with Zener diode
The N pole of D3 is collectively forming this gate switch and triggers the output of circuit.
Described driving chip U is the integrated chip of NE555.
The present invention compared with the prior art, has the following advantages and beneficial effect:
(1) present invention uses the integrated chip of NE555 to combine novel peripheral circuit, and it can eliminate electric current
Phase difference, reduces the generation of high-frequency self-excitation, improves the noise reduction capability of the present invention, thus reduce the present invention
The current noise operationally produced.
(2) waveform of input current can be adjusted by the present invention, prevents it from occurring during work
Fluctuation, so can improve the stability of the present invention greatly.
(3) electric current of input can be processed by the present invention, makes electric current more stable, greatly improves
The illuminating effect of LED.
Accompanying drawing explanation
Fig. 1 is the overall structure schematic diagram of the present invention.
Fig. 2 is the structure chart of the pulse shaper of the present invention.
Fig. 3 is the structure chart of the base bias circuit of the present invention.
Detailed description of the invention
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not
It is limited to this.
Embodiment
As it is shown in figure 1, the present invention is mainly by driving chip U, electric capacity C1, resistance R1, resistance R2, electricity
Resistance R7, electric capacity C3, electric capacity C5, resistance R6, base bias circuit, pulse shaper, filter circuit
And gate switch triggers circuit composition.
During connection, pulse shaper is connected with the TRIG pin of driving chip U, the negative pole of electric capacity C1
Ground connection, its positive pole are sequentially connected with pulse shaper after resistance R2 through resistance R1.Filter circuit string
It is connected between the positive pole of electric capacity C1 and driving chip U.The positive pole of electric capacity C5 after resistance R6 with filtered electrical
Road is connected, its minus earth.The positive pole of electric capacity C3 is connected with the CONT pin of driving chip U,
Its negative pole negative pole with electric capacity C5 after resistance R7 is connected.Base bias circuit and the positive pole of electric capacity C1
It is connected.Gate switch trigger circuit be then serially connected in the OUT pin of driving chip U and base bias circuit it
Between.The RE pin of described driving chip U is all connected with filter circuit with VCC pin, its DIS pin
With THRE pin and OUT pin all positive pole with electric capacity C5 be connected, its GND pin then with electricity
The negative pole holding C5 is connected.The positive pole of described electric capacity C1 connects input power.In order to preferably implement the present invention,
The described driving chip U integrated chip of preferred NE555 realizes.
Wherein, described filtered electrical routing resistance R3, resistance R4, resistance R5, diode D1 and electric capacity
C2 forms.
During connection, one end of resistance R3 is connected with the positive pole of electric capacity C1, its other end is after resistance R4
It is connected with the RE pin of driving chip U.The N pole of diode D1 is connected with the positive pole of electric capacity C1,
Its P pole is connected with the negative pole of electric capacity C2；The plus earth of described electric capacity C2.String resistance R5 is connected on electricity
Hold between positive pole and the VCC pin of driving chip U of C1.The N pole of described diode D1 is also through resistance
After R6, the positive pole with electric capacity C5 is connected.
It addition, this gate switch triggers circuit by FET MOS1, FET MOS2, triode
VT1, inductance L, resistance R8, resistance R9, resistance R10, resistance R11, electric capacity 4, electric capacity C6, surely
Pressure diode D2 and Zener diode D3 composition.
Wherein, the drain electrode with FET MOS1 after resistance R9 of the P pole of Zener diode D3 be connected,
Its N pole output with base bias circuit after inductance L is connected.The P pole of Zener diode D2 connects
Ground, its N pole N pole with Zener diode D3 after resistance R8 is connected.The negative pole of electric capacity C4 is with steady
The P pole of pressure diode D2 is connected, its positive pole is connected with the grid of FET MOS1.Electric capacity C6
Positive pole be connected with the P pole of Zener diode D3, its negative pole is connected with the colelctor electrode of triode VT1.
Resistance R11 is serially connected between the emitter stage of triode VT1 and the source electrode of FET MOS2.Resistance R10
One end be connected with the source electrode of FET MOS2, its other end ground connection.
Meanwhile, the grid of described FET MOS2 be connected with the OUT pin of driving chip U, its
Drain electrode then base stage with triode VT1 is connected.The base stage of described triode VT1 and FET MOS1
Source electrode be connected, its colelctor electrode then N pole with Zener diode D3 is collectively forming this gate switch and triggers
The output of circuit, this gate switch triggers the output termination LED of circuit.
As in figure 2 it is shown, described pulse shaper is imitated by amplifier P1, amplifier P2, amplifier P3, field
Should pipe MOS3, FET MOD4, FET MOS5, resistance R12, resistance R13, resistance
R14, resistance R15, resistance R16, resistance R17, electric capacity C7, diode D4, diode D5, two poles
Pipe D6 and Zener diode D7 composition.
During connection, the positive pole of electric capacity C7 is connected with the negative pole of amplifier P1, its negative pole and amplifier P2
Positive pole is connected.Resistance R12 is serially connected between the positive pole of amplifier P1 and the drain electrode of FET MOS3.
The drain electrode with FET MOS3 after resistance R15 of the N pole of diode D6 is connected, its P pole is through electricity
It is connected with the drain electrode of FET MOS5 after resistance R16.The P pole ground connection of Zener diode D7, its N
P pole with diode D6 after resistance R17, pole is connected.The P pole of diode D5 and FET MOS5
Drain electrode be connected, its N pole is connected with the output of amplifier P3.One end of resistance R13 and amplification
The output of device P2 is connected, its other end then after resistance R14 output with amplifier P3 be connected.
The N pole of diode D4 is connected with the negative pole of amplifier P2, the grid of its P pole and FET MOS4
It is connected.
The grid of described FET MOS3 is connected with the output of amplifier P1, its source electrode then with amplification
The output of device P2 is connected.The positive pole of described amplifier P2 as this pulse shaper input also
Sequentially it is connected through resistance R2 positive pole with electric capacity C1 after resistance R1.Described FET MOS4's
Source electrode is connected with the tie point of resistance R13 and resistance R14, its drain electrode then with the output phase of amplifier P3
Connect.The output of described amplifier P3 and the equal ground connection of negative pole, its positive pole then with the grid of FET MOS5
Pole is connected.The source ground of described FET MOS5；The P pole of described diode D6 is as this arteries and veins
Rush the output of shaping circuit and be connected with the TRIG pin of driving chip U.
As it is shown on figure 3, this base bias circuit is by amplifier P4, triode VT2, triode VT3, three
Pole pipe VT4, resistance R18, resistance R19, resistance R20, potentiometer R21, resistance R22, resistance R23,
Resistance R24, electric capacity C8, electric capacity C9, electric capacity C10, diode D8, diode D9 and diode
D10 forms.
During connection, the negative pole of electric capacity C8 is connected with the negative pole of amplifier P4, its positive pole is then as this base stage
The input of biasing circuit is also connected with the positive pole of electric capacity C1.The positive pole of electric capacity C9 is negative with amplifier P4's
Pole is connected, its minus earth.Resistance R18 is in parallel with electric capacity C9.One end of resistance R19 and electric capacity
The positive pole of C9 is connected, its other end colelctor electrode with triode VT2 after resistance R20 is connected.Two poles
The P4 pole of pipe D8 is connected with the positive pole of amplifier P4, its N pole then base stage with triode VT2 is connected
Connect.The N pole of diode D9 is connected with the output of amplifier P4, its P4 pole is after potentiometer R21
It is connected with the colelctor electrode of triode VT2.The P4 pole of diode D10 is connected with the output of amplifier P4
Connect, its N pole is connected with the base stage of triode VT3.The positive pole of electric capacity C10 is sent out with triode VT4's
Emitter-base bandgap grading is connected, its negative pole base stage with triode VT3 after resistance R22 is connected.Resistance R23 concatenates
Between the emitter stage and the base stage of triode VT4 of triode VT2.One end of resistance R24 and triode
Ground connection while the emitter stage of VT3 is connected, its other end is connected with the negative pole of electric capacity C10.
Meanwhile, the base stage of described triode VT2 be connected with the control end of potentiometer R21, its emitter stage then
It is connected with the colelctor electrode of triode VT4.The colelctor electrode of described triode VT4 forms this base bias circuit
Output and after inductance L N pole with Zener diode D3 be connected, its base stage then with triode VT3
Colelctor electrode be connected.
The present invention uses the integrated chip of NE555 to combine novel peripheral circuit, and it can eliminate the phase place of electric current
Difference, reduces the generation of high-frequency self-excitation, improves the noise reduction capability of the present invention, thus reduce the present invention in work
The current noise produced when making.Meanwhile, after electric current input is come in, it is also possible to the waveform of electric current is adjusted
Whole, prevent it from fluctuation occurring during work, so can improve the stability of the present invention greatly,
Thus improve the illuminating effect of LED.
As it has been described above, just can well realize the present invention.
Claims (6)
1. a voltage regulation type white light LEDs noise reduction drive system based on pulse shaper, it is characterised in that
Main by driving chip U, the pulse shaper being connected with the TRIG pin of driving chip U, negative pole
The electric capacity C1 that ground connection, positive pole are sequentially connected with pulse shaper after resistance R2 through resistance R1, concatenation
Filter circuit between the positive pole and driving chip U of electric capacity C1, positive pole after resistance R6 with filter circuit
Be connected, the electric capacity C5 of minus earth, positive pole is connected with the CONT pin of driving chip U, negative pole warp
The electric capacity C3 that after resistance R7, negative pole with electric capacity C5 is connected, the base stage being connected with the positive pole of electric capacity C1
Biasing circuit, and it is serially connected in the gate switch between OUT pin and the base bias circuit of driving chip U
Triggering circuit forms；The RE pin of described driving chip U is all connected with filter circuit with VCC pin,
Its DIS pin and THRE pin and OUT pin all positive poles with electric capacity C5 are connected, its GND
Pin then negative pole with electric capacity C5 is connected.
A kind of voltage regulation type white light LEDs noise reduction based on pulse shaper the most according to claim 1
Drive system, it is characterised in that described base bias circuit is by amplifier P4, triode VT2, triode
VT3, triode VT4, negative pole is connected with the negative pole of amplifier P4, positive pole is then electric as this base bias
The electric capacity C8 of the input on road, positive pole is connected with the negative pole of amplifier P4, the electric capacity C9 of minus earth,
The resistance R18 being in parallel with electric capacity C9, one end is connected with the positive pole of electric capacity C9, the other end is through resistance R20
Resistance R19, the P4 pole that colelctor electrode with triode VT2 is connected afterwards is connected with the positive pole of amplifier P4,
The output phase of diode D8, the N pole that N pole then base stage with triode VT2 is connected and amplifier P4
Connect, diode D9, P4 pole that P4 pole colelctor electrode with triode VT2 after potentiometer R21 is connected
Be connected with the output of amplifier P4, diode D10 that N pole is connected with the base stage of triode VT3,
Positive pole is connected with the emitter stage of triode VT4, negative pole after resistance R22 with the base stage phase of triode VT3
The electric capacity C10 connected, is serially connected in the resistance between the emitter stage of triode VT2 and the base stage of triode VT4
R23, one end is connected with the emitter stage of triode VT3, the other end is connected with the negative pole of electric capacity C10
The resistance R24 composition of ground connection simultaneously；The base stage of described triode VT2 is connected with the control end of potentiometer R21
Connect, its emitter stage then colelctor electrode with triode VT4 is connected；The colelctor electrode of described triode VT4 is formed
The output of this base bias circuit and trigger with gate switch circuit be connected, its base stage then with triode
The colelctor electrode of VT3 is connected；The input of described base bias circuit is connected with the positive pole of electric capacity C1.
A kind of voltage regulation type white light LEDs noise reduction based on pulse shaper the most according to claim 2
Drive system, it is characterised in that described pulse shaper is by amplifier P1, amplifier P2, amplifier
P3, FET MOS3, FET MOD4, FET MOS5, positive pole is with amplifier P1's
The electric capacity C7 that negative pole is connected, negative pole is connected with the positive pole of amplifier P2, is just being serially connected in amplifier P1
Resistance R12, N pole between the drain electrode of pole and FET MOS3 after resistance R15 with FET
The drain electrode of MOS3 is connected, the drain electrode with FET MOS5 after resistance R16 of P pole is connected two
Pole pipe D6, voltage stabilizing two pole that P pole ground connection, N pole are connected with the P pole of diode D6 after resistance R17
Pipe D7, P pole is connected with the drain electrode of FET MOS5, N pole is connected with the output of amplifier P3
The diode D5 connect, one end is connected with the output of amplifier P2, the other end then after resistance R14 with
The resistance R13 that the output of amplifier P3 is connected, and N pole is connected with the negative pole of amplifier P2, P
The diode D4 composition that pole is connected with the grid of FET MOS4；Described FET MOS3's
Grid is connected with the output of amplifier P1, its source electrode then output with amplifier P2 is connected；Institute
State the positive pole of amplifier P2 as the input of this pulse shaper and sequentially through resistance R2 and resistance R1
Positive pole with electric capacity C1 is connected afterwards；The source electrode of described FET MOS4 and resistance R13 and resistance R14
Tie point be connected, its drain electrode then output with amplifier P3 is connected；Described amplifier P3's is defeated
Go out end ground connection equal with negative pole, its positive pole grid then with FET MOS5 to be connected；Described FET
The source ground of MOS5；The P pole of described diode D6 as this pulse shaper output and with drive
The TRIG pin of dynamic chip U is connected.
A kind of voltage regulation type white light LEDs noise reduction based on pulse shaper the most according to claim 3
Drive system, it is characterised in that described filter circuit is connected by the positive pole of one end with electric capacity C1, the other end
Resistance R3, the N pole being connected with the RE pin of driving chip U after resistance R4 and the positive pole of electric capacity C1
Be connected, P pole diode D1 of ground connection after electric capacity C2, and be serially connected in positive pole and the driving of electric capacity C1
Resistance R5 composition between the VCC pin of chip U；The N pole of described diode D1 is also through resistance R6
Positive pole with electric capacity C5 is connected afterwards.
A kind of voltage regulation type white light LEDs noise reduction based on pulse shaper the most according to claim 4
Drive system, it is characterised in that described gate switch triggers circuit by FET MOS1, FET
MOS2, the drain electrode with FET MOS1 after resistance R9 of triode VT1, P pole is connected, N pole
Zener diode D3, the P pole ground connection that is connected with the output of base bias circuit after inductance L, N pole
The Zener diode D2 being connected with the N pole of Zener diode D3 after resistance R8, negative pole and voltage stabilizing two
The electric capacity C4 that the P pole of pole pipe D2 is connected, positive pole is connected with the grid of FET MOS1, positive pole
Be connected with the P pole of Zener diode D3, electric capacity C6 that negative pole is connected with the colelctor electrode of triode VT1,
The resistance R11, Yi Jiyi being serially connected between the emitter stage of triode VT1 and the source electrode of FET MOS2
End is connected with the source electrode of FET MOS2, the resistance R10 of other end ground connection composition；Described field-effect
The grid of pipe MOS2 is connected with the OUT pin of driving chip U, it drains then with triode VT1's
Base stage is connected；The base stage of described triode VT1 is connected with the source electrode of FET MOS1, its current collection
Then N pole with Zener diode D3, pole is collectively forming this gate switch and triggers the output of circuit.
A kind of voltage regulation type white light LEDs noise reduction based on pulse shaper the most according to claim 5
Drive system, it is characterised in that described driving chip U is the integrated chip of NE555.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610380696.4A CN105873295A (en) | 2016-05-31 | 2016-05-31 | Voltage-stabilizing type white LED denoising driving system based on pulse shaping circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610380696.4A CN105873295A (en) | 2016-05-31 | 2016-05-31 | Voltage-stabilizing type white LED denoising driving system based on pulse shaping circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105873295A true CN105873295A (en) | 2016-08-17 |
Family
ID=56675615
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610380696.4A Pending CN105873295A (en) | 2016-05-31 | 2016-05-31 | Voltage-stabilizing type white LED denoising driving system based on pulse shaping circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105873295A (en) |
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2016
- 2016-05-31 CN CN201610380696.4A patent/CN105873295A/en active Pending
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Application publication date: 20160817 |
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| WD01 | Invention patent application deemed withdrawn after publication |