CN105872346A - FPGA-based electronic image stabilization system - Google Patents
FPGA-based electronic image stabilization system Download PDFInfo
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- CN105872346A CN105872346A CN201510028849.4A CN201510028849A CN105872346A CN 105872346 A CN105872346 A CN 105872346A CN 201510028849 A CN201510028849 A CN 201510028849A CN 105872346 A CN105872346 A CN 105872346A
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Abstract
The invention discloses an FPGA-based electronic image stabilization system, which comprises a bottom-layer data flow architecture built by the FPGA and an external frame memory and an image stabilization processing subsystem, wherein the bottom-layer data flow architecture is used for decoding video data to extract effective image data and cache the data, ping-pong operation is adopted to control the image data flow of the overall system, the cached image data are provided for the image stabilization processing subsystem, and parameters obtained by using the image stabilization processing subsystem for processing are used for building a motion compensation frame and outputting the frame; and the image stabilization processing subsystem calculates the motion compensation parameters for the current frame with the inputted image data and transmits the parameters to the bottom-layer data flow architecture. Based on the design of the invention, the FPGA can be used for realizing electronic image stabilization based on feature matching, and real-time requirements are achieved.
Description
Technical field
The invention belongs to technical field of image processing, be specifically related to a kind of electronic steady image system based on FPGA.
Background technology
Electronic image stabilizing, can be effectively from video sequence as a kind of important video enhancement techniques
Except the image disturbances introduced because platform for video camera is unstable, thus improve stability and the definition of video,
Through being widely applied in military field and civil equipment.
Conventional electronic image stabilization method can be divided into electricity based on characteristics of image according to the difference of method for estimating
Sub-digital image stabilization method and electronic image stabilization method based on half-tone information.Wherein, digital image stabilization method based on characteristics of image
By extracting characteristic point in frame, and the characteristic point of consecutive frame is mated the kinematic parameter estimating video camera,
And then image is carried out motion compensation.The method precision is higher, can effectively remove the translation in video and rotation
Turn shake, and then be widely adopted, but relative complex owing to calculating process, it is difficult to hardware real-time implementation.
Utilize FPGA to carry out Computer Vision, the parallel and advantage of streamline calculating can be given full play to,
Solve complicated computation-intensive computing, provide a kind of effective solution for real time video processing.
Summary of the invention
The present invention is the problem being difficult to hardware real-time implementation in order to solve the Video stabilization of existing feature based coupling,
And a kind of electronic steady image system based on FPGA is proposed.
Realize technical scheme as follows:
A kind of electronic steady image system based on FPGA, including the end built by FPGA and external frame memory
Layer data flowing water framework and steady picture processing subsystem two parts form；
Bottom data flowing water framework, for being decoded extracting effective view data and caching to video data,
Ping-pong operation is used to control the image data stream of whole system, and to surely being cached as processing subsystem provides
View data, utilizes surely as processing subsystem processes the parametric configuration movement compensating frame output obtained；
Steady as processing subsystem, the motion compensation parameters of the present frame of calculating input image data, and passed
It is defeated by bottom data flowing water framework.
There is advantages that
1) design based on the present invention, it is possible to use FPGA realizes the electronic steady image of feature based coupling, reach real
The requirement of time property.
2) utilize FPGA and a small amount of peripheral components, can complete to build the real-time image stabilization system of miniaturization of low-power consumption,
Application prospect is extensive.
3) feature extraction, characteristic matching and three modules of action reference variable are run with pipeline mode, fully send out
Wave the advantage of FPGA parallel processing, it is ensured that the real-time of process.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of electronic steady image system based on FPGA；
Fig. 2 is bottom data flowing water block architecture diagram；
Fig. 3 is characterized extraction module block diagram；
Fig. 4 is characterized matching module block diagram；
Fig. 5 is action reference variable module frame chart；
Fig. 6 is kinematic parameter accumulation and filtration module block diagram.
Detailed description of the invention
The present invention is described in detail with instantiation below in conjunction with the accompanying drawings.
As it is shown in figure 1, a kind of electronic steady image system based on FPGA of the present invention, including by FPGA and outside
The bottom data flowing water framework that frame memory builds and steady picture processing subsystem.
Bottom data flowing water framework, for being decoded extracting effective view data and caching to video data,
Ping-pong operation is used to control the image data stream of whole system, and to surely being cached as processing subsystem provides
View data, utilizes surely as processing subsystem processes the parametric configuration movement compensating frame output obtained.
Steady as processing subsystem, the motion compensation parameters of the present frame of calculating input image data, and passed
It is defeated by bottom data flowing water framework.
As in figure 2 it is shown, bottom data flowing water framework of the present invention is mainly by video decoding sub-module, input
Video write submodule, incoming frame read submodule, present frame writes submodule, address produces submodule,
Compensate frame and read submodule, output frame write submodule, output video reading submodule, Video coding submodule
Block, external storage controller, external memory bus arbitration submodule, input-buffer, output caching, reference
Frame buffer and present frame caching composition；Input-buffer, output caching, reference frame caching and present frame caching by
External frame memory realizes；It utilizes external frame memory to carry out image storage, uses ping-pong operation to carry out defeated
Enter output caching, and to surely providing effective view data to process as processing module, then utilization processes
Result tectonic movement compensates frame output.Particularly as follows:
Video decoding sub-module, is decoded the video data of input, extracts effective view data conduct
Incoming frame is written in input-buffer by input video write submodule.
Incoming frame reads submodule, reads the incoming frame cached, and be transmitted to steady from input-buffer
As processing subsystem, meanwhile, by present frame write submodule, reference frame image is write in reference frame caching,
In remaining two field picture write present frame being cached by present frame write submodule；Wherein reference frame is from input
A wherein frame selected in frame.
Address produces submodule, according to steady as the motion compensation parameters tectonic movement compensation of processing subsystem output
Frame, and calculate the address data memory of each point in movement compensating frame, produce an address queue.
Compensate frame and read submodule, read each point data of movement compensating frame as defeated according to described address queue
Go out frame, and be written in output caching by output frame write submodule.
Output video reads submodule, the output frame cached is delivered to Video coding submodule and carries out video volume
Code output.
External memory bus arbitration submodule, utilizes the access priority of each submodule to carry out external frame memory
Bus assignment, generate read write command.
External storage controller, according to the read write command of external bus arbitration submodule, stores according to external frame
The timing requirements of device produces read-write, carries out data access.
Of the present invention steady realized by FPGA, including characteristic extracting module, characteristic matching mould as processing subsystem
Block, action reference variable module and kinematic parameter accumulation and filtration module；Feature extraction, characteristic matching, fortune
Dynamic parameter estimation module runs with pipeline mode, gives full play to the parallel processing advantage of FPGA, it is ensured that place
The real-time of reason.Particularly as follows:
Characteristic extracting module, for extracting the characteristic point of current frame image, and generates for the characteristic point extracted
Corresponding characteristic vector is transferred to characteristic matching module.
Characteristic matching module, for mating the characteristic vector of present frame and the carrying out of former frame, obtains coupling
Put to and be transferred to action reference variable module.
Action reference variable module, for according to matching double points, generates multiple transformation model, counts in choosing
The parameter of most transformation models, as interframe movement parameter, is then transmitted to kinematic parameter accumulation and filter
Mode block.
Kinematic parameter accumulation and filtration module, for accumulating interframe movement parameter, and filter described tired
High fdrequency component in long-pending motion transform parameter, calculates the motion compensation parameters of present frame, then by described motion
Compensating parameter is transferred to bottom data flowing water framework.
(1) characteristic extracting module
As it is shown on figure 3, characteristic extracting module of the present invention is mainly by data distribution sub module, feature spot check
Surveying submodule, characteristic point describes submodule and synthon module composition；It is responsible for extracting characteristic point also from present frame
Generate characteristic vector.
Data distribution sub module, carries out region caching to input image data, and by current neighborhood of a point data
Information distributes to feature point detection submodule parallel and characteristic point describes submodule；The coordinate calculating current point will
It is transferred to synthon module.
According to current neighborhood of a point data message, feature point detection submodule, judges whether current point is characterized a little,
Characteristic point flag transmission is generated to characteristic matching module according to the result judged.
Characteristic point describes submodule, generates corresponding feature description according to current neighborhood of a point data message, and
It is transferred to synthon module.
Synthon module, is transferred to spy according to the characteristic vector of the current point of the feature description received and coordinate synthesis
Levy matching module.
(2) characteristic matching module
As shown in Figure 4, characteristic matching module of the present invention is mainly by characteristic vector sub module stored, coupling
Controller and adapter composition；It is responsible for mating the characteristic vector of present frame with the carrying out of former frame, generation
Join a little to coordinate.
Characteristic vector sub module stored is made up of reference feature vector storage and present frame characteristic vector storage, uses
In receiving characteristic vector and the characteristic point mark that characteristic extracting module transmits, according to described characteristic point mark
Judge whether characteristic vector is stored, and store the characteristic vector set of former frame.
Matching controller, for not yet mating that store in characteristic vector sub module stored, present frame
Characteristic vector read, read-out characteristic vector is delivered to adapter.
By characteristic vector distance calculating sub module and coupling, adapter mainly differentiates that submodule forms；It is responsible for defeated
The characteristic vector to be matched entered finds out optimal coupling in the characteristic vector set of former frame.
Characteristic vector distance calculating sub module, the characteristic vector to be matched of storage input, deposit from characteristic vector
Storage submodule is successively read all characteristic vectors of former frame, and calculates characteristic vector to be matched and former frame
All characteristic vectors between distance, the minimum of recording distance and sub-minimum and corresponding to minimum range
Join a little to spatial information.
Coupling differentiates submodule, according to corresponding to the minimum of described distance and sub-minimum and minimum range
Join a little to spatial information, it is judged that whether the matching double points corresponding to minimum range is correct matching double points, raw
Become match flag and matching double points coordinate to action reference variable module.
In the present embodiment, coupling differentiates that the judgement of submodule is: by the minimum ratio with time small distance and default threshold
Value compares, it is judged that whether described ratio is less than predetermined threshold value.
Meanwhile, for the space coordinates (X, Y) comprised in spatial information and (X’,Y’), deflection R and R’,
Set up following two criterion:
First:
Second: | R-R ' | ＜ Threshold2
Wherein, Threshold1 denotation coordination threshold value, Threshold2 represents angle threshold；
If conditions above is satisfied by, then it is assumed that the matching double points corresponding to minimum range is correct coupling, generates
Represent the match flag position that the match is successful.
(3) action reference variable module
As it is shown in figure 5, action reference variable module of the present invention is mainly by matching double points sub module stored,
Transformation model generates submodule and module composition chosen by optimal mapping model；Be responsible for from matching double points set by
Secondary estimation transformation model statistics of counting in carrying out, choose the most transformation model parameter of interior point and transport as interframe
The best estimate of dynamic parameter.
Matching double points sub module stored, for receive matching double points coordinate that characteristic matching module transmits and
Match flag, and according to described match flag, matching double points coordinate is stored.
Transformation model generates submodule, for sitting from the matching double points being stored in matching double points sub module stored
Mark set carries out n time randomly selecting matching double points, utilizes matching double points Coordinate generation n chosen n time
Transformation model also stores.
Optimal mapping model is chosen point in module is mainly deposited submodule, n+1 by n+1 transformation model and is sentenced
Submodule composition is not chosen with statistics submodule and optimal mapping model；Wherein n+1 interior point differentiates and statistics
Submodule deposits submodule one_to_one corresponding with n+1 transformation model respectively.
Submodule deposited by transformation model, for generating n the conversion reading generation submodule from transformation model
Model also stores n transformation model and deposits in submodule, deposits in submodule with (n+1)th transformation model
The last optimal mapping model estimated of storage forms this n+1 candidate transformation model estimated together.
Interior differentiation and statistics submodule, it is judged that each matching double points in matching double points sub module stored is
The no interior point for corresponding candidate transformation model, counts interior quantity of each candidate transformation model.
Submodule chosen by optimal mapping model, selects what the most candidate transformation model of interior point was estimated as this
Optimal mapping model；Terminate at present frame matching process, the parameter of the optimal mapping model currently obtained is made
For optimal movement parameter estimation and be transferred to kinematic parameter accumulation and filtration module.
(4) kinematic parameter accumulation and filtration module
As shown in Figure 6, kinematic parameter of the present invention accumulation and filtration module are mainly by kinematic parameter accumulation submodule
With filtering submodule composition.
Kinematic parameter accumulation submodule, accumulates the optimal movement parameter received, and calculates present frame relative
Accumulation transformation parameter in reference frame.
Filtering submodule, for filtering the high fdrequency component in accumulation transformation parameter, the motion calculating present frame is mended
Repay parameter and export.
In sum, utilize a kind of based on FPGA electronic steady image system of the present invention, can be with real-time implementation
The electronic steady image of feature based coupling, based on FPGA and a small amount of peripheral components, can complete to build low-power consumption
The real-time image stabilization system of miniaturization, have wide range of applications.
Claims (7)
1. an electronic steady image system based on FPGA, it is characterised in that include by FPGA and external frame
Bottom data flowing water framework and steady picture processing subsystem two parts that memorizer builds form；
Bottom data flowing water framework, for being decoded extracting effective view data and caching to video data,
Ping-pong operation is used to control the image data stream of whole system, and to surely being cached as processing subsystem provides
View data, utilizes surely as processing subsystem processes the parametric configuration movement compensating frame output obtained；
Steady as processing subsystem, the motion compensation parameters of the present frame of calculating input image data, and passed
It is defeated by bottom data flowing water framework.
A kind of electronic steady image system based on FPGA, it is characterised in that institute
State surely as processing subsystem is realized by FPGA, including characteristic extracting module, characteristic matching module, motion ginseng
Number estimation module and kinematic parameter are accumulated and filtration module；
Characteristic extracting module, for extracting the characteristic point of current frame image, and generates for the characteristic point extracted
Corresponding characteristic vector is transferred to characteristic matching module；
Characteristic matching module, for mating the characteristic vector of present frame and the carrying out of former frame, obtains coupling
Put to and be transferred to action reference variable module；
Action reference variable module, for according to matching double points, generates multiple transformation model, counts in choosing
The parameter of most transformation models, as interframe movement parameter, is then transmitted to kinematic parameter accumulation and filter
Mode block；
Kinematic parameter accumulation and filtration module, for accumulating interframe movement parameter, and filter described tired
High fdrequency component in long-pending motion transform parameter, calculates the motion compensation parameters of present frame, then by described motion
Compensating parameter is transferred to bottom data flowing water framework.
A kind of electronic steady image system based on FPGA, it is characterised in that institute
State bottom data flowing water framework mainly to be read by video decoding sub-module, input video write submodule, incoming frame
Go out submodule, present frame write submodule, address produces submodule, compensation frame reads submodule, output frame
Write submodule, output video read submodule, Video coding submodule, external storage controller, outside
Storage bus arbitration submodule, input-buffer, output caching, reference frame caching and present frame caching composition；
Input-buffer, output caching, reference frame caching and present frame caching are realized by external frame memory；
Video decoding sub-module, is decoded the video data of input, extracts effective view data conduct
Incoming frame is written in input-buffer by input video write submodule；
Incoming frame reads submodule, reads the incoming frame cached, and be transmitted to steady from input-buffer
As processing subsystem, by present frame write submodule, reference frame image is write in reference frame caching, pass through
Present frame write submodule is by remaining two field picture write present frame caching；
Address produces submodule, according to steady as the motion compensation parameters tectonic movement compensation of processing subsystem output
Frame, and calculate the address data memory of each point in movement compensating frame, produce an address queue；
Compensate frame and read submodule, read each point data of movement compensating frame as defeated according to described address queue
Go out frame, and be written in output caching by output frame write submodule；
Output video reads submodule, the output frame cached is delivered to Video coding submodule and carries out video volume
Code output；
External memory bus arbitration submodule, utilizes the access priority of each submodule to carry out external frame memory
Bus assignment, generate read write command；
External storage controller, according to the read write command of external bus arbitration submodule, stores according to external frame
The timing requirements of device produces read-write, carries out data access.
A kind of electronic steady image system based on FPGA, it is characterised in that institute
Stating characteristic extracting module mainly by data distribution sub module, feature point detection submodule, characteristic point describes submodule
Block and synthon module composition；
Data distribution sub module, for carrying out region caching, and by current neighborhood of a point to input image data
Data message distributes to feature point detection submodule parallel and characteristic point describes submodule；Calculate the seat of current point
Mark is transmitted to synthon module；
According to current neighborhood of a point data message, feature point detection submodule, judges whether current point is characterized a little,
Characteristic point flag transmission is generated to characteristic matching module according to the result judged；
Characteristic point describes submodule, generates corresponding feature description according to current neighborhood of a point data message, and
It is transferred to synthon module；
Synthon module, is transferred to spy according to the characteristic vector of the current point of the feature description received and coordinate synthesis
Levy matching module.
A kind of electronic steady image system based on FPGA, it is characterised in that institute
State characteristic matching module mainly by characteristic vector sub module stored, matching controller and adapter composition；
Characteristic vector sub module stored, for receiving characteristic vector and the feature that characteristic extracting module transmits
Point mark, judges whether to store characteristic vector according to described characteristic point mark, and stores former frame
Characteristic vector set；
Matching controller, for not yet mating that store in characteristic vector sub module stored, present frame
Characteristic vector read, read-out characteristic vector is delivered to adapter；
By characteristic vector distance calculating sub module and coupling, adapter mainly differentiates that submodule forms；
Characteristic vector distance calculating sub module, the characteristic vector to be matched of storage input, deposit from characteristic vector
Storage submodule is successively read all characteristic vectors of former frame, and calculates characteristic vector to be matched and former frame
All characteristic vectors between distance, the minimum of recording distance and sub-minimum and corresponding to minimum range
Join a little to spatial information；
Coupling differentiates submodule, according to corresponding to the minimum of described distance and sub-minimum and minimum range
Join a little to spatial information, it is judged that whether the matching double points corresponding to minimum range is correct matching double points, raw
Become match flag and matching double points coordinate to action reference variable module.
A kind of electronic steady image system based on FPGA, it is characterised in that institute
Stating action reference variable module mainly by matching double points sub module stored, transformation model generates submodule with optimal
Module composition chosen by transformation model；
Matching double points sub module stored, for receive matching double points coordinate that characteristic matching module transmits and
Match flag, and according to described match flag, matching double points coordinate is stored；
Transformation model generates submodule, for carrying out n choosing at random from the matching double points coordinate set of storage
Take matching double points, utilize n the transformation model of matching double points Coordinate generation chosen n time and store；
Optimal mapping model is chosen point in module is mainly deposited submodule, n+1 by n+1 transformation model and is sentenced
Submodule composition is not chosen with statistics submodule and optimal mapping model；Wherein n+1 interior point differentiates and statistics
Submodule deposits submodule one_to_one corresponding with n+1 transformation model respectively；
Submodule deposited by transformation model, is used for reading n transformation model and storage is deposited to n transformation model
In submodule, deposit the last optimal mapping mould estimated of storage in submodule with (n+1)th transformation model
Type forms this n+1 candidate transformation model estimated together；
Interior differentiation and statistics submodule, it is judged that each matching double points in matching double points sub module stored is
The no interior point for corresponding candidate transformation model, counts interior quantity of each candidate transformation model；
Submodule chosen by optimal mapping model, selects what the most candidate transformation model of interior point was estimated as this
Optimal mapping model；Terminate at present frame matching process, the parameter of the optimal mapping model currently obtained is made
For optimal movement parameter estimation and be transferred to kinematic parameter accumulation and filtration module.
A kind of electronic steady image system based on FPGA, it is characterised in that institute
State kinematic parameter accumulation and filtration module is mainly made up of kinematic parameter accumulation submodule and filtering submodule；
Kinematic parameter accumulation submodule, accumulates the optimal movement parameter received, and calculates present frame relative
In the accumulation transformation parameter of reference frame and export；
Filtering submodule, for filtering the high fdrequency component in accumulation transformation parameter, the motion calculating present frame is mended
Repay parameter and export.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112182042A (en) * | 2020-10-12 | 2021-01-05 | 上海扬灵能源科技有限公司 | Point cloud feature matching method and system based on FPGA and path planning system |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101729763A (en) * | 2009-12-15 | 2010-06-09 | 中国科学院长春光学精密机械与物理研究所 | Electronic image stabilizing method for digital videos |
| CN104144282A (en) * | 2014-07-17 | 2014-11-12 | 西北工业大学 | Fast digital image stabilization method applicable to space robot visual system |
-
2015
- 2015-01-20 CN CN201510028849.4A patent/CN105872346A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101729763A (en) * | 2009-12-15 | 2010-06-09 | 中国科学院长春光学精密机械与物理研究所 | Electronic image stabilizing method for digital videos |
| CN104144282A (en) * | 2014-07-17 | 2014-11-12 | 西北工业大学 | Fast digital image stabilization method applicable to space robot visual system |
Non-Patent Citations (5)
| Title |
|---|
| 李俊: "基于FPGA电子稳像技术的研究", 《中国优秀硕士学位论文全文数据库》 * |
| 李刚: "基于FPGA的实时电子稳像", 《仪器仪表学报》 * |
| 杨亚飞: "基于FPGA的电子稳像系统设计", 《中国优秀硕士学位论文全文数据库》 * |
| 蔡耀仪: "基于FPGA的嵌入式稳像系统设计", 《湖南人文科技学院学报》 * |
| 许宏科等: "基于改进ORB的图像特征点匹配", 《科学技术与工程》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112182042A (en) * | 2020-10-12 | 2021-01-05 | 上海扬灵能源科技有限公司 | Point cloud feature matching method and system based on FPGA and path planning system |
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