CN105871505A - Multidimensional-code processing method and system, sending terminal and receiving terminal - Google Patents

Abstract

The invention discloses a multi-dimensional code processing method, a sending end, a receiving end and a system. The multi-dimensional code processing method includes: the sending end forms a multi-dimensional code with a dimension of 2*N according to an input information sequence; wherein, the N is The number of symbols that one said multi-dimensional code includes; one said multi-dimensional code includes N*k-1 information bits and 1 parity check bit; the sending end sends said multi-dimensional code; the receiving end receives said multi-dimensional code; the receiving end decodes adjusting the multi-dimensional code to obtain N*k-1 information bits in the multi-dimensional code.

Description

Multidimensional code processing method, sending end, receiving end and system

technical field

The invention relates to modulation and demodulation technology in the field of communication, in particular to a multi-dimensional code processing method, a sending end, a receiving end and a system.

Background technique

In coherent optical communication, the coherent optical receiver can detect all the information carried by the amplitude, phase, polarization state, and frequency of light, so coherent optical communication has a variety of optional modulation methods.

The traditional modulation format utilizes the amplitude and phase of the signal to form a variety of one-dimensional and two-dimensional modulation signal constellation diagrams. For higher-dimensional modulation, the existing method is based on the traditional one-dimensional or two-dimensional modulation by using the polarization state of light, signal pulse position, etc. to further expand the dimension of the signal space.

An existing multi-dimensional modulation method based on polarization state correlation is shown in Figure 1, each symbol carries k-bit information, and the symbols on the X polarization state are directly mapped by k-bit effective information (b ₁ b ₂ …b _k ) It is obtained that each symbol on the Y polarization state only carries k-1 bits of effective information (b ₁ 'b ₂ '…b _k-1 '), and the k-bit input on the X polarization state and the k-1 on the Y polarization state The k-th bit input of the symbol on the Y polarization state is obtained by performing a modular two-add operation on the bit input, so that the symbols on the two polarization states after mapping can be correlated with each other. After correlating the symbols on the two polarization states, a beam of signals is formed and sent to the receiving end. Apparently, when this method is used for signal modulation, the X polarization state and the Y polarization state have a polarization state correlation between the kth bit of each symbol in the Y polarization state and the X polarization state.

First of all, the multi-dimensional symbol is formed by using the polarization correlation between the X polarization state and the Y polarization state. When multi-dimensional expansion is performed, the modulation dimension can only be converted from a single polarization modulation dimension to a two-dimensional modulation, lacking in dimensional expansion. flexibility.

Secondly, in the prior art, after the receiving end receives the signal sent by the above-mentioned sending end, if the existing coherent demodulation is used, it will cause a polarization state correlation between the X polarization state and the Y polarization state, resulting in Recovery and demodulation failures occur during the splitting of the beam signal into two polarization states. Apparently, the existing coherent demodulation is not applicable to the above-mentioned multi-dimensional symbols formed by polarization state modulation.

Contents of the invention

In view of this, the embodiments of the present invention expect to provide a multi-dimensional code processing method, sending end, receiving end and system, so as to solve the problem that the dimension expansion of multi-dimensional code modulation is not flexible enough.

In order to achieve the above object, technical solution of the present invention is achieved in that way:

The first aspect of the embodiment of the present invention provides a multi-dimensional code processing method, the method comprising:

The sending end forms a multi-dimensional code with a dimension of 2*N according to the input information sequence; wherein, the N is the number of symbols included in one multi-dimensional code; one multi-dimensional code includes N*k-1 information bits and 1 Parity check bits; The k is the number of bits included in each of the symbols;

The sending end sends the multi-dimensional code;

The receiving end receives the multi-dimensional code;

The receiving end demodulates the multi-dimensional code, and obtains N*k-1 information bits in the multi-dimensional code.

Preferably,

The sending end forms a multi-dimensional code with a dimension of 2*N according to the input information sequence, including:

Get the input information sequence;

grouping the input information sequence to obtain a first group comprising N*k-1 information bits continuously distributed in the input information sequence;

Parity-check encoding is performed on each of the first packets to obtain a second packet including N*k bits; wherein, the N*k bits include 1-bit parity bits;

and sequentially mapping the second group into N symbols.

Preferably,

The receiving end demodulates the multi-dimensional code, and obtains N*k-1 information bits in the multi-dimensional code, including:

Sampling a received signal including at least one multidimensional code to obtain a sequence of samples;

grouping the sequence of samples to form a third group comprising N samples;

Demapping the N samples included in each of the third groups to obtain N*k bits; wherein, the N*k bits in the third group include a parity bit of 1 bit ; The k is the number of bits included in each of the symbols;

performing a parity check on the N*k bits to form a check result;

After the verification result is used to make a decision, the N*k-1 information bits in the multi-dimensional code are output.

The first and second aspects of the embodiments of the present invention provide a multi-dimensional code processing method, the method comprising:

According to the input information sequence, a multidimensional code with a dimension of 2*N is formed; wherein, said N is the number of symbols included in one said multidimensional code; one said multidimensional code includes N*k-1 information bits and 1 parity check bit; said k is the number of bits included in each said symbol;

Send the multidimensional code.

Preferably,

According to the input information sequence, forming a multi-dimensional code with a dimension of 2*N includes:

Get the input information sequence;

grouping the input information sequence to obtain a first group comprising N*k-1 information bits continuously distributed in the input information sequence;

Parity-check encoding is performed on each of the first packets to obtain a second packet including N*k bits; wherein, the N*k bits include 1-bit parity bits;

and sequentially mapping the second group into N symbols.

Preferably,

Performing parity-check coding on each of the first packets to obtain a second packet including N*k bits, including:

performing a modulo two summation operation on the bits in the first group to obtain the parity bits;

The parity bits are added to the first packet to form the second packet.

Preferably,

The method also includes:

associating the multidimensional code formed on the X polarization state with the multidimensional code formed on the Y polarization state to form a modulated signal;

Send the modulated signal.

Preferably,

The modulation signal is an optical signal;

The sending the modulated signal includes:

The optical signal is coupled into an optical signal channel.

The third aspect of the embodiment of the present invention provides a multi-dimensional code processing method, the method comprising:

The receiving end receives the multi-dimensional code; the dimension of the multi-dimensional code is 2*N; the N is the number of symbols included in one multi-dimensional code; one multi-dimensional code includes N*k-1 information bits and 1 Parity check bits; The k is the number of bits included in each of the symbols;

The receiving end demodulates the multi-dimensional code, and acquires the N*k-1 information bits in the multi-dimensional code.

Preferably,

The receiving end demodulates the multi-dimensional code, and obtains the N*k-1 information bits in the multi-dimensional code, including:

Sampling a received signal including at least one multidimensional code to obtain a sequence of samples;

grouping the sequence of samples to form a third group comprising N samples;

Demapping the N samples included in each of the third groups to obtain N*k bits; wherein, the N*k bits in the third group include a parity bit of 1 bit ;

performing a parity check on the N*k bits to form a check result;

After the verification result is used to make a decision, the N*k-1 information bits in the multi-dimensional code are output.

Preferably,

The parity check of the N*k bits is performed to form a check result, including:

Carrying out a modulo two addition operation on the first N*k-1 bits in the N*k bits to obtain an operation result;

When the operation result is consistent with the parity bits, it is confirmed that the verification is passed, otherwise the verification is not passed.

Preferably,

Before demapping the N samples included in each of the third groups, the method further includes:

Using the first Euclidean distance to judge the N samples in each of the third groups to form a judgment result;

The demapping the N samples included in each of the third groups includes:

Demapping is performed according to the decision result.

Preferably,

The method also includes:

When the verification fails, the N samples in each of the third groups are judged by using a second Euclidean distance; wherein, the first Euclidean distance is smaller than the second Euclidean distance.

Preferably,

The method also includes:

Before sampling the received signal and obtaining the sample value sequence, the received signal is divided into two received signals; one of the received signals is the received signal corresponding to the X polarization state; the other is the received signal corresponding to the Y polarization state state receiving signal.

The fourth aspect of the embodiment of the present invention provides a multi-dimensional code processing system, the system comprising:

The sending end is used to form a multidimensional code with a dimension of 2*N according to the input information sequence; wherein, the N is the number of symbols included in one said multidimensional code; one said multidimensional code includes N*k-1 information bits and 1 parity bit; and sending the multi-dimensional code; the k is the number of bits included in each symbol;

The receiving end is configured to receive the multi-dimensional code; and the receiving end demodulates the multi-dimensional code to obtain N*k-1 information bits in the multi-dimensional code.

Preferably,

The sending end is specifically used to obtain an input information sequence; group the input information sequence to obtain a first group including N*k-1 information bits continuously distributed in the input information sequence; Perform parity check encoding on the first group to obtain a second group comprising N*k bits; wherein, the N*k bits include a parity bit of 1 bit; and the second group is sequentially Maps to N symbols.

Preferably,

The receiving end is specifically configured to sample a received signal including at least one multidimensional code to obtain a sequence of samples; group the sequence of samples to form a third group including N samples; for each of the The N samples included in the third group are demapped to obtain N*k bits; wherein, the N*k bits in the third group include a parity bit of 1 bit; the N Perform parity check on *k bits to form a check result; after using the check result to make a judgment, output the N*k-1 information bits in the multi-dimensional code.

According to the fifth aspect of the embodiment of the present invention, a sending end is provided, and the sending end includes:

A modulation unit, configured to form a multi-dimensional code with a dimension of 2*N according to the input information sequence; wherein, the N is the number of symbols included in one multi-dimensional code; one multi-dimensional code includes N*k-1 information bits and 1 parity check bit; the k is the number of bits included in each symbol;

A sending unit, configured to send the multi-dimensional code.

Preferably,

The modulation unit includes:

An acquisition module, configured to acquire an input information sequence;

A first grouping module, configured to group the input information sequence to obtain a first group including N*k-1 information bits continuously distributed in the input information sequence;

A check encoding module, configured to perform parity check encoding on each of the first groups to obtain a second group comprising N*k bits; wherein, the N*k bits include 1 bit of parity test bit;

A mapping module, configured to sequentially map the second group into N symbols.

Preferably,

The check coding module is specifically configured to perform a modulo two summation operation on each bit in the first group to obtain the parity bits; and add the parity bits to the first group , forming the second group.

Preferably,

The device also includes:

an associating unit, configured to associate the multidimensional code formed on the X polarization state with the multidimensional code formed on the Y polarization state to form a modulated signal;

The sending unit is specifically configured to send the modulated signal.

According to the sixth aspect of the embodiments of the present invention, a receiving end is provided, and the receiving end includes:

A receiving unit, configured to receive the multidimensional code; wherein, the dimension of the multidimensional code is 2*N; the N is the number of symbols included in one multidimensional code; one multidimensional code includes N*k-1 Information bits and 1 parity check bit; said k is the number of bits included in each said symbol;

A demodulation unit, configured to demodulate the multi-dimensional code, and obtain N*k-1 information bits in the multi-dimensional code.

Preferably,

The demodulation unit includes:

A sampling module, configured to sample a received signal including at least one of the multi-dimensional codes to obtain a sequence of sample values;

The second grouping module is configured to group the sequence of samples to form a third group including N samples; wherein, the number of symbols of each multi-dimensional code represented by N;

A demapping module, configured to demap the N samples included in each of the third groups to obtain N*k bits; wherein, the N*k bits in the third group include 1 bit parity bits;

A check module, configured to perform parity check on the N*k bits;

An output module, configured to output the N*k-1 information bits in the multi-dimensional code after making a decision by using the verification result.

Preferably,

The verification module is specifically used to perform a modulo-two addition operation on the N*k-1 information bits in the N*k bits to obtain an operation result; and when the operation result and the parity bit If they are consistent, it is confirmed that the verification is passed, otherwise the verification is not passed.

Preferably,

The receiver also includes:

A judging module, configured to judge the N samples in each of the third groups using the first Euclidean distance before demapping the N samples included in each of the third groups , forming a judgment result;

The demapping module is specifically configured to perform demapping according to the decision result.

Preferably,

The judging module is further configured to judge the N samples in each of the third groups using a second Euclidean distance when the check fails; wherein the first Euclidean distance is smaller than the Second Euclidean distance.

Preferably,

The device also includes:

The separation unit is used to divide the received signal into two received signals before sampling the received signal to obtain the sample value sequence; wherein, one of the received signals is the received signal corresponding to the X polarization state; the other is the received signal corresponding to the Y polarization state.

The multi-dimensional code processing method, sending end, receiving end and system described in the embodiments of the present invention, when performing multi-dimensional code modulation, all carry parity check bits in each multi-dimensional code, so as to compare the parity between multi-dimensional codes For verification, the dimension of the multidimensional code is only determined by the number of symbols included in the multidimensional code, so that the flexible adjustment of the dimension expansion of the multidimensional code can be realized simply by adjusting the number of symbols included in each multidimensional code. At the same time, this method is used to modulate and solve multi-dimensional codes. It is applied to the multi-dimensional code modulation process of dual polarization states to form multi-dimensional codes on dual polarization states respectively. There is no correlation between the multi-dimensional codes of the two polarization states. , so that there is no polarization state correlation, so that the receiving end can use the existing technology for demodulation.

Description of drawings

Fig. 1 is a schematic flow chart of a four-dimensional code modulation method associated with a polarization state;

2 is a schematic flow chart of the first multi-dimensional code processing method described in the embodiment of the present invention;

Fig. 3 is a schematic flow chart of the second multi-dimensional code processing method described in the embodiment of the present invention;

Fig. 4 is a schematic flow chart of the third multi-dimensional code processing method described in the embodiment of the present invention;

FIG. 5 is a schematic flowchart of a multidimensional code modulation method according to an embodiment of the present invention;

FIG. 6 is a schematic flowchart of a third multidimensional code processing method described in an embodiment of the present invention;

FIG. 7 is a schematic flowchart of a multi-dimensional code demodulation method according to an embodiment of the present invention;

FIG. 8 is a schematic structural diagram of a multi-dimensional code processing system according to an embodiment of the present invention;

FIG. 9 is a schematic structural diagram of a sending end according to an embodiment of the present invention;

FIG. 10 is a schematic structural diagram of a modulation unit according to an embodiment of the present invention;

FIG. 11 is a schematic structural diagram of a receiving end according to an embodiment of the present invention;

FIG. 12 is a schematic structural diagram of a demodulation unit according to an embodiment of the present invention;

Fig. 13 is one of the schematic flowcharts of multi-dimensional code modulation and demodulation described in the example of the present invention;

Fig. 14 is the second schematic flowchart of multi-dimensional code modulation and demodulation described in the example of the present invention;

Fig. 15 is a schematic diagram of the effect of the multi-dimensional code processing described in the example of the present invention.

detailed description

The technical solutions of the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

Method embodiment one:

As shown in Figure 2, this embodiment provides a multi-dimensional code processing method, the method comprising:

Step S101: The sending end forms a multi-dimensional code with a dimension of 2*N according to the input information sequence; wherein, the N is the number of symbols included in one multi-dimensional code; one multi-dimensional code includes N*k-1 information bits and 1 parity check bit; the k is the number of bits included in each symbol;

Step S102: the sending end sends the multi-dimensional code;

Step S103: the receiving end receives the multi-dimensional code;

Step S104: The receiving end demodulates the multi-dimensional code, and obtains N*k-1 information bits in the multi-dimensional code.

In this embodiment, the multi-dimensional code formed by the sending end includes N*k bits; wherein, each multi-dimensional code includes a parity check bit, which can be used for the verification of the multi-dimensional code, so that there is no need to The data in the double polarization state are verified.

The multidimensional code modulation method described in this embodiment can be applied to single polarization state modulation, and can also be applied to multidimensional code processing of dual polarization states as described in the prior art; this method is used for multidimensional code processing of dual polarization states When , there will be no polarization state correlation between the formed multi-dimensional codes on each polarization state, so that the demodulation at the subsequent receiving end can be facilitated, and in this embodiment, the dimension of the multi-dimensional code can be realized by controlling the size of N flexible adjustment.

In the present embodiment, the dimension of one described multi-dimensional code is equal to 2*N; Because described symbol is complex symbol; Each described complex symbol comprises real part and imaginary part; And real part and imaginary part usually correspond to different Dimensions, so the dimension of one multi-dimensional code is 2*N. Obviously, the flexible control of the multi-dimensional code dimension can be realized by controlling the size of N in the modulation process.

Further, as shown in FIG. 3, the step S101 may include:

Step S310: Obtain an input information sequence;

Step S320: grouping the input information sequence to obtain a first group comprising N*k-1 information bits continuously distributed in the input information sequence;

Step S330: Perform parity check coding on each of the first packets to obtain a second packet including N*k bits; wherein, the N*k bits include 1 parity bit; usually The parity bit may be used as the last bit in the second packet;

Step S340: sequentially map the second group into N symbols.

The input information sequence is usually a 01 sequence representing a designated meaning; specifically, 0001010100. In step S320, the input information sequence is grouped sequentially. If the current input information sequence includes 16 bits; each of the first packets includes 4 bits; then 4 first packets will be formed; wherein, the first first packet includes the input information sequence The 0th bit to the 3rd bit; the second first packet includes the 4th bit to the 7th bit in the input information sequence. Here, the counting of each bit in the input information sequence starts from 0.

In this embodiment, each of the first groups includes N*k-1 information bits; wherein, the number of symbols that each multidimensional code represented by N includes; as when a multidimensional code includes two symbols, the N Equal to 2; k represents the number of bits included in each symbol.

This embodiment also includes step S330, which may specifically include performing a modulo two summation operation on each bit in the first group to obtain the parity bits; and adding the parity bits to the second In one group, the second group is formed. Using this method for parity-check coding has the advantage of being easy to implement.

The modulo two summation described in this embodiment is to perform an XOR operation on each bit in the first group. For example $1\⊕0\⊕1\⊕0=\mathrm{0,1}\⊕0\⊕1\⊕1=1.$ said is an exclusive OR operator.

In step S340, the second group is sequentially mapped into N symbols. Here, specifically, constellation mapping or gray mapping is performed to obtain a multi-dimensional code. In the usually formed multidimensional code, the first N*k-1 bits are the information bits, and the N*kth bit is the parity bit; this can facilitate subsequent receivers to distinguish information bits and parity bits .

This embodiment provides a specific method of how to execute step S101, which has the advantage of being simple and easy to implement.

As a further improvement of this embodiment, as shown in FIG. 3, the step S104 may include:

Step S350: Sampling the received signal including at least one multi-dimensional code to obtain a sequence of samples;

Step S360: grouping the sequence of samples to form a third group comprising N samples; wherein, N represents the number of symbols of each multi-dimensional code;

Step S370: Demap the N samples included in each third group to obtain N*k bits; wherein, the N*k bits in the third group include 1 bit of parity parity bit;

Step S380: performing a parity check on the N*k bits to form a check result;

Step S390: output the N*k-1 information bits in the multi-dimensional code after making a decision by using the verification result. When the parity bit is the last bit in the second group and the multidimensional code, then in step S390, output the first N*k-1 bits in the multidimensional code, that is, output the information bits.

In this embodiment, because each multi-dimensional code is all separately carried parity check bits, so when performing parity check, it is to carry out parity check to each multi-dimensional code; according to the parity check, the corresponding bit of the third group can be known Whether there is a problem in the process of information transmission or in the process of signal processing at the receiving end, and then take corresponding countermeasures to improve the probability of demodulating correct information bits in symbol judgment.

In step S390, it is judged whether the received signal is 1 or 0 according to the result of the parity check, and the information bits are output after the judgment.

Obviously, when signal demodulation is performed in this embodiment, it has the advantage of easy implementation, and the bits in any two multi-dimensional codes have no correlation, so there is no need to perform internal bit correlation processing between multi-dimensional codes, so that it can directly use The demodulation structure in the prior art performs the demodulation described above.

First, the embodiment of the present invention provides a method for processing multi-dimensional codes. The multi-dimensional codes formed by the multi-dimensional code processing method all individually include at least one parity bit, so that Check bits for multi-dimensional code verification, so that when it is applied to dual polarization state modulation, it will not cause the problem of joint verification of multi-dimensional codes on X polarization state and Y polarization state, so that it will not cause joint calibration in coherent reception. The problem of demodulation failure caused by the test.

Method embodiment two:

As shown in FIG. 4, this embodiment provides a multi-dimensional code modulation method. The method includes:

Step S110: According to the input information sequence, form a multi-dimensional code with a dimension of 2*N; wherein, the N is the number of symbols included in one multi-dimensional code; one multi-dimensional code includes N*k-1 information bits and 1 A parity check bit; Said k is the number of bits that each said symbol comprises;

Step S120: Send the multidimensional code.

The multi-dimensional code formed in this embodiment carries a parity bit, so that the receiving end can directly perform verification according to the parity bit carried by the multi-dimensional code itself, without obtaining the parity bit from other multi-dimensional codes or other information. check bits, so that the multi-dimensional code check can be easily realized.

As shown in Figure 5, the step S110 may specifically include:

Step S111: Obtain an input information sequence;

Step S112: grouping the input information sequence to obtain a first group comprising N*k-1 information bits continuously distributed in the input information sequence;

Step S113: performing parity check coding on each of the first packets to obtain a second packet including N*k bits; wherein, the N*k bits include 1 bit of parity;

Step S114: sequentially mapping the second group into N symbols;

The input information sequence is usually a 01 sequence representing a designated meaning; specifically, 0001010100.

In step S112, the input information sequence is grouped sequentially. If the current input information sequence includes 16 bits; each of the first packets includes 4 bits; then 4 first packets will be formed; wherein, the first first packet includes the input information sequence The 0th bit to the 3rd bit; the second first packet includes the 4th bit to the 7th bit in the input information sequence. Here, the counting of each bit in the input information sequence starts from 0.

In this embodiment, each of the first groups includes N*k-1 information bits; wherein, the number of symbols that each multidimensional code represented by N includes; as when a multidimensional code includes two symbols, the N Equal to 2; k represents the number of bits included in each symbol.

In this embodiment, step S113 is also included, performing parity-check coding on each of the first groups; a second group with one bit more than the first group will be formed; the second group is more than the first group. The extra bits are the parity check bits obtained by performing parity check on each bit in the first group.

In step S114, the second group is sequentially mapped into N symbols. Here, specifically, constellation mapping or Gray mapping is performed to obtain a multi-dimensional code.

The multi-dimensional code modulation method described in this embodiment can be applied to single polarization modulation, and can also be applied to dual polarization modulation as described in the prior art; when using this method for dual polarization modulation, each formed There is no polarization state correlation between the multi-dimensional codes on the polarization state, so that it is convenient for the subsequent receiving end to directly adopt the existing method for demodulation, thus having the advantage of good compatibility with the existing technology. And in this embodiment, the flexible adjustment of the dimension of the multi-dimensional code can be realized by controlling the size of N.

In the present embodiment, the dimension of one described multi-dimensional code is equal to 2*N; Because described symbol is complex symbol; Each described complex symbol comprises real part and imaginary part; And real part and imaginary part usually correspond to different Dimensions, so the dimension of one multi-dimensional code is 2*N. Obviously, the flexible control of the multi-dimensional code dimension can be realized by controlling the size of N in the modulation process.

Specifically, the step S113 may include: performing a modulo two summation operation on each bit in the first group to obtain the parity bits; and adding the parity bits to the first group , forming the second group. Using this method for parity-check coding has the advantage of being easy to implement.

The modulo two summation described in this embodiment is to perform an XOR operation on each bit in the first group. For example $1\⊕0\⊕1\⊕0=\mathrm{0,1}\⊕0\⊕1\⊕1=1.$ said is an exclusive OR operator.

The method described in this embodiment can be applied to single polarization state encoding, and can also be applied to dual polarization state encoding; when applied to dual polarization state encoding, the method further includes: forming the multi-dimensional code on the X polarization state and correlating the multi-dimensional code formed on the Y polarization state to form a modulated signal; and sending the modulated signal.

The formation of the multidimensional code on the X polarization state and the formation of the multidimensional code on the Y polarization state both adopt the above steps S110 to step S114; in order to realize the joint modulation of the polarization state, in this embodiment, the multidimensional codes on the two polarization states are also associated , to get a modulated signal to improve transmission efficiency. Obviously, in this embodiment, the bit configuration of the specific multi-dimensional code in the X polarization state and the Y polarization state has no correlation with each other, that is, there is no polarization correlation between the X polarization state and the Y polarization state, so the existing The coherent receiving structure separates one signal into two polarization states, and has strong compatibility with the prior art.

Further, the modulation signal is an optical signal; the sending the modulation signal includes: coupling the optical signal into an optical signal channel. The optical signal channel is specifically, for example, an optical signal channel formed by an optical fiber.

The multi-dimensional code modulation method described in this embodiment can be applied to various types of communication, and is especially suitable for optical fiber communication.

Method embodiment three:

As shown in Figure 6, this embodiment provides a multi-dimensional code demodulation method, the method comprising:

Step S210: Receive the multi-dimensional code; the dimension of the multi-dimensional code is 2*N; the N is the number of symbols included in one multi-dimensional code; one multi-dimensional code includes N*k-1 information bits and 1 A parity check bit; Said k is the number of bits that each said symbol comprises;

Step S220: Demodulate the multi-dimensional code to obtain the N*k-1 information bits in the multi-dimensional code.

The multi-dimensional code received in this embodiment is also written to the multi-dimensional code of the parity code at the same time, so that the multi-dimensional code itself can be verified, thus having the advantage of simple verification.

This method is usually applied in pairs or in sets with the multi-dimensional code modulation method in Method Embodiment 2.

As shown in Figure 7, the step S220 may include:

Step S221: Sampling the received signal to obtain a sequence of sample values;

Step S222: grouping the sequence of samples to form a third group including N samples;

Step S223: Demap the N samples included in each of the third groups to obtain N*k bits; wherein, the N*k bits in the third group include 1 bit of parity parity bit; usually the parity bit is the last bit in the N*k bits.

Step S224: performing a parity check on the N*k bits to form a check result;

Step S225: output the N*k-1 information bits in the multi-dimensional code after making a judgment by using the verification result.

How to perform sampling and form a sampling sequence in step S211 can refer to the prior art, and will not be described in detail here.

The third group formed in step S222 includes N samples; here, each sample corresponds to a symbol in Method Embodiment 1; each sample includes k bits.

The demapping in step S223 is related to the symbol mapping method in the second method embodiment, which is usually pre-negotiated between the receiving end and the sending end or determined based on a certain communication protocol. For details on how to perform demapping, please refer to various aspects in the prior art. There are two ways of demapping, which will not be introduced in detail here.

In this embodiment, because each multi-dimensional code is all separately carried parity check bits, so when performing parity check, it is to carry out parity check to each multi-dimensional code; according to the parity check, the corresponding bit of the third group can be known Whether there is a problem during the transmission of the information or in the signal processing process of the receiving end, if there is a problem, it will enter the abnormal processing process, specifically if there are a large number of errors, whether to request retransmission or rewriting for certain signal processing at the receiving end.

When the verification is performed based on the parity bits, a verification result is formed; the verification result provides a basis for subsequent symbol judgment, so as to improve the probability of demodulating correct information bits.

Obviously, when signal demodulation is performed in this embodiment, it has the advantage of easy implementation, and the bits in any two multi-dimensional codes have no correlation, so there is no need to perform internal bit correlation processing between multi-dimensional codes, so that it can directly use The demodulation structure in the prior art performs the demodulation described above.

Further, the step S224 may include: performing a modulo two addition operation on the N*k-1 information bits in the N*k bits to obtain an operation result; and when the operation result is consistent with the parity bit , confirm that the verification passes, otherwise the verification fails. Usually, the information bits are the first N*k bits among the N*k bits.

There are many ways to perform parity check coding in the method embodiment 2, wherein the addition of modulo 2 to each bit in the first group is one of them, so when performing check in this embodiment, the third The N*k-1 information bits in the packet are subjected to modulo two addition operation, and the result is compared with the parity check bits to realize the parity check; this method has the advantage of simple implementation.

In a specific implementation, before performing step S223, the method also includes:

Using the first Euclidean distance to judge the N samples in each of the third groups to form a judgment result;

The demapping the N samples included in each of the third groups includes:

Demapping is performed according to the decision result.

Here, each sample value corresponds to a point on the coordinate system; the ideal point is also included in the coordinate system; firstly, the Euclidean distance between the sample value and the ideal point is calculated; the calculated Euclidean distance and the preset first Euclidean distance A comparison is made to determine the sequence corresponding to each sample value.

In this embodiment, the first Euclidean distance is used for judgment; during demapping, demapping is performed according to the judgment result. During the judgment process, problems such as signal fading may lead to inaccurate judgment results, which in turn will lead to inconsistencies in subsequent parity checks.

For the above problems, the method described in this embodiment also includes:

When the verification fails, the N samples in each of the third groups are judged by using a second Euclidean distance; wherein, the first Euclidean distance is smaller than the second Euclidean distance.

The second Euclidean distance is greater than the first Euclidean distance, and the judgment is made with the second Euclidean distance, and the judgment obtained may be different from the judgment result obtained by using the first Euclidean distance, and the judgment result obtained according to the second distance may enter step S224 and S225 again. Obtain correct demodulation information; this processing method can increase the demodulation accuracy rate and reduce retransmission and other problems.

In this embodiment, the signal received by the receiving end may be a single polarization signal or a dual polarization signal, so in this embodiment, the method further includes:

Before sampling the received signal and obtaining the sample value sequence, the received signal is divided into two received signals; one of the received signals is the received signal corresponding to the X polarization state; the other is the received signal corresponding to the Y polarization state state receiving signal.

Generally, the X polarization state and the Y polarization state are two mutually perpendicular polarization states. In an embodiment, a method such as coherent reception can be used to divide a received signal into the X polarization state and the Y polarization state before performing steps S210 to S250. The two received signals are then independently demodulated by steps S210 to S250. Obviously, there is no polarization state correlation between the two polarization state signals, so the problem of failure will not occur.

Equipment embodiment one:

As shown in Figure 8, this embodiment provides a multi-dimensional code processing system, the system includes:

The sending end 101 is used to form a multi-dimensional code with a dimension of 2*N according to the input information sequence; wherein, the N is the number of symbols included in one multi-dimensional code; one multi-dimensional code includes N*k-1 pieces of information bit and 1 parity bit; and sending the multi-dimensional code; the k is the number of bits included in each symbol;

The receiving end 102 is configured to receive the multi-dimensional code; and the receiving end demodulates the multi-dimensional code to obtain N*k-1 information bits in the multi-dimensional code.

The system described in this embodiment can be used to provide a hardware structure for the multi-dimensional code processing described in the first method embodiment, and can realize any of the technical solutions described in the first method embodiment, thereby having the ability to carry according to the multi-dimensional code itself The advantages of parity check bits for multi-dimensional code verification, and when applied to dual polarization states, it will not cause mutual interference between X polarization state and Y polarization state to cause demodulation failure; and the dimension of multi-dimensional codes only depends on The number of symbols included in the multi-dimensional code, obviously, the device described in this embodiment is a system capable of flexibly controlling the dimension of the multi-dimensional code.

The sending end 101 is specifically configured to obtain an input information sequence; group the input information sequence to obtain a first group comprising N*k-1 information bits continuously distributed in the input information sequence; for each The first group is subjected to parity encoding to obtain a second group comprising N*k bits; wherein, the N*k bits include a parity bit of 1 bit; and the second group is Mapped to N symbols in turn.

The receiving end 102 is specifically configured to sample a received signal including at least one multi-dimensional code to obtain a sample value sequence; group the sample value sequence to form a third group including N sample values; The N samples included in the third group are demapped to obtain N*k bits; wherein, the N*k bits in the third group include a parity bit of 1 bit; the Parity check is performed on N*k bits to form a check result; after judgment is made using the check result, the N*k-1 information bits in the multi-dimensional code are output.

In this embodiment, the multi-dimensional code can be applied in an optical signal transmission system, so that the receiving end 101 and the receiving end 102 are connected through a light guide, specifically, through a gigabit optical fiber.

The sending end 101 in this embodiment is a device that forms the multi-dimensional code and sends a signal including at least one multi-dimensional code, specifically an optical signal transmitter. The receiving end 102 may be a device for receiving the multi-dimensional code and demodulating the multi-dimensional code, specifically a structure such as an optical signal receiver.

Equipment embodiment two:

As shown in Figure 9, this embodiment provides a sending end, and the device includes:

The modulation unit 110 is configured to form a multi-dimensional code with a dimension of 2*N according to the input information sequence; wherein, the N is the number of symbols included in one multi-dimensional code; one multi-dimensional code includes N*k-1 pieces of information bit and 1 parity check bit; The k is the number of bits included in each of the symbols;

The sending unit 120 is configured to send the multi-dimensional code.

The modulation unit 110 may include a processor or a processing chip and a storage medium; the processor or processing chip and the storage medium are connected through a bus. Executable codes are stored on the storage medium; the processor or processing chip can realize modulation of multi-dimensional codes including information bits and parity bits by reading and running the executable codes.

The sending unit 120 may include a communication interface for sending the signal including the multi-dimensional code. Specifically, for example, the sending signal is a signal formed based on the multi-dimensional code.

The modulation unit in the sending end of this embodiment can be a modulation chip in the prior art, and the sending unit can be an optical signal communication interface; hardware is provided for the multi-dimensional code processing method described in the second embodiment of the method .

Further, as shown in Figure 10, the modulation unit includes:

An acquisition module 111, configured to acquire an input information sequence;

The first grouping module 112 is configured to group the input information sequence to obtain a first group including N*k-1 information bits continuously distributed in the input information sequence;

A check encoding module 113, configured to perform parity check encoding on each of the first packets to obtain a second packet including N*k bits; wherein, the N*k bits include 1 bit of parity parity bit;

A mapping module 114, configured to sequentially map the second group into N symbols;

The specific structure of the acquisition module 111 may include an information receiving interface, such as a receiving interface, such as receiving information from an external device; specifically, a wired or wireless receiving interface; the wireless receiving interface may include a receiving antenna; the wired receiving interface may include a cable interface or optical cable interface. The acquisition module 111 may also include a human-computer interaction interface, such as a touch screen, keyboard, mouse, etc. to input user instructions and then convert the input information sequence. The input information sequence may specifically include a 01 sequence.

The specific structures of the first grouping module 112, the parity-check encoding module 113 and the mapping module 114 may include a processor and a storage medium; the processor and the storage medium are connected through a bus. Executable codes are stored on the storage medium; the processor can execute functions corresponding to the above-mentioned first grouping module 112 , check encoding module 113 and mapping module 114 by reading and running the executable codes. The first grouping module 112, the check encoding module 113 and the mapping module 114 may correspond to different processors individually, or may be integrated and correspond to the same processor. When the integration corresponds to the same processor, the processor executes the functions of the first grouping module 112 , the check encoding module 113 and the mapping module 114 in a manner of time division multiplexing or concurrent threads. The processor may be a processing structure with signal capabilities such as an application processor AP, a digital signal processor DSP, a programmable array PLC, a microprocessor MCU, or a warning processor CUP.

The transmitting end described in this embodiment, when performing multi-dimensional code modulation, each multi-dimensional code includes parity check bits by itself, without performing parity checks between multi-dimensional codes, so as to be applied to the multi-dimensional code modulation process of dual polarization states In this method, there will be no correlation between multi-dimensional codes, that is, the correlation of polarization states, so that the existing coherent demodulation and other structures can be used to demodulate the multi-dimensional codes generated by this device, thus having strong compatibility with the existing technology advantage.

Apparently the dimension of the multidimensional code in this embodiment is equal to 2*N, obviously only the number of symbols included in the multidimensional code is determined; obviously the dimension of the multidimensional code can be flexibly controlled by adjusting the number of symbols.

Further, the check encoding module 113 is specifically configured to perform a modulo two summation operation on the bits in the first group to obtain the parity bits; and add the parity bits to the In the first group, the second group is formed.

The parity bit module 113 in this embodiment may specifically include a processing chip composed of logic gate circuits in various forms, and may perform the modulo-2 summation operation. This embodiment further refines the structure of the verification coding module 113, which has the advantage of a simple structure.

The device also includes:

an associating unit, configured to associate the multidimensional code formed on the X polarization state with the multidimensional code formed on the Y polarization state to form a modulated signal;

The sending unit is specifically configured to send the modulated signal.

The association unit is a functional structure that combines multi-dimensional codes on different polarization states into one modulation symbol. For details on how to realize the association between multi-dimensional codes, please refer to the prior art, which will not be elaborated here.

The sending end described in this embodiment can be applied to the modulation of electrical signals, and can also be applied to the modulation of optical signals. In this embodiment, the modulation of optical signals can be selected, and the modulation signal formed at this time is signal; sending the modulated signal includes coupling the optical signal into an optical signal channel, specifically into an optical fiber. Therefore, at this time, the sending unit may include a fiber coupler for coupling the optical signal of the modulation signal into the optical signal channel.

In summary, the sending end described in this embodiment provides hardware for implementing the multi-dimensional code modulation method described in the second embodiment of the method, and also has the advantages of good flexibility in multi-dimensional code dimension expansion and strong compatibility with existing technologies.

Equipment embodiment three:

As shown in FIG. 11, this embodiment provides a receiving end, and the receiving end includes:

The receiving unit 210 is configured to receive the multidimensional code; wherein, the dimension of the multidimensional code is 2*N; the N is the number of symbols included in one multidimensional code; one multidimensional code includes N*k-1 information bits and 1 parity check bit; the k is the number of bits included in each symbol;

The demodulation unit 220 is configured to demodulate the multi-dimensional code and obtain N*k-1 information bits in the multi-dimensional code.

The receiving unit 210 in this embodiment is to receive the communication interface including the multi-dimensional code, and the communication interface may specifically be, for example, an optical cable interface.

The demodulation unit 220 may include a processor or a processing chip and a storage medium; the processor or processing chip and the storage medium are connected through a bus. Executable codes are stored on the storage medium; the processor or processing chip can realize demodulation of multi-dimensional codes including information bits and parity bits by reading and running the executable codes.

As shown in Figure 12, the demodulation unit includes:

A sampling module 211, configured to sample the received signal to obtain a sequence of sample values;

The second grouping module 222 is configured to group the sequence of samples to form a third group including N samples;

A demapping module 233, configured to demap the N samples included in each of the third groups to obtain N*k bits; wherein, the N*k bits in the third group include 1 bits of parity bits;

A check module 224, configured to perform parity check on the N*k bits;

The output module 225 is configured to output the N*k-1 information bits in the multi-dimensional code after making a decision by using the verification result.

The specific structures of the sampling module 211, the second grouping module 222, the demapping module 223, the verification module 224 and the output module 225 may include a processor and a storage medium; the processor and the storage medium are connected through a bus. Executable code is stored on the storage medium; the processor can execute the sampling module 211, the second grouping module 222, the demapping module 223, the verification module 224 and the output module by reading and running the executable code 225 corresponding function.

The sampling module 211 , the second grouping module 222 , the demapping module 223 , the verification module 224 and the output module 225 may correspond to different processors individually, or may be integrated and correspond to the same processor. When the integration corresponds to the same processor, the processor executes the functions of the sampling module 211, the second grouping module 222, the demapping module 223, the verification module 224 and the output module 225 in the form of time division multiplexing or concurrent threads . The processor may be a processing structure with signal capabilities such as an application processor AP, a digital signal processor DSP, a programmable array PLC, a microprocessor MCU, or a warning processor CUP.

When the receiving end described in this embodiment performs multidimensional code demodulation, at least part of the demodulation structure in the prior art can be used, and the verification module is used to perform verification based on the parity check bits carried by the multidimensional code itself, without X and Y Correlation verification between multi-dimensional codes of polarization states, so that there will be no problem of demodulation failure; and the dimension of the multi-dimensional code determines the number of symbols carried by the multi-dimensional code, and the multi-dimensional code can be flexibly regulated through the control of the number of symbols code temperature.

Further, the verification module 224 is specifically configured to perform a modulo-two addition operation on the N*k-1 information bits in the N*k bits to obtain an operation result; and when the operation result and the When the parity bits are consistent, it is confirmed that the verification is passed, otherwise the verification is not passed. Usually, the first N*k-1 bits among the N*k bits are the information bits, and the last bit is the parity bit.

In this embodiment, the verification module 224 specifically includes structures such as a calculator with a modulo-two-add operation or a processor with a modulo-two-add operation function. This embodiment further specifies the structure of the checking module 224 on the basis of the above.

The receiver also includes:

A judging module, configured to judge the N samples in each of the third groups using the first Euclidean distance before demapping the N samples included in each of the third groups , forming a judgment result;

The demapping module is specifically configured to perform demapping according to the decision result.

The decision module described in this embodiment may include a calculator or a processor with a calculation function, the calculator is used to calculate the actual Euclidean distance between the sample value and the ideal value, and may also include a comparator to compare the actual Euclidean distance with the first Euclidean distance. The distances are compared and a judgment is formed based on the comparison results.

For the structure of the demapping module, reference may be made to the foregoing part of this embodiment, and will not be repeated here.

The judging module is further configured to judge the N samples in each of the third groups using a second Euclidean distance when the check fails; wherein the first Euclidean distance is smaller than the Second Euclidean distance.

The judgment module selects the Euclidean distance for forming the judgment result according to the current number of judgments; in this embodiment, the second Euclidean distance is greater than the first Euclidean distance. Apparently, the judgment module can use different Euclidean distances to determine the judgment result, which can improve the correct rate of demodulation.

The device described in this embodiment can be used for the demodulation of multi-dimensional codes of single polarization state, and can also be applied to the demodulation of multi-dimensional codes of dual polarization states; when applied to the demodulation of multi-dimensional codes of dual polarization states, the receiving end Also includes:

The separation unit is used to divide the received signal into two received signals before sampling the received signal to obtain the sample value sequence; wherein, one of the received signals is the received signal corresponding to the X polarization state; the other is the received signal corresponding to the Y polarization state.

The specific structure of the separating unit may also correspond to a processor; the processor can divide a beam of signals into multiple received signals with certain polarization angle differences corresponding to the X polarization state and the Y polarization state through code execution. For the structure of the processor, reference may be made to the foregoing part of this embodiment, and will not be repeated here.

The demodulation device described in this embodiment can be used for demodulation of electrical signals or optical signals, and can be selected as an optical signal demodulation device in this embodiment.

Several specific examples are provided below in combination with any of the above-mentioned embodiments:

Example one:

As shown in Figure 13, based on polarization multiplexed quadrature phase shift keying (PM-QPSK), the two polarization states are respectively introduced by two-symbol parity (here, the two-symbol parity represents a multi-dimensional The code includes 2 symbols), so that the two-dimensional QPSK modulation is extended to a four-dimensional modulation, and its spectral efficiency and optical signal-to-noise ratio (OSNR) performance are equivalent to the existing PS-QPSK. The specific implementation process includes the following steps:

Step 301 and Step 302: Input a random binary sequence with 3 bits as a group, perform modulo two summation of the input 3 bits each time to obtain the check bit, and add the obtained check bit to the input 3 bits to form 4-bit grouping to complete the parity code. Here, the random binary sequence corresponds to the first packet including 3 bits. The 4-bit group is the above-mentioned second group.

Step 303 and Step 304: sequentially map the input 4-bit grouped binary signal into two consecutive QPSK symbols according to the Gray mapping rule, and each QPSK symbol contains 2-bit information.

Step 305: The outputs of steps 303 and 304 are respectively used as modulation data on two orthogonal polarization states of the PM-QPSK modulator, and the optical signals on the two polarization states are input into the optical fiber channel after polarization combining.

Step 306: Receive and demodulate the optical signal from the optical fiber channel, and obtain the QPSK symbol sample sequence on the two polarization states through coherent received digital signal processing.

Step 307 and Step 308: Group the input QPSK symbol sample value sequences into groups, and complete the judgment of two symbol sample values each time; specifically, calculate the maximum likelihood judgment constellation points of the two symbols according to the minimum Euclidean distance criterion , check the bits corresponding to the two decision symbols. If the verification is passed, it is considered that the judgment is correct; if the verification does not match, it is considered that the judgment of the symbol with a larger distance from the judgment constellation point among the two symbols is wrong, and the judgment of the symbol is changed to the second smallest Euclidean distance constellation point.

Here, the minimum Euclidean distance is equivalent to the first Euclidean distance in the above embodiment; the second smallest Euclidean distance is equivalent to the second Euclidean distance in the above embodiment.

Example two:

As shown in Figure 14, based on polarization multiplexed quadrature phase shift keying (PM-QPSK), four-symbol parity is introduced in each of the two polarization states, so that the two-dimensional QPSK modulation is extended to eight-dimensional modulation. The specific implementation process includes the following steps:

Step 401 and Step 402: Input a random binary sequence with 7 bits as a group, perform modulo two summation of the input 7 bits each time to obtain the parity bit, and add the parity bit to the input 7 bits to form 8 bits Grouping to complete parity coding.

Step 403 and Step 404: sequentially map the input 8-bit grouped binary signal into four consecutive QPSK symbols according to the Gray mapping rule, and each QPSK symbol contains 2-bit information.

Step 405: The outputs of steps 403 and 404 are respectively used as modulation data on two orthogonal polarization states of the PM-QPSK modulator, and the optical signals on the two polarization states are input into the optical fiber channel after polarization combining.

Step 406: Receive and demodulate the optical signal from the optical fiber channel, and obtain the QPSK symbol sample sequence on the two polarization states through coherent received digital signal processing.

Step 407 and Step 408: group the input QPSK symbol sample value sequence, and complete the judgment of four symbol sample values each time; specifically, calculate the maximum likelihood decision constellation points of the four symbols according to the minimum Euclidean distance criterion , performing a parity check on all the bit information corresponding to the four decision symbols. If the verification is passed, the judgment is considered correct; if the verification does not match, it is considered that the judgment of the symbol with a larger distance from the judgment constellation point among the four symbols is wrong, and the judgment of the symbol is changed to a constellation point with the second smallest Euclidean distance.

FIG. 15 is a simulation effect diagram of the received signal quality of a pair of receivers in Example 1 and Example 2.

Taking the back-to-back simulation performance of PM-QPSK system with 30GBaud symbol rate (120Gbps bit rate) as the reference system, and examining the optical signal-to-noise ratio (OSNR) conditions required by the system when the bit error rate is 10 ^-3 , it can be seen that the spectrum of the multi-dimensional modulation system The improvements in efficiency and OSNR performance are as follows:

1) The OSNR requirement of the two-symbol check QPSK system with a 30Gbaud symbol rate is about 2.2dB lower than that of the reference system;

2) The OSNR requirement of the two-symbol check QPSK system with a 40Gbaud symbol rate (120Gbps effective bit rate) is reduced by about 0.9dB relative to the reference system;

3) The OSNR requirement of the four-symbol check QPSK system with a 30Gbaud symbol rate is reduced by about 1.55dB relative to the reference system;

4) The OSNR requirement of the four-symbol check QPSK system with a symbol rate of 34.285Gbaud (effective bit rate of 120Gbps) is reduced by about 1dB relative to the reference system.

The multi-dimensional code modulation and demodulation method described in this embodiment can also be designed based on PM-16QAM, for example, the two-symbol check 16QAM is a four-dimensional modulation, and the spectral efficiency and OSNR performance are equivalent to the existing 128-SP-QAM; The symbol check 16QAM is a six-dimensional modulation, which further optimizes the spectral efficiency and OSNR performance of the system.

In the several embodiments provided in this application, it should be understood that the disclosed devices and methods may be implemented in other ways. The device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods, such as: multiple units or components can be combined, or May be integrated into another system, or some features may be ignored, or not implemented. In addition, the mutual coupling, or direct coupling, or communication connection between the various components shown or discussed may be through some interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms. of.

The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units; Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present invention can be integrated into one processing module, or each unit can be used as a single unit, or two or more units can be integrated into one unit; the above-mentioned integration The unit can be realized in the form of hardware or in the form of hardware plus software functional unit.

Those of ordinary skill in the art can understand that all or part of the steps for realizing the above-mentioned method embodiments can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, the Including the steps of the foregoing method embodiments; and the foregoing storage medium includes: a removable storage device, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, etc. A medium on which program code can be stored.

The above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Anyone skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present invention. Should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be determined by the protection scope of the claims.

Claims (27)

1. A multidimensional code processing method, characterized in that the method comprises: The sending end forms a multi-dimensional code with a dimension of 2*N according to the input information sequence; wherein, the N is the number of symbols included in one multi-dimensional code; one multi-dimensional code includes N*k-1 information bits and 1 Parity check bits; The k is the number of bits included in each of the symbols; The sending end sends the multi-dimensional code; The receiving end receives the multi-dimensional code; The receiving end demodulates the multi-dimensional code, and obtains N*k-1 information bits in the multi-dimensional code. 2. The method of claim 1, wherein, The sending end forms a multi-dimensional code with a dimension of 2*N according to the input information sequence, including: Get the input information sequence; grouping the input information sequence to obtain a first group comprising N*k-1 information bits continuously distributed in the input information sequence; Parity-check encoding is performed on each of the first packets to obtain a second packet including N*k bits; wherein, the N*k bits include 1-bit parity bits; and sequentially mapping the second group into N symbols. 3. The method of claim 1, wherein, The receiving end demodulates the multi-dimensional code, and obtains N*k-1 information bits in the multi-dimensional code, including: Sampling a received signal including at least one multidimensional code to obtain a sequence of samples; grouping the sequence of samples to form a third group comprising N samples; Demapping the N samples included in each of the third groups to obtain N*k bits; wherein, the N*k bits in the third group include a parity bit of 1 bit ; The k is the number of bits included in each of the symbols; performing a parity check on the N*k bits to form a check result; After the verification result is used to make a decision, the N*k-1 information bits in the multi-dimensional code are output. 4. A multidimensional code processing method, characterized in that said method comprises: According to the input information sequence, a multidimensional code with a dimension of 2*N is formed; wherein, said N is the number of symbols included in one said multidimensional code; one said multidimensional code includes N*k-1 information bits and 1 parity check bit; said k is the number of bits included in each said symbol; Send the multidimensional code. 5. The method of claim 5, wherein, According to the input information sequence, forming a multi-dimensional code with a dimension of 2*N includes: Get the input information sequence; grouping the input information sequence to obtain a first group comprising N*k-1 information bits continuously distributed in the input information sequence; Parity-check encoding is performed on each of the first packets to obtain a second packet including N*k bits; wherein, the N*k bits include 1-bit parity bits; and sequentially mapping the second group into N symbols. 6. The method of claim 4, wherein, Performing parity-check coding on each of the first packets to obtain a second packet including N*k bits, including: performing a modulo two summation operation on the bits in the first group to obtain the parity bits; The parity bits are added to the first packet to form the second packet. 7. The method of claim 4, wherein, The method also includes: associating the multidimensional code formed on the X polarization state with the multidimensional code formed on the Y polarization state to form a modulated signal; Send the modulated signal. 8. The method of claim 7, wherein, The modulation signal is an optical signal; The sending the modulated signal includes: The optical signal is coupled into an optical signal channel. 9. A multidimensional code processing method, characterized in that said method comprises: The receiving end receives the multi-dimensional code; the dimension of the multi-dimensional code is 2*N; the N is the number of symbols included in one multi-dimensional code; one multi-dimensional code includes N*k-1 information bits and 1 Parity check bits; The k is the number of bits included in each of the symbols; The receiving end demodulates the multi-dimensional code, and acquires the N*k-1 information bits in the multi-dimensional code. 10. The method according to claim 9, characterized in that, The receiving end demodulates the multi-dimensional code, and obtains the N*k-1 information bits in the multi-dimensional code, including: Sampling a received signal including at least one multidimensional code to obtain a sequence of samples; grouping the sequence of samples to form a third group comprising N samples; Demapping the N samples included in each of the third groups to obtain N*k bits; wherein, the N*k bits in the third group include a parity bit of 1 bit ; performing a parity check on the N*k bits to form a check result; After the verification result is used to make a decision, the N*k-1 information bits in the multi-dimensional code are output. 11. The method of claim 9, wherein, The parity check of the N*k bits is performed to form a check result, including: Carrying out a modulo two addition operation on the first N*k-1 bits in the N*k bits to obtain an operation result; When the operation result is consistent with the parity bits, it is confirmed that the verification is passed, otherwise the verification is not passed. 12. The method of claim 10, wherein, Before demapping the N samples included in each of the third groups, the method further includes: Using the first Euclidean distance to judge the N samples in each of the third groups to form a judgment result; The demapping the N samples included in each of the third groups includes: Demapping is performed according to the decision result. 13. The method of claim 12, wherein, The method also includes: When the verification fails, the N samples in each of the third groups are judged by using a second Euclidean distance; wherein, the first Euclidean distance is smaller than the second Euclidean distance. 14. The method of claim 13, wherein, The method also includes: Before sampling the received signal and obtaining the sample value sequence, the received signal is divided into two received signals; one of the received signals is the received signal corresponding to the X polarization state; the other is the received signal corresponding to the Y polarization state state receiving signal. 15. A multidimensional code processing system, characterized in that the system comprises: The sending end is used to form a multidimensional code with a dimension of 2*N according to the input information sequence; wherein, the N is the number of symbols included in one said multidimensional code; one said multidimensional code includes N*k-1 information bits and 1 parity bit; and sending the multi-dimensional code; the k is the number of bits included in each symbol; The receiving end is configured to receive the multi-dimensional code; and the receiving end demodulates the multi-dimensional code to obtain N*k-1 information bits in the multi-dimensional code. 16. The system of claim 15, wherein: The sending end is specifically used to obtain an input information sequence; group the input information sequence to obtain a first group including N*k-1 information bits continuously distributed in the input information sequence; Perform parity check encoding on the first group to obtain a second group comprising N*k bits; wherein, the N*k bits include a parity bit of 1 bit; and the second group is sequentially Maps to N symbols. 17. The system of claim 15, wherein: The receiving end is specifically configured to sample a received signal including at least one multidimensional code to obtain a sequence of samples; group the sequence of samples to form a third group including N samples; for each of the The N samples included in the third group are demapped to obtain N*k bits; wherein, the N*k bits in the third group include a parity bit of 1 bit; the N Perform parity check on *k bits to form a check result; after using the check result to make a judgment, output the N*k-1 information bits in the multi-dimensional code. 18. A sending end, characterized in that, the sending end includes: A modulation unit, configured to form a multi-dimensional code with a dimension of 2*N according to the input information sequence; wherein, the N is the number of symbols included in one multi-dimensional code; one multi-dimensional code includes N*k-1 information bits and 1 parity check bit; said k is the number of bits included in each said symbol; A sending unit, configured to send the multi-dimensional code. 19. The sending end according to claim 18, characterized in that, The modulation unit includes: An acquisition module, configured to acquire an input information sequence; A first grouping module, configured to group the input information sequence to obtain a first group including N*k-1 information bits continuously distributed in the input information sequence; A check encoding module, configured to perform parity check encoding on each of the first groups to obtain a second group comprising N*k bits; wherein, the N*k bits include 1 bit of parity test bit; A mapping module, configured to sequentially map the second group into N symbols. 20. The sending end according to claim 19, characterized in that, The check coding module is specifically configured to perform a modulo two summation operation on each bit in the first group to obtain the parity bits; and add the parity bits to the first group , forming the second group. 21. The sending end according to claim 18, characterized in that, The device also includes: an associating unit, configured to associate the multidimensional code formed on the X polarization state with the multidimensional code formed on the Y polarization state to form a modulated signal; The sending unit is specifically configured to send the modulated signal. 22. A receiving end, characterized in that the receiving end includes: A receiving unit, configured to receive the multidimensional code; wherein, the dimension of the multidimensional code is 2*N; the N is the number of symbols included in one multidimensional code; one multidimensional code includes N*k-1 Information bits and 1 parity check bit; the k is the number of bits included in each symbol; A demodulation unit, configured to demodulate the multi-dimensional code, and obtain N*k-1 information bits in the multi-dimensional code. 23. The receiving end according to claim 22, characterized in that, The demodulation unit includes: A sampling module, configured to sample a received signal including at least one of the multi-dimensional codes to obtain a sequence of sample values; The second grouping module is configured to group the sequence of samples to form a third group including N samples; wherein, the number of symbols of each multi-dimensional code represented by N; A demapping module, configured to demap the N samples included in each of the third groups to obtain N*k bits; wherein, the N*k bits in the third group include 1 bit parity bits; A check module, configured to perform parity check on the N*k bits; An output module, configured to output the N*k-1 information bits in the multi-dimensional code after making a decision by using the verification result. 24. The receiving end according to claim 23, characterized in that, The verification module is specifically used to perform a modulo-two addition operation on the N*k-1 information bits in the N*k bits to obtain an operation result; and when the operation result and the parity bit If they are consistent, it is confirmed that the verification is passed, otherwise the verification is not passed. 25. The receiving end according to claim 23, characterized in that, The receiver also includes: A judging module, configured to judge the N samples in each of the third groups using the first Euclidean distance before demapping the N samples included in each of the third groups , forming a judgment result; The demapping module is specifically configured to perform demapping according to the decision result. 26. The receiving end according to claim 25, characterized in that, The judging module is further configured to judge the N samples in each of the third groups using a second Euclidean distance when the check fails; wherein the first Euclidean distance is smaller than the Second Euclidean distance. 27. The receiving end according to claim 22, characterized in that, The device also includes: The separation unit is used to divide the received signal into two received signals before sampling the received signal to obtain the sample value sequence; wherein, one of the received signals is the received signal corresponding to the X polarization state; the other is the received signal corresponding to the Y polarization state.