CN105871379A - Sampling method based on secondary equipment in power system - Google Patents
Sampling method based on secondary equipment in power system Download PDFInfo
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- CN105871379A CN105871379A CN201610179828.7A CN201610179828A CN105871379A CN 105871379 A CN105871379 A CN 105871379A CN 201610179828 A CN201610179828 A CN 201610179828A CN 105871379 A CN105871379 A CN 105871379A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
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Abstract
The invention discloses a sampling method based on secondary equipment in a power system. The sampling method comprises the following steps of (1), performing sampling input, judging the type of a signal, entering the step (2) if the signal is an analog sampling signal, and otherwise, entering the step (3); (2), performing A/D conversion of the sampling signal, controlling A/D conversion sampling processing by a FPGA module, and entering the step (4); (3), analyzing a digital sampling signal into an original digital sampling signal queue through a SV message analysis module, then, sending the digital sampling signal queue to the FPGA module to process, and entering the step (4); and (4), respectively processing digital sampling values of a digital sampling value queue 1 and a digital sampling value queue 2 by a MCU processing unit by adopting the same frequency tracking sampling algorithm, and calculating the practical frequency 1 and the practical frequency 2 corresponding to the two queues, wherein the practical frequency 1 and the practical frequency 2 are respectively used as the given frequency 1 and the given frequency 2 of the FPGA module, such that sampling processing for the next time is controlled; and then, sampling processing for one time is ended. The design expense and the development cost of the secondary equipment in the power system are effectively reduced when analog sampling and digital sampling coexist.
Description
Technical field
The present invention relates to the method for sampling of a kind of electrically-based secondary system equipment.
Background technology
Current IEC61850 standard is widely used to intelligent substation, the 9-2 part of this standard, i.e. " special
Determine the communication service mapping (SCSM) sampled value by ISO/IEC 8802-3 " describe digitalized S V sampling
Communication specification, is characterized in that data sampling frequency is fixed, and the most widely used frequency is every cycle 80 point,
The sampled data of 4000 at equal intervals the most per second, and when network system frequency departure rated frequency, due to number
Word sample frequency is constant, asynchronous with network system frequency, and the phase place of periodic sampling power network signal is at top
Discontinuous with terminal, spectrum leakage occurs, thus causes calculating error.
It addition, the frequency-tracking that digital signal samples uses with conventional analogue signal sampling in algorithm process
Frequency conversion algorithm there are differences, in some technological transformation transformer stations, there is conventional simulation signal sampling and digital signal
The situation that sampling coexists, for different sampling inputs, generally requires design two set difference in same device
Sampling circuit and algorithm process, design overhead and development cost the highest.
Summary of the invention
For the problems referred to above, the present invention provides the method for sampling of a kind of electrically-based secondary system equipment, for
The secondary equipment in power system that analog sampling and digital sample coexist, it is achieved two kinds of sampled form algorithms share and
Frequency-tracking, significantly reduces secondary equipment in power system design when analog sampling coexists with digital sample
Expense and development cost.
For realizing above-mentioned technical purpose, reaching above-mentioned technique effect, the present invention is achieved through the following technical solutions:
The method of sampling of electrically-based secondary system equipment, it is characterised in that comprise the steps:
Step 1, carry out sampling input and judge signal type, if analog sampling signal, then enter step
2, otherwise enter step 3;
Step 2, sampled signal carrying out A/D conversion, FPGA module controls the work frequency of A/D modular converter
Rate, becomes digitized sampling value queue 1 by analog signal processing, and the operating frequency of A/D modular converter is equal to given
Frequency 1, the sampling period of queue 1 is the inverse of given frequency 1, if first treated sampling input, then
Given frequency 1 equal to system nominal frequency, otherwise give frequency 1 equal to MCU in last sampling processing at
The actual frequency 1 of the queue 1 that reason unit calculates, enter step 4;
Step 3, digital sampled signal resolve to raw digitized sampled signal queue through SV packet parsing module
After give FPGA module process: FPGA module according to given frequency 2 to raw digitized sampled signal queue
By linear difference method, forming new sampled value queue 2, the sampling period of queue 2 is falling of given frequency 2
Number, if first treated sampling input, uses zero crossing Measuring Frequency Method to raw digitized sampled signal queue
Calculate given frequency 2, otherwise give frequency 2 and calculate equal to MCU processing unit in last sampling processing
The actual frequency 2 of queue 2, enter step 4;
Step 4, MCU processing unit use identical frequency-tracking sampling algorithm to process digitized sampling respectively
Value queue 1 and the digitized sampling value of digitized sampled value queue 2, and calculate two realities corresponding to queue
Border frequency 1 and actual frequency 2, under controlling with given frequency 2 respectively as the given frequency 1 of FPGA module
Sampling processing, unitary sampling process terminates.
Preferably, in step 2, analogue signal is through PT/CT voltage current transformation, then processing of circuit after filtering
Rear entrance A/D changes.
The invention has the beneficial effects as follows:
The secondary equipment in power system coexisted for analog sampling and digitized sampling, analog sampling part uses
Frequency tracking synchronization sampling Design, the digitized sampling part of fixed frequency is by algorithm (such as linear difference algorithm
Or spline method) crude sampling point sequence is extracted again, reach the effect identical with analog sampling part,
Sampled value queue is finally given the frequency tracking algorithm resume module specified, and this algoritic module without distinguishing is
Analog sampling input or digitized sampling input, it is achieved two kinds of sampled form algorithms are shared and frequency-tracking,
Solve routine sampling and need individually designed problem with digitized sampling algorithm.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of the method for sampling of the present invention electrically-based secondary system equipment;
Fig. 2 is the flow chart of the method for sampling of the present invention electrically-based secondary system equipment.
Detailed description of the invention
With specific embodiment, technical solution of the present invention is described in further detail below in conjunction with the accompanying drawings, with
Make those skilled in the art can be better understood from the present invention and can be practiced, but illustrated embodiment is not made
For limitation of the invention.
The method of sampling of electrically-based secondary system equipment, Fig. 1 is the structured flowchart of the present invention, including PT/CT
Conversion circuit (PT is voltage transformer, and CT is current transformer), Filtering Processing circuit, A/D change-over circuit,
FPGA control circuit, SV packet parsing module, sampled value queue cache module, MCU processing unit.
Concrete sampling flow process is as in figure 2 it is shown, comprise the steps:
Step 1, carry out sampling input and judge signal type, if analog sampling signal, then enter step
2, otherwise enter step 3;
Step 2, sampled signal carrying out A/D conversion, FPGA module controls the work frequency of A/D modular converter
Rate, becomes digitized sampling value queue 1 by analog signal processing, and the operating frequency of A/D modular converter is equal to given
(output of A/D modular converter is given signal by FPGA module and triggers frequency 1, and FPGA often provides one
Triggering signal, A/D module just carries out an analog digital conversion, obtains a digitized sampled value, so given frequency
The operating frequency of rate 1 namely A/D modular converter), the sampling period of queue 1 is the inverse of given frequency 1,
If first treated sampling input, then give frequency 1 and be equal to system nominal frequency, otherwise give frequency 1
Equal to the actual frequency 1 of the queue 1 that MCU processing unit in last sampling processing calculates, enter step 4;
Step 3, digital sampled signal resolve to raw digitized sampled signal queue through SV packet parsing module
After give FPGA module process: FPGA module according to given frequency 2 to raw digitized sampled signal queue
By linear difference method, forming new sampled value queue 2, the sampling period of queue 2 is falling of given frequency 2
Number, if first treated sampling input, uses zero crossing Measuring Frequency Method to raw digitized sampled signal queue
Calculate given frequency 2, otherwise give frequency 2 and calculate equal to MCU processing unit in last sampling processing
The actual frequency 2 of queue 2, enter step 4;
In this step, if SV packet parsing module resolves unsuccessfully, directly terminate.
Step 4, MCU processing unit use identical frequency-tracking sampling algorithm (such as based on frequency-tracking
Fourier algorithm) digitized that processes digitized sampling value queue 1 and digitized sampled value queue 2 respectively adopts
Sample value, and calculate two single calculation frequencies 1 corresponding to queue and single calculation frequency 2, utilizing slides puts down
All methods process two single calculation frequencies respectively, obtain actual frequency 1 and actual frequency 2, respectively as FPGA
Given frequency 1 and the given frequency 2 of module control sampling processing next time, and unitary sampling process terminates.
Preferably, in step 2, analogue signal first passes through PT/CT voltage current transformation, more after filtering at circuit
A/D conversion is entered after reason.
The secondary equipment in power system coexisted for analog sampling and digitized sampling, analog sampling part uses
Frequency tracking synchronization sampling Design, the digitized sampling part of fixed frequency passes through algorithm to crude sampling point sequence weight
New extraction, reaches the effect identical with analog sampling part, sampled value queue is finally given the frequency specified
Track algorithm resume module, this algoritic module is analog sampling input or digitized sampling input without distinguishing,
Realize two kinds of sampled form algorithms to share and frequency-tracking, solve routine sampling and need list with digitized sampling algorithm
The solely problem of design.
These are only the preferred embodiments of the present invention, not thereby limit the scope of the claims of the present invention, every profit
The equivalent structure made by description of the invention and accompanying drawing content or equivalence flow process conversion, or directly or
Connect and be used in other relevant technical fields, be the most in like manner included in the scope of patent protection of the present invention.
Claims (2)
- The method of sampling of the most electrically-based secondary system equipment, it is characterised in that comprise the steps:Step 1, carry out sampling input and judge signal type, if analog sampling signal, then enter step 2, otherwise enter step 3;Step 2, sampled signal carrying out A/D conversion, FPGA module controls the operating frequency of A/D modular converter, Analog signal processing becomes digitized sampling value queue 1, and the operating frequency of A/D modular converter is equal to given Frequency 1, the sampling period of queue 1 is the inverse of given frequency 1, if first treated sampling input, Then give frequency 1 and be equal to system nominal frequency, otherwise give frequency 1 equal in last sampling processing The actual frequency 1 of the queue 1 that MCU processing unit calculates, enter step 4;Step 3, digital sampled signal are after SV packet parsing module resolves to raw digitized sampled signal queue Give FPGA module process: FPGA module according to given frequency 2 to raw digitized sampled signal queue By linear difference method, forming new sampled value queue 2, the sampling period of queue 2 is given frequency 2 Inverse, if first treated sampling input, to raw digitized sampled signal queue use zero crossing Measuring Frequency Method calculates given frequency 2, otherwise gives frequency 2 equal to MCU process in last sampling processing The actual frequency 2 of the queue 2 that unit calculates, enter step 4;Step 4, MCU processing unit use identical frequency-tracking sampling algorithm to process digitized sampling value respectively Queue 1 and the digitized sampling value of digitized sampled value queue 2, and calculate two realities corresponding to queue Border frequency 1 and actual frequency 2, the given frequency 1 respectively as FPGA module is controlled with given frequency 2 Making sampling processing next time, unitary sampling process terminates.
- The method of sampling of electrically-based secondary system equipment the most according to claim 1, it is characterised in that step In rapid 2, analogue signal is through PT/CT voltage current transformation, then enters A/D after filtering after processing of circuit Conversion.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN111585572A (en) * | 2020-04-28 | 2020-08-25 | 广州视源电子科技股份有限公司 | Sampling method, device, terminal equipment and storage medium |
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CN1808152A (en) * | 2005-07-28 | 2006-07-26 | 南京长盛仪器有限公司 | Equivalent period sampling apparatus for intelligent element parameter tester |
US20090146858A1 (en) * | 2007-12-11 | 2009-06-11 | Lars Beseke | Method for operating a sensor system and sensor system |
CN103792419A (en) * | 2014-03-04 | 2014-05-14 | 济南大学 | Synchronous sampling method achieving hybrid access of analog quantity and digital quantity |
CN104237622A (en) * | 2014-09-15 | 2014-12-24 | 北京东方计量测试研究所 | Sampling method based on software frequency tracking and broadband voltage/power calibration device |
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2016
- 2016-03-25 CN CN201610179828.7A patent/CN105871379A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1808152A (en) * | 2005-07-28 | 2006-07-26 | 南京长盛仪器有限公司 | Equivalent period sampling apparatus for intelligent element parameter tester |
US20090146858A1 (en) * | 2007-12-11 | 2009-06-11 | Lars Beseke | Method for operating a sensor system and sensor system |
CN103792419A (en) * | 2014-03-04 | 2014-05-14 | 济南大学 | Synchronous sampling method achieving hybrid access of analog quantity and digital quantity |
CN104237622A (en) * | 2014-09-15 | 2014-12-24 | 北京东方计量测试研究所 | Sampling method based on software frequency tracking and broadband voltage/power calibration device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN111585572A (en) * | 2020-04-28 | 2020-08-25 | 广州视源电子科技股份有限公司 | Sampling method, device, terminal equipment and storage medium |
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