CN105868431B - Wiring method based on anchor point - Google Patents
Wiring method based on anchor point Download PDFInfo
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- CN105868431B CN105868431B CN201510033624.8A CN201510033624A CN105868431B CN 105868431 B CN105868431 B CN 105868431B CN 201510033624 A CN201510033624 A CN 201510033624A CN 105868431 B CN105868431 B CN 105868431B
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Abstract
The embodiment of the present invention discloses a kind of wiring method based on anchor point, this method comprises: determining the N grade anchor point in gauze, every grade of anchor point in the N grades of anchor point includes at least one anchor point, the delay of each anchor point to the point of destination connected in this every grade anchor point is same or similar, the delay of each anchor point of the source point into this every grade anchor point is same or similar, which includes data delay and/or signal delay；The gauze is divided into N+1 grades of gauzes by the N grades of anchor point, carries out coiling respectively to the N+1 grades of gauze, wherein N takes the positive integer more than or equal to 1.The wiring method based on anchor point of the embodiment of the present invention, by determining the anchor point for the condition that meets in gauze, to be balanced when guaranteeing coiling from the delay that source point reaches all purposes point through anchor point.
Description
Technical field
The present invention relates in microelectronic field IC design technical field more particularly to a kind of cloth based on anchor point
Line method.
Background technique
Field programmable gate array (Field Programmable Gate Array, referred to as " FPGA "), is a kind of logic
Device, it has hardware resource abundant, powerful parallel processing capability and flexible reconfigurable ability.Therefore, FPGA exists
The fields such as data processing, communication, network using it is more and more extensively.
The design cycle of FPGA includes: design input, debugging, functional simulation, synthesis, placement-and-routing, time stimulatiom, configuration
Downloading and etc..Wherein, it is laid out the hardware primitive just referred to by logic netlist or bottom floor units is reasonably fitted to FPGA
On internal intrinsic hardware configuration, the superiority and inferiority of layout influences very the final result of design (at two aspects of speed and area)
Greatly.Wiring then refers to that the topological structure according to layout rationally correctly connects each member using the various interconnection resources inside FPGA
The process of part.
However, the existing wiring method based on PathFinder Routing Algorithm, it cannot good balanced signal and data
Delay time.
Summary of the invention
The purpose of the embodiment of the present invention is that providing a kind of wiring method based on anchor point, meet item by determining in gauze
The anchor point of part, to be balanced when guaranteeing coiling from the delay that source point reaches all purposes point through anchor point.
To achieve the above object, the present invention provides a kind of wiring methods based on anchor point, this method comprises:
Determine the N grade anchor point in gauze, every grade of anchor point in the N grades of anchor point includes at least one anchor point, this every grade anchor point
In each anchor point to the point of destination connected delay it is same or similar, each anchor point of the source point into this every grade anchor point prolongs
When it is same or similar, the delay include data delay and/or signal delay；
The gauze is divided into N+1 grades of gauzes by the N grades of anchor point, carries out coiling respectively to the N+1 grades of gauze, wherein N, which takes, to be greater than
Or the positive integer equal to 1.
Preferably, N grades of anchor points include two-stage anchor point, which is divided into N+1 grades of gauzes by the N grades of anchor point, to the N+1 grades of line
Net carries out coiling respectively, specifically:
Gauze is divided into three-level gauze by the two-stage anchor point, to each anchor point of the source point into first order anchor point, this first
Each anchor point of each anchor point in each anchor point and the second level anchor point into second level anchor point in grade anchor point is to company of institute
The point of destination connect carries out coiling respectively.
Preferably, N grades of anchor points include that the gauze is divided into N+1 grades of gauzes by the N grades of anchor point of level-one anchor point, to the N+1 grades of line
Net carries out coiling respectively, specifically:
The gauze is divided into two-stage gauze by the level-one anchor point, to the source point in the level-one anchor point each anchor point, this one
Each anchor point in grade anchor point carries out coiling to the point of destination connected respectively.
It is further preferred that the source point to each anchor point in the level-one anchor point, each anchor in the level-one anchor point
Before point carries out coiling respectively to the point of destination connected, this method further include:
According to the fanout and temporal constraint of Clock Net, determines and be labeled as the gauze to use global clock resource GBUF
Gauze；
Select with the Clock Net and/or reset the clock multiple selector input port that is directly connected to of gauze as this one
Grade anchor point.
It is further preferred that the Clock Net is labeled as by determination according to the fanout and temporal constraint of the Clock Net
GBUF gauze, comprising:
When the Clock Net fanout be greater than or equal to 2, and the Clock Net temporal constraint it is tighter when, determine will
The gauze is labeled as the gauze of GBUF.
Preferably, which includes the Clock Net and/or the reset gauze.
Based on the above-mentioned technical proposal, the wiring method provided in an embodiment of the present invention based on anchor point, by true in gauze
Surely the anchor point for meeting condition arrives the point of destination that anchor point is connected to source point to anchor point and carries out coiling respectively, again so as to guarantee
The delay for reaching all purposes point through anchor point from source point is balanced.
Detailed description of the invention
In order to illustrate the technical solution of the embodiments of the present invention more clearly, will make below to required in the embodiment of the present invention
Attached drawing is briefly described, it should be apparent that, drawings described below is only some embodiments of the present invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is the schematic flow chart according to the wiring method based on anchor point of the embodiment of the present invention；
Fig. 2 is the schematic flow chart according to the wiring method based on anchor point of another embodiment of the present invention；
Fig. 3 is the schematic flow chart according to the wiring method based on anchor point of yet another embodiment of the invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiment is a part of the embodiments of the present invention, rather than whole embodiments.Based on this hair
Embodiment in bright, those of ordinary skill in the art's every other reality obtained without making creative work
Example is applied, all should belong to the scope of protection of the invention.
Fig. 1 is the schematic flow chart according to the wiring method 100 based on anchor point of the embodiment of the present invention.As described in Figure 1
Method 100 include:
110, determine the N grade anchor point in gauze, every grade of anchor point in the N grades of anchor point includes at least one anchor point, and this every grade
The delay of each anchor point to the point of destination connected in anchor point is same or similar, each anchor point of the source point into this every grade anchor point
Delay it is same or similar, the delay include data delay and/or signal delay.
120, which is divided into N+1 grades of gauzes by the N grades of anchor point, carries out coiling respectively to the N+1 grades of gauze, wherein N takes
Positive integer more than or equal to 1.
Specifically, in embodiments of the present invention, can determine the N grade anchor point in gauze, every grade of anchor point in the N grades of anchor point
Including each anchor point it is necessary to meet following condition: the data delay and/or signal of each anchor point to the point of destination connected prolong
When it is same or similar, and source point to each anchor point data delay and/or signal delay it is same or similar.And the N grades of anchor point
Gauze is divided into N+1 grades of gauzes, coiling can be carried out to this N+1 grades of gauze based on determining N number of anchor point respectively, to guarantee
The delay for reaching all purposes point through anchor point from source point is balanced.
Therefore, the wiring method provided in an embodiment of the present invention based on anchor point meets condition by determining in gauze
Anchor point arrives the point of destination that anchor point is connected to source point to anchor point again and carries out coiling respectively, can guarantee to reach from source point through anchor point
The delay of all purposes point is balanced.
It should be noted that in embodiments of the present invention, gauze can be Clock Net, or gauze is resetted, this
Inventive embodiments are to this and without limitation.Clock Net can refer to that the source point of gauze is object related with clock, such as: it can
To be clock pins (Clock IO), phaselocked loop (phase-locked loop, PLL), oscillator (oscillator, OSC)
Deng.Alternatively, Clock Net may also mean that gauze point of destination connection be clock port.Reset the purpose that gauze refers to gauze
Point connection is reseting port.
Preferably, as an embodiment of the present invention, in 120, N grades of anchor points include two-stage anchor point, and the N grades of anchor point will
The gauze is divided into N+1 grades of gauzes, carries out coiling respectively to the N+1 grades of gauze, specifically: gauze is divided into three-level by the two-stage anchor point
Gauze, to each anchor point of the source point into first order anchor point, each anchor point in the first order anchor point into second level anchor point
Each anchor point and the second level anchor point in each anchor point carry out coiling respectively to the point of destination connected.
Specifically, in embodiments of the present invention, N grades of anchor points may include two-stage anchor point, respectively first order anchor point and
Second level anchor point.Wherein, first order anchor point can be the anchor point connecting with source point, such as: it can choose Clock Tree labeled as gbuf
The input port of multiple selector in grade is as first order anchor point.First order anchor point can be an anchor point, or more
A anchor point.When first order anchor point is multiple anchor points, data delay and/or signal the delay phase of source point to each first order anchor point
It is same or close.Wherein, source point to each first order anchor point data delay and/or signal delay it is close can be source point to this
The delay time error of data delay and/or the signal delay of each first order anchor point is within the allowed band that user designs.
Second level anchor point can be the anchor point connecting with point of destination, such as: it can choose Clock Tree labeled as in rbuf grade
Multiple selector input port as second level anchor point.Second level anchor point can be an anchor point, or Duo Gemao
Point.When second level anchor point is multiple anchor points, the identical or phase of signal delay of each second level anchor point to the point of destination connected
Closely.Wherein, the point of destination that each second level anchor point is connected can be a point of destination, or multiple points of destination.Also
It is to say, when point of destination is multiple points of destination, each second level anchor point to each point of destination in the multiple points of destination connected
Signal delay it is same or similar.
Such as: determining in gauze has a first order anchor point and a second level anchor point, and connect with second level anchor point
There are two points of destination, then arrives to source point to first order anchor point, the first order anchor point to second level anchor point and the second level anchor point
Two points of destination connected carry out coiling respectively, can make signal or data from source point through first order anchor point and second level anchor
Point reaches the delay an of point of destination and the delay for reaching another point of destination through first order anchor point and second level anchor point from source point
It is same or similar.
Preferably, as another embodiment of the invention, in 120, N grades of anchor points include the N grades of anchor point of level-one anchor point
The gauze is divided into N+1 grades of gauzes, coiling is carried out respectively to the N+1 grades of gauze, specifically: the gauze is divided by the level-one anchor point
Two-stage gauze, to the source point to each anchor point in the level-one anchor point, each anchor point in the level-one anchor point to the mesh connected
Point carry out coiling respectively.
Specifically, in embodiments of the present invention, when N grades of anchor points are level-one anchor point, which was both connect with source point
It is connect again with point of destination.The level-one anchor point can be multiple anchor points, or an anchor point, the embodiment of the present invention to this not
It limits.
It should be noted that in embodiments of the present invention, the point of destination connecting with each anchor point in the level-one anchor point can
To be a point of destination, or multiple points of destination.Each anchor when point of destination is multiple points of destination, in the level-one anchor point
The signal delay of point to each point of destination in the multiple points of destination connected is same or similar.That is, to source point to should
Each anchor point in each anchor point, the level-one anchor point in level-one anchor point carries out coiling to the point of destination connected respectively, can be with
So that the delay that signal or data reach all purposes point through each anchor point in the level-one anchor point from source point is same or similar.
Such as: when the level-one anchor point is an anchor point, can determine the anchor point whether with the point of destination of the gauze same
It one clock area can be by the anchor point when clock area locating for the anchor point is identical with clock area where point of destination
In the Anchor List for storing the gauze point of destination.If the anchor point is occupied by other gauzes, which can be labeled as
Anchor point is used；If the anchor point is unoccupied, coiling can be carried out to source point to the anchor point.To source point to the anchor point carry out around
When line, if it find that congestion between source point and the anchor point, then refuse the anchor point, directly from source point around point of destination；If source point
There is no congestion between the anchor point, then can find the point of destination that the anchor point is connected, while by the anchor point from Anchor List
It removes.The point of destination connected again to the anchor point to the anchor point carries out coiling, to complete from source point to anchor point, then again from anchor
Point arrives point of destination coiling.
It should be understood that in embodiments of the present invention, the point of destination connecting with the anchor point can be a point of destination, or
Multiple points of destination.When point of destination is multiple points of destination, the anchor point to each point of destination in the multiple points of destination connected
Signal delay is same or similar.That is, to source point to the anchor point, the anchor point to the point of destination connected carry out respectively around
Line, the delay that signal or data can be made to reach all purposes point through anchor point from source point are same or similar.
It is further preferred that as another embodiment of the invention, as shown in Fig. 2, to the source point to the level-one anchor
Before each anchor point in each anchor point, the level-one anchor point in point carries out coiling respectively to the point of destination connected, method 100 is also
Include:
130, according to the fanout and temporal constraint of Clock Net, determines and be labeled as the gauze to use global clock resource
The gauze of GBUF.
140, select with the Clock Net and/or reset the clock multiple selector input port that is directly connected to of gauze as
The level-one anchor point.
Specifically, in embodiments of the present invention, it can be according to the fanout and temporal constraint of Clock Net, by the gauze mark
It is denoted as the gauze of GBUF, such as: when the fanout of clock cable is more than or equal to 2, and the temporal constraint of Clock Net compares
When tight, which can be labeled as to the gauze of GBUF.After marking the gauze of GBUF, it can choose and the Clock Net
And/or resetting the clock multiple selector input port that is directly connected to of gauze as the level-one anchor point, the level-one anchor point is by GBUF
Gauze be divided into two-stage, then respectively to source point to each anchor point and each of the level-one anchor point in the level-one anchor point
The gauze of anchor point to point of destination carries out coiling.It can guarantee that the gauze for being identified as GBUF uses the resource of global clock in this way,
To reduce clock skew.
It should be noted that in embodiments of the present invention, the needs that the fanout of clock cable can be designed according to user
It determines, such as: it can be 5,10,15,20,25,30 etc., but the embodiment of the present invention is not limited thereto.That is, can
To be more than or equal to 5,10,15,20,25 or 30 when the fanout of clock cable, and the temporal constraint of Clock Net is tighter
When, which is labeled as to the gauze of GBUF.
Below by taking N grades of anchor points include two-stage anchor point as an example, and it is detailed to combine Fig. 3 to carry out the scheme of the embodiment of the present invention
Explanation.Wherein, the first order anchor point in two-stage anchor point is 2, and second level anchor point is 4, and point of destination is 8.It should be understood that this is only
It is an example of the embodiment of the present invention, any restriction is not constituted to the embodiment of the present invention.
Fig. 3 is the schematic diagram of the wire structures obtained according to the wiring method based on anchor point of the embodiment of the present invention.
In embodiments of the present invention, 2 grades of totally 6 anchor points can be determined in gauze, include 2 first in this 6 anchor points
Grade anchor point and 4 second level anchor points, each anchor point therein can satisfy the following conditions: source point to first order anchor point 1 and first
The delay of grade anchor point 2 is same or similar, and source point to second level anchor point 1, the delay of anchor point 2, anchor point 3, anchor point 4 is same or similar,
Delay of the second level anchor point 1 to the point of destination 1 and point of destination 2 that are connected, second level anchor point 2 to the point of destination 3 and mesh connected
Point 4 delay, the delay of second level anchor point 3 to the point of destination 5 and point of destination 6 that are connected, second level anchor point 4 is to being connected
The delay of point of destination 7 and point of destination 8 is all the same or close, and delay here includes data delay and/or signal delay.
Institute can be arrived to source point to first order anchor point 1, first order anchor point 1 to second level anchor point 1 and second level anchor point 1
The point of destination 1 and point of destination 2 of connection carry out coiling respectively；Second level anchor is arrived to source point to first order anchor point 1, first order anchor point 1
Point 2 and second level anchor point 2 to the point of destination 3 and point of destination 4 connected carry out coiling respectively；The rest may be inferred, completes source point warp
First order anchor point and second level anchor point reach the coiling of all purposes point.To guarantee signal or data from source point through first order anchor
Point 1,2 is same or similar with the arrival of second level anchor point 1,2,3,4 time delay of point of destination 1,2,3,4,5,6,7,8.
Therefore, the wiring method provided in an embodiment of the present invention based on anchor point can make signal or data pass through from source point
The delay that first order anchor point and second level anchor point reach all purposes point is same or similar, so as to guarantee from source point through anchor point
The delay for reaching all purposes point is balanced.
In addition, the terms "and/or", only a kind of incidence relation for describing affiliated partner, indicates may exist
Three kinds of relationships, for example, A and/or B, can indicate: individualism A exists simultaneously A and B, these three situations of individualism B.Separately
Outside, character "/" herein typicallys represent the relationship that forward-backward correlation object is a kind of "or".
It should be understood that magnitude of the sequence numbers of the above procedures are not meant to execution sequence in various embodiments of the present invention
Successively, the execution sequence of each process should be determined by its function and internal logic, the implementation process without coping with the embodiment of the present invention
Constitute any restriction.
Those of ordinary skill in the art may be aware that list described in conjunction with the examples disclosed in the embodiments of the present disclosure
Member and algorithm steps, can be realized with electronic hardware, computer software, or a combination of the two, in order to clearly demonstrate hardware
With the interchangeability of software, each exemplary composition and step are generally described according to function in the above description.This
A little functions are implemented in hardware or software actually, the specific application and design constraint depending on technical solution.Specially
Industry technical staff can use different methods to achieve the described function each specific application, but this realization is not
It is considered as beyond the scope of this invention.
It is apparent to those skilled in the art that for convenience of description and succinctly, foregoing description is
The specific work process of system, device and unit, can refer to corresponding processes in the foregoing method embodiment, details are not described herein.
In several embodiments provided herein, it should be understood that disclosed systems, devices and methods, it can be with
It realizes by another way.For example, the apparatus embodiments described above are merely exemplary, for example, the unit
It divides, only a kind of logical function partition, there may be another division manner in actual implementation, such as multiple units or components
It can be combined or can be integrated into another system, or some features can be ignored or not executed.In addition, shown or beg for
Opinion mutual coupling, direct-coupling or communication connection can be through some interfaces, the INDIRECT COUPLING of device or unit
Or communication connection, it is also possible to electricity, mechanical or other form connections.
The unit as illustrated by the separation member may or may not be physically separated, aobvious as unit
The component shown may or may not be physical unit, it can and it is in one place, or may be distributed over multiple
In network unit.Some or all of unit therein can be selected to realize the embodiment of the present invention according to the actual needs
Purpose.
It, can also be in addition, the functional units in various embodiments of the present invention may be integrated into one processing unit
It is that each unit physically exists alone, is also possible to two or more units and is integrated in one unit.It is above-mentioned integrated
Unit both can take the form of hardware realization, can also realize in the form of software functional units.
If the integrated unit is realized in the form of SFU software functional unit and sells or use as independent product
When, it can store in a computer readable storage medium.Based on this understanding, technical solution of the present invention is substantially
The all or part of the part that contributes to existing technology or the technical solution can be in the form of software products in other words
It embodies, which is stored in a storage medium, including some instructions are used so that a computer
Equipment (can be personal computer, server or the network equipment etc.) executes the complete of each embodiment the method for the present invention
Portion or part steps.And storage medium above-mentioned includes: USB flash disk, mobile hard disk, read-only memory (ROM, Read-Only
Memory), random access memory (RAM, Random Access Memory), magnetic or disk etc. are various can store journey
The medium of sequence code.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can readily occur in various equivalent modifications or replace
It changes, these modifications or substitutions should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with right
It is required that protection scope subject to.
Claims (6)
1. a kind of wiring method based on anchor point characterized by comprising
Determine the N grade anchor point in gauze, every grade of anchor point in the N grades of anchor point includes at least one anchor point, every grade of anchor point
In each anchor point to the point of destination connected delay it is same or similar, source point to each anchor point in every grade of anchor point
It is delayed same or similar, the delay includes that data delay and/or signal are delayed；
The gauze is divided into N+1 grades of gauzes by the N grades of anchor point, carries out coiling respectively to the N+1 grades of gauze, wherein N takes greatly
In or equal to 1 positive integer.
2. the N grades of anchor point divides the gauze according to the method described in claim 1, the N grades of anchor point includes two-stage anchor point
At N+1 grades of gauzes, coiling is carried out respectively to the N+1 grades of gauze, specifically:
Gauze is divided into three-level gauze by the two-stage anchor point, to each anchor point of the source point into first order anchor point, described
Each anchor point of each anchor point in each anchor point and the second level anchor point into second level anchor point in level-one anchor point arrives
The point of destination connected carries out coiling respectively.
3. the N grades of anchor point divides the gauze according to the method described in claim 1, the N grades of anchor point includes level-one anchor point
At N+1 grades of gauzes, coiling is carried out respectively to the N+1 grades of gauze, specifically:
The gauze is divided into two-stage gauze by the level-one anchor point, to the source point in the level-one anchor point each anchor point,
Each anchor point in the level-one anchor point carries out coiling to the point of destination connected respectively.
4. according to the method described in claim 3, it is characterized in that, to the source point to each anchor in the level-one anchor point
Before each anchor point in point, the level-one anchor point carries out coiling respectively to the point of destination connected, the method also includes:
According to the fanout and temporal constraint of Clock Net, determines and the gauze is labeled as using global clock resource GBUF's
Gauze；
Select the clock multiple selector input port being directly connected to the Clock Net and/or reset gauze as described one
Grade anchor point.
5. according to the method described in claim 4, it is characterized in that, the fanout and timing according to the Clock Net about
Beam determines the Clock Net being labeled as GBUF gauze, comprising:
When the Clock Net fanout be greater than or equal to 2, and the Clock Net temporal constraint it is tighter when, determine will
The gauze is labeled as the gauze of GBUF.
6. the method according to any one of claims 1 to 5, which is characterized in that the gauze include Clock Net and/or
Reset gauze.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510033624.8A CN105868431B (en) | 2015-01-22 | 2015-01-22 | Wiring method based on anchor point |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510033624.8A CN105868431B (en) | 2015-01-22 | 2015-01-22 | Wiring method based on anchor point |
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| CN105868431B true CN105868431B (en) | 2018-12-21 |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111475271B (en) * | 2018-06-29 | 2023-04-25 | 国家超级计算天津中心 | Workflow setting method based on outer computing node |
| CN110069827B (en) * | 2019-03-28 | 2020-02-21 | 广东高云半导体科技股份有限公司 | Layout and wiring method and device for FPGA (field programmable Gate array) online logic analyzer |
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| CN102169515A (en) * | 2010-02-26 | 2011-08-31 | 国际商业机器公司 | Estimation method and system of clock tree delay time in specified integrated circuit |
| CN102799698A (en) * | 2011-05-26 | 2012-11-28 | 国际商业机器公司 | Method and system for planning clock tree of application-specific integrated circuit |
| CN103259526A (en) * | 2013-06-03 | 2013-08-21 | 龙芯中科技术有限公司 | Method and device for constructing clock network |
| CN104182556A (en) * | 2013-05-22 | 2014-12-03 | 京微雅格（北京）科技有限公司 | Method for distributing chip |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8402418B2 (en) * | 2009-12-31 | 2013-03-19 | Nvidia Corporation | System and process for automatic clock routing in an application specific integrated circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169515A (en) * | 2010-02-26 | 2011-08-31 | 国际商业机器公司 | Estimation method and system of clock tree delay time in specified integrated circuit |
| CN102799698A (en) * | 2011-05-26 | 2012-11-28 | 国际商业机器公司 | Method and system for planning clock tree of application-specific integrated circuit |
| CN104182556A (en) * | 2013-05-22 | 2014-12-03 | 京微雅格（北京）科技有限公司 | Method for distributing chip |
| CN103259526A (en) * | 2013-06-03 | 2013-08-21 | 龙芯中科技术有限公司 | Method and device for constructing clock network |
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