CN105849680B - High-resolution capacitor is to code converter - Google Patents
High-resolution capacitor is to code converter Download PDFInfo
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- CN105849680B CN105849680B CN201380080204.4A CN201380080204A CN105849680B CN 105849680 B CN105849680 B CN 105849680B CN 201380080204 A CN201380080204 A CN 201380080204A CN 105849680 B CN105849680 B CN 105849680B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0416—Control or interface arrangements specially adapted for digitisers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
- G06F3/0446—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes
Abstract
Integrating circuit including first capacitor device is operatively coupled to comparator.Comparator is configured as the first capacitor device voltage of first capacitor device being compared with reference voltage, and generates first comparator output based on comparing.Current feedback circuit is operationally coupled with integrating circuit, and is configured as the balancing charge on first capacitor device.Control unit is operatively coupled to comparator and current feedback circuit, and is configured as exporting by sensing first comparator and controls current feedback circuit, the balancing charge on first capacitor device based on first comparator output.
Description
Related application
No. 61/877,773 U.S. Provisional Application submitted this application claims on September 13rd, 2013 and October 14 in 2013
The equity for the 61/890th, No. 622 U.S. Provisional Application that day submits, entire contents are incorporated herein by reference hereby.
Technical field
The disclosure is usually directed to sensing system, more particularly, to the touch being configurable on determining capacitive sensing system
The capacitive sensing system of position.
Background technique
The electric signal for the reflection capacitance variations that capacitive sensing system can generate in sensing electrode.This variation in capacitor
It can show that touch event (that is, object approaching to special electrodes).Capacitance sensing element can be used for substituting mechanical key, handle
With other similar mechanical user interface control.The use of capacitance sensing element allows to eliminate complicated mechanical switch and key,
Reliable operation is provided under severe conditions.In addition, capacitance sensing element is used widely in modern Client application, and
User interface selection is provided in existing product.The range of capacitance sensing element can be from single button to be used for touch-sensing table
A large amount of buttons of the form arrangement of the capacitance sensing array in face.
It is all very universal in current industrial market and consumer market using the transparent touch-sensitive panel of capacitance sensing array.It
Can configure in portable phone, GPS device, set-top box, camera, computer screen, MP3 player, digital flat panel computer
Deng on.Capacitance sensing array passes through the capacitor of measurement capacitance sensing element and finds the touch or existing of instruction conductive body
The variable of capacitor works.When conductive body (such as finger, hand or other objects) starts contact or very close capacitor
When sensing element, capacitor changes and detects conductive body.The capacitance variations of capacitance touch sensing element can be by circuit
It measures.The capacitor of the capacitance sensing element of measurement is converted into digital value by circuit.
There are two kinds of typical capacity types: 1) mutual capacitance, wherein capacitance sensing circuit can access two of capacitor
Electrode；2) self-capacitance, wherein capacitance sensing circuit may only access an electrode in capacitor, wherein second electrode with
DC voltage level binding or parasitic couplings ground connection.Touch panel has (1) (2) two kinds of distribution capacity load, and
Cypress touches solution independently or senses two kinds of capacitors to have the mixed form of its various sensing modes.
Detailed description of the invention
In the diagram of attached drawing, the present invention is shown by way of example, and not limitation.
Fig. 1 is the block diagram for showing one embodiment of the electronic system with processing unit, and wherein the processing unit includes
Charge is to code converter.
Fig. 2 is the block diagram according to the charge of one embodiment to code converter.
Fig. 3 is the figure according to the charge of another embodiment to code converter.
Fig. 4 is the figure for showing the signal waveform according to the charge of one embodiment to transcoder circuit.
Fig. 5 is the figure according to the charge of another embodiment to code converter.
Fig. 6 is the flow chart according to the method for the charge of one embodiment to code conversion.
Fig. 7 is the flow chart according to the method for the charge of another embodiment to code conversion.
Specific embodiment
For illustrative purposes, in the following description, a large amount of detail is elaborated, in order to provide to of the invention
It understands thoroughly.However, it is apparent to a person skilled in the art that may be practiced without these specific details
The present invention.In other examples, well-known circuit, structure and technology are not shown in detail, but are shown with block diagram,
To avoid unnecessarily obscuring the understanding to description.
Being related to " one embodiment " or " embodiment " in the de-scription means together with special characteristic described in embodiment, knot
Structure or characteristic are included at least one embodiment of the present invention.The phrase of different location " is implemented at one in description
In example " it is not necessarily meant to refer to the same embodiment.
Fig. 1 is the block diagram for showing one embodiment of the electronic system with processing unit, and wherein the processing unit includes
Charge is to code converter.The details about charge to code converter 120 is more fully described with reference to Fig. 2-7.Processing unit
110 are configured as detecting one or many touches, this it is one or many touch be detected close to such as capacitance sensing battle array
Touch-sensing device of column 125.Processing unit 110 is able to detect conductive body, and such as (finger is passive for touching object 140
Contact pen, active contact pen 130, or any combination thereof).Capacitor-sensing circuit 101 can be measured by using capacitance sensing
Touch data caused by the touch of array 125.The touch can detect by one or more sensing units, each unit generation
The sensing element (for example, electrode) of the isolated sensing element or intersection of table capacitance sensing array 125.In another embodiment
In, touch data is used to generate the 2D capacitance image of capacitance sensing array 125.In one embodiment, when capacitor-sensing circuit
When 101 measurement capacitor-sensing device mutual capacitance (for example, using capacitance sensing array 125), capacitor-sensing circuit 101 is obtained
Touch-sensing object 2D capacitance image is simultaneously handled the data of peak value and location information.In another embodiment, locate
Managing device 110 is microcontroller, which obtains the electricity such as from capacitance sensing array 125 from application processor 150
Hold touch signal data set, and the finger detection firmware identification executed on the microcontroller shows the data acquisition system touched
Region, detects and handles peak value, coordinates computed or any combination therefore.Microcontroller can be reported accurate to application processor
Coordinate and other information.
Electronic system 100 includes processing unit 110, capacitance sensing array 125, contact pen 130 and application processor 150.
Capacitance sensing array 125 may include capacitance sensing element, these capacitance sensing elements are the electrodes of the conductive material of such as copper.
Sensing element is also possible to a part of indium tin oxide (ITO) panel.Capacitance sensing element can be used in allowing capacitor-sensing
Circuit 101 measures self-capacitance, mutual capacitance or its any combination.In the embodiment of description, electronic system 100 includes by total
Line 122 is coupled to the capacitance sensing array 125 of processing unit 110.Capacitance sensing array 125 may include multidimensional capacitance sensing battle array
Column.Multidimensional sensing array includes multiple sensing elements, these sensing elements are arranged in rows and columns.In another embodiment
In, multidimensional sensing array is as all points addressable (APA)) mutual capacitance sensing array operates.In another embodiment, capacitor
Sensing array 125 is opaque capacitance sensing array (for example, PC touch tablet).Capacitance sensing array 125 can be arranged
With face profile.Optionally, capacitance sensing array 125 can have non-planar profile.It is alternatively possible to use other configurations
Capacitance sensing array.For example, as the those skilled in the art for obtaining disclosure benefit are understood, instead of vertical row
And horizontal line, capacitance sensing array 125 can have hexagonal arrangement etc..In one embodiment, capacitance sensing array 125 can
To be included in ito surface plate or touch screen panel.
This document describes the operation of processing unit 110 and configurations, and for detecting and tracking touching object 140 and contact pen
The operation and configuration of 130 capacitance sensing array 125.In simple terms, processing unit 110 is configurable to detection in capacitance sensing
The presence of touching object 140, the presence of contact pen 130 or its any combination on array 125.In one embodiment, if
Touching object is active contact pen, then active contact pen 130 can be configured to operate as timing " main (master) ", and work as
When in use, processing unit 110 adjusts the timing of capacitance sensing array 125 to active contact pen 130, to match active contact pen
130 timing.In one embodiment, it applies with traditional induction contact pen on the contrary, capacitance sensing array 125 is contacted with active
Pen 130 carries out capacitive couplings.It should be noted that configurable detect touching object 140, for capacitance sensing array 125
Identical assembly is also used for detecting and tracking contact pen 130, and does not have to additional PCB layer to track active contact pen in proximity
130。
In the described embodiment, processing unit 110 includes analog and/or digital universal input/port output (GPIO)
107.GPIO port 107 can be programmable.GPIO port 107 may be coupled to programmable interconnection and logic (PIL), PIL
It can be used as the interconnection between GPIO port 107 and the digital block array (not shown) of processing unit 110.Digital block array can be with
Be configured as realizing using configurable user's module (" UM ") in one embodiment various Digital Logical Circuits (for example,
DAC, digital filter and numerical control system).Digital block array may be coupled to system bus.Processing unit 110 can be with
Including memory, such as random access memory (RAM) 105 and program flash memory 104.RAM105 can be static RAM (SRAM),
Program flash memory 104 can be non-volatile memories, can be used for storing firmware (for example, the realization sheet that processing core 102 is executable
The control algolithm of the operation of text description).Processing unit 110 may include the memory control unit for being coupled to memory
(" MCU ") 103 and processing core 102.Processing core 102 is configured as executing instruction or executing the processing element of operation.As obtained
What those skilled in the art of disclosure benefit were understood, processing unit 110 may include other processing elements.Also need
It should be noted that memory can be in the inside of processing unit or outside it.In memory in the case where inside, storage
Device may be coupled to such as handle the processing element of core 102.In memory in the case where processing unit outside, this public affairs is such as obtained
What the those skilled in the art for opening benefit were understood, processing unit is coupled to other resident devices of memory.
Processing unit 110 can also include analog block array (not shown) (for example, field programmable analog array).The mould
Quasi- block array is also coupled to system bus.Analog block array can be configured as to be come in fact using configurable UM in one embodiment
Existing various analog circuits (for example, ADC or analog filter).Analog block array also may be coupled to GPIO107.
As indicated, capacitor-sensing circuit 101 can be integrated into processing unit 110.Capacitor-sensing circuit 101 can be with
Including the simulation I/O for being coupled to external module, such as touch-sensing pad (not shown), touches sense at capacitance sensing array 125
Survey sliding block (not shown), touch-sensing button (not shown) and/or other devices.Capacitor-sensing circuit 101 can be configured to using
Mutual capacitance detection technology, self-capacitance detection technology, Charged Couple technology etc. measure capacitor.In one embodiment, capacitor-sense
Slowdown monitoring circuit 101 uses charge accumulation circuitry, capacitance modulation circuit or other capacitive sensing methods well known to those skilled in the art
To be operated.In embodiment, capacitor-sensing circuit be 101 belong to touch screen controller Cypress TMA-3xx,
TMA-4xx TMA-xx family.It is alternatively possible to use other capacitor-sensing circuits.Mutual capacitance sensing as described herein
Array or touch screen may include be arranged on visual displays (for example, LCD monitor) itself, wherein or under it is saturating
Transparent substrate before bright conductive sensing array or display.In embodiment, TX and RX electrode be configured to be expert at respectively and
In column.It should be noted that the row and column of electrode can be configured as by capacitor-sensing circuit 101 with any selection combination
TX and RX electrode.In one embodiment, TX the and RX electrode of capacitance sensing array 125 can be configured to conduct in the flrst mode
TX the and RX electrode of mutual capacitance sensing array is operated to detect touching object, and is used as coupling electric charge under the second mode
The electrode of receiver is operated to detect the contact pen in the identical electrodes of sensing array.Contact pen TX letter is generated when being activated
Number contact pen be used for Charged Couple to capacitance sensing array, rather than such as the measurement RX that is completed during mutual capacitance senses
The mutual capacitance of electrode and TX electrode (sensing element) infall.Crosspoint between two sensing elements is considered mutually
One sensing electrode passes through or is overlapped the position of another electrode while keeping being galvanically isolated.Can by selection TX electrode and
Each available combination of RX electrode senses the associated capacitor in the crosspoint between TX electrode and RX electrode.When such as finger
Or contact pen touching object close capacitance sensing array 125 when, which causes the mutual capacitance between some TX/RX electrodes
It reduces.In another embodiment, the presence of finger increase electrode to environment (earth) ground capacitor, commonly known as from
Capacitance variations.Using the variation of mutual capacitance, there can be the coupling electricity between RX electrode and TX electrode reduced by identifying
The RX electrode of appearance, to determine the position of finger on capacitance sensing array 125, the TX when measuring reduced capacitor on RX electrode
Signal is applied on TX electrode.Therefore, by continuously determining capacitor associated with electrode crossings, can determine one or
The position of multiple touching object.It should be noted that this process can calibrate sensing by determining the baseline of sensing element
Element (crosspoint of RX and TX electrode).It is also to be noted that such as the ordinary skill people of this field for obtaining disclosure benefit
What member was understood, it can be used with the interpolation with resolution ratio more better than row/column spacing and detect the position of finger.In addition, such as
What those skilled in the art of acquisition disclosure benefit were understood, it various types of interpolation of coordinate algorithms can be used to examine
Survey the center touched.
Capacitor-sensing circuit 101 includes charge to code converter 120.Charge is described below with reference to Fig. 2-7 to turn to code
The additional detail of parallel operation 120.
Processing unit 110 may include internal oscillator/clock 106 and communication block (" COM ") 108.In another implementation
In example, processing unit 110 includes spread spectrum clock (not shown).Clock signal is supplied to processing dress by oscillator/clock module 106
Set one or more components in 110.Communication block 108 can be used for via application interface (" I/F ") line 151 and such as at application
The external module of reason device 150 is communicated.
Processing unit 110 may reside on general carrier substrate, for example, integrated circuit (" IC ") crystal grain substrate, multicore
Piece module substrate etc..Optionally, the component of processing unit 110 can be one or more individually integrated circuits and/or discrete
Component.In one exemplary embodiment, processing unit 110 is by the Cypress Semiconductor Co., Ltd of California san jose
The chip of (Cypress Semiconductor Corporation, San Jose, California) exploitationPlace
Manage the programmable system on device.Optionally, processing unit 110 can be it is well known to those skilled in the art it is one or more its
His processing unit, such as microprocessor or central processing unit, controller, application specific processor, digital signal processor
(" DSP "), specific integrated circuit (" ASIC "), field programmable gate array (" FPGA ") etc..
It should be noted that embodiment described herein is not limited to the processing unit for being coupled to application processor
Configuration, but may include measure sensing device on capacitor and send master computer for initial data) system,
Initial data is analyzed by application on main calculator.In fact, the processing completed by processing unit 110 can also be handled in application
It is completed in device.
Capacitor-sensing circuit 101 is desirably integrated into the IC of processing unit 110, or optionally, is integrated into individual IC
In.It is alternatively possible to the description of capacitor-sensing circuit 101 be generated and compile, to be incorporated into other integrated circuits.For example,
The hardware description language of such as VHDL or Verilog can be used to generate description capacitor-sensing circuit 101 or its part
Behavioral scaling code, and machine accessible medium (for example, CD-ROM, hard disk, floppy disk etc.) can be stored to.In addition,
Behavioral scaling code can be compiled into Method at Register Transfer Level (" RTL ") code, line table or even circuit layout and by its
Store machine accessible medium.Behavioral scaling code, RTL code, line table and circuit layout can represent description capacitor-sensing
The various abstract levels of circuit 101.
It should be noted that the component of electronic system 100 includes all components described above.Optionally, electronic system
100 may include some components described above.
In one embodiment, electronic system 100 is used for tablet computer.Optionally, electronic device can be used for other application
In, such as laptop, mobile phone, personal digital assistant (" PDA "), keyboard, TV, remote controler, monitor, hand-held more
Media apparatus, hand-held media (audio and/or video) player, portable game device, the signature input for sales transactions point
Device, E-book reader, global positioning system (GPS) or control panel.Embodiment described herein be not limited to be used for
The touch screen or touch-sensing panel of notebook implementation, and can be used for other capacitance sensing implementations, for example,
Sensing device can be touch-sensing sliding block (not shown) or touch-sensing button (for example, capacitance sensing button).At one
In embodiment, these sensing devices include one or more capacitance sensors or other kinds of capacitance sensing circuit.Herein
Description is not necessarily limited to notebook pointer operation, but can include other operations, such as Lighting control (light modulator), sound
It measures control, graphic equalizer control, speed control or requirement gradually or other controls of discrete adjustment operates.It should pay attention to
, the embodiment of these capacitance sensing implementations can be used in conjunction with noncapacitive sensing element, including but not limited to selects
It is hand-written to select button, sliding block (for example, display brightness and contrast), idler wheel, multimedia control (for example, volume, track advance etc.)
Identification and numeric keypad operation.
Fig. 2 is the block diagram according to the charge of one embodiment to code converter.Charge includes declining to code converter 120
Subtract device circuit 220, integrating circuit 230 and converter 240.In one embodiment, converter 240 is electricity as described herein
Lotus-balanced to unbalanced transformer.Optionally, other circuits can be used in converting input signals into digital value.Charge is to code converter
120 can be coupled to indium tin oxide (ITO) panel (or other sensing arrays, capacitance sensing array as escribed above
125) a part of touch screen controller.Touch screen controller measures the input current from capacitance sensing array 125, and
Touch location is calculated based on input current.The signal received from capacitance sensing array 125 can be input to integrating circuit 230
Decayed before by attenuator circuit 220.Consequential signal is simultaneously input to converter by 230 integrated attenuation signal of integrating circuit
In 240.Integrated signal is converted into digital value by converter 240, for example, digital output code 250.The digital value can be further
It is handled by processing unit 110 or application processor 150.For the one or more conductive bodies of detection in capacitance sensing array
Touch on 125 and the position touched, conductive body gesture etc. purpose, digital value represents in capacitance sensing array 125
The capacitor of upper measurement.
Fig. 3 is the diagram according to the charge of another embodiment to code converter.Charge includes to code converter 120
Attenuator circuit 220, integrating circuit 230 and converter 240.Attenuator circuit 220 receives the letter from capacitance sensing array 125
Number.220 deamplification of attenuator circuit generates the output charge of decaying to export in attenuator on 312.The output charge of decaying
It is integrated on first capacitor device 321 (that is, integral or sampling), causes first capacitor device voltage.In the second step, the first electricity
Container 321 is switched to position Bal1 352 from position int1 353, so that first capacitor device 321 and attenuator circuit 220 disconnect
Connection, and first capacitor device 321 is connect with comparator 331.On comparator 331, the first capacitor of first capacitor device 321
Device voltage is compared with reference voltage (Vref 320).Comparator 331, which is based on comparing, generates first in comparator output 340
Comparator output.Control unit 332 receives the first comparator output from comparator 331.In response, control unit 332
It signals current feedback circuit 333 and charge or discharge (that is, balance) is carried out to first capacitor device 321.In one embodiment,
The charge balance period is the time span that capacitor is charged or discharged.For example, control unit 332 measures current feedback circuit 333
To the time (that is, charge balance period) of first capacitor device progress charge or discharge to primary voltage.The charge balance period can be with
It is measured by counter 360, and converts thereof into digital output code 250.In one embodiment, counter 360 can be
A part of control unit 332.
In one embodiment, charge balance can be realized two stages.(for example, sampling rank in first stage
Section), the output charge of the decaying from attenuator output 312 is stored on first capacitor device 321.Second stage (for example,
Equilibrium stage), using constant-current source (for example, current feedback circuit 333) by 321 rebalancing of first capacitor device (for example, by first capacitor
Device 321 is switched to position Bal1 352) arrive its initial value.
In another embodiment, integrating circuit 230 includes first capacitor device 321 and the second capacitor 322.Charge is to generation
Code converter 120 is configured as alternately in a upper integral charge of first capacitor device 321 or the second capacitor 322 (that is, adopting
Sample), and balancing charge on another of first capacitor device 321 or the second capacitor 322.To first capacitor device 321 and second
Each measurement charge balance period of capacitor 322.Counter 360 is by charge balance periodic conversion at digital output code
250。
In embodiment, it may be said that charge to code converter 120 is made of two converters.For example, the first converter
(for example, using first capacitor device 321) in a single stage samples the deamplification from attenuator circuit 220, and
Second converter is balanced the charge sampled before on the second capacitor 322, and vice versa (that is, ping-pong operation).Electricity
The duality of lotus to code converter 120 allows the continuous of the input signal of the deamplification for example from attenuator circuit 220
Integral.Ping-pong operation is advantageous narrow receiver bandwidth, and single switch realization on provide substantially improve make an uproar
Sound inhibits.
In another embodiment, attenuator circuit 220 is to integrating condenser --- first capacitor device 321 or the second capacitor
322 --- it charges, so as to independent raising and lowering pumping signal edge.This configuration allows obtaining and balancing input letter
" time is shared " of circuit resource during number (for example, signal from capacitive array sensor 125).Balancing circuitry includes to have
The current feedback circuit 333 of two current sources (for example, Ibalp 334 and Ibaln 335) and switch SW1 336.Switch SW1 336
It is controlled by control unit 332.The balanced balanced current direction (pull out or pour into) of current feedback circuit 333 equilibrium stage beginning by than
It defines compared with the output of device 331, and is controlled by control unit 332.The charge balance period changes its shape in comparator
Stop after state, is synchronously latched by the system clock of such as clock 341.
In one embodiment, from attenuator circuit 220 to the input signal of integrating circuit 230 by programmable current mode
Attenuator circuit provides, and incoming charging signals are delivered to integral (for example, sampling) capacitor (for example, first capacitor device
321).It is stored in the group of the current mode signal from attenuator circuit 220 on capacitor (for example, first capacitor device 321)
Conjunction forms integrator.Make attenuator circuit 220 is programmable to provide the small signal or big handled from capacitance sensing array 125
The adaptation mechanism of signal.By decaying to big input signal, charge to code converter 120 can be realized physically small
Integrating condenser (for example, first capacitor device 321 and second capacitor 322), reduces the size in the physically channel RX significantly,
Therefore to reduce costs.
In another embodiment, charge balance allows integrating circuit 230 to use nonlinear capacitor, such as based on MOS
The capacitor of gate-oxide capacitances.Capacitor based on this mos capacitance is usually than linear (for example, metal-metal) electricity
Container is much smaller, and further causes the reduction of crystallite dimension.
In one embodiment, such as the programmable attenuator of attenuator circuit 220 scaling is from capacitance sensing array 125
Incoming electric current.The output performance of attenuator circuit 220 is similar with current source, for definition, no matter it is on the output
Voltage how to deliver it is desired output electric current circuit (that is, high output impedance circuit).This current-mode output allows
Attenuator circuit 220 is used as a part of active integrator.That is, attenuator circuit 220 is able to use electric current to capacitor
Device (for example, first capacitor device 321 and second capacitor 322) charges, and is equal to through the product based on operational amplifier
Divide device to charge capacitor, without operational amplifier, therefore saves space and electric power.
In another embodiment, the accumulation for the quantization error that charge allows individually to convert every time to code converter 120,
(for example, accumulating the quantization error on the continuous charge balance period) is converted next time to be carried to.Accumulating quantization error allows electricity
Lotus to code converter 120 with the total conversion time (that is, it is all before convert summation, to the last reset converter system)
Proportionally increase converter resolution.
In one embodiment, the residual error of individual charge balance movement is accumulated on integrating condenser (for example, the first electricity
Container 321 and the second capacitor 322), rather than be reset as usually completed using conventional converters (for example, weight
Set " zero " or reference voltage 320).By not carried out to capacitor (for example, first capacitor device 321 and second capacitor 322)
Resetting is retained from the residual charge balance error converted before and is added to next signal sample.Therefore, before
The error of conversion (balance) never disappears, and is handled in Balance Treatment in subsequent sampling period.Only most
Balance error afterwards is remained in not correcting.Therefore, error before accumulation technology is equivalent to single transformed error rather than is all
Summation.This is converted into small LSB error, such as ten a ten thousandths.
In one embodiment, balance duration (for example, charge balance period) is by system clock (for example, clock
341) it synchronizes.As a result, current feedback circuit 333 is to generate specific constant charging packet each clock cycle, it is equal
In quantization step (that is, LSB).The charge balance period stops when comparator input is more than reference voltage.In fact, charge balance
Period may be a too long counting.This means that balanced balanced current is not on first capacitor device 321 or the second capacitor 322
Fully balancing charge, and leave small error.Therefore, at the end of balance, integrating condenser is (for example, first capacitor
Device 321 and the second capacitor 322) residual charge is stored, which is between incoming charge and the balancing charge of quantization
Difference.Then, in next conversion cycle, integrating circuit 230 collects the quantization error before new incoming electric current adds.
In other words, each next conversion is comprising from the quantization error converted before.Therefore, in addition to last conversion it
Outside, the summation of all quantization errors before will be finally filled up in subsequent conversion.This means that charge will have to code converter 120
There is the quantization error of mostly just 1 counting (1LSB).The sum then converted is longer, and resultant signal counts bigger.If right
In only one LSB error of whole transition counts, then it can become smaller as tale increases effective quantization error.For example,
If resultant signal count number reaches~1000,1 in 1000 count be equivalent to 10 bit pads (2^10=1024) etc.
Jljl.But when accumulating two samplings, sum reaches~2000, but still have a counting error.Therefore, in 2000
1 counting is equivalent to 11 conversions (2^11=2048).In one embodiment, the quantization of charge to code converter 120 misses
Difference accumulation allows converter resolution proportionally to increase with total accumulated time.
In one embodiment, the charge balance period is by such as high-speed counter (for example, using 48MHZ system clock)
Counter 360 measures.In one embodiment, any subsequent conversion can be cumulatively added (accumulation) to form a main number
Strong point.As a typical example, charge to code converter 120 collects the sample (example from 50TX (that is, transmission) circulation
Such as, therefore it is 100 edges), all samples are accumulated in single tale, such as 10000.
In another embodiment, converter 240 includes two comparator (not shown).This configuration can be referred to as " double
Comparator " method.In dual comparator method, each of two comparators are coupled to the capacitor in integrating circuit 230
One.For example, first comparator is the operation of first capacitor device 321, and the second comparator is the operation of the second capacitor 322.
In dual comparator method, when each sufficient power from capacitor (for example, first capacitor device and second capacitor) is balanced, comparator it is defeated
Some ghost effects on ingress are reduced.
It should be noted that capacitance sensing array 125 is represented by equivalent circuit, is in one embodiment that Fig. 3 is presented
Explanation, which has imitated RX the and TX line resistance of real sensor panel and self-capacitance (is Rrx, Crx, Rtx respectively
And Ctx).In addition, control unit 332 forms all control signals in the converter, and also generate pumping signal TX.Control is single
Member 332 is synchronized by the system clock of such as clock 341.
Fig. 4 is the figure for showing the signal waveform according to the charge of one embodiment to transcoder circuit.Two integrals
Capacitor --- first capacitor device 321 and the second capacitor 322 --- is consecutively connected to decaying output 312 or comparator input
343.Two switches --- SW2 323 and SW3 324 --- switch two between decaying output 312 and comparator input 343
Integrating condenser (for example, first capacitor device 321 and second capacitor 322).The switching is by the state machine from control unit 332
Signal Bal1 352, Bal2 354, Int1 353 and Int2 354 control.Intx (for example, Int1 353 and Int2 355)
Represent the signal that capacitor (for example, first capacitor device 321 and second capacitor 322) is connected to attenuator output 312.Balx
(for example, Bal1 352 and Bal2 354) represents capacitor (for example, first capacitor device 321 and second capacitor 322) and is connected to
The signal of comparator input 343.Signal Bal1 352 and the same phase of Int2 355.The phase of signal Bal2 354 and Int1 353 with
The opposite in phase of Bal1 352 and Int2 355.The out of phase of integral and balance allows charge to separate to code converter 120
Integral and Balance Treatment.Out of phase allow charge to code converter 120 the incoming noise not from sensor feelings
Condition, which is got off, executes balance.
In one embodiment, integrating condenser (for example, first capacitor device 321 and second capacitor 322) be connected to
The attenuator output 312 of corresponding TX (that is, transmission) edge synchronization, and exported before the next edge TX with attenuator
312 disconnect.The thickened portion of integrating condenser (that is, first capacitor device 321 and second capacitor 322) voltage waveform is described
During charge integration between these capacitors (that is, first capacitor device 321 and second capacitor 322) and decaying output 312
Interaction.
In one embodiment, the balanced balanced current direction of Ibal 350 depends directly on the state of comparator (for example, comparing
Device 331).Balanced balanced current is controlled by the signal Blns 334 from control unit 332.
In one embodiment, charge includes two switches, SW4 355 and SW5 356 to code converter 120, this two
Attenuator output 312 and comparator input 343 are connected to reference voltage source (that is, Vref 320) by a switch.355 He of SW4
The control of SW5 356 is executed by control unit with signal Res 357 and Init 351.Switching capacitor is (for example, first capacitor
Device 321 and the second capacitor 322) after, the switch SW4 355 in attenuator output 312 is dedicated to preventing in attenuator electricity
Charge between road 220 and integrating capacitor (for example, first capacitor device 321 and second capacitor 322) is shared.Normally operating
In, the capacitor (for example, first capacitor device 321 and second capacitor 322) for being connected to comparator 331 is almost completely discharged.
However, the voltage of attenuator output 312 is different from the reference voltage (Vref 320) at TX end-of-pulsing.
In one embodiment, attenuator output 312 has parasitic capacitance over the ground.Therefore, the electricity of attenuator output 312
It is pressed in after being disconnected with integrating condenser (for example, first capacitor device 321 and second capacitor 322) and does not change.Decaying
Device output 312 is connected briefly to reference voltage (that is, Vref 320), to discharge parasitic capacitance.Therefore, in attenuator
Charge in the parasitic capacitance of output 312 all remains unchanged after each conversion.What subsequent conversion was not converted before posts
The interference of residual charge on raw capacitor.In another embodiment, the duration of signal Init 351 can be used in reducing product
Between timesharing, this will lead to the variation of channel frequence response.
In one embodiment, when overloading, second switch SW5 356 (being controlled by signal Res 357) selectivity
Ground allows charge to change converter behavior to code converter 120.Overload means that balance lasts longer than the TX half period
Situation.In the case of an overload, integrating condenser (for example, first capacitor device 321 and second capacitor 322) is included in balance week
Charge after phase terminates but before the next edge TX.In another embodiment, in external noise to integral electricity
It overloads when condenser charge.
In one embodiment, when overloading, at least two option of operation of charge to code converter 120 are can
?.In one embodiment, charge is to the integrating condenser of code converter 120 (for example, first capacitor device 321 and second
Capacitor 322) from being not reset (that is, balance option A).In another embodiment, integral of the charge to code converter 120
Capacitor (for example, first capacitor device 321 and second capacitor 322) is tested (that is, balance option B) after overload condition,
And the overload based on detection is reset.
Fig. 5 is the figure according to the charge of another embodiment to code converter.Charge is configured to code converter 500
To allow measurement sensor self-capacitance (for example, capacitance sensing array 125).There are two charge is added to code converter 120
Voltage source (Vbias_l 510, Vbias_h 511) and switch SW6 512.Switch SW6 512 by excitation control signal (for example,
Control signal 570) to control, and switch between two voltage sources (that is, Vbias_l 510 and Vbias_h 511).SW6
Swing of 512 switching using Vbias_h 511 is equal to and lower than Vbias_l 510 carrys out modulation attenuator circuit 220.Each
The edge (for example, control signal 570) of modulation leads to sensor self-capacitance (for example, self-capacitance of capacitance sensing array 125)
It recharges.Recharge current is reflected in the output stage (for example, attenuator output 312) of attenuator.The output of attenuator
Electric current is using the charge proportional to sensor (for example, capacitance sensing array 125) charge variation come to integrating condenser (example
Such as, first capacitor device 321 and the second capacitor 322) it charges.After sensor recharges, integrating condenser (for example,
First capacitor device 321 and the second capacitor 322) rebalancing carried out by balanced balanced current.In one embodiment, integrating condenser
The switching of (for example, first capacitor device 321 and second capacitor 322) and balance are same operations, before in Fig. 3 and Fig. 4 couples
This is described.
In one embodiment, decaying modulation voltage (that is, Vbias_l 510 and Vbias_h 511) passes through tx buffering device
(i.e. the Txbuf 380 of the element with unit gain, it is noted that tx buffering device is also referred to as mask buffer) is to sensor TX
Electrode (for example, TX electrode of capacitance sensing array 125) is transmitted.The configuration is in sensor (for example, capacitance sensing array
125) two sides of mutual capacitance produce same voltage, and ignore mutual capacitance value in charging.Capacitance sensing array 125
Sense capacitance is reduced significantly, and the side effect of sensor mutual capacitance variation is also eliminated.
Fig. 6 is the flow chart according to the method 600 of the charge of one embodiment to code conversion.It can be by handling logic
Method 600 is executed, which may include hardware (circuit, special logic etc.), software (such as in general purpose computer system
The software that runs on system or special purpose machinery), firmware (embedded software) or its any combination.In one embodiment, it handles
Device 110 executes method 600.In another embodiment, charge executes method 600 to code converter 120.Optionally, electric
The other assemblies of subsystem 100 execute some or all operations of method 600.
According to one embodiment, method 600 is since block 605, wherein the decaying of attenuator circuit 220 comes from such as capacitor
The input charge of array 125 is sensed, to generate the output charge of decaying at attenuator output 312.Method 600 is by first
The output charge that capacitor 321 provides decaying proceeds to block 610.In the block 615 of method 600, the integral of first capacitor device 321 comes
The output charge of the decaying of self damping device 311.It, will be on first capacitor device 321 on comparator 331 in the block 620 of method 600
First capacitor device voltage be compared with reference voltage (for example, Vref 320), generate the first ratio to compare based on first
It is exported compared with device.First capacitor device 321 is switched to comparator input 343 from attenuator output 312 by switch SW2 323.In method
In 600 block 625, the first comparator that current feedback circuit 333 compares based on first exports the balance on first capacitor device 321
Charge.Current feedback circuit 333 can pour into charge or pull out charge.Control unit 332 controls electricity based on the output of comparator 331
Flow-generator 333.In the block 630 of method 600, control unit 332 is based on current feedback circuit 333 on first capacitor device 321
Charge balance measure the charge balance period.In the block 635 of method 600, control unit 332 passes through control signal Blns
Charge balance of the 344 control current feedback circuits 333 on first capacitor device 321.Control unit 332 based on comparator 331
One comparator output control current feedback circuit 333.In the block 640 of method 600, in integrating condenser (for example, first capacitor device
321 and second capacitor 322) on accumulate quantization error on the continuous charge balance period.In the block 645 of method 600, charge
It is converted into digital output code 250 equilibration period.The charge balance period is counted by the high-speed counter of such as counter 360
Number.
It in one embodiment, can be in two integrating condensers (for example, first capacitor device 321 and the second capacitor
322) in the case where, application method 600.Charge can be alternately in first capacitor device 321 or the second electricity to code converter 120
One upper integral charge of container 322, and balancing charge on another of first capacitor device 321 or the second capacitor 322.
Fig. 7 is the flow chart according to the charge of one embodiment to code conversion method.It can be held by processing logic
Row method 700, the processing logic may include hardware (circuit, special logic etc.), software (such as in general-purpose computing system or
The software run on special purpose machinery), firmware (embedded software) or its any combination.In one embodiment, processing unit
110 execute method 700.In another embodiment, charge executes method 700 to code converter 120.Optionally, Department of Electronics
The other assemblies of system 100 execute some or all operations of method 700.
In one embodiment, method 700 describes multiple integrating condensers (for example, first capacitor device 321 and the second electricity
Container 322) balance.Method 700 shows two main " event approach " applied to charge to code converter 120, figure
The Ping Pong method mentioned before this is shown.In the block 705 of method 700, input charge is received from capacitance sensing array 125.In side
In the block 710 of method 700, input charge is attenuated on attenuator circuit 220, and is transformed into the output charge of decaying.?
In the block 715 of method 700, by the way that first capacitor device 321 to be connected to the input signal of attenuator circuit 220 and integrated attenuation,
First capacitor device approach starts.In the block 720 of method 700, the second capacitor approach starts in the opposite manner.In the first electricity
When container is integrated, by being balanced 322 approach of the second capacitor by current feedback circuit 333.In the block of method 700
In 725, the second capacitor 322 is disconnected with current feedback circuit 333, and is continued to block 735 or terminated.In method
In 700 block 730, first capacitor device 321 and attenuator output 322 disconnect and reconnect to current feedback circuit 333.?
In the block 735 of method 700, the second capacitor 322 is connected to attenuator output 312, and the input signal of integrated attenuation.In side
In the block 740 of method 700, current feedback circuit 333 carries out charge or discharge to first capacitor device 321, and by control unit 322
Measure the charge balance period.In the block 745 of method 700, the second capacitor 322 is disconnected with attenuator circuit 220.One
In a embodiment, the second capacitor 322 can continue the second capacitor approach.In the block 750 of method 700, first capacitor device
321 disconnect with current feedback circuit 333, and continue sampling and balancing run or end.
Fig. 6 to 7 is the flow chart for showing charge to code conversion method.For simplify explain, these methods be depicted or
It is described as a series of behaviors.Although the operation of method has shown and described with particular order herein, this sequence and unawareness
Taste this operation must be executed with this sequence.It can be occurred in various orders according to the operation of the disclosure or be sent out simultaneously
It is raw, and can have herein without other behaviors of presentation and description.Specific operation can be operated at least partly with other
It is performed simultaneously, and specific operation can be executed with the sequence opposite with the sequence for showing or describing.
The above-mentioned method about capacitor to code conversion can be realized that charge is arrived by charge to code converter 120
Code converter 120 may be implemented in capacitance touch screen controller.In one embodiment, capacitance touch screen controller isCapacitance touch screen controller, the Cypress Semiconductor Co., Ltd (Cypress of such as California san jose
Semiconductor Corporation of San Jose, California) exploitationThe full point of multi-touch
The CY8CTMA3xx family of touch screen controller.Solve the touch location of more fingers and contact pen on the touchscreenCapacitance touch screen controller detection technology supports operating system, and is optimized for low-power consumption multi-touch hand
Gesture and full touch screen function.It is alternatively possible to by the touch control of other touch screen controllers or other touch-sensing devices
Device processed realizes touch location calculation feature.In one embodiment, such as the ordinary skill of this field of acquisition disclosure benefit
What personnel were understood, touch location calculation feature can be realized by other touch filtering algorithms,.
Embodiment described herein the mutual capacitance that can be used for capacitive sensing system to sense the various designs of array, or is used for
Self-capacitance senses array.In one embodiment, capacitive sensing system detects the multiple sensing elements being activated in an array,
And the signal mode on adjacent sensing element can be analyzed, noise is separated with actual signal.Such as obtain disclosure benefit
Those skilled in the art understood, embodiment described herein sensing solution independent of specific capacitor,
And it can be also used together with the other sensing solutions for including optical sensing solution.
In the above description, many details are elaborated.However, the common skill of this field to the benefit for obtaining the disclosure
Art personnel it is readily apparent that can implement the embodiment of the present invention without these specific details.In some feelings
Under condition, in block diagram form rather than well known construction and device is shown with details, to avoid this description is obscured.
It is indicated according to the algorithm of the operation to data bit in computer storage and symbol to be presented the one of detailed description
A little parts.These algorithm descriptions and means used in the technical staff that expression is in data processing field, by their works
The essence of work is most effectively communicated to others skilled in the art.Here algorithm is envisioned for needed for facilitating and generally
As a result coherent sequence of steps.Step is to need those of physical manipulation physical quantity step.This tittle although may not,
Generalling use can be by storage, the form of the electricity or magnetic signal that transmission, combine, compare and otherwise manipulate.Mainly go out
These signals are known as bit, value, element, symbol, character, item, number etc. it is verified that sometimes in the reason of the common usage
Easily.
However, should keep in mind, all these and term similar will be associated with appropriate physical quantity and be only to be applied to
The facilitate label of this tittle.Specifically express unless separately having as obvious from described above, it should be understood that sharp through the description
With the terms such as " integral ", " comparison ", " balance ", " measurement ", " offer ", " decaying ", " control ", " conversion ", " accumulation "
It discusses and refers to that perhaps the movement of similar computing electronics and the processing computing system or similar electronics calculate dress to computing system
It sets the data manipulation for being represented as physics (electronics) amount in the register and memory by computing system and is transformed into calculating system
Object is similarly represented as in system memory or register or other such information storage, transmission or display devices
Other data of reason amount.
Word " example " used herein or " exemplary " are to indicate to be used as example, example or explanation.It is described herein
It is not necessarily construed as any aspect or design of " example " or " exemplary " preferred or advantageous over other aspects or design.Phase
Instead, it using word " example " or " exemplary " is intended to that concept is presented in specific ways, as used in this application, term "or"
It is intended to indicate that the "or" of inclusive rather than exclusive "or".That is, unless otherwise specified, or it is clear from the context
It learns, " X includes A or B " is intended to indicate that any naturally inclusive displacement.That is, if X includes A；X includes B；Or X packet
Both A and B are included, then meets " X includes A or B " under what above example in office.In addition, such as in application and appended claims
Used in the article " one " and "one" should generally be interpreted to indicate " one or more ", unless otherwise specified or from context
In clearly learn that it is directed to singular.In addition, through the term " embodiment " or " one embodiment " or " realization side that use
Formula " or " implementation " are not intended to indicate identical embodiment or implementation, except description of being far from it.
Embodiment described herein further relate to apparatus for performing the operations herein.It can be for required purpose particularly structure
It makes this equipment or this equipment may include selectively being activated or reconfigured by by the computer program for storing in a computer
General purpose computer.This computer program can store in non-transitory computer-readable storage media, such as but unlimited
In including floppy disk, CD, any kind of disk of CD-ROM and magneto-optic disk, read-only memory (ROM), random access memory
(RAM), EPROM, EEPROM, magnetic or optical card, flash memory, or any kind of medium suitable for storing e-command.Term " meter
Calculation machine readable storage medium storing program for executing " should be believed to comprise to store the single medium of one or more instruction sets or multiple medium (examples
Such as, centralized or distributed database and/or associated caching and server).Term " computer-readable medium " also should be by
Think to include that can store, encode or carry any medium of instruction set, which is used to be executed and be made by machine
Machine executes any one or more methods of the present embodiment.Term " computer readable storage medium " should correspondingly be considered wrapping
Solid-state memory, optical medium are included but are not limited to, magnetic media is capable of any medium of store instruction set, which is used for
Any one or more methods for being executed by machine and machine being made to execute the present embodiment.
Algorithm presented herein and display are not inherently related to any certain computer or other equipment.It is various general
System can be used together with according to the program instructed herein, or can prove that the more professional equipment of building is required to execute
Method and step is convenient.Required structure for these a variety of systems will appear in following description.In addition, and without reference to appoint
What specific programming language describes the present embodiment.It should be understood that a variety of programming languages can be used to implement such as this paper institute
The introduction for the embodiment stated.
Numerous specific details are set forth for above description, such as particular system, component, the example of method etc., in order to provide right
Several embodiments of the invention it is well-understood.It will be apparent, however, to one skilled in the art that can there is no these
Implement at least some embodiments of the invention in the case where specific detail.In other examples, being not described in or with letter
Well known component or method is presented in single block diagram format, to avoid the present invention is unnecessarily obscured.Therefore, described above specific
Details is merely exemplary.Specific implementation can change according to these exemplary details, and be still considered as be
Within the scope of the present invention.
It should be understood that above description be intended to it is illustrative rather than restrictive.It is above-mentioned in reading and understanding
After description, many other embodiments be will be readily apparent to those of skill in the art.Therefore, it should refer to appended
The have the right full scope of desired equivalent of claim and these claims determines the scope of the present invention.
Claims (20)
1. a kind of charge is to code conversion method, comprising:
First capacitor device is coupled to the electrode of capacitance sensing array；
The received charge of the electrode from the capacitance sensing array is integrated using the first capacitor device；
The first capacitor device is decoupled from the electrode of the capacitance sensing array；
Second capacitor is coupled to the electrode of the capacitance sensing array；
Simultaneously utilize second capacitor integration from the received charge of the electrode of the capacitance sensing array and supply
First balancing charge gives the first capacitor device；
When the charge on the first capacitor device decreases below predeterminated level, then stop supplying first balancing charge to institute
State first capacitor device；
Being calculated according to the measured value for first balancing charge for being supplied to the first capacitor device indicates the capacitance sensing battle array
First value of the capacitor of the electrode of column.
2. the method as described in claim 1, further includes:
Second capacitor is decoupled from the electrode of the capacitance sensing array；
The first capacitor device is coupled to the electrode of the capacitance sensing array；
Simultaneously integrated using the first capacitor device from the received charge of second electrode of the capacitance sensing array and supply
Second balancing charge gives second capacitor；
When the charge on second capacitor decreases below the predeterminated level, then stop supplying second balancing charge
To second capacitor；
Being calculated according to the measured value for second balancing charge for being supplied to second capacitor indicates the capacitance sensing battle array
The second value of the capacitor of the electrode of column.
3. method according to claim 2 further includes
The first capacitor device is decoupled from the second electrode of the capacitance sensing array；
Second capacitor is coupled to the electrode of the capacitance sensing array；
Simultaneously utilize second capacitor integration from the received charge of the electrode of the capacitance sensing array and supply
Third balancing charge gives the first capacitor device；
When the charge on the first capacitor device decreases below the predeterminated level, then stop supplying the third balancing charge
To the first capacitor device；
Being calculated according to the measured value for the third balancing charge for being supplied to the first capacitor device indicates the capacitance sensing battle array
The third value of the capacitor of the electrode of column.
4. method as claimed in claim 3, further includes:
The 4th of the capacitor for indicating the electrode of the capacitance sensing array is calculated according to first value and the second value
Value.
5. the method as described in claim 1, wherein
The electrode that the first capacitor device is coupled to the capacitance sensing array is included in the first capacitor device and institute
Coupling attenuation device between the electrode of capacitance sensing array is stated, and
The electrode that second capacitor is coupled to the capacitance sensing array is included in second capacitor and institute
State coupling attenuation device between the electrode of capacitance sensing array.
6. method as claimed in claim 3, wherein
The third balancing charge is supplied to be based at least partially on to the first capacitor device from supply first balancing charge
When remaining accumulation quantization error.
7. method as claimed in claim 5, wherein
Coupled between the first capacitor device and the electrode of the capacitance sensing array attenuator be included in it is described
Programmable attenuator is coupled between first capacitor device and the electrode of the capacitance sensing array.
8. the method for claim 1, wherein
It is come from from the received charge of the electrode of the capacitance sensing array including integral using first capacitor device integral
The charge of the rising edge of pumping signal, and
It is come from from the received charge of the electrode of the capacitance sensing array including integral using second capacitor integration
The charge of the drop edge of the pumping signal.
9. the method for claim 1, wherein
It includes current feedback circuit being coupled to the first capacitor device that first balancing charge, which is supplied, to the first capacitor device.
10. a kind of charge is to code conversion equipment, comprising:
Capacitance sensing array, the capacitance sensing array include multiple sensing electrodes；
First converter and the second converter, selectively couple at least one of the multiple sensing electrode respectively；
Current feedback circuit, the current feedback circuit selectively couple to first converter and second converter；And
Control unit, described control unit are coupled to first converter and second converter, described control unit quilt
It is configured to control the current feedback circuit and is coupled to each of first converter and second converter to balance
The duration of the charge of each of the first converter and second converter is stated,
Wherein, first converter is configured to the letter of the capacitor of the sensing electrode of capacitance sensing array described in sampled representation
Number, and second converter is configured to balance the charge of prior sample to allow the continuous integral of input signal.
11. equipment as claimed in claim 10, further includes:
Attenuator, the attenuator are coupled at least one and first converter and described of the multiple sensing electrode
Between two converters.
12. equipment as claimed in claim 11, wherein the attenuator includes programmable attenuator.
13. equipment as claimed in claim 10, wherein first converter and second converter include single together
For charge to code converter, the charge to code converter includes first capacitor device and the second capacitor, the first capacitor
Device and second capacitor selectively couple to respectively the multiple sensing electrode at least one, described control unit and institute
State current feedback circuit.
14. equipment as claimed in claim 10, wherein
First converter is configured to integrate the charge from the rising pumping signal for being applied to the capacitance sensing array,
And
Second converter is configured to integrate the charge from the decline pumping signal for being applied to the capacitance sensing array.
15. equipment as claimed in claim 13, wherein the first capacitor device and second capacitor respectively include non-thread
Property capacitor.
16. equipment as claimed in claim 15, wherein each nonlinear capacitor includes mos gate pole capacitive oxide.
17. a kind of charge is to code conversion device, comprising:
Terminal, the terminal are configured to couple to the electrode of capacitance sensing array；
First capacitor device and the second capacitor, the first capacitor device and second capacitor are respectively configured to selective coupling
It closes the terminal and operates as integrator；
Current feedback circuit, the current feedback circuit are configured to selectively couple to the first capacitor device and second capacitor
Each of device；And
Control unit, described control unit are configured to control the first capacitor device and second capacitor to the terminal
With the coupling of the current feedback circuit, and it is configured to by controlling the current feedback circuit and the current feedback circuit to institute
The coupling of each of first capacitor device and second capacitor is stated to balance the first capacitor device and second capacitor
Each of on charge.
18. device as claimed in claim 17, further includes:
Attenuator, the attenuator are coupled between the terminal and the first capacitor device and second capacitor.
19. device as claimed in claim 17, wherein the first capacitor device and second capacitor respectively include non-thread
Property capacitor.
20. device as claimed in claim 17, wherein
Second capacitor is configured to integral charge, and the current feedback circuit is configured to balance the first capacitor simultaneously
Charge on device, and the first capacitor device is configured to integral charge while the current feedback circuit is configured to balance institute
State the charge on the second capacitor.
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201361877773P | 2013-09-13 | 2013-09-13 | |
| US61/877,773 | 2013-09-13 | ||
| US14/097,138 | 2013-12-04 | ||
| US14/097,138 US8836669B1 (en) | 2013-09-13 | 2013-12-04 | High resolution capacitance to code converter |
| PCT/US2013/076596 WO2015038177A1 (en) | 2013-09-13 | 2013-12-19 | High resolution capacitance to code converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105849680A CN105849680A (en) | 2016-08-10 |
| CN105849680B true CN105849680B (en) | 2019-03-01 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201380080204.4A Active CN105849680B (en) | 2013-09-13 | 2013-12-19 | High-resolution capacitor is to code converter |
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| WO (1) | WO2015038177A1 (en) |
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| US11531424B2 (en) * | 2017-09-07 | 2022-12-20 | Cypress Semiconductor Corporation | Nano-power capacitance-to-digital converter |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102483659A (en) * | 2009-08-25 | 2012-05-30 | 苹果公司 | Integrated touch screen |
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| US8547114B2 (en) * | 2006-11-14 | 2013-10-01 | Cypress Semiconductor Corporation | Capacitance to code converter with sigma-delta modulator |
| US8358142B2 (en) * | 2008-02-27 | 2013-01-22 | Cypress Semiconductor Corporation | Methods and circuits for measuring mutual and self capacitance |
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2013
- 2013-12-19 CN CN201380080204.4A patent/CN105849680B/en active Active
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| CN102483659A (en) * | 2009-08-25 | 2012-05-30 | 苹果公司 | Integrated touch screen |
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| WO2015038177A1 (en) | 2015-03-19 |
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