CN105846827B - Iterative joint message source and channel interpretation method based on arithmetic code and low density parity check code - Google Patents

Iterative joint message source and channel interpretation method based on arithmetic code and low density parity check code Download PDF

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CN105846827B
CN105846827B CN201610152971.7A CN201610152971A CN105846827B CN 105846827 B CN105846827 B CN 105846827B CN 201610152971 A CN201610152971 A CN 201610152971A CN 105846827 B CN105846827 B CN 105846827B
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sequence
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information
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CN105846827A (en
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薛睿
孙岩博
李超
赵旦峰
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Harbin Engineering University
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/40—Conversion to or from variable length codes, e.g. Shannon-Fano code, Huffman code, Morse code
    • H03M7/4006—Conversion to or from arithmetic code
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1108—Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix

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Abstract

The iterative joint message source and channel interpretation method based on arithmetic code and low density parity check code that the present invention is to provide a kind of.Source symbol sequence shCoded sequence b is obtained after AC encoderh, D coded sequence bhThe input message sequence b of LDPC encoder is obtained after parallel-to-serial converter, b forms codeword sequence x after passing through LDPC encoder, x is sent to awgn channel after BPSK is modulated, reception sequence r is input in the closed loop of ldpc decoder and Chase-SISO AC decoder composition and is iterated decoding, and ldpc decoder exports coding sequence after iteration several timesSequence is converted to through deserializerBy obtaining decoding symbol sebolic addressing after AC decoderThe present invention combines the very high AC of lossless compression efficiency with the very strong LDPC code of anti-error capability, so that the validity and reliability of system is all very high, while further improving reliability in the case where guaranteeing validity using IJSCD method.

Description

Iterative joint source channel decoding method based on arithmetic code and low-density parity check code
Technical Field
The invention relates to a joint source channel decoding method in a wireless communication system, in particular to an iterative joint source channel decoding method based on arithmetic codes and low-density parity check codes.
Background
The source coding and the channel coding are two indispensable parts of a communication system, the purpose of the source coding is to remove source redundancy and improve the effectiveness of communication, and the purpose of the channel coding is to add redundancy and improve the reliability of communication. The conventional receiver structure design usually considers the separation of source decoding and channel decoding, and the source information is not fully utilized. The Joint Source Channel Decoding (JSCD) method considers the information Source and the Channel integrally, so that the information Source information is fully utilized, and the reliability can be further improved on the premise of ensuring the effectiveness.
Arithmetic Coding (AC) is a lossless source Coding with higher compression efficiency than Huffman Coding, and maps the whole symbol sequence to be coded into a code word, introduces the idea of fractional Coding, can approach the upper limit of the theoretical compression ratio infinitely, and has been widely applied to various compression standards such as images and videos. Low-density Parity-check (LDPC) codes are a class of channel coding schemes comparable to Turbo codes, and the decoding performance of the LDPC codes can approach Shannon limit, and the LDPC codes are adopted by the european new generation digital satellite broadcasting standard (DVB-S2) in 2003. Therefore, the combination of the arithmetic code and the LDPC code has wide application prospect and practical value, and the JSCD method can improve the anti-interference capability and realize the reliability requirement of communication on the basis of ensuring the effectiveness.
With the idea of Turbo iterative decoding, Soft-input Soft-output (SISO) decoding algorithm has gained wide attention from scholars at home and abroad. In order to realize the joint decoding of the information source and the channel, an information source decoder structure based on a SISO algorithm is provided, the information source decoder combines information source prior information and channel information, soft information is obtained by adopting a correlation algorithm, and the soft information is transmitted to a channel decoder. At present, multimedia digital transmission becomes the mainstream of communication services, the amount of data transmitted by the multimedia digital transmission is huge, and the multimedia digital transmission faces complex and variable channel environments, and higher requirements are put forward on the effectiveness and reliability of a communication system. If the joint information source channel decoding technology is applied to a multimedia communication system, the reliability of the system can be improved while the high-efficiency data transmission is ensured.
In 2007, m.grangetto et al published a document entitled "Iterative Decoding of serially associated information and Channel codes with JPEG 2000 applications" in the journal IEEE Transactions on Image Processing, and proposed an Iterative Joint Source Channel Decoding (IJSCD) method based on arithmetic codes and systematic convolutional codes, which adds forbidden symbols in an arithmetic encoder to increase the error detection capability of arithmetic codes, an AC-SISO decoder calculates the posterior probability of information bits by using bcjr (bahlcocke Jelinek raviv) algorithm and transmits it to a convolutional code decoder, and the convolutional code decoder transmits the obtained extrinsic information to an AC-o decoder, which completes Decoding finally through multiple iterations. However, the method has the disadvantages of losing part of the compression efficiency of the arithmetic code, large calculation amount and high realization complexity.
In 2008, a self-adaptive IJSCD method based on arithmetic codes and system convolutional codes is proposed in the doctor academic thesis of doctor based on arithmetic codes' united information source channel coding and decoding research, and the method adaptively adjusts the number of decoding nodes of a BCJR algorithm according to the quality of channel conditions, so that the calculated amount is reduced compared with that of the IJSCD method proposed by m.grangetto et al, but when the length of information bit is large, the calculated amount of the method is still huge and is not easy to implement.
Disclosure of Invention
The invention aims to provide an iterative joint source channel decoding method based on arithmetic codes and low-density parity check codes, which can further improve the reliability of a system while ensuring the effectiveness, has small calculation amount and realizes low complexity.
The purpose of the invention is realized as follows:
source symbol sequence shObtaining a coding sequence b after passing through an AC encoder 1hD code sequences bhObtaining an input information sequence b of the LDPC encoder 3 after passing through the parallel-serial converter 2, forming a codeword sequence x after passing through the LDPC encoder 3, transmitting the x into an AWGN channel 4 after BPSK modulation, inputting a receiving sequence r into a closed loop consisting of an LDPC decoder 5 and a Chase-SISO AC decoder 6 for iterative decoding, and outputting a decoding sequence by the LDPC decoder 5 after a plurality of iterations Converted into a sequence by a serial-to-parallel converter 7 After passing through the AC decoder 8, a decoded symbol sequence is obtained
The iterative decoding of the received sequence r input into the closed loop formed by the LDPC decoder 5 and the Chase-SISO AC decoder 6 specifically includes: setting the initial value fed back to the LDPC decoder 5 by the Chase-SISO AC decoder 6 as '0', obtaining the posterior probability of a sending sequence by the demodulator according to the channel information r, transmitting the posterior probability to the LDPC decoder 5, and then performing the first iteration joint decoding process; the first iterative joint coding process comprises: the LDPC decoder 5 adopts LLR-BP algorithm to output decoding sequenceAnd soft information qiSaid coding sequenceAnd soft information qiPassed to a Chase-SISO AC decoder 6, the Chase-SISO AC decoder 6 being dependent on the sequenceAnd soft information qiObtaining new soft information w by applying Chase-type algorithmiAnd new soft information wiAnd feeding back to the LDPC decoder 5 to complete the first iteration joint decoding.
The iteration of the plurality of times is continuously completed for the second iteration, the third iteration, the
The invention relates to an Iterative Joint Source Channel Decoding (IJSCD) method based on an Arithmetic Code (AC) and a low-density parity check (LDPC) code, which comprises an AC encoder 1, a parallel-serial converter (P/S)2, an LDPC encoder 3, an AWGN channel 4, an LDPC decoder 5 and a base stationThis is done in a system consisting of a Chase-type algorithm AC soft-input soft-output (Chase-SISO AC) decoder 6, a serial-to-parallel converter (S/P)7 and an AC decoder 8. Source symbol sequence shObtaining a coding sequence b after passing through an AC encoder 1hD code sequences bhObtaining an input information sequence b of the LDPC encoder 3 after passing through the parallel-serial converter 2, forming a codeword sequence x after passing through the LDPC encoder 3, transmitting the x into an AWGN channel 4 after BPSK modulation, inputting a receiving sequence r into a closed loop consisting of an LDPC decoder 5 and a Chase-SISO AC decoder 6 for iterative decoding, and outputting a decoding sequence by the LDPC decoder 5 after a plurality of iterations Converted into a sequence by a serial-to-parallel converter 7 After passing through the AC decoder 8, a decoded symbol sequence is obtainedThe invention is mainly characterized in that:
(1) the LDPC decoder 5 and the Chase-SISO AC decoder 6 form a SISO algorithm-based iterative processing closed loop, and an initial value fed back to the LDPC decoder 5 by the Chase-SISO AC decoder 6 is set to be 0. The demodulator obtains the posterior probability of the sending sequence according to the channel information r, transmits the posterior probability to the LDPC decoder 5, and then carries out the first iteration joint decoding process, namely the LDPC decoder 5 adopts the LLR-BP algorithm to output the decoding sequenceAnd soft information qiThe sequence and the soft information are passed to a Chase-SISO AC decoder 6, the Chase-SISO AC decoder 6 being based on the sequenceAnd confidence qiObtaining soft information w by applying Chase-type algorithmiAnd feeds it back to the LDPC decoder 5. And finishing the first iteration joint decoding, and continuing to finish the second iteration, the third iteration and the Nth iteration according to the method until the maximum external iteration number is reached or
(2) The LDPC decoder 5 and the Chase-SISO AC decoder 6 form a SISO algorithm-based iterative processing closed loop, the channel decoder and the information source decoder exchange and transmit soft information through an iterative mechanism, and the information source information and the channel information are fully utilized.
(3) The introduction and application of the Chase-type algorithm of low complexity in the AC decoder 6.
The invention adopts a low-complexity Chase-type algorithm to realize the SISO structure of the arithmetic code, and carries out iterative combined decoding on the arithmetic code and the LDPC code, thereby improving the reliability of the system and simultaneously considering the realization complexity.
The invention has the advantages that:
considering that the implementation of AC-SISO decoders based on BCJR algorithms comes at the cost of sacrificing AC coding efficiency, the present invention adopts Chase-type algorithm to design AC-SISO decoders. The Chase-type algorithm is applied, no forbidden symbol needs to be added in the source set, and the coding efficiency of the AC is not influenced.
Aiming at the problems of large operation amount and high realization complexity of the AC-SISO decoder based on the BCJR algorithm, the Chase-type algorithm adopted by the invention can effectively reduce the calculation amount of the AC-SISO decoder. AC-SISO decoder based on Chase-type algorithm only in Q2α(α generally takes 6) candidate sequences to select the sequence satisfying the following conditions as the decoding sequence:
1) the length of the decoding symbol sequence is equal to the length of the source symbol sequence;
2) with the maximum a posteriori probability.
The AC-SISO decoder based on the Chase-type algorithm has lower operation amount and is easy to realize because the decoding process has no more multiplication operation and the operation amount is only related to the bit number α with the lowest selection reliability and is not related to the length of the sequence.
The invention combines the AC with high lossless compression efficiency and the LDPC code with strong error resistance, so that the effectiveness and reliability of the system are high, and meanwhile, the reliability of the system can be further improved by adopting the IJSCD method under the condition of ensuring the effectiveness.
Drawings
FIG. 1 is a block diagram of a system according to the present invention;
FIG. 2 is a schematic diagram of message passing in the iterative joint decoding process of AC and LDPC codes corresponding to the present invention;
FIG. 3 is a bit error rate curve of iterative joint decoding of AC and LDPC codes corresponding to the present invention;
fig. 4 is a packet loss rate curve of iterative joint decoding of AC and LDPC codes corresponding to the present invention.
Detailed Description
The invention will be further illustrated by way of example in the accompanying drawings in which:
fig. 1 is a block diagram of a system according to the present invention, which includes an AC encoder 1, a parallel-to-serial converter (P/S)2, an LDPC encoder 3, an AWGN channel 4, an LDPC decoder 5, a Chase-type algorithm based AC soft input-soft output (Chase-SISOAC) decoder 6, a serial-to-parallel converter (S/P)7, and an AC decoder 8. The modules in fig. 1 are defined as follows:
1 is an arithmetic code encoder;
2 is a parallel-to-serial converter (P/S);
3 is LDPC code coder;
4 is an Additive White Gaussian Noise (AWGN) channel;
5 is LDPC decoder;
6 is an AC-SISO decoder adopting a Chase-type algorithm;
7 is a serial-to-parallel converter (S/P) with the opposite action to that of the module 2;
and 8 is an arithmetic code decoder.
For convenience of description, each symbol in fig. 1 is defined as follows:
sh[L]: the length of the symbol sequence input by the information source is L, h is more than or equal to 1 and less than or equal to D, and D represents the number of the symbol sequences input to the AC encoder 1 in parallel;
bh[kh]: the length of the output of the AC encoder 1 is khThe codeword sequence of (1);
b [ K ]: the length of the code word sequence output by the parallel-serial converter 2 is K;
x [ N ]: the length of the code word sequence output by the LDPC encoder 3 is N;
r [ N ]: the AWGN channel 4 outputs a sequence of length N;
q [ K ]: the length of the sequence output by the LDPC decoder 5 is K;
qh[kh]: the length of the output of the serial-to-parallel converter 7 is khThe sequence of (a);
wh[kh]: the output of the Chase-SISO AC decoder 6 has a length khThe sequence of (a);
w [ K ]: the length of the sequence is K and is output by the parallel-serial converter 2 and sent to the LDPC decoder 5;
after a plurality of iterations, the LDPC decoder 5 outputs a decoding sequence with the length of K;
the length of the output after the serial-parallel converter 7 is khThe sequence of (a);
the AC decoder 8 outputs a decoded symbol sequence of length L.
With reference to fig. 1, a symbol sequence s to be transmittedhLength k is obtained by AC encoder 1hCoding sequence b ofhD number of bhConverted by a parallel-to-serial converter 2 to obtain an information sequence b of length K, i.e.The information bit length of the LDPC code is K ', if K < K', in order to ensure the LDPC code to be effectively encoded, a plurality of '0' or '1' are filled behind the sequence b. b, a code word sequence x is formed after passing through the LDPC encoder 3, x is sent to an AWGN channel 4 after being modulated by BPSK, a receiving sequence r is input into a closed loop formed by the LDPC decoder 5 and the Chase-SISO AC decoder 6 for iterative decoding, and the LDPC decoder 5 outputs a decoding sequence after a plurality of iterations Converted into a sequence by a serial-to-parallel converter 7 After passing through the AC decoder 8, a decoded symbol sequence is obtained
With reference to fig. 2, fig. 2 is a schematic diagram of message passing in an iterative process of AC and LDPC codes, where symbols in fig. 2 are defined as follows:
vj(1. ltoreq. j. ltoreq.M): the jth check node of the LDPC code;
ci(1. ltoreq. i. ltoreq.N): the ith variable node of the LDPC code;
Lij: jth check node vjTo the ith variable node ciThe message of (2);
qi: ith variable node ciSoft information passed to the Chase-SISO AC decoder 6;
wi: the Chase-SISO AC decoder 6 passes to the ith variable node ciSoft information of (2);
Tji: ith variable node ciTo the jth check node vjThe message of (2).
Since the check bits generated by the LDPC code encoding do not contain any source information, the variable node ciPassing only information bits of the message to the Chase-SISO AC decoder 6, i.e. qiI is more than or equal to 1 and less than or equal to K; in the same way, ciI is more than or equal to 1 and less than or equal to K.
The LDPC decoder receives the channel information sequence r ═ (r ═ r)1,r2,...,rN) And starting decoding, wherein the decoding process is as follows:
1) initialization variable node ciTo check nodes v connected theretojThe information of (2):
wherein, delta2Is the mean square error of Gaussian white noise, wiIs 0;
2) calculating check node vjTo variable node c connected theretoiAnd i ∈ C (j), C (j) represents all parity nodes vjSet of connected variable nodes:
wherein C (j) \\ i represents a variable-dividing node ciAll other check nodes vjA set of connected variable nodes, wherein t is the iteration times of LDPC decoding, and is called the internal iteration times of combined decoding;
3) compute variable node ciTo check node v connected theretojAnd j ∈ V (i), V (i) represents all the same variable nodes ciSet of connected check nodes:
wherein V (i) \\ j represents a check-removing node vjAll except the same variable node ciA set of connected check nodes;
4) calculating hard decision information of all variable nodes:
if it isThen the sequence is decodedIth codeword ofOtherwiseThe check matrix of the LDPC code is H ifThe iterative joint decoding of the AC and the LDPC is finished; if it is notIf the maximum internal iteration times are not reached, returning to the step 2) to continue decoding; if it is notAnd the maximum internal iteration times are reached, the LDPC decoder decodes the sequenceAnd its confidence level qi＝Ti (t)Passed as extrinsic information to a Chase-SISO decoder.
Decoding sequenceAnd its confidence level qiD pieces of length k are obtained after S/P7 conversionhIs decoded by the decoding sequenceAnd its corresponding confidence sequence qhThe Chase-SISO AC decoder 6 pairs the D sequencesDecoding is carried out, and the decoding process is as follows:
1) according to qhDetermining a sequenceThe α bit position with the lowest confidence level;
2) generating the ith test vectorWherein Q is 2α；tiTraversing all binary sequences which only allow the occurrence of '1' at the position corresponding to α bits with the lowest credibility and the occurrence of '0' at the rest positions and have the maximum code weight not exceeding α;
3) generating the ith test sequenceWherein Denotes the moduli 2 and, ykIs a decoded sequenceThe kth hard decision bit of (1);
4) using standard arithmetic decoder to test Q sequences ziDecoding is carried out if the sequence ziThe length of the decoded symbol sequence is equal to L, the sequence is added to the set gamma, otherwise the sequence z is addediDiscarding;
5) computing the sequence z in the set ΓiCorresponding Maximum a Posteriori probability (MAP):
wherein,is a sequence ziSequence obtained by BPSK modulation, siIs a sequence ziThe sequence of symbols, P(s), obtained by standard arithmetic decodingi) Representing a sequence of symbols siA prior probability of occurrence;
6) computing sequence pairsOutput extrinsic information wh：
Wherein,is the sequence with maximum MAP value in the set Γ, J is the number of sequences in the set Γ, σ is the experimental value, E is α bits with minimum confidence in the sequenceTo the corresponding position in (a).
7) D sequence pairsD external information sequences w are obtained by decoding through a Chase-SISO AC decoder 6hAnd then the information w transmitted to the variable node is obtained after P/S2 conversion. If the maximum external iteration times are reached, the decoding is finished; otherwise, returning to the LDPC decoder to continue decoding.
The IJSCD method based on AC and LDPC of the present embodiment can further improve the reliability of the system on the premise of ensuring the validity of the system, and the method has small computation workload and low implementation complexity. The main characteristics are as follows:
1) the AC encoder 1 adopts binary self-adaptive arithmetic coding, the probability of the source symbols before coding is set to be equal probability distribution, the coding initial interval is [0,0XFFF ], and a following bit method is adopted for coding;
2) the LDPC encoder 3 adopts a system LDPC code, the check matrix adopts an edge density structure (PEG) method, and the encoding adopts an approximate lower triangular matrix encoding method;
3) the LDPC decoder 5 adopts a Log-likelihood-rate based belief Propagation (LLR-BP) algorithm based on a number domain;
4) the Chase-SISO AC decoder 6 employs a Chase-type algorithm.
Taking binary independent memoryless source with probability distribution of 0.9 and 0.1 as an example, the generated symbol sequence shHas a length of 110, 49 parallel input symbol sequences shAn LDPC code check matrix is constructed by using an edge density method, the code length is 3000, the code Rate is 0.876, the average degree of variable nodes is 5, the average degree of check nodes is 37.58, the optimal value of sigma is 1, BPSK modulation is adopted, and a Bit Error Rate (BER) curve and a Packet loss Rate (PER) curve based on AC and LDPC code Separate Source Channel Decoding (SSCD) and IJSCD under an AWGN Channel are shown in the attached figures 3 and 4, wherein α represents the Bit number with the lowest reliability selected during AC-SISO Decoding, β represents the inner iteration number of LDPC Decoding, and epsilon represents the outer iteration number.
As can be seen from fig. 3, the bit error rate of the IJSCD method based on AC and LDPC codes is smaller than that of the SSCD method, which indicates that the decoding performance of the IJSCD method is better and the reliability is higher, for the IJSCD method, the performance is improved by about 0.1dB when α ═ 6 when β and ∈ are fixed, the performance is significantly better than β ═ 20 when α ═ 50 when 5634 and ∈ are fixed, and the performance is slightly improved when 7 ═ 7 when α and 5634 are fixed, so that the larger the value of α is, the larger the number of times of inner and outer iterations is, the better the decoding performance of the IJSCD method based on AC and LDPC codes is, the better the decoding performance is based on AC and LDPC codes is, when α ═ 6, 4 ═ 50, and ∈ ═ 5 is, the ifc method can obtain a gain of about 0.2dB than the SSCD method, and the reliability is improved by the same as that of the ifcd method using the SSCD method.

Claims (1)

1. An iterative joint source channel decoding method based on arithmetic codes and low-density parity check codes is characterized in that: source symbol sequence shObtaining a coding sequence b after passing through an AC encoder (1)hD code sequences bhAn input information sequence b of the LDPC encoder (3) is obtained after the parallel-serial converter (2), a codeword sequence x is formed after the b passes through the LDPC encoder (3), the x is sent to an AWGN channel (4) after BPSK modulation, a received sequence r is input into a closed loop formed by an LDPC decoder (5) and a Chase-SISO AC decoder (6) for iterative decoding, and the LDPC decoder (5) outputs a decoding sequence after a plurality of iterations Converted into a sequence by a serial-to-parallel converter (7) After passing through an AC decoder (8), a decoded symbol sequence is obtained
The LDPC decoder receives the channel information sequence r ═ (r ═ r)1,r2,...,rN) And starting decoding, wherein the decoding process is as follows:
1) initialization variable node ciTo check nodes v connected theretojThe information of (2):
wherein, delta2Is the mean square error of Gaussian white noise, wiIs 0;
2) calculating check node vjTo variable node c connected theretoiAnd i ∈ C (j), C (j) represents all parity nodes vjSet of connected variable nodes:
wherein C (j) \\ i represents a variable-dividing node ciAll other check nodes vjA set of connected variable nodes, wherein t is the iteration times of LDPC decoding, and is called the internal iteration times of combined decoding;
3) compute variable node ciTo check node v connected theretojAnd j ∈ V (i), V (i) represents all the same variable nodes ciSet of connected check nodes:
wherein V (i) \\ j represents a check-removing node vjAll except the same variable node ciA set of connected check nodes;
4) calculating hard decision information of all variable nodes:
if Ti (t)Is greater than or equal to 0, then the decoding sequenceIth codeword ofOtherwiseThe check matrix of the LDPC code is H ifThe iterative joint decoding of the AC and the LDPC is finished; if it is notIf the maximum internal iteration times are not reached, returning to the step 2) to continue decoding; if it is notAnd the maximum internal iteration times are reached, the LDPC decoder decodes the sequenceAnd its confidence level qi＝Ti (t)As extrinsic information to a Chase-SISO decoder;
decoding sequenceAnd its confidence level qiD pieces of length k are obtained after S/P7 conversionhIs decoded by the decoding sequenceAnd its corresponding confidence sequence qhThe Chase-SISO AC decoder (6) pairs the D sequencesDecoding is carried out, and the decoding process is as follows:
1) according to qhDetermining a sequenceThe α bit position with the lowest confidence level;
2) generating the ith test vectorWherein Q is 2α；tiTraversing all binary sequences which only allow the occurrence of '1' at the position corresponding to α bits with the lowest credibility and the occurrence of '0' at the rest positions and have the maximum code weight not exceeding α;
3) generating the ith test sequenceWherein Denotes the moduli 2 and, ykIs a decoded sequenceThe kth hard decision bit of (1);
4) using standard arithmetic decoder to test Q sequences ziDecoding is carried out if the sequence ziThe length of the decoded symbol sequence is equal to L, the sequence is added to the set gamma, otherwise the sequence z is addediDiscarding;
5) computing the sequence z in the set ΓiCorresponding maximum a posteriori probability MAP:
wherein,is a sequence ziSequence obtained by BPSK modulation, siIs a sequence ziThe sequence of symbols, P(s), obtained by standard arithmetic decodingi) Representing a sequence of symbols siA prior probability of occurrence;
6) computing sequence pairsOutput extrinsic information wh：
Wherein,is the sequence with maximum MAP value in the set Γ, J is the number of sequences in the set Γ, σ is the experimental value, E is α bits with minimum confidence in the sequenceThe corresponding position in (1);
7) d sequence pairsD external information sequences w are obtained by decoding through a Chase-SISO AC decoder (6)hThen obtaining information w transmitted to the variable node after P/S2 conversion, and finishing decoding if the maximum external iteration times is reached; otherwise, returning to the LDPC decoder to continue decoding.
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