CN105843120A - Dynamic programmable signal detection circuit and method - Google Patents
Dynamic programmable signal detection circuit and method Download PDFInfo
- Publication number
- CN105843120A CN105843120A CN201610211037.8A CN201610211037A CN105843120A CN 105843120 A CN105843120 A CN 105843120A CN 201610211037 A CN201610211037 A CN 201610211037A CN 105843120 A CN105843120 A CN 105843120A
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- signal
- intelligent controller
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- ultra
- processing unit
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0421—Multiprocessor system
Abstract
The invention discloses a dynamic programmable signal detection circuit and a method. The signal detection circuit comprises an intelligent controller which dynamically generates a micro control instruction according to an operation state or signal characteristics, and a programmable processor which independently operates in the intelligent controller, detects an input signal according to the micro control instruction and then outputs the detected input signal to the intelligent controller for processing. Through the signal detection circuit, the signal input processing detection speed can be improved, and great dynamic upgradeable flexibility is further realized.
Description
Technical field
The invention belongs to electronic technology field, specifically, relate to a kind of can the signal deteching circuit of dynamic programming
And method.
Background technology
Intelligent controller in power system device, typically by single-chip microcomputer as control core, by transporting thereon
The software that controls of row carries out intelligentized control method to the electric energy device in system and device.The signal input of power system is
Diversified, centre includes preposition sampling system or needs the High voltage output equipment of electromagnetic isolation to feed back.This
The input of a little signals is required for the detection carrying out pattern match and inputs or output to the signal judging sampling system
The feedback information of system is the most normal.
Owing to the logic of signal interpretation is flexible and changeable, even can change along with the change of system and device duty,
So the software program that in existing design, the logic of signal interpretation is used mostly on control chip realizes.This do
The drawback one of method is to take the calculating time of control chip, calculating resource, hinders the complicated real of intelligent control algorithm
Existing；Two is the response speed affecting signal, especially in the case of signal report fault needs emergent management,
Software program calculates interpretation and the single-threaded characteristic of physics of control task due to it, can produce the considerable time
Postpone, serious in the case of even can be delayed the timely process of urgency signal.
In order to improve response speed, the design of a part use FPGA hardware auxiliary realize.FPGA device
Hardware programming ability due to its uniqueness, it is possible to it is more reasonable to find between response speed and motility able to programme
Equilibrium point, be more and more incorporated in the design of intelligent controlling device.But conventional hardware detection method
In, it is set in advance that the testing circuit being deployed on FPGA carries out mode detection to signal, lacks and dynamically compiles
The flexible control of journey, limits giving full play to of FPGA device ability.
Summary of the invention
For solving problem above, the invention provides a kind of can the signal deteching circuit of dynamic programming and method, use
In the speed improving the detection of signal input processing.
According to an aspect of the invention, it is provided a kind of can the signal deteching circuit of dynamic programming, including:
Intelligent controller, dynamically generates micro-control instruction according to running status or characteristics of signals；
Programmable processor, independent operating, in described intelligent controller, instructs input signal according to described micro-control
Export after detecting and process to described intelligent controller.
According to one embodiment of present invention, described programmable processor is FPGA or CPLD.
According to one embodiment of present invention, described programmable processor divides according to signal degree of concurrence deployment equivalent
Cloth Ultra-fine processing unit, the instruction of described micro-control is issued to the Ultra-fine of correspondence by described intelligent controller
Perform on processing unit.
According to one embodiment of present invention, described Ultra-fine processing unit includes:
Signal latch module, is used for storing signal to be detected；
Instruction memory module, is used for storing micro-control instruction；
State cache module, for storing the running state information of Ultra-fine processing unit；
Instruction performs module, according to the signal to be detected being currently entered and the running status of Ultra-fine processing unit
Information, transfers micro-control instruction union and obtains new dbjective state and output signal, wherein, new dbjective state
For the running status of state cache module is updated；
Output control module, is used for controlling output signal.
According to one embodiment of present invention, described signal deteching circuit also includes being arranged at described intelligent controller
And the control interface between described state cache module, in order to make the inquiry of described intelligent controller and control described can
The running state information of programmed process device.
According to one embodiment of present invention, described signal deteching circuit also includes being arranged at described intelligent controller
And the instruction deployment interface between described instruction memory module, in order to make described intelligent controller realize micro-control instruction
Setting and inquiry.
According to one embodiment of present invention, described Ultra-fine processing unit works in a parallel fashion.
According to one embodiment of present invention, described programmable processor is deployed in signal input module.
According to one embodiment of present invention, multiple described Ultra-fine processing units and described intelligent controller with
Bus mode connects.
According to another aspect of the present invention, additionally provide a kind of can the signal detecting method of dynamic programming, including:
Intelligent controller dynamically generates micro-control instruction according to plant running state or characteristics of signals；
The micro-control that programmable processor storage generates instructs and updates micro-control instruction storage address；
Programmable processor refers to according to input signal to be detected, current programmable processor running status and micro-control
Order performs mathematical calculations, and obtains new running status value and output signal；
Programmable processor, according to new running status value, updates programmable processor running status.
Beneficial effects of the present invention:
The present invention utilizes the operational capability of programmable processing device, by the way of arranging control microinstruction register
Drive Ultra-fine signal processing unit, carry out signal mode detection, owing to having concurrency and programmability,
Can improve the speed of signal input processing detection, and have can the great flexibility of dynamic update.
Other features and advantages of the present invention will illustrate in the following description, and, partly from description
In become apparent, or by implement the present invention and understand.The purpose of the present invention and other advantages can be passed through
Structure specifically noted in description, claims and accompanying drawing realizes and obtains.
Accompanying drawing explanation
For the technical scheme being illustrated more clearly that in the embodiment of the present invention, required in embodiment being described below
The accompanying drawing wanted does simply to be introduced:
Fig. 1 is the system architecture signal of distributed Ultra-fine processing unit according to an embodiment of the invention
Figure；
Fig. 2 is that the structure being arranged on signal pickup assembly by FPGA according to an embodiment of the invention is shown
It is intended to；
Fig. 3 is Ultra-fine processing unit structural representation according to an embodiment of the invention；
Fig. 4 be according to an embodiment of the invention can the signal detecting method flow chart of dynamic programming.
Detailed description of the invention
Embodiments of the present invention are described in detail, whereby to the present invention how below with reference to drawings and Examples
Application technology means solve technical problem, and the process that realizes reaching technique effect can fully understand and real according to this
Execute.As long as it should be noted that do not constitute conflict, in each embodiment in the present invention and each embodiment
Each feature can be combined with each other, and the technical scheme formed is all within protection scope of the present invention.
This signal deteching circuit includes intelligent controller and the programmable processor being connected with this intelligent controller.Its
In, intelligent controller dynamically generates micro-control instruction according to plant running state or characteristics of signals；Programmable processor
Independent operating, in intelligent controller, exports to intelligent controller after detecting input signal according to micro-control instruction
Process.
In this signal deteching circuit, device, under different running statuses, needs to process source signal
Logic will be different, then need intelligent controller to be dynamically generated micro-control according to running status or characteristics of signals and refer to
Order.And the micro-control instruction that programmable processor needs the dynamically change according to intelligent controller output carries out signal inspection
Survey.So, just the logic that signal mode detects is transplanted in programmable processor, with the hardware of independent operating
Calculation is carried out, and can save significantly on the intelligent controller calculating resource with software mode detection signal, promote
The response speed of intelligence control system, and then promote the reliability of whole control device, it is to avoid preset letter
Number problem that mode detection mode lacks dynamic programming motility.
The movable state of signal detection part programs, while the speed of service improves so that signal processing system possesses
Powerful motility.When signal processing logic changes or upgrades when, can be by dynamic deployment process
Logic completes so that the maintainable upgradability of system is improved.
Intelligent controller is generally the data processor such as single-chip microcomputer, DSP, and programmable processor is FPGA, CPLD
Etc. programmable logic processor, the present invention illustrates as a example by DSP and FPGA, but is not limited to this.
In one embodiment of the invention, programmable processor is distributed according to signal degree of concurrence deployment equivalent
Ultra-fine processing unit, micro-control instruction is issued on the Ultra-fine processing unit of correspondence hold by intelligent controller
OK.On the one hand the title of Ultra-fine comes from the scale of processing unit, on the other hand from the number of processing unit
Amount.As long as quantity is abundant, the scale of individual unit is sufficiently small, it is possible to referred to as Ultra-fine.
It is illustrated in figure 1 the system tray of distributed Ultra-fine processing unit according to an embodiment of the invention
Structure schematic diagram.Multiple distributed Ultra-fine processing unit, each superfine granule it is provided with on this Programmable Logic Controller
Degree processing unit instructs by transferring signal processing, signal is carried out detection process, detects that signal meets door
Output when limit requires.
Degree of concurrence depends on that the signal scale needing synchronization process determines, during FPGA code compiles
It is assured that concurrent scale.Ultra-fine on Ultra-fine processing unit and multiple programmable processor processes
Relation of interdependence is not had, process multiple signals that can be concurrent between unit.Therefore, it can at a FPGA
Upper deployment multiple Ultra-fine processing unit, as shown in Figure 1.
FPGA device due to the hardware configuration of its uniqueness and program capability, can according to the degree of concurrence of signal,
Dispose multiple distributed Ultra-fine signal processing unit to carry out signal detection.Ultra-fine signal processing unit
Quantity equal with the signal source quantity needing to process simultaneously, each Ultra-fine signal processing unit passes through bus
Mode and intelligent controller communication, carry out mode detection to multiple signals source in a parallel fashion.Multiple signals
Concurrent mechanism, so that system processing speed is significantly improved.
When Ultra-fine signal processing unit carries out signal detection, need that intelligent controller DSP provides with work as
The micro-control instruction of front plant running state or source signal characteristics match.This micro-control instructs by dynamic programming mode,
It is written as the signal processing microcommand of correspondence based on signal detection/process logic, issues and be deployed to parallel Ultra-fine
Perform on signal processing unit.During signal detection can dynamic programming, the speed of service improve while so that letter
Number processing system possesses powerful motility.When signal processing logic changes or upgrades when, can pass through
Dynamic deployment process logic completes, so that the maintainability of system, upgradability are improved.
Owing to same road signal is under the different running statuses of device, can have different patterns or monitoring processes
Logic.Dependency is there is not, it is also possible to present different patterns and process logic between unlike signal.Cause
This, need intelligent controller can realize dynamic programming as the case may be, generate Real-time and Dynamic microcommand.Dynamic
The adjustment process of state microcommand is initiated by DSP, right in the write of the instruction area of processing unit by data/address bus
The micro-instruction code answered, it is possible to complete the dynamic control of microcommand.What microcommand was carried updates later process
Logic, can update while code snippet is disposed.The primary control program of the upper operation of DSP is by micro-instruction code fragment
It is deployed between the instruction area of Ultra-fine processing unit, the real-time programming of processing unit can be completed.
Data process is carried out, so needing to believe Ultra-fine owing to just entering intelligent controller after signal detection
Number processing unit is arranged at the front end of intelligent controller.Concrete, will Ultra-fine signal processing list can be set
The FPGA device of unit is deployed in signal input module.Adopt as in figure 2 it is shown, FPGA can be arranged on input
On acquisition means (input module), pending signal is by sampling analog digital conversion, or communication device enters into
After data acquisition module, after first passing through caching and the process of FPGA device, utilize special purpose interface and DSP
Complete communication, signal and testing result thereof are passed to DSP and carries out further logical process
In one embodiment of the invention, this Ultra-fine microprocessing unit farther include signal latch module,
State cache module, instruction memory module, instruction perform module and output control module.Wherein, signal latch
Module is used for storing signal to be detected；Instruction memory module is used for storing micro-process and instructs；State cache module is used
Running state information in storage Ultra-fine microprocessing unit；It is to be checked according to be currently entered that instruction performs module
Survey signal and the running state information of Ultra-fine microprocessing unit, transfer micro-instruction union that processes and obtain new
Dbjective state and output signal, wherein, new dbjective state is for carrying out the running status of state cache module
Update；Output control module is used for controlling output signal.
As it is shown on figure 3, the logic flow of Ultra-fine processing unit is from the beginning of the input and latch of signal.To be detected
Signal entering signal latch module, the state of processing unit and control module according to current signal processing state,
From instruction memory module, take out the process instruction of correspondence, be sent to instruction and perform module.Instruction performs module root
According to current signal input, processing unit status word and the instruction being currently needed for execution, computing obtains new mesh
Mark state and output signal.New dbjective state is sent to the block of state of processing unit and enters current state
Row updates；And output signal is after output enables control, the up DSP of being sent to carries out high level control.
In one embodiment of the invention, signal deteching circuit also includes being arranged at intelligent controller and state is delayed
Control interface between storing module, in order to make intelligent controller inquiry and to control the row state letter of programmable processor
Breath.As it is shown on figure 3, data processor DSP controls interface sets up DSP and processing unit state-storage module
Communication link, enable DSP the state of processing unit to be inquired about and controls.
In one embodiment of the invention, signal deteching circuit also includes being arranged at intelligent controller and instruction is deposited
Instruction deployment interface between storage module, in order to make intelligent controller realize setting and the inquiry of micro-control instruction.Refer to
Deployment interface is made to set up the communication link of DSP and processing unit instruction memory module so that DSP can complete
Process setting and the inquiry of microcommand.
According to another aspect of the present invention, additionally provide a kind of can the signal detecting method of dynamic programming, this inspection
Survey process have employed traditional Feng Shi microprocessor and performs process, and it is dynamic that each timeticks has needed when arriving
Make, specifically include several steps as shown in Figure 4.First, in step s 110, intelligent controller according to
Plant running state or characteristics of signals dynamically generate micro-control instruction.Then, in the step s 120, place able to programme
The micro-control that reason device storage generates instructs and updates micro-control instruction storage address.Then, in step s 130, can
Programmed process device instructs according to input signal to be detected, current programmable processor running status and micro-control and carries out
Mathematical operation, obtains new running status value and output signal.Finally, in step S140, place able to programme
Reason device, according to new running status value, updates programmable processor running status.
The driving of Ultra-fine processing unit and intelligent controller DSP communication module is at DSP programmed control process
In be mapped as the read-write operation of one group of depositor.As a example by the register mappings of certain model signal processing unit, often
The address of one signal processing unit maps as shown in table 1 below:
Table 1
The present invention utilizes the operational capability of programmable processing device, by the way of arranging control microinstruction register
Drive Ultra-fine signal processing unit, carry out signal mode detection, owing to having concurrency and programmability,
Can improve the speed of signal input processing detection, and have can the great flexibility of dynamic update.
While it is disclosed that embodiment as above, but described content is only to facilitate understand the present invention
And the embodiment used, it is not limited to the present invention.Technology people in any the technical field of the invention
Member, on the premise of without departing from spirit and scope disclosed in this invention, can be in the formal and details implemented
On make any amendment and change, but the scope of patent protection of the present invention, still must be with appending claims institute
Define in the range of standard.
Claims (10)
1. can the signal deteching circuit of dynamic programming, including:
Intelligent controller, dynamically generates micro-control instruction according to running status or characteristics of signals；
Programmable processor, independent operating, in described intelligent controller, instructs input signal according to described micro-control
Export after detecting and process to described intelligent controller.
Signal deteching circuit the most according to claim 1, it is characterised in that described programmable processor
For FPGA or CPLD.
Signal deteching circuit the most according to claim 1 and 2, it is characterised in that described place able to programme
Reason device disposes equivalent distributed Ultra-fine processing unit according to signal degree of concurrence, and described intelligent controller is by institute
State micro-control instruction to be issued on the Ultra-fine processing unit of correspondence perform.
Signal deteching circuit the most according to claim 3, it is characterised in that described Ultra-fine processes
Unit includes:
Signal latch module, is used for storing signal to be detected；
Instruction memory module, is used for storing micro-control instruction；
State cache module, for storing the running state information of Ultra-fine processing unit；
Instruction performs module, according to the signal to be detected being currently entered and the running status of Ultra-fine processing unit
Information, transfers micro-control instruction union and obtains new dbjective state and output signal, wherein, new dbjective state
For the running status of state cache module is updated；
Output control module, is used for controlling output signal.
Signal deteching circuit the most according to claim 4, it is characterised in that described signal deteching circuit
Also include the control interface being arranged between described intelligent controller and described state cache module, described in order to make
Intelligent controller is inquired about and controls the running state information of described programmable processor.
Signal deteching circuit the most according to claim 4, it is characterised in that described signal deteching circuit
Also include the instruction deployment interface being arranged between described intelligent controller and described instruction memory module, in order to make
Described intelligent controller realizes setting and the inquiry of micro-control instruction.
7. according to the signal deteching circuit according to any one of claim 1-6, it is characterised in that described ultra-fine
Granularity processing unit works in a parallel fashion.
8. according to the signal deteching circuit according to any one of claim 1-7, it is characterised in that described compile
Thread processor is deployed in signal input module.
Signal deteching circuit the most according to claim 3, it is characterised in that multiple described Ultra-fines
Processing unit is connected with bus mode with described intelligent controller.
10. can the signal detecting method of dynamic programming, including:
Intelligent controller dynamically generates micro-control instruction according to plant running state or characteristics of signals；
The micro-control that programmable processor storage generates instructs and updates micro-control instruction storage address；
Programmable processor refers to according to input signal to be detected, current programmable processor running status and micro-control
Order performs mathematical calculations, and obtains new running status value and output signal；
Programmable processor, according to new running status value, updates programmable processor running status.
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| CN201610211037.8A CN105843120B (en) | 2016-04-06 | 2016-04-06 | It is a kind of can dynamic programming signal deteching circuit and method |
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| CN201610211037.8A CN105843120B (en) | 2016-04-06 | 2016-04-06 | It is a kind of can dynamic programming signal deteching circuit and method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110442365A (en) * | 2019-07-26 | 2019-11-12 | 锐捷网络股份有限公司 | The upgrade method and device of programmable logic device |
| CN112513819A (en) * | 2018-09-19 | 2021-03-16 | 日立汽车系统株式会社 | Electronic control device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112513819A (en) * | 2018-09-19 | 2021-03-16 | 日立汽车系统株式会社 | Electronic control device |
| CN110442365A (en) * | 2019-07-26 | 2019-11-12 | 锐捷网络股份有限公司 | The upgrade method and device of programmable logic device |
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| CN105843120B (en) | 2018-10-02 |
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