CN105827268A - Wireless communication device - Google Patents
Wireless communication device Download PDFInfo
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- CN105827268A CN105827268A CN201510450227.0A CN201510450227A CN105827268A CN 105827268 A CN105827268 A CN 105827268A CN 201510450227 A CN201510450227 A CN 201510450227A CN 105827268 A CN105827268 A CN 105827268A
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Abstract
A wireless communication device including an integrated processing circuit and a first memory is provided. The integrated processing circuit includes a processing unit capable of processing a wireless communication signal and a radio frequency (RF) unit capable of performing a conversion between a radio frequency (RF) signal and a baseband signal, wherein the wireless communication signal is one of the RF signal and the baseband signal. The first memory is coupled to the integrated processing circuit. The first memory is capable of storing data used by the processing unit, wherein the integrated processing circuit and the first memory are packaged in a single semiconductor package. The wireless communication signal unit is wearable and enables the size and the number of pins reduced.
Description
Technical field
The present invention is related to radio communication device, integrated process circuit and memorizer are embedded the radio communication device of same packaging part (package) more specifically, be related to have and have radio frequency unit and memorizer are embedded the radio communication device with semiconductor device.
Background technology
In wireless communication module, memory package part is always mounted in fundamental frequency and processes the outside of packaging part, and wherein, this fundamental frequency processes packaging part for processing the fundamental frequency operation of wireless communication module.But, this arranges the signal transmission that a large amount of packaging pin of middle needs to process between packaging part for memory package part and fundamental frequency.Process the signal between packaging part additionally, some PCB conductive paths (conductingpath) should be also needed to transmit for packaging pin and the fundamental frequency of memory package part.Memory package part and fundamental frequency process the interface installed between packaging part may take a large amount of areas on wireless communication module, therefore can cause the difficulty that modern wireless communication systems designs.Additionally, PCB conductive path is also possible to cause signal quality relatively low and speed of operation is limited.Therefore, how to reduce the pin number of wireless communication module thus reduce use PCB conductive path and therefore reduce the major issue that cost is field of wireless communications systems.
Summary of the invention
In view of this, the present invention provides a kind of radio communication device.
The present invention provides a kind of radio communication device, including integrated process circuit and first memory；Wherein, integrated process circuit includes processing unit and radio frequency unit；Processing unit is used for processing wireless communication signals；Radio frequency unit is for the conversion performing between radiofrequency signal and fundamental frequency signal, wherein, this wireless communication signals be radiofrequency signal with fundamental frequency signal one of them or multiple；And first memory is coupled to integrated process circuit, the data that first memory uses for storage processing unit；Wherein, integrated process circuit and first memory are packaged in single package, and this radio communication device is wearable device.
The present invention separately provides a kind of radio communication device, including integrated process circuit, radio frequency unit and first memory；Wherein, integrated process circuit includes processing unit；Processing unit is used for processing wireless communication signals；Radio frequency unit is for performing the conversion between radiofrequency signal and fundamental frequency signal；And first memory, it is coupled to integrated process circuit, the data that first memory uses for storage processing unit；Wherein, wireless communication signals be radiofrequency signal with fundamental frequency signal one of them or multiple, and integrated process circuit, radio frequency unit and first memory packaging part are in single package, and this radio communication device is wearable device.
The present invention reoffers a kind of radio communication device, including: integrated process circuit, including processing unit and radio frequency unit；Wherein, this processing unit is used for processing wireless communication signals；And this radio frequency unit is for the conversion performing between radiofrequency signal and fundamental frequency signal, wherein, this wireless communication signals be this radiofrequency signal with this fundamental frequency signal one of them or multiple；And first memory, it being coupled to this integrated process circuit, this first memory is for storing the data that this processing unit uses；Wherein, this radio frequency unit is positioned in the first packaging part, and this first memory is positioned in the second packaging part, and this first packaging part is encapsulated in single assembly with this second packaging part.
The present invention also provides for a kind of radio communication device, including: integrated process circuit, including processing unit；This processing unit is used for processing wireless communication signals；Radio frequency unit, for performing the conversion between radiofrequency signal and fundamental frequency signal；And first memory, it being coupled to this integrated process circuit, this first memory is for storing the data that this processing unit uses；Wherein, this wireless communication signals be this radiofrequency signal with this fundamental frequency signal one of them or multiple, this radio frequency unit is positioned in the first packaging part, and this first memory is positioned in the second packaging part, and this first packaging part is encapsulated in single assembly with this second packaging part.
The radio communication device that the present invention provides can reduce size and the number of pins of radio communication device.
Accompanying drawing explanation
Fig. 1 is the block schematic diagram of the radio communication device according to first embodiment of the invention.
Fig. 2 is the block schematic diagram of the radio communication device according to second embodiment of the invention.
Fig. 3 is the schematic diagram of the semiconductor device according to one embodiment of the invention.
Fig. 4 is the schematic diagram of the first replacement Integrated design of the integrated process circuit shown in the Fig. 1 according to one embodiment of the invention and first memory.
Fig. 5 is the schematic diagram of the second replacement Integrated design of the integrated process circuit shown in the Fig. 1 according to one embodiment of the invention and first memory.
Fig. 6 is to illustrate how to determine the flow chart whether memorizer being arranged in packaging part is efficient memory.
Fig. 7 is the block schematic diagram of the radio communication device according to one embodiment of the invention.
Fig. 8 is the block schematic diagram according to another embodiment of the present invention radio communication device.
Fig. 9 is the flow chart performing frequency hopping control method according to another embodiment of the present invention frequency control circuit.
Figure 10 is the spectrum diagram of multiple operating frequencies of the frequency of oscillation according to one embodiment of the invention RF signal and first memory.
Figure 11 is the block schematic diagram of the radio communication device according to another embodiment of the present invention.
Figure 12 is the time diagram of the operating frequency according to one embodiment of the invention first memory.
Detailed description of the invention
Some vocabulary is employed to censure specific element in the middle of specification and claims.Person of ordinary skill in the field is it is to be appreciated that hardware manufacturer may call same element with different nouns.This specification and claims book is not using the difference of title as in the way of distinguishing element, but using element difference functionally as the criterion distinguished." comprising " mentioned in description and claim in the whole text is an open term, therefore should be construed to " comprise but be not limited to ".Additionally, " coupling " word comprises any directly and indirectly electrical connection at this.Therefore, if first device is coupled to the second device described in literary composition, then represents first device and can directly be electrically connected in the second device, or be indirectly electrically connected to the second device through other device or connection means.
Refer to the block schematic diagram that Fig. 1, Fig. 1 are the radio communication device 100 according to first embodiment of the invention.Radio communication device 100 includes integrated process circuit 102, first memory 104 and second memory 106.Integrated process circuit 102 and first memory 104 are packaged in single package 108, and second memory 106 is packaged in another packaging part 110.Second memory 106 can pass through at least one PCB conductive path 112 or be applicable between packaging part 108 and packaging part 110 be coupled to packaging part 108 outside any other conductive path of signal transmission.Integrated process circuit 102 includes that processing unit is for processing wireless communication signals.First memory 104 is coupled to integrated process circuit 102, and the data that first memory 104 uses when processing wireless communication signals or any other signal for storage processing unit.Second memory 106 can be non-volatility memorizer (non-volatilememory), such as serial flash, paralleling flash memory etc..Additionally, second memory 106 can be used for the data that storage processing unit uses.Such as, when radio communication device 100 electric power starting, first by the data conversion of storage in second memory 106 to first memory 104, then processing unit reads data to perform the initialization procedure of radio communication device 100.Additionally, the data of second memory 106 can store with the form of compression data.It should be noted that processing unit is in addition to processing wireless communication signals, it is also used for performing other functions of radio communication device 100.Such as, processing unit can be used to perform the application software of radio communication device 200, telephone directory or the process data etc. of To Do List (to-dolist).
In this preferred embodiment, first memory 104 can be volatile storage (volatilememory) or non-volatility memorizer, wherein, volatile storage can such as dynamic random access memory (DRAM), pseudo sram (pseudoSRAM) etc., non-volatility memorizer can such as serial flash, paralleling flash memory etc..It is outside that traditional first memory 104 is arranged at integrated process circuit 102, and during in the present embodiment, first memory 104 is included in packaging part 108.In other words, integrated process circuit 102 and first memory 104 are set to system in package part (system-in-package, SIP).Correspondingly, the interface between integrated process circuit 102 and first memory 104 need not packaging pin.More specifically, integrated process circuit 102 and first memory 104 are two wafers (die) in same packaging part 108, therefore, the interface between integrated process circuit 102 and first memory 104 can be realized by bonding wire (bondingwire) without PCB conductive path.
Owing to the signal between integrated process circuit 102 and first memory 104 is changed inside packaging part 108, therefore need not set up the packaging pin between integrated process circuit 102 and first memory 104.In addition, it is possible to reduce connection package 108 and packaging part 110 and then the total number of the PCB conductive path 112 being connected integrated process circuit 102 and second memory 106.Such as, if second memory 106 is serial flash, Serial Peripheral Interface (SPI) (SerialPeripheralInterface, SPI) formula EBI connection package 110 and packaging part 108 can be used.Wherein, spi bus interface only needs 4 to 6 pins.Thus also correspondingly reduce the pin total number of packaging part 108 and packaging part 110.Therefore, the overall size being smaller in size than the conventional package with stand-alone integrated process circuit and first memory of the packaging part 108 comprising integrated process circuit 102 and first memory 104, and the overall size of packaging part 108, PCB conductive path 112 and packaging part 110 is again smaller than the overall size of the traditional wireless communication module with independent integrated process circuit, first memory and second memory.
Owing to integrated process circuit 102 and first memory 104 are encapsulated in same packaging part 108, compared to the conventional package being attached with PCB conductive path, between integrated process circuit 102 and first memory 104, the signal quality (such as, signal eye diagram) of signal transmission can be improved.In addition, in this preferred embodiment, owing to there is not PCB conductive path between integrated process circuit 102 and first memory 104, first memory 104 can be upgraded to have higher speed of operation for increasing the data transmission bauds between integrated process circuit 102 and first memory 104.It should be noted, integrated process circuit 102 and first memory 104 are installed on another advantage is that of same packaging part 108, owing to the load of two wafers is less than the load between two packaging parts, can be less than conventional package by the driving power setting of integrated process circuit 102 and first memory 104, thus decrease power consumption.
In this preferred embodiment, radio communication device 100 can further include radio frequency (radiofrequency, RF) unit and Power Management Unit (powermanagementunit, PMU).RF unit is for performing the conversion between RF signal and fundamental frequency signal, and wherein, the wireless communication signals that integrated process circuit 102 processes can be one or more in RF signal and fundamental frequency signal.PMU is for managing the power consumption of at least one in integrated process circuit 102 and first memory 104.It should be noted that integrated process circuit 102 can including, RF unit and/or PMU, RF unit and/or PMU may be disposed at the inside of packaging part 108 or may also set up in packaging part 108 outside.Such as, in one embodiment, RF unit and/or PMU are installed on integrated process circuit 102 inside.In another embodiment, RF unit and/or PMU are installed on the outside of packaging part 108.
Refer to the block schematic diagram that Fig. 2, Fig. 2 are the radio communication device 200 according to second embodiment of the invention.Radio communication device 200 includes integrated process circuit 202, first memory 204 and second memory 206.Compared to aforesaid first embodiment, integrated process circuit 202, first memory 204 and second memory 206 are all encapsulated in single package 208.Integrated process circuit 202 includes that processing unit is for processing wireless communication signals.First memory 204 is coupled to integrated process circuit 202, and the data that first memory 204 uses when processing wireless communication signals or any other signal for storage processing unit.Second memory 206 is coupled to integrated process circuit 202.Additionally, second memory 206 can be used for the data that storage processing unit uses.Such as, when radio communication device 200 electric power starting, first by the data conversion of storage in second memory 206 to first memory 204, then processing unit reads data to perform the initialization procedure of radio communication device 200.Additionally, the data of second memory 206 can store with the form of compression data.It should be noted that in addition to processing wireless communication signals, processing unit is also used for performing other functions of radio communication device 200.Such as, processing unit can be used to perform the application software of radio communication device 200, telephone directory or the process data etc. of To Do List.
In this preferred embodiment, first memory 204 and second memory 206 can be volatile storage or non-volatility memorizer, wherein, volatile storage can such as DRAM, pseudo SRAM etc., non-volatility memorizer can such as serial flash, paralleling flash memory etc..It is outside that traditional first memory 204 and second memory 206 are located at integrated process circuit 202, and in the present embodiment, first memory 204 and second memory 206 are included in packaging part 208.First memory 204 is alternatively non-volatility memorizer (such as serial flash, paralleling flash memory etc.).In other words, integrated process circuit 202, first memory 204 and second memory 206 are set to system in package part.Correspondingly, the interface between the interface between integrated process circuit 202 and first memory 204, and integrated process circuit 202 and second memory 206 need not packaging pin.More specifically, integrated process circuit 202, first memory 204 and second memory 206 are three wafers in same packaging part 208, therefore, the interface between integrated process circuit 202 and first memory 204 and the interface between integrated process circuit 202 and second memory 206 can be realized by bonding wire without PCB conductive path.
Owing to the signal between integrated process circuit 202 and the first and second memorizeies 204,206 is changed inside packaging part 208, it is not necessary to set up the packaging pin between integrated process circuit 202 and the first and second memorizeies 204,206.Therefore the pin total number of packaging part 208 can be reduced.Thus, comprise the overall size being smaller in size than the conventional package with independent integrated process circuit and the first and second memorizeies of the packaging part 208 of integrated process circuit 202 and the first and second memorizeies 204,206.
Being similar to previous embodiment, compared to the conventional package being attached with PCB conductive path, between integrated process circuit 202 and the first and second memorizeies 204,206, the signal quality (such as, signal eye diagram) of signal transmission can become more preferable.Owing to there is not PCB conductive path between integrated process circuit 202 and the first and second memorizeies 204,206, first memory 204 and second memory 206 can be upgraded to have higher speed of operation for increasing the data transmission bauds between integrated process circuit 202 and the first and second memorizeies 204,206.Additionally, can be less than conventional package by the driving power setting of integrated process circuit 202 and the first and second memorizeies 204,206, thus reduce power consumption.
Radio communication device 200 can further include RF unit and PMU.The setting of RF unit and PMU is similar to the setting of radio communication device 100, for succinctly, omits at this and describes in detail.
Can be two wafers being encapsulated in same packaging part 108 for the embodiment shown in Fig. 1, integrated process circuit 102 and first memory 104.But, this purpose being merely to illustrate, it is not intended to limit the present invention.Fig. 3 is the schematic diagram of the semiconductor device according to one embodiment of the invention.Semiconductor device 30 can include multiple semiconductor package part 301 and 302, and wherein, RF unit 303 can be located at semiconductor package part 301, and memorizer 304 can be located at another semiconductor package part 302.For example, multiple semiconductor package parts (such as 301 and 302) can be encapsulated in single device (such as semiconductor device 30) by using two dimension (2D) packaged type or three-dimensional (3D) packaged type.Such as, stacked assembly (Package-on-Package can be used, PoP) the encapsulation stacking technology (packagestackingtechnology) or encapsulating (Package-in-Package, PiP) etc in encapsulation encapsulates the semiconductor package part 301 and 302 in semiconductor device 30.It should be noted that the present invention is the most unrestricted to being actually used in the method for packing that multiple semiconductor package parts are integrated in single device.That is, the single device with a semiconductor package part including RF unit and another semiconductor package part including memorizer is within.
According to the semiconductor device shown in Fig. 3, the present invention more proposes the replacement design of semiconductor package part 108 as shown in Figure 1.Fig. 4 is the schematic diagram of the first replacement Integrated design of the integrated process circuit 102 shown in the Fig. 1 according to one embodiment of the invention and first memory 104.Fig. 5 is the schematic diagram of the second replacement Integrated design of the integrated process circuit 102 shown in the Fig. 1 according to one embodiment of the invention and first memory 104.Consider according to actual design, radio communication device (such as 100) can be revised as have semiconductor device 40 or semiconductor device 50 with alternative semiconductors packaging part (such as 108).The position that the main distinction is RF unit 1032 between semiconductor device 40 and 50.Can be configured to RF unit 1032 perform the conversion between RF signal and baseband signal.Processing unit 1031 can be configured to process and process wireless communication signals, wherein wireless communication signals can be one or more in RF signal and fundamental frequency signal.For the embodiment shown in Fig. 4, RF unit 1032 and processing unit 1031 can be included in integrated process circuit 102, wherein, integrated process circuit 102 can be located in semiconductor package part 401, and first memory 104 can be located in another semiconductor package part 402.For the embodiment shown in Fig. 5, RF unit 1032 can be in the outside of integrated process circuit 102, and integrated process circuit 102 and RF unit 1032 can be located in semiconductor package part 501, and first memory 104 can be located in another semiconductor package part 402.
In the embodiment shown in Fig. 4 and Fig. 5, RF unit 1032 and processing unit 1031 can be all located in same semiconductor package part 401/501.But, this is not intended to limit the present invention only for illustration purpose.Or, processing unit 1031 can be configured to be positioned at the outside of the semiconductor package part 401 at RF unit 1032 place.In brief, any Integrated design of the integrated process circuit 102 of semiconductor device of the proposition shown in Fig. 3 and first memory 104 is used the most within the scope of the present invention.
In the above-described embodiments, memorizer (such as first memory 104 and/or second memory 206) is installed on include the packaging part/semiconductor device of integrated process circuit in may produce two problems.First problem is how to determine whether the memorizer being arranged in packaging part/semiconductor device is efficient memory.Second Problem is how to reduce the interference that memorizer produces when memorizer is arranged in packaging part/semiconductor device.
For first problem, refer to Fig. 6, Figure 36 is to illustrate how to determine the flow chart whether memorizer being arranged in packaging part/semiconductor device is efficient memory.Example for radio communication device 100, before first memory 104 can being arranged in packaging part 108 (or semiconductor device 40/50), by the manufacturer of such as first memory 104 or radio communication device 100, first memory 104 can be performed whether test program (such as chip probe (chipprobe, CP)) is effcient memory body to determine first memory 104.When first memory 104 carries out test program failure, discardable first memory 104.And when first memory 104 is by test program, can identify that first memory 104 is signed or labelling by labelling (identification), wherein, it is efficient memory that this identification labelling is used for indicating first memory 104.In other words, as shown in Figure 6, can will identify that labelling regards effective ID (goodID) of first memory 104 as.
First memory 104 is identified when being labeled as efficient memory, through canned program (packagingprocess) can by first memory 104 and integrated process circuit 102 included together in packaging part 108 (or semiconductor device 40/50) in thus form at least some of of radio communication device 100.When completing canned program, packaging part 108 can be performed another test.In this stage, test device (not shown) can be used to read the identification labelling of first memory 104, i.e. effectively ID1042, wherein, this test device outside can be coupled to packaging part 108 (or semiconductor device 40/50).When this test device determines and there is effective ID1042 in first memory 104, can confirm that at least first memory 104 is not to abandon internal memory (discardedmemory).In other words, the first memory 104 using the existence of the test effective ID1042 of device to test that confirmation can be helped to be encapsulated in packaging part 108 (or semiconductor device 40/50) is efficient memory.
Determine that whether the first memory 104 being arranged in packaging part 108 (or semiconductor device 40/50) is that the another kind of method of efficient memory is to test the function of first memory 104 by test circuit 1022 thus confirms whether first memory 104 goes on well.It should be noted that as shown in Figure 6, in certain embodiments, test circuit 1022 can be embedded at integrated process circuit 102.More specifically, test circuit 1022 can be built-in self-test (built-inself-test, the BIST) circuit being embedded in integrated process circuit 102.Correspondingly, above-mentioned first problem can be solved.
It should be noted, effective ID1042 is signed or the purpose of labelling is for memorizer of fixing a breakdown from packaging part 108 (or semiconductor device 40/50), and be whether to be efficient memory to check first memory 104 in test circuit 1022 is arranged on packaging part 108 (or semiconductor device 40/50).Additionally, can by effective ID1042 and test both circuit 1022, or only effectively ID1042 and test circuit 1022 one of them apply to packaging part 108 (or semiconductor device 40/50).In the embodiment using effective ID1042 and test both circuit 1022, when effective ID1042 quits work or effectively ID1042 is wrong, test circuit 1022 can be used to test the effectiveness of first memory 104.
For Second Problem, i.e. how to reduce the interference that first memory 104 produces when memorizer is arranged in packaging part 108 (or semiconductor device 40/50), at least it is proposed that three kinds of methods solving these problems.The method of the first is to adjust the driving power driving signal that (such as reducing) is transmitted between first memory 104 and integrated process circuit 102.In one embodiment, can adjust driving power to the driving signal acceptable simulation power between transmission first memory 104 and integrated process circuit 102 to perform memory read/write operations under simulation power.Fig. 7 is the block schematic diagram of the radio communication device 400 according to one embodiment of the invention, and radio communication device 400 uses described first method to reduce the interference that first memory 104 produces.In this embodiment, integrated process circuit 102 can further include driving control circuit 1024 and border circuit (boundarycircuit) 1026, and first memory 104 can further include border circuit 1044, wherein, at least one bonding wire 114 can be used for fillet circuit 1026 and border circuit 1044.Drive the driving power of the driving signal Sd of control circuit 1024 adjustable border circuit 1026 and/or border circuit 1044 generation.In one embodiment, the driving signal Sd acceptable simulation power that control circuit 1024 can will drive power to be adjusted between transmission first memory 104 and integrated process circuit 102 is driven.When between first memory 104 and integrated process circuit 102, the driving signal Sd of transmission declines, the interference that first memory 104 produces can reduce.Correspondingly, this setting can reduce the interference that the sensing circuit (sensitivecircuit) (such as RF unit 1032) to radio communication device 400 produces.More specifically, in radio communication device 400, sensing circuit is more more sensitive than digital circuit, can be used for processing analogue signal.Such as, RF unit 1032 is used to perform the conversion between RF signal and the fundamental frequency signal of radio communication device 400.In this embodiment, RF unit 1032 is outside is coupled to integrated process circuit 102, i.e. RF unit 1032 is different chips (or different packaging part or same package part), but, RF unit 1032 and integrated process circuit 102 are all installed in identical packaging part (or same apparatus).
Radio communication device 400 further includes PMU1034.PMU1034 can manage integrated process circuit 102 and/or the power consumption of first memory 104.In this embodiment, integrated process circuit 102 it is coupled to inside PMU1034.In other words, PMU1034 and integrated process circuit 102 are installed in same wafer, but, the present invention is not limited to this.
It should be noted that in the figure 7, although having used test circuit 1022, it is possible to by using preceding method to use effective ID in first memory 104.Therefore, can by effective ID and test both circuit 1022, or only effectively ID and test circuit 1022 one of them apply to packaging part 108 (or semiconductor device 50).
As shown in Figure 8, the second method of the interference reducing first memory 104 generation is to use frequency hopping (hopping) mechanism thus avoids the operating frequency of sensing circuit (such as RF unit 1032).Fig. 8 is the block schematic diagram according to an alternative embodiment of the invention radio communication device 500.Radio communication device 500 uses second method to reduce the interference that first memory 104 produces.In this embodiment, integrated process circuit 102 can further include driving control circuit 1024 and border circuit 1026, and first memory 104 can further include border circuit 1044, and wherein, at least one bonding wire 114 can be used for fillet circuit 1026 and border circuit 1044.Drive the driving power of the driving signal Sd of control circuit 1024 adjustable border circuit 1026 and/or border circuit 1044 generation.In addition, integrated process circuit 102 can further include frequency control circuit 1028.Frequency control circuit 1028 can be used for controlling radio communication device 500 operating frequency of multiple elements in addition to sensing circuit and is different from the operating frequency (i.e. frequency of oscillation) of sensing circuit.In addition to sensing circuit, an example of multiple elements is first memory 104, and an example of sensing circuit is RF unit 1032.In this embodiment, frequency control circuit 1028 can be frequency hopping control circuit.Refer to Fig. 9, Fig. 9 is the flow chart performing frequency hopping control method 600 according to another embodiment of the present invention frequency control circuit 1028.On the premise of realizing identical result, other steps, without the most not requiring that step is continuous in strict accordance with the order shown in Fig. 9, can be placed in one by the step of flow chart shown in Fig. 9.In addition, step S602 can be omitted.Frequency hopping control method 600 can comprise the steps:
Step S602: identify operating frequency F1 of sensing circuit (such as: RF unit 1032)；And
Step S604: the operating frequency of control circuit (such as first memory 104) in addition to sensing circuit is away from operating frequency F1.
In step S602, frequency control circuit 1028 can recognize that operating frequency F1 of sensing circuit.More specifically, when radio communication device 500 receives the RF signal with frequency of oscillation F1 or before, frequency control circuit 1028 can determine that the frequency of oscillation of this RF signal, i.e. F1.In step s 604, when RF unit 1032 processes this RF signal, frequency control circuit 1028 can control operating frequency F2 of first memory 104 and be different from the frequency of oscillation of RF signal.As shown in Figure 10 when frequency of oscillation F1 changes, can by frequency control circuit 1028 control the operating frequency of first memory 104 between multiple frequencies saltus step thus avoid frequency of oscillation F1.Figure 10 is the spectrum diagram of multiple operating frequencies (i.e. F2, F3 and F4) of frequency of oscillation F1 according to one embodiment of the invention RF signal and first memory 104.When frequency of oscillation F1 of RF signal changes, the operating frequency of first memory 104 also can be changed away from frequency of oscillation F1.Owing to operating frequency F1 of present sensing circuit is different from operating frequency F2 of first memory 104, thus the interference that the power and signal to integrated process circuit 102 causes will be reduced.More specifically, in radio communication device 500, sensing circuit is more more sensitive than digital circuit, can be used for processing analogue signal.Such as, RF unit 1032 can be used to perform the conversion between RF signal and the fundamental frequency signal of radio communication device 500.In radio communication device 500, RF unit 1032 is internal is coupled to integrated process circuit 102, i.e. RF unit 1032 and integrated process circuit 102 are same wafer (or same package part or different packaging part).
It should be noted that in fig. 8, although only having used effective ID1042 in packaging part 108 (or semiconductor device 40), it addition, be used as preceding method to install test circuit in packaging part 108.Therefore, can by effective ID1042 and test both circuits, or effectively ID1042 and test circuit one of them apply to packaging part 108 (or semiconductor device 40).
As shown in figure 11, the third method solving the interference that first memory 104 produces is to use spread spectrum (spreadspectrum) mechanism, thus reduces the radiant power of at least one circuit in addition to sensing circuit (such as RF unit 1032).Figure 11 is the block schematic diagram of the radio communication device 800 according to another embodiment of the present invention.Radio communication device 800 uses the third method to reduce the interference that first memory 104 produces.In this embodiment, integrated process circuit 102 can further include driving control circuit 1024 and border circuit 1026, and first memory 104 can further include border circuit 1044, and wherein, at least one bonding wire 114 can be used for fillet circuit 1026 and border circuit 1044.Drive the driving power of the driving signal Sd of control circuit 1024 adjustable border circuit 1026 and/or border circuit 1044 generation.In addition, integrated process circuit 102 can further include frequency control unit 1030.As shown in figure 12, the operating frequency of the radio communication device 800 multiple elements in addition to sensing circuit can be expanded to special frequency band Fss by frequency control unit 1030.One example of the multiple elements in addition to sensing circuit is first memory 104, and sensing circuit example is RF unit 1032.Figure 12 is the time diagram of the operating frequency according to one embodiment of the invention first memory 104.It should be noted that be succinct, in this preferred embodiment, the operating frequency of first memory 104 is also labeled as F2.Additionally, in this embodiment, frequency control circuit 1030 can be spread spectrum control circuit.Such as, when RF unit 1032 processes the RF signal received, frequency control circuit 1030 can adjust operating frequency F2 of first memory 104 lentamente, as shown in figure 12, from the lower band Fssl of special frequency band Fss, operating frequency F2 of first memory 104 is become high frequency band Fssu.By the method, the energy of operating frequency F2 of first memory 104 can be uniformly distributed in special frequency band Fss, therefore, can reduce the interference that the power and signal to integrated process circuit 102 that operating frequency F2 of first memory 104 causes causes.
Additionally, the position that first memory 104 is remotely from sensing circuit (such as RF unit 1032) can also help to reduce the interference that sensing circuit is produced by first memory 104.More specifically, in radio communication device 800, sensing circuit is more more sensitive than digital circuit, can be used for processing analogue signal.Such as, RF unit 1032 is used to perform the conversion between RF signal and the fundamental frequency signal of radio communication device 800.In radio communication device 800, RF unit 1032 is internal is coupled to integrated process circuit 102, i.e. RF unit 1032 and integrated process circuit 102 are same wafer.
And, in fig. 11, although only having used effective ID1042 in packaging part 108 (or semiconductor device 40), it is possible to use said method installs test circuit in packaging part 108 (or semiconductor device 40).Therefore, can by effective ID1042 and test both circuits, or effectively ID1042 and test circuit one of them apply to packaging part 108.
It should be noted, although above-mentioned for solving how to determine that whether the memorizer being arranged in packaging part (or semiconductor device) is efficient memory and the multiple method how reducing the interference produced by memorizer is that combining wireless communicator 100,400,500 and 800 is described, those skilled in the art will appreciate that above-mentioned multiple method also can operate with radio communication device 200 or RF circuit and memorizer is positioned at any other radio communication device of same packaging part (or semiconductor device) to solve Similar Problems.The example of radio communication device can include mobile phone, panel computer and wearable device (wearabledevice).One or more said methods used in radio communication device 100,200,400,500,800 or integrated process circuit and memorizer are positioned at any other radio communication device of same packaging part (or have RF circuit and memorizer is positioned at same device) broadly fall into the scope of the present invention.And, the setting of above-mentioned effective ID, test circuit, driving control circuit, frequency control circuit, RF unit, first memory, second memory and PMU is not limited to the setting shown in Fig. 1-Fig. 8 and Figure 11.Those skilled in the art will appreciate that setting also can be reset or revise by the actual design demand according to radio communication device.In addition, in Fig. 8 and Figure 11, although within frequency control circuit 1028 and 1030, driving control circuit 1024 and RF unit 1032 are installed on integrated process circuit 102, frequency control circuit 1028 and 1030, drive control circuit 1024 and RF unit 1032 to may be alternatively provided as outside to be coupled to integrated process circuit 102 but to be positioned at same packaging part 108 (or semiconductor device 40/50) internal, or selectivity omits said apparatus.Frequency control circuit 1028 and 1030, driving control circuit 1024 and RF unit 1032 may be alternatively provided as outside and be coupled to packaging part 108 (or semiconductor device 40/50).
In brief, the present invention includes at least one memorizer in an enclosure, and this packaging part (or semiconductor device) also includes the integrated process circuit of process wireless communication signals, thus can reduce the cost of radio communication device and improve signal quality and operating rate.Additionally, present invention further teaches multiple method solves how to determine how to reduce, when whether the memorizer being arranged in packaging part (or semiconductor device) is efficient memory and memorizer is installed within packaging part (or semiconductor device), the interference that memorizer produces.
According to the spirit of the present invention, unlabored change or isotropism arrangement belong to the scope that the present invention is advocated to any person of ordinary skill in the field, and the interest field of the present invention should be as the criterion with claim.
Claims (30)
1. a radio communication device, including:
Integrated process circuit, including processing unit and radio frequency unit；Wherein, this processing unit is used for processing wireless communication signals；And this radio frequency unit is for the conversion performing between radiofrequency signal and fundamental frequency signal, wherein, this wireless communication signals be this radiofrequency signal with this fundamental frequency signal one of them or multiple；And
First memory, is coupled to this integrated process circuit, and this first memory is for storing the data that this processing unit uses；
Wherein, this integrated process circuit and this first memory are packaged in single package, and this radio communication device is wearable device.
2. radio communication device as claimed in claim 1, it is characterised in that this first memory includes:
Identifying labelling, being used for indicating this first memory is efficient memory.
3. radio communication device as claimed in claim 1, it is characterised in that this integrated process circuit further includes:
Test circuit, is coupled to this first memory, and this test circuit is used for testing this first memory to determine that whether this first memory is as efficient memory.
4. radio communication device as claimed in claim 1, it is characterised in that this integrated process circuit further includes:
Drive control circuit, for adjusting the driving power driving signal transmitted between this first memory and this integrated process circuit.
5. radio communication device as claimed in claim 1, it is characterised in that this integrated process circuit further includes:
Frequency control circuit, is different from the frequency of oscillation of this radiofrequency signal for controlling the operating frequency of this first memory.
6. radio communication device as claimed in claim 1, it is characterised in that this integrated process circuit further includes:
Frequency control circuit, for extending to the operating frequency of this first memory in special frequency band.
7. radio communication device as claimed in claim 1, it is characterised in that this radio communication device further includes:
Power Management Unit, for managing the power consumption of at least one in this integrated process circuit and this first memory；
Wherein, this Power Management Unit, this integrated process circuit and this first memory packaging part are in this single package.
8. radio communication device as claimed in claim 1, it is characterised in that this radio communication device further includes:
Second memory, outside is coupled to this single package.
9. a radio communication device, including:
Integrated process circuit, including processing unit；This processing unit is used for processing wireless communication signals；
Radio frequency unit, for performing the conversion between radiofrequency signal and fundamental frequency signal；And
First memory, is coupled to this integrated process circuit, and this first memory is for storing the data that this processing unit uses；
Wherein, this wireless communication signals be this radiofrequency signal with this fundamental frequency signal one of them or multiple, this integrated process circuit, this radio frequency unit and this first memory packaging part are in single package, and this radio communication device is wearable device.
10. radio communication device as claimed in claim 9, it is characterised in that this first memory includes:
Identifying labelling, being used for indicating this first memory is efficient memory.
11. radio communication devices as claimed in claim 9, it is characterised in that this integrated process circuit further includes:
Test circuit, is coupled to this first memory, and this test circuit is used for testing this first memory for determining whether this first memory is efficient memory.
12. radio communication devices as claimed in claim 9, it is characterised in that this integrated process circuit further includes:
Frequency control circuit, different from the frequency of oscillation of this radiofrequency signal for controlling the operating frequency of this first memory.
13. radio communication devices as claimed in claim 9, it is characterised in that this integrated process circuit further includes:
Frequency control circuit, for extending to the operating frequency of this first memory in special frequency channel.
14. radio communication devices as claimed in claim 9, it is characterised in that this integrated process circuit further includes:
Drive control circuit, for adjusting the driving power driving signal transmitted between this first memory and this integrated process circuit.
15. 1 kinds of radio communication devices, including:
Integrated process circuit, including processing unit and radio frequency unit；Wherein, this processing unit is used for processing wireless communication signals；And this radio frequency unit is for the conversion performing between radiofrequency signal and fundamental frequency signal, wherein, this wireless communication signals be this radiofrequency signal with this fundamental frequency signal one of them or multiple；And
First memory, is coupled to this integrated process circuit, and this first memory is for storing the data that this processing unit uses；
Wherein, this radio frequency unit is positioned in the first packaging part, and this first memory is positioned in the second packaging part, and this first packaging part is encapsulated in single assembly with this second packaging part.
16. radio communication devices as claimed in claim 15, it is characterised in that this first memory includes:
Identifying labelling, being used for indicating this first memory is efficient memory.
17. radio communication devices as claimed in claim 15, it is characterised in that this integrated process circuit further includes:
Test circuit, is coupled to this first memory, and this test circuit is used for testing this first memory to determine that whether this first memory is as efficient memory.
18. radio communication devices as claimed in claim 15, it is characterised in that this integrated process circuit further includes:
Drive control circuit, for adjusting the driving power driving signal transmitted between this first memory and this integrated process circuit.
19. radio communication devices as claimed in claim 15, it is characterised in that this integrated process circuit further includes:
Frequency control circuit, is different from the frequency of oscillation of this radiofrequency signal for controlling the operating frequency of this first memory.
20. radio communication devices as claimed in claim 15, it is characterised in that this integrated process circuit further includes:
Frequency control circuit, for extending to the operating frequency of this first memory in special frequency band.
21. radio communication devices as claimed in claim 15, it is characterised in that this radio communication device further includes:
Power Management Unit, for managing the power consumption of at least one in this integrated process circuit and this first memory；
Wherein, this Power Management Unit, this radio frequency unit and this first memory packaging part are in this single assembly.
22. radio communication devices as claimed in claim 15, it is characterised in that this radio communication device further includes:
Second memory, outside is coupled to this single assembly.
23. radio communication devices as claimed in claim 15, it is characterised in that this radio communication device is wearable device.
24. 1 kinds of radio communication devices, including:
Integrated process circuit, including processing unit；This processing unit is used for processing wireless communication signals；
Radio frequency unit, for performing the conversion between radiofrequency signal and fundamental frequency signal；And
First memory, is coupled to this integrated process circuit, and this first memory is for storing the data that this processing unit uses；
Wherein, this wireless communication signals be this radiofrequency signal with this fundamental frequency signal one of them or multiple, this radio frequency unit is positioned in the first packaging part, and this first memory is positioned in the second packaging part, and this first packaging part is encapsulated in single assembly with this second packaging part.
25. radio communication devices as claimed in claim 24, it is characterised in that this first memory includes:
Identifying labelling, being used for indicating this first memory is efficient memory.
26. radio communication devices as claimed in claim 24, it is characterised in that this integrated process circuit further includes:
Test circuit, is coupled to this first memory, and this test circuit is used for testing this first memory for determining whether this first memory is efficient memory.
27. radio communication devices as claimed in claim 24, it is characterised in that this integrated process circuit further includes:
Frequency control circuit, different from the frequency of oscillation of this radiofrequency signal for controlling the operating frequency of this first memory.
28. radio communication devices as claimed in claim 24, it is characterised in that this integrated process circuit further includes:
Frequency control circuit, for extending to the operating frequency of this first memory in special frequency channel.
29. radio communication devices as claimed in claim 24, it is characterised in that this integrated process circuit further includes:
Drive control circuit, for adjusting the driving power driving signal transmitted between this first memory and this integrated process circuit.
30. radio communication devices as claimed in claim 24, it is characterised in that this radio communication device is Wearable device.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/603,367 US9369172B2 (en) | 2011-02-10 | 2015-01-23 | Wireless communication device |
| US14/603,367 | 2015-01-23 | ||
| US14/613,374 | 2015-02-04 | ||
| US14/613,374 US9258030B2 (en) | 2011-02-10 | 2015-02-04 | Wireless communication device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105827268A true CN105827268A (en) | 2016-08-03 |
Family
ID=56514512
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510450227.0A Pending CN105827268A (en) | 2015-01-23 | 2015-07-28 | Wireless communication device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105827268A (en) |
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| CN101764127A (en) * | 2008-12-23 | 2010-06-30 | 日月光封装测试(上海)有限公司 | Semiconductor package without outer pins and stacked structure thereof |
| CN102117800A (en) * | 2010-01-05 | 2011-07-06 | 联华电子股份有限公司 | Semiconductor chip stack and production method thereof |
| CN102638279A (en) * | 2011-02-10 | 2012-08-15 | 联发科技股份有限公司 | Wireless communication device |
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| CN101188233A (en) * | 2007-12-19 | 2008-05-28 | 日月光半导体制造股份有限公司 | Encapsulation structure of spacer with ventilation hole |
| CN101764127A (en) * | 2008-12-23 | 2010-06-30 | 日月光封装测试(上海)有限公司 | Semiconductor package without outer pins and stacked structure thereof |
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Application publication date: 20160803 |