CN105824622A - Data processing method and electronic equipment - Google Patents
Data processing method and electronic equipment Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0715—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a system implementing multitasking
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
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Abstract
The invention discloses a data processing method and electronic equipment. The data processing method comprises the steps that when a first processor breaks down for obtaining data from first equipment, a fault is analyzed through a first operating system, so that a fault source causing the fault is obtained; when the first operating system determines that the fault source of the fault is a device associated with the first equipment, a first target progress is determined, the first target progress is controlled to be closed, and the first target progress is a progress for triggering the first processor to obtain data from the first equipment. The data processing method and the electronic equipment can at least reduce restart probability, and avoid unnecessary restart.
Description
Technical Field
The present invention relates to data processing technologies, and in particular, to a data processing method and an electronic device.
Background
In a server having a plurality of CPUs, each CPU has a certain number of interfaces such as a peripheral component interconnect express (pcie) (peripheral component interconnect express) interface, and each interface can be connected to a corresponding device. A process running in the server system can read data in a device connected to the CPU1 through the CPU1, when the device itself has a problem such as device damage or a problem occurs in an interface slot into which a device is inserted, the CPU1 will time out the data read from the device (transactionimeout), the CPU1 generates an internal error event (ierror), and the ierror event is broadcast to all CPUs in the server system, thereby restarting the entire server. How to avoid restarting the whole server becomes a technical problem to be solved urgently when the CPU access device itself has a problem or the interface slot into which the device is inserted has a problem.
Disclosure of Invention
In order to solve the existing technical problem, embodiments of the present invention provide a data processing method and an electronic device, which can at least reduce the restart probability and avoid unnecessary restart.
The technical scheme of the embodiment of the invention is realized as follows:
the embodiment of the invention provides a data processing method, which comprises the following steps:
when the first processor fails to retrieve data from the first device,
analyzing the fault through a first operating system to obtain a fault source generating the fault;
and when the first operating system determines that a fault source generating the fault is a device associated with the first equipment, determining a first target process, and controlling the first target process to be closed, wherein the first target process is a process for triggering the first processor to acquire data from the first equipment.
In the above solution, the first processor has at least one first interface, and the first processor obtains the data by reading the data in the first device inserted into the first interface;
when the first operating system determines that the fault source generating the fault is the first equipment and/or the first interface, determining that the fault source is a device associated with the first equipment.
In the foregoing solution, after the failure occurs when the first processor acquires data from the first device, the method further includes:
the first processor generates a first message and distributes the first message to the first operating system so that the first operating system analyzes the fault, wherein the first message is used for prompting that data acquisition fails.
In the foregoing solution, the determining that the fault source generating the fault is the first device and/or the first interface includes:
when the first processor sends a data access request to the first device to obtain data,
judging whether a feedback message of the first equipment for the data access request exists in preset time or not;
and when the feedback message of the first equipment for the data access request does not exist in the preset time, determining that a fault source generating the fault is the first equipment and/or the first interface.
In the foregoing solution, after controlling the first target process to be closed, the method further includes:
judging whether a second target process which triggers the first processor to acquire data from the first equipment exists or not, wherein the second target process is a process different from the first target process;
and when the second target process exists, forbidding to respond to the trigger and controlling the second target process to close.
An embodiment of the present invention further provides an electronic device, including:
the analyzer is used for analyzing the fault through a first operating system when the first processor acquires data from the first device and the fault occurs, so as to obtain a fault source generating the fault;
and the controller is used for determining a first target process and controlling the first target process to be closed when the analyzer determines that a failure source generating the failure is a device associated with the first equipment through the first operating system, wherein the first target process is a process for triggering the first processor to acquire data from the first equipment.
In the above solution, the first processor has at least one first interface, and the first processor obtains the data by reading the data in the first device inserted into the first interface;
the analyzer is further configured to determine, by the first operating system, that a failure source generating the failure is the first device and/or the first interface, that the failure source is a device associated with the first device.
In the foregoing solution, the first processor is further configured to: after data acquisition from first equipment fails, generating a first message, and distributing the first message to the analyzer so that the analyzer analyzes the failure through the first operating system, wherein the first message is used for prompting that data acquisition fails.
In the foregoing solution, the analyzer is further configured to:
when the first processor sends a data access request to the first device to obtain data,
judging whether a feedback message of the first equipment for the data access request exists in preset time or not;
and when the feedback message of the first equipment for the data access request does not exist in the preset time, determining that a fault source generating the fault is the first equipment and/or the first interface.
In the foregoing solution, the controller is further configured to:
judging whether a second target process which triggers the first processor to acquire data from the first equipment exists or not, wherein the second target process is a process different from the first target process;
and when the second target process exists, forbidding to respond to the trigger and controlling the second target process to close.
The data processing method and the electronic device provided by the embodiment of the invention comprise the following steps: when the first processor acquires data from the first equipment and has a fault, analyzing the fault through the first operating system to obtain a fault source generating the fault; and when the first operating system determines that a fault source generating the fault is a device associated with the first equipment, determining a first target process, and controlling the first target process to be closed, wherein the first target process is a process for triggering the first processor to acquire data from the first equipment. At least, the restart probability can be reduced, and unnecessary restart is avoided.
Drawings
Fig. 1 is a schematic flow chart illustrating an implementation of a first embodiment of a data processing method according to the present invention;
FIG. 2 is a schematic flow chart illustrating an implementation of a second embodiment of the data processing method according to the present invention;
FIG. 3 is a schematic diagram of an application provided by the present invention;
fig. 4 is a schematic structural diagram of a first embodiment of an electronic device provided in the present invention;
fig. 5 is a schematic structural diagram of an electronic device according to a second embodiment of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, and it should be understood that the preferred embodiments described below are only for the purpose of illustrating and explaining the present invention, and are not to be construed as limiting the present invention.
The first embodiment of the data processing method provided by the invention is applied to a server, the server is provided with two or more CPUs, each CPU is provided with a certain number of device interfaces such as PCIE interfaces, and each interface can be inserted with a device.
Fig. 1 is a schematic flow chart illustrating an implementation of a first embodiment of a data processing method according to the present invention; as shown in fig. 1, the method includes:
step 101: when the first processor acquires data from the first equipment and has a fault, analyzing the fault through the first operating system to obtain a fault source generating the fault;
here, the first processor is a CPU in the server, and the first device is a device inserted into a PCIE interface of the CPU. When a process running in a server system (a first operating system) needs to read data from a certain device connected to a designated CPU, such as CPU1, the process sends a request message to the designated CPU, the CPU accesses the data to the device when receiving the request message, and when the CPU fails to acquire the data from the device, i.e., a failure occurs, such as a read data timeout event (transactionimeout), the server system analyzes the failure to obtain a failure source that has caused the failure.
Step 102: when the first operating system determines that a fault source generating the fault is a device associated with the first equipment, determining a first target process, wherein the first target process is a process for triggering a first processor to acquire data from the first equipment;
here, when the server system analyzes the fault to obtain a device associated with the specified CPU when the fault source generating the fault is obtained, that is, when the fault source is the device itself or a PCIE interface into which the device is inserted, it is determined which process the specified CPU is triggered to acquire data from the device, and the process the specified CPU is triggered to acquire data from the device is the first target process.
Step 103: controlling the first target process to close;
here, after the first target process is determined, the first target process is closed, and the server system does not run the first target process any more.
Therefore, in this embodiment, when the CPU fails to acquire data from the device, the server system analyzes the fault to obtain a fault source, and when the fault source is the device itself or a PCIE interface into which the device is inserted, the process that triggers the CPU to acquire data from the device is controlled to be closed. Compared with the prior art that when the CPU fails to acquire data from the device, the CPU broadcasts the generated internal IERRerror event to all other CPUs in the server system, so that the whole server system is restarted, in the scheme, the CPU analyzes the reason of the data acquisition failure by the server system, and when the device itself or a PCIE interface inserted by the device fails, the server does not need to be restarted, and only the server system needs to control the first target process to be closed so as not to respond and run the process, so that the restarting probability of the server is reduced, and unnecessary restarting is avoided. Meanwhile, in the scheme, the mode of analyzing the fault reason and controlling the target process to be closed by the server system greatly saves the hardware resource of the CPU and also avoids the problem that other CPUs cannot normally operate due to the broadcasting of the IERRerror event.
The second embodiment of the data processing method provided by the invention is applied to a server, the server is provided with two or more CPUs, each CPU is provided with a certain number of device interfaces such as PCIE interfaces, and each interface can be inserted with a device.
FIG. 2 is a schematic flow chart illustrating an implementation of a second embodiment of the data processing method according to the present invention; as shown in fig. 2, the method includes:
step 201: the first processor is provided with at least one first interface, the first processor acquires data by reading the data in first equipment inserted into the first interface, and when the data acquired by the first processor from the first equipment fails, the failure is analyzed through a first operating system to obtain a failure source generating the failure;
here, the first processor is a CPU in the server, the first interface is, for example, a PCIE interface, the first device is a device inserted into the PCIE interface of the CPU, and the CPU can access data in the device inserted into the PCIE interface. When a process running in a server system (a first operating system) needs to read data from a certain device connected to a designated CPU, such as CPU1, the process sends a request message to the designated CPU, the CPU accesses the data to the device when receiving the request message, when the CPU fails to acquire the data from the device, i.e., a failure occurs, such as a read data timeout event (transactionimeout), the CPU generates a first message and distributes the first message to the server system, the first message is used for the CPU to prompt the server system of the data acquisition failure, and the server system analyzes the failure after receiving the first message to obtain a failure source generating the failure.
Step 202: when the first operating system determines that a fault source generating the fault is the first device and/or the first interface, determining a first target process, wherein the first target process is a process for triggering a first processor to acquire data from the first device;
when the server system analyzes the fault to obtain that the fault source generating the fault is a device associated with the specified CPU, that is, the fault source is the device itself or a PCIE interface inserted into the device, it is determined which process the process that triggers the specified CPU to acquire data from the device is, and the process that triggers the specified CPU to acquire data from the device is the first target process.
Step 203: controlling the first target process to close;
here, after the first target process is determined, the first target process is closed, and the server system does not respond to and run the first target process any more.
In the scheme, the reason that the data acquisition fails is submitted to the server system by the CPU for analysis, and when the device itself or the PCIE interface inserted by the device fails, the server does not need to be restarted after the system analysis, and only the server system needs to control the first target process to be closed so as not to respond and operate the process, so that the restarting probability of the server is reduced, and unnecessary restarting is avoided.
In a preferred embodiment, the first operating system determines that the failure source generating the failure is the first device and/or the first interface by:
when the first processor sends a data access request to the first device to acquire data, the first operating system judges whether a feedback message of the first device for the data access request exists within a preset time, and determines that a fault source generating the fault is the first device and/or the first interface when judging that the feedback message of the first device for the data access request does not exist within the preset time. Further, when the first target process requires the CPU to read data in a certain device, the CPU sends a data access request to a device to read data in the device, in the process that the CPU sends a data access request to the device, the first operating system records the time when the CPU sends the data access request to the device, whether the device feeds back data to the CPU, the time for feeding back the data and the like, and when receiving the first message distributed by the CPU, judging whether the device has a feedback message in a preset time aiming at the data access request of the CPU based on the recorded information, if the fact that the feedback message does not exist in the preset time is judged, the first operating system considers that the device does not feed back the message probably because the problem of the device itself can also be the problem of a PCIE interface inserted by the device, and a fault source causing that the CPU cannot successfully access the device is determined to be the first equipment and/or the first interface. In the scheme, the server system analyzes the reason why the CPU cannot successfully acquire the data in the device, and the server does not need to be restarted when the device itself or a PCIE interface inserted into the device fails through system analysis, and only the server system needs to control the first target process to be closed so as not to respond and run the process, so that the restarting probability of the server is reduced, and unnecessary restarting is avoided. And further controlling the process triggering the CPU to access the device data to close.
In a preferred embodiment of the present invention, after controlling the first target process to shut down, the method further includes:
judging whether a second target process which triggers the first processor to acquire data from the first equipment exists or not, wherein the second target process is a process different from the first target process;
and when the second target process exists, forbidding to respond to the trigger and controlling the second target process to close.
Here, it is considered that, in practical application, when a problem exists in the device itself and/or a problem exists in the first interface, if another process different from the first target process acquires data in the device again, data acquisition failure is inevitably caused again, and hardware processing resources of the CPU are wasted. Based on this, in the scheme, after the first target process is closed, whether other processes which need to trigger the CPU to acquire data from the device exist in the server system or not is judged, if so, the server system does not respond to the trigger, and the second target process is closed so as to enable the second target process not to continue to access the data in the device with problems of the device or the interface. Therefore, the second target process which wants to acquire data from the device with the problem of the equipment or the interface is closed, and waste of processing resources is avoided.
The present solution is further understood in conjunction with fig. 3 below.
As shown in fig. 3, the server runs with a first operating system OS, and the server has N CPUs in a hardware configuration, where N is a positive integer greater than or equal to 2, and each CPU has a certain number of PCIE interfaces for inserting devices; each CPU has a certain number of kernel cores, and the access of the CPU to the data in the device is accessed through a specified kernel. In the present application scenario, it is assumed that when a process 1 running on an OS needs a CPU1 to read a device1 inserted in a CPU1, the process 1 transmits a data acquisition request message to a core1 of the CPU1, specifically, a CPU1, after the core1 receives the request message, the core1 transmits a data access request to the device1 to read data in the device1, when the core1 does not receive a feedback message of the device1 for the access request within a predetermined time, the data access of the core1 to the device1 fails, the CPU1 generates a transactionitimeout and a first message for the CPU1 to prompt the OS that the data acquisition fails, and when the OS receives the first message, the OS determines whether there is a feedback request for the data feedback message of the data access request to the device1 within the predetermined time of the data access request sent to the device1 by the core1, whether there is a feedback report of the data access request to the OS 1, and whether there is a feedback message of the data access request for the OS 828653 and the data feedback message for the device 865953, if it is determined that no feedback message exists within the preset time, the OS considers that the device1 does not feed back the message, which may be due to a problem of the device1 itself, such as device1 being damaged, or a problem of a PCIE interface into which the device1 is inserted, such as interface being damaged, or poor contact when the device1 is inserted into the PCIE interface, and the OS determines that a failure source causing the CPU1 to fail to access the device1 is the device1 or the PCIE interface into which the device1 is inserted. At this point, the OS shuts down Process 1, so that it no longer triggers the CPU1 to read the data in device 1. After process 1 is closed, in order to ensure that other processes continuously read the data in device1 inserted on CPU1, before the fault is not processed, the OS determines whether there is another process in the system, other than process 1, that needs to trigger CPU1 to obtain data from device1, and if so, the OS does not respond to the trigger and closes the other process so that it no longer has continuous access to the data in the device itself or the device with the problem in the interface itself. Therefore, in the scheme, the OS is used for analyzing the reason that the CPU cannot successfully acquire the data in the device, and when the device itself or the PCIE interface inserted into the device fails through system analysis, the server does not need to be restarted, and only the OS is needed to control the first target process to be closed so as not to respond and run the process any more, so that the restarting probability of the server is reduced, and unnecessary restarting is avoided. In addition, the CPU only needs to report the first message in the scheme, the reason for generating the fault does not need to be analyzed, and the processing burden of the CPU is reduced; and before the failure is not processed, the second target process which wants to acquire data from the device with the problem of the equipment or the interface is closed, so that the waste of processing resources is avoided. The predetermined time can be flexibly set according to specific use conditions, such as 10s, 1min, and the like, and is not specifically limited herein.
In the first embodiment of the electronic device provided by the present invention, the electronic device may be specifically a server, the server has two or more CPUs, each CPU has a certain number of device interfaces such as PCIE interfaces, and each interface can be plugged with a device.
Fig. 4 is a schematic structural diagram of a first embodiment of an electronic device provided in the present invention; as shown in fig. 4, the electronic apparatus includes: an analyzer 41, a controller 42; wherein,
the analyzer 41 is configured to, when a fault occurs in data acquired from the first device by the first processor, analyze the fault by the first operating system to obtain a fault source generating the fault;
here, the first processor is a CPU in the server, and the first device is a device inserted into a PCIE interface of the CPU. When a process running in a server system (first operating system) needs to read data from a device connected to a designated CPU, such as CPU1, the process sends a request message to the designated CPU, the CPU accesses the data to the device when receiving the request message, and when the CPU fails to acquire the data from the device, that is, a failure occurs, such as a read data timeout event (transactionimeout), the analyzer 41 analyzes the failure through the server system to obtain a failure source that has caused the failure.
And a controller 42, configured to determine a first target process and control the first target process to shut down when the analyzer 41 determines, through the first operating system, that a failure source generating the failure is a device associated with the first apparatus, where the first target process is a process that triggers the first processor to acquire data from the first apparatus.
Here, when the analyzer 41 analyzes the fault through the server system to obtain a device associated with the specified CPU when the fault source generating the fault is obtained, that is, when the fault source is the device itself or a PCIE interface into which the device is inserted, the controller 42 determines which process the specified CPU is triggered to acquire data from the device, and the process the specified CPU is triggered to acquire data from the device is the first target process, and the controller 42 closes the first target process so that the first target process is not run in the server system any more.
It should be understood by those skilled in the art that the OS has an operating system Kernel and a driver, and in this embodiment, data communication between the OS and hardware, such as the CPU, is performed through the driver. Kernel is used to manage processes, such as determining whether a process needs to retrieve data inserted in device1 on CPU 1.
Therefore, in this embodiment, when the CPU fails to acquire data from the device, the server system analyzes the fault to obtain a fault source, and when the fault source is the device itself or a PCIE interface into which the device is inserted, the process that triggers the CPU to acquire data from the device is controlled to be closed. Compared with the prior art that when the CPU fails to acquire data from the device, the CPU broadcasts the generated internal IERRerror event to all other CPUs in the server system, so that the whole server system is restarted, in the scheme, the CPU analyzes the reason of the data acquisition failure by the server system, and when the device itself or a PCIE interface inserted by the device fails, the server does not need to be restarted, and only the server system needs to control the first target process to be closed so as not to respond and run the process, so that the restarting probability of the server is reduced, and unnecessary restarting is avoided. Meanwhile, in the scheme, the mode of analyzing the fault reason and controlling the target process to be closed by the server system greatly saves the hardware resource of the CPU and also avoids the problem that other CPUs cannot normally operate due to the broadcasting of the IERRerror event.
In the second embodiment of the electronic device provided by the present invention, the electronic device may be specifically a server, the server has two or more CPUs, each CPU has a certain number of device interfaces such as PCIE interfaces, and each interface can be plugged with a device.
Fig. 5 is a schematic structural diagram of a second embodiment of an electronic device provided in the present invention; as shown in fig. 5, the electronic apparatus includes: an analyzer 51, a controller 52; wherein,
the first processor is provided with at least one first interface, and the first processor acquires data by reading the data in a first device inserted into the first interface;
the analyzer 51 is configured to, when a fault occurs in data acquired from the first device by the first processor, analyze the fault by the first operating system to obtain a fault source generating the fault;
here, the first processor is a CPU in the server, the first interface is, for example, a PCIE interface, the first device is a device inserted into the PCIE interface of the CPU, and the CPU can access data in the device inserted into the PCIE interface. When a process running in a server system (first operating system) needs to read data from a device connected to a designated CPU, such as CPU1, the process sends a request message to the designated CPU, the CPU accesses the data to the device when receiving the request message, when the CPU fails to acquire the data from the device, that is, a failure occurs, such as a read data timeout event (transactionimeout), the CPU generates a first message and distributes the first message to analyzer 51, the first message is used for the CPU to prompt the server system of the data acquisition failure, and after receiving the first message through the server system, analyzer 51 analyzes the failure to obtain a failure source generating the failure.
A controller 52, configured to determine a first target process and control the first target process to shut down when the analyzer 51 determines, through the first operating system, that a failure source generating the failure is the first device and/or the first interface; the first target process is a process for triggering a first processor to acquire data from first equipment;
here, when the analyzer 51 analyzes the fault through the server system to obtain that the fault source generating the fault is a device associated with the specified CPU, that is, the fault source is the device itself or a PCIE interface into which the device is inserted, the controller 52 determines which process the specified CPU is triggered to acquire data from the device, and the process the specified CPU is triggered to acquire data from the device is the first target process, and closes the first target process, so that the server system no longer responds to and runs the first target process.
In the scheme, the reason that the data acquisition fails is sent to the analyzer 51 by the CPU for analysis, and the analyzer 51 obtains the failure through the analysis of the server system because the device itself or the PCIE interface inserted into the device fails, the server does not need to be restarted, and only the server system needs to control the first target process to be closed so as not to respond and run the process any more, so that the restart probability of the server is reduced, and unnecessary restart is avoided.
In a preferred embodiment, the analyzer 51 is further configured to:
when the first processor sends a data access request to the first device to obtain data,
judging whether a feedback message of the first equipment for the data access request exists in preset time or not;
and when the feedback message of the first equipment for the data access request does not exist in the preset time, determining that a fault source generating the fault is the first equipment and/or the first interface. Further, when the first target process requires the CPU to read data in a certain device, the CPU sends a data access request to a device to read data in the device, in the process that the CPU sends a data access request to the device, the analyzer 51 records information such as the time when the CPU sends the data access request to the device, whether the device feeds back data to the CPU, and the time when the device feeds back data through the first operating system, upon receiving the first message distributed by the CPU, the analyzer 51 judges whether or not a feedback message exists for the device within a predetermined time with respect to the data access request of the CPU based on the recorded information, if it is determined that no feedback message exists within the preset time, the analyzer 51 determines that the device does not feed back the message because the problem of the device itself may also be a problem of a PCIE interface into which the device is inserted, and determines that a failure source causing the CPU to fail to access the device is the first device and/or the first interface. In this scheme, the analyzer 51 analyzes the reason why the CPU cannot successfully acquire the data in the device through the server system, and when the device itself or the PCIE interface into which the device is inserted has a fault through analysis, the server does not need to be restarted, but only the server system needs to control the first target process to be closed so as to stop responding and running the process, so that the restart probability of the server is reduced, and unnecessary restart is avoided. And further controlling the process triggering the CPU to access the device data to close.
In a preferred embodiment of the present invention, the controller 52 is further configured to: judging whether a second target process which triggers the first processor to acquire data from the first equipment exists or not, wherein the second target process is a process different from the first target process; and when the second target process exists, forbidding to respond to the trigger and controlling the second target process to close.
Here, it is considered that, in practical application, when a problem exists in the device itself and/or a problem exists in the first interface, if another process different from the first target process acquires data in the device again, data acquisition failure is inevitably caused again, and hardware processing resources of the CPU are wasted. Based on this, in this scheme, after the controller 52 closes the first target process, the controller 52 determines whether there are other processes, which need to trigger the CPU to acquire data from the device, in the first operating system, and if so, does not respond to the trigger, and closes the second target process so that it does not continue to access data in the device itself or the device with a problem in the interface itself. Therefore, the second target process which wants to acquire data from the device with the problem of the equipment or the interface is closed, and waste of processing resources is avoided.
It should be noted that, in the electronic device provided in the embodiment of the present invention, because the principle of solving the problem is similar to that of the data processing method, the implementation process and the implementation principle of the electronic device can be described with reference to the implementation process and the implementation principle of the data processing method, and repeated details are not repeated.
It should be understood by those skilled in the art that the electronic device provided in the embodiment of the present invention may be, in addition to being embodied as a server, the following: industrial control computers, personal computers and the like, all types of computers, all-in-one computers, tablet computers, mobile phones, electronic readers and the like, and can also be wearable devices such as intelligent glasses, intelligent watches, intelligent shoes and the like. This scheme is not particularly limited.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.
Claims (10)
1. A method of data processing, the method comprising:
when the first processor fails to retrieve data from the first device,
analyzing the fault through a first operating system to obtain a fault source generating the fault;
and when the first operating system determines that a fault source generating the fault is a device associated with the first equipment, determining a first target process, and controlling the first target process to be closed, wherein the first target process is a process for triggering the first processor to acquire data from the first equipment.
2. The method according to claim 1, wherein the first processor has at least one first interface, the first processor obtains the data by reading the data in a first device inserted into the first interface;
when the first operating system determines that the fault source generating the fault is the first equipment and/or the first interface, determining that the fault source is a device associated with the first equipment.
3. The method of claim 1, wherein after the failure of the first processor to obtain data from the first device, the method further comprises:
the first processor generates a first message and distributes the first message to the first operating system so that the first operating system analyzes the fault, wherein the first message is used for prompting that data acquisition fails.
4. The method of claim 2, wherein the determining that the failure source generating the failure is the first device and/or the first interface comprises:
when the first processor sends a data access request to the first device to obtain data,
judging whether a feedback message of the first equipment for the data access request exists in preset time or not;
and when the feedback message of the first equipment for the data access request does not exist in the preset time, determining that a fault source generating the fault is the first equipment and/or the first interface.
5. The method of claim 1, wherein after controlling the first target process to shut down, the method further comprises:
judging whether a second target process which triggers the first processor to acquire data from the first equipment exists or not, wherein the second target process is a process different from the first target process;
and when the second target process exists, forbidding to respond to the trigger and controlling the second target process to close.
6. An electronic device, comprising:
the analyzer is used for analyzing the fault through a first operating system when the first processor acquires data from the first device and the fault occurs, so as to obtain a fault source generating the fault;
and the controller is used for determining a first target process and controlling the first target process to be closed when the analyzer determines that a failure source generating the failure is a device associated with the first equipment through the first operating system, wherein the first target process is a process for triggering the first processor to acquire data from the first equipment.
7. The electronic device of claim 6, wherein the first processor has at least one first interface, and the first processor obtains the data by reading the data in a first device plugged into the first interface;
the analyzer is further configured to determine, by the first operating system, that a failure source generating the failure is the first device and/or the first interface, that the failure source is a device associated with the first device.
8. The electronic device of claim 6, wherein the first processor is further configured to: after data acquisition from first equipment fails, generating a first message, and distributing the first message to the analyzer so that the analyzer analyzes the failure through the first operating system, wherein the first message is used for prompting that data acquisition fails.
9. The electronic device of claim 7, wherein the analyzer is further configured to:
when the first processor sends a data access request to the first device to obtain data,
judging whether a feedback message of the first equipment for the data access request exists in preset time or not;
and when the feedback message of the first equipment for the data access request does not exist in the preset time, determining that a fault source generating the fault is the first equipment and/or the first interface.
10. The electronic device of claim 6, wherein the controller is further configured to:
judging whether a second target process which triggers the first processor to acquire data from the first equipment exists or not, wherein the second target process is a process different from the first target process;
and when the second target process exists, forbidding to respond to the trigger and controlling the second target process to close.
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| CN105824622B (en) | 2020-04-24 |
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