Background technology
Estimation is a part crucial in Video coding, is based primarily upon Block-matching and layering interpolation realizes solving of high accuracy motion vectors, and then release video redundancy in time.Wherein, Block-matching refers to and searches for and obtain corresponding blocks and optimal matching blocks according to corresponding matching criterior on reference frame.And be layered interpolation and refer to the motion vector being solved different accuracy by the interpolation calculation of multistage different accuracy.According to whether estimation adopts interpolation calculation, it is possible to estimation is divided into whole pixel motion and estimates and point pixel motion two parts of estimation.Although estimation can compress video largely, but to exacerbate binary encoding consuming time for the complexity of itself, particularly divides the introducing that pixel motion is estimated to exacerbate this problem further.
And the complexity that point pixel motion is estimated is concentrated mainly on its substantial amounts of interpolation calculation, especially, have employed, in HEVC (high-performance video coding), the interpolation filter comparing H.264 more tap number.
For this, some researcheres attempt to get around the interpolation calculation process of complexity thus accelerating point pixel motion and estimating by setting up model of error estimate.Its main policies is to utilize best whole pixel and contiguous whole pixel thereof to estimate curved surface to set up second order error, accelerates to approach best point pixel by solving the minimum point of second order error curved surface, thus avoiding too much interpolation and search matching process.Certainly, the premise that their strategy proves effective is that the minimizing computing cost of calculating compares interpolation and search matching process is much smaller.nullWherein,Comparatively typically there is SalihDikbas et al. (SalihDikbas,TarikArici,YucelAltunbasak.Fastmotionestimationwithinterpolation-freesub-sampleaccuracy[J].CircuitsandSystemsforVideoTechnology,IEEETransactionson,2010,20 (7): 1047-1051.) carried second order error estimates model and some other research worker (Jing-FuChang,Jin-JangLeou.Aquadraticpredictionbasedfractional-pixelmotionestimationalgorithmforH.264[J].JournalofVisualCommunicationandImageRepresentation,2006,17 (5): 1074-1089.) its second-order model is simplified " degeneration " second order error formed and estimate model.They test result indicate that, the method estimated by model can largely reduce encoder complexity.
Except setting up model of error estimate, means (the TsuyoshiSotetsumoto of threshold value control, TianSong, TakashiShimamoto.Lowcomplexityalgorithmforsub-pixelmotio nestimationofHEVC [C] .IEEE, 2013:1-4) also it is used to reduce a point pixel motion estimation complexity.
But, other researcheres (TokunboOgunfunmi, ObianujuNdili, PavelArnaudov.Onlowpowerfractionalmotionestimationalgori thmsforH.264 [C] .IEEE, 2012:103-108) it is primarily focused on point complexity of pixel motion estimation to, in hard-wired impact, stressing to improve Interpolation Process and accelerate the hardware realization that point pixel motion is estimated.
Summary of the invention
The present invention is directed to the deficiencies in the prior art, it is proposed that a kind of HEVC based on low complex degree layering interpolation divides pixel motion estimating method.
The invention provides a kind of HEVC based on low complex degree layering interpolation and divide pixel motion estimating method, the method includes:
Step one: on whole pixel precision, area-of-interest is initialized;
Step 2: pixel original value is converted to the intermediate value of corresponding integer by linear transformation;
Step 3: 1/2 point of pixel adopts 8 tap filters to be interpolated calculating;Particularly as follows: whole pixel utilizes following 8 tap FIR filters be interpolated filtering: {-1,4 ,-11,40,40 ,-11,4 ,-1} obtains 1/2 point of pixel.
Step 4: linear inversion obtains original value 1/2 image element interpolation filter result;
Step 5: motion vector refinement is to 1/2 point of pixel precision;
Step 6: 1/2 point of pixel intermediate value in vertical direction adopts 6 tap filters to be interpolated calculating;Specifically include: adopt following 6 tap FIR filters to be filtered 1/2 point of pixel in whole pixel and horizontal direction simultaneously: 1 ,-5,20,20 ,-5,1}.
Step 7: obtain 1/2 point of pixel intermediate value according to different tap filtering, utilize average to solve 1/4 point of pixel intermediate value;
Step 8: 1/4 point of pixel intermediate value is carried out inverse transformation and obtains final 1/4 image element interpolation result;Motion vector refinement is to 1/4 point of pixel precision.
Institute's extracting method can take into account complexity and the code efficiency that software and hardware realizes preferably.
The 1/2 point of pixel intermediate value obtained according to different tap filtering in step 7, utilizes its average to solve 1/4 point of pixel intermediate value;1/2 point of pixel intermediate value that wherein different tap filtering obtain refers specifically to 1/2 point of pixel intermediate value in vertical direction and adopts step 6 result of calculation, and in horizontal direction, 1/2 point of pixel intermediate value adopts step 3 result of calculation.
Beneficial effect: to accelerate to divide a pixel motion estimation procedure to improve coding rate, and then promote encoder meeting real-time coding demand.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is a part of embodiment of the present invention, rather than whole embodiment.Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under the premise not making creative work, all should belong to the scope of protection of the invention.
As it is shown in figure 1, a kind of HEVC based on low complex degree layering interpolation divides pixel motion estimating method, the method includes:
Step one: on whole pixel precision, area-of-interest is initialized;
Step 2: pixel original value is converted to the intermediate value of corresponding integer by linear transformation;
Step 3: 1/2 point of pixel adopts 8 tap filters to be interpolated calculating;
Step 4: linear inversion obtains original value 1/2 image element interpolation filter result;
Step 5: motion vector refinement is to 1/2 point of pixel precision;
Step 6: adopt 6 tap filters to be again interpolated calculating;
Step 7: obtain 1/2 point of pixel intermediate value according to different tap filtering, utilize average to solve 1/4 point of pixel intermediate value;
Step 8: 1/4 point of pixel intermediate value is carried out inverse transformation and obtains final 1/4 image element interpolation result;Motion vector refinement is to 1/4 point of pixel precision.
Fig. 2 illustrates different accuracy location of pixels relation.As shown in Figure 2, whole pixel leaves memory module (0 in, 0) in, memory module (0 is left in 1/2 point of pixel in whole pixel same level direction, 2), in, leave in memory module (2,0) with 1/2 point of pixel of the same vertical direction of whole pixel, and remaining 1/2 point of pixel leaves in memory module (2,2).
Fig. 3 illustrates 1/2 image element interpolation module diagram.As it is shown on figure 3, the method includes: linear transformation, it is possible to realize rapid translating by operations such as displacement, additions and become corresponding integer data for intermediate computations;
Direct copying whole pixel is stored in buffer memory 0 for subsequent calculations.
8 tap FIR filters in HEVC are adopted to filter calculating in the horizontal direction and result be stored in buffer memory 2 whole pixel.
It is copied directly to after value in buffer memory 0 is carried out corresponding linear inversion in memory module (0,0).
HEVC8 tap FIR filters is adopted to carry out vertical direction filtering and result carries out corresponding linear inversion be stored in memory module (2,0) value in buffer memory 0.
It is copied directly to after value in buffer memory 2 is carried out corresponding linear inversion in memory module (0,2).
Similarly, HEVC8 tap FIR filters is adopted to carry out vertical direction filtering and result carries out corresponding linear inversion be stored in memory module (2,2) value in buffer memory 2.
Estimate to obtain motion vector and 1/2 image element interpolation result according to whole pixel motion, motion vector is carried out refine and obtains the motion vector of 1/2 point of pixel precision.
Fig. 4 illustrates 1/4 image element interpolation module diagram.As shown in Figure 4, the method includes:
6 tap FIR filters H.264 are adopted to be filtered and result be stored in buffer memory 1 in the vertical direction the value of buffer memory 0.
Similarly, the value of buffer memory 1 adopt 6 tap FIR filters H.264 be filtered and result be stored in buffer memory 3 in the vertical direction.
According to buffer memory 0,1,2, the result of calculation of 3, adopts the mode that solves of adjacency average to calculate the value of 1/4 point of pixel respectively, and final calculation result is carried out corresponding linear inversion is stored in memory module (3 respectively, 0), (1,1), (0,1), (1,0), (3,1), (0,3), (1,3), (2,1), (3,2), (3,3), (2,3), (1,2).
Estimate to obtain motion vector and 1/4 image element interpolation result according to 1/2 point of pixel motion, motion vector is carried out refine and obtains the motion vector of 1/4 point of pixel precision.
The method of the embodiment of the present invention is mainly used in HEVC coding standard, for improving the complexity that its point of pixel motion is estimated, simultaneously, it is ensured that compression coding performance.
Those of ordinary skill in the art it can be appreciated that, in conjunction with the various method steps described in the embodiments described herein and unit, can with electronic hardware, computer software or the two be implemented in combination in, in order to clearly demonstrate the interchangeability of hardware and software, generally describe step and the composition of each embodiment in the above description according to function.These functions perform with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.Those of ordinary skill in the art specifically can should be used for using different methods to realize described function to each, but this realization is it is not considered that beyond the scope of this invention.
The method described in conjunction with the embodiments described herein or step can use the software program that hardware, processor perform, or the combination of the two is implemented.Software program can be placed in any other form of storage medium known in random access memory (RAM), internal memory, read only memory (ROM), electrically programmable ROM, electrically erasable ROM, depositor, hard disk, moveable magnetic disc, CD-ROM or technical field.
Although passing through reference accompanying drawing mode in conjunction with the preferred embodiments to the present invention have been described in detail, but the present invention being not limited to this.Without departing from the spirit and substance of the premise in the present invention, embodiments of the invention can be carried out amendment or the replacement of various equivalence by those of ordinary skill in the art, and these amendments or replacement all should in the covering scopes of the present invention.