CN105790622A - Five-level active midpoint clamping H-bridge inverter control method - Google Patents

Five-level active midpoint clamping H-bridge inverter control method Download PDF

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CN105790622A
CN105790622A CN201610225059.XA CN201610225059A CN105790622A CN 105790622 A CN105790622 A CN 105790622A CN 201610225059 A CN201610225059 A CN 201610225059A CN 105790622 A CN105790622 A CN 105790622A
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switching tube
switching
level
brachium pontis
switch transistor
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CN105790622B (en
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葛琼璇
张波
杨博
周志达
崔冬冬
于洋
王晓新
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Institute of Electrical Engineering of CAS
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Institute of Electrical Engineering of CAS
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/487Neutral point clamped inverters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0048Circuits or arrangements for reducing losses
    • H02M1/0054Transistor switching losses
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The present invention provides a five-level active midpoint clamping H-bridge inverter control method. The method comprises: defining the output level and the output state of the five-level active midpoint clamping H-bridge inverter, analyzing the switch tube loss distribution condition, and determining the proportion of the level switching mode and the reasonably using level switching mode. The five-level active midpoint clamping H-bridge inverter control method determines four level switching modes, and reaches the purpose that the loss of each device in the five-level active midpoint clamping H-bridge inverter is evenly distributed. The five-level active midpoint clamping H-bridge inverter control method is suitable for a high-voltage and high-power five-level active midpoint clamping H-bridge inverter.

Description

The control method of five-level active neutral point clamp H bridge inverter
Technical field
The present invention relates to the control method of a kind of five-level active neutral point clamp H bridge inverter.
Background technology
Multi-electrical level inverter obtains in high-power frequency conversion field and increasingly pays close attention to widely.Compared with two-level inverter, the advantages such as multi-electrical level inverter has less output harmonic wave content, higher voltage output.
Three level neutral point clamp (NeutralPointClamped, NPC) inverter has had application widely in output voltage is lower than the middle pressure driving market of 6kV, due to the restriction that power electronic devices is pressure, when demand is exported for higher electric pressure and more capacity, it is necessary to the converter of five level or more level.Owing to there is the unmanageable defect of mid-point voltage in five simple level NPC inverter, reality seldom adopts.Wherein NPC type H bridge (NPC/H) five-electrical level inverter has the advantage of three level NPC type inverters and H bridge inverter simultaneously, have that composition is simple, control advantage flexible, reliable, that harmonic content is few, drive the existing practical application in field at mesohigh.
Five level NPC/H inverters have more output level and on off state than three level NPC inverter, there is certain loss balancing ability, but still there is the brachium pontis unbalanced problem of switching device loss, the loss that part of devices is born is big, limits the maximum output capacity of inverter.
Five-level active neutral point clamp H bridge type inverter adopt a kind of brand-new topological structure, about this topology the existing document of loss balancing control method it is not yet reported that.It is referred to five level NPC/H inverter losses balance control methods, with document " ANovelFive-LevelVoltageSourceInverterWithSinusoidalPulse WidthModulatorforMedium-VoltageApplications " for representative, this control method can the device loss of brachium pontis to a certain extent, but owing to selectable Redundanter schalter state is less, still result in some switching device loss big, some switching device loss is less, the utilization rate of semiconductor switch device is relatively low, is unfavorable for the heat dissipation design of system.Five-level active midpoint H bridge inverter (ANPC/H) by increasing switching tube at clamp diode place, and passes through suitable wear leveling control strategy, it is possible to the loss distribution making brachium pontis switching device is more balanced.
Summary of the invention
The problem overcoming each switching device loss distribution equilibrium difference of five-level active neutral point clamp H bridge inverter that existing modulator approach controls of the present invention, it is proposed to the control method of a kind of wear leveling, more effectively utilizes the redundant state of active neutral point clamp inverter.The present invention is according to switching loss distribution situation, the principle of maximum switching loss it is sequentially generated according to single-phase each switching tube of H bridge, four kinds of level switching modes are proposed, four kinds of switching modes are run by a certain percentage in some cycles, the loss distribution of four switching tubes of single-phase one brachium pontis of H bridge can be improved, the average loss making four switching tubes is substantially close, thus improving output capacity and the power density of five-level active neutral point clamp H bridge inverter.The present invention is applicable to various pulse duration modulation methods.
The structure of the five-level active midpoint H bridge inverter applying control method of the present invention is as follows:
Three-phase five-level active midpoint H bridge inverter is a kind of device that unidirectional current is transformed into sinusoidal ac, including three DC sources, the derided capacitors that six parameters are identical, and a, b, c three-phase H bridge.Every phase H bridge is made up of two brachium pontis, and each brachium pontis is made up of 6 switching tubes, one diode of each switching tube reverse parallel connection.
In a phase H bridge, first switching tube, second switch pipe, 3rd switching tube and the 4th switching tube are composed in series H bridge the first brachium pontis, the anode of the first switching tube is connected to the positive pole of the first DC source, the negative electrode of the first switching tube connects the anode of second switch pipe, the negative electrode of second switch pipe connects the output of a cross streams electricity and the anode of the 3rd switching tube, the negative electrode of the 3rd switching tube connects the anode of the 4th switching tube, the negative electrode of the 4th switching tube connects the negative pole of the first DC source, the anode of the 5th switching tube is connected between the first switching tube and second switch pipe, the 5th switching tube negative electrode be connected to the anode of midpoint potential O and the six switching tube, the negative electrode of the 6th switching tube is connected between the 3rd switching tube and the 4th switching tube.
7th switching tube, the 8th switching tube, the 9th switching tube and the tenth switching tube are composed in series H bridge the second brachium pontis, the anode of the 7th switching tube is connected to the positive pole of the first DC source, the negative electrode of the 7th switching tube connects the anode of the 8th switching tube, the negative electrode of the 8th switching tube connects the anode of public output n and the nine switching tube of three-phase alternating current, the negative electrode of the 9th switching tube connects the anode of the tenth switching tube, and the negative electrode of the tenth switching tube connects the negative pole of the first DC source.The anode of the 11st switching tube is connected between the 7th switching tube and the 8th switching tube.The negative electrode of the 11st switching tube is connected to midpoint potential O and the anode of twelvemo pass pipe, and twelvemo is closed the negative electrode of pipe and is connected between the 9th switching tube and the tenth switching tube.
In b phase H bridge, the 13rd switching tube, the 14th switching tube, the 15th switching tube and sixteenmo close pipe and are composed in series H bridge the first brachium pontis.The anode of the 13rd switching tube is connected to the positive pole of the second DC source, the negative electrode of the 13rd switching tube connects the anode of the 14th switching tube, the negative electrode of the 14th switching tube connects the output of b cross streams electricity and the anode of the 15th switching tube, the negative electrode of the 15th switching tube connects sixteenmo and closes the anode of pipe, the negative electrode of sixteenmo pass pipe connects the negative pole of the second DC source, the anode of the 17th switching tube is connected between the 13rd switching tube and the 14th switching tube, the negative electrode of the 17th switching tube is connected to midpoint potential O and the anode of eighteenmo pass pipe, eighteenmo closes the negative electrode of pipe and is connected between the 15th switching tube and sixteenmo pass pipe.
null19th switching tube、20th switching tube、21st switching tube and the second twelvemo are closed pipe and are composed in series H bridge the second brachium pontis,The anode of the 19th switching tube is connected to the positive pole of the second DC source,19th switching tube negative electrode connect the 20th switching tube anode,The negative electrode of the 20th switching tube connects the anode of public output n and the 21 switching tube of three-phase alternating current,The negative electrode of the 21st switching tube connects the second twelvemo and closes the anode of pipe,The negative electrode of the second twelvemo pass pipe connects the negative pole of the second DC source,The anode of the 23rd switching tube is connected to the 21st switching tube and the second twelvemo is closed between pipe,The negative electrode of the 23rd switching tube is connected to the anode of midpoint potential O and the 24 switching tube,The negative electrode of the 24th switching tube is connected to the 21st switching tube and the second twelvemo is closed between pipe.
nullIn c phase H bridge,25th switching tube、Second sixteenmo closes pipe、27th switching tube and the second eighteenmo close pipe and are composed in series H bridge the first brachium pontis,The anode of the 25th switching tube is connected to the positive pole of the 3rd DC source,The negative electrode of the 25th switching tube connects the second sixteenmo and closes the anode of pipe,Second sixteenmo closes the negative electrode of pipe and connects the output of c cross streams electricity and the anode of the 27th switching tube,The negative electrode of the 27th switching tube connects the second eighteenmo and closes the anode of pipe,Second eighteenmo closes the negative pole of negative electrode connection the 3rd DC source of pipe,The anode of the 29th switching tube is connected to the 25th switching tube and the second sixteenmo closes between pipe,The negative electrode of the 29th switching tube is connected to the anode of midpoint potential O and the 30 switching tube,The negative electrode of the 30th switching tube is connected to the 27th switching tube and the second eighteenmo closes between pipe.
null31st switching tube、Thirty-twomo closes pipe、33rd switching tube and the 34th switching tube、It is composed in series H bridge the second brachium pontis,The anode of the 31st switching tube is connected to the positive pole of the 3rd DC source,The negative electrode of the 31st switching tube connects thirty-twomo and closes the anode of pipe,Thirty-twomo closes the anode of public output n and the 33 switching tube of the negative electrode connection three-phase alternating current of pipe,The negative electrode of the 33rd switching tube connects the anode of the 34th switching tube,The negative electrode of the 34th switching tube connects the negative pole of the 3rd DC source,The anode of the 35th switching tube is connected to the 31st switching tube and thirty-twomo closes between pipe,The negative electrode of the 35th switching tube is connected to midpoint potential O and the three sixteenmo and closes the anode of pipe,3rd sixteenmo closes the negative electrode of pipe and is connected between the 33rd switching tube and the 34th switching tube.
The loss control method of five-level active neutral point clamp H bridge inverter of the present invention comprises the following steps:
1, definition five-level active neutral point clamp H bridge inverter output state
The five-level active neutral point clamp single-phase output voltage of H bridge inverter has five kinds of level, respectively DC bus-bar voltage Vdc, Vdc/2,0 ,-Vdc/2 and-Vdc, respectively definition status is " 2 ", " 1 ", " 0 ", "-1 ", "-2 ".Every kind of output level comprises multiple redundant state, separately below the output state of five-level active neutral point clamp H bridge inverter is defined:
(1) state of single brachium pontis output voltage is defined
The definition method of single brachium pontis output voltage state is described for a phase, and b phase and c phase are in like manner.
In first brachium pontis of a phase, the 5th switching tube and the 6th switching tube are used for the active-clamp of voltage, the first derided capacitors and the second derided capacitors respectively inverter provides the DC voltage of Vdc/2 and-Vdc/2, constitutes three level neutral point clamp brachium pontis.Now, a phase output terminal relative level reference point O exports three kinds of level of Vdc/2,0 and-Vdc/2.B phase and c phase are in like manner.Wherein, zero level has four kinds of producing methods.Now the brachium pontis output level of the on off state of each switching tube and correspondence is illustrated as follows:
First switching tube, second switch pipe and the 6th switching tube, the 3rd switching tube, the 4th switching tube and the 5th switching tube turn off, and the output end voltage Vao of a phase the first brachium pontis is Vdc/2, and the output level state of definition brachium pontis is " 1 ".
First switching tube, second switch pipe and the 6th switching tube turn off, and when the 3rd switching tube, the 4th switching tube and the 5th switching tube are opened, the output end voltage Vao of a phase the first brachium pontis is-Vdc/2, and the output level state of definition brachium pontis is "-1 ".
Second switch pipe and the 5th switching tube are open-minded, and when the first switching tube, the 3rd switching tube, the 4th switching tube and the 6th switching tube turn off, the output end voltage Vao of a phase the first brachium pontis is 0, and the output level state of definition brachium pontis is " 0U2 ";
Second switch pipe, the 4th switching tube and the 5th switching tube are open-minded, and when the first switching tube, the 3rd switching tube and the 6th switching tube turn off, the output end voltage Vao of a phase the first brachium pontis is 0, and the output level state of definition brachium pontis is " 0U1 ";
First switching tube, the 3rd switching tube and the 6th switching tube are open-minded, and when second switch pipe, the 4th switching tube and the 5th switching tube turn off, the output end voltage Vao of a phase the first brachium pontis is 0, and the output level state of definition brachium pontis is " 0L1 ";
3rd switching tube and the 6th switching tube are open-minded, and when the first switching tube, second switch pipe, the 4th switching tube and the 5th switching tube turn off, the output end voltage Vao of a phase the first brachium pontis is 0, and the output level state of definition brachium pontis is " 0L2 ";
The output state of the first brachium pontis output voltage and switch combination are as shown in table 1, and wherein " 1 " represents that switching tube is open-minded, and " 0 " represents that switching tube turns off:
The output state of table 1 first brachium pontis output voltage Vao and the working condition of switching tube
In like manner, in the second brachium pontis of a phase, exchange output n end relative level reference point O, it is possible to output three kinds of level of Vdc/2,0 and-Vdc/2.The producing method of each level is similar with the first brachium pontis, and table 2 provides output state and the switch combination of the second brachium pontis output voltage:
The output state of table 2 second brachium pontis output voltage Vno and the working condition of switching tube
(2) output state of single-phase H bridge output voltage is defined
The method that the output state of the single-phase H bridge output voltage of definition is described for a phase below, b phase and c phase are in like manner.
A phase H bridge output voltage Van is the first brachium pontis output voltage Vao and the difference of the second brachium pontis output voltage Vno, i.e. Van=Vao-Vno.
A (), when output level is Vdc or-Vdc, output voltage Van does not have the redundancy way of output, defining output state now respectively is " 2 " and "-2 ".
B (), when output voltage Van is Vdc/2, single-phase H bridge has four kinds of redundancy way of outputs, is defined respectively as:
Definition output state " 1_1 ": the first switching tube of the first brachium pontis, second switch pipe, the 6th switching tube conducting, the 3rd switching tube, the 4th switching tube, the 5th switching tube turn off, and the output level of the first brachium pontis is Vdc/2, and output state is " 1 ";8th switching tube of the second brachium pontis, the 11st switching tube conducting, 7th switching tube, the 9th switching tube, twelvemo are closed pipe and are turned off, the output level of the second brachium pontis is 0, when the tenth switching tube conducting, the output state of the second brachium pontis is " 0U1 ", when the tenth switching tube turns off, the output state of the second brachium pontis is " 0U2 ".
Definition output state " 1_2 ": the first switching tube of the first brachium pontis, second switch pipe, the 6th switching tube conducting, the 3rd switching tube, the 4th switching tube, the 5th switching tube turn off, and the output level of the first brachium pontis is Vdc/2, and output state is " 1 ";9th switching tube of the second brachium pontis, twelvemo close pipe conducting, 8th switching tube, the tenth switching tube, the 11st switching tube turn off, the output level of the second brachium pontis is 0, when the 7th switching tube conducting, the output state of the second brachium pontis is " 0L1 ", when the 7th switching tube turns off, the output state of the second brachium pontis is " 0L2 ".
Definition output state " 1_3 ": the second switch pipe of the first brachium pontis, the 5th switching tube conducting, first switching tube, the 3rd switching tube, the 6th switching tube turn off, the output level of the first brachium pontis is 0, when the 4th switching tube conducting, the output state of the first brachium pontis is " 0U1 ", when the 4th switching tube turns off, the output state of the first brachium pontis is " 0U2 ";9th switching tube of the second brachium pontis, the tenth switching tube, the 11st switching tube conducting, the 7th switching tube, the 8th switching tube, twelvemo are closed pipe and are turned off, and the output level of the second brachium pontis is-Vdc/2, and output state is "-1 ".
Definition output state " 1_4 ": the 3rd switching tube of the first brachium pontis, the 6th switching tube conducting, second switch pipe, the 4th switching tube, the 5th switching tube turn off, the output level of the first brachium pontis is 0, when the first switching tube conducting, the output state of the first brachium pontis is " 0L1 ", when the first switching tube turns off, the output state of the first brachium pontis is " 0L2 ";9th switching tube of the second brachium pontis, the tenth switching tube, the 11st switching tube conducting, the 7th switching tube, the 8th switching tube, twelvemo are closed pipe and are turned off, and the output level of the second brachium pontis is-Vdc/2, and output state is "-1 ".
C (), when output voltage Van is 0, the output of a phase H bridge has six kinds of redundancy way of outputs, is defined respectively as:
Definition output state " 0_1 ": the second switch pipe of the first brachium pontis, the 5th switching tube conducting, first switching tube, the 3rd switching tube, the 6th switching tube turn off, the output level of the first brachium pontis is 0, when the 4th switching tube conducting, the output state of the first brachium pontis is " 0U1 ", when the 4th switching tube turns off, the output state of the first brachium pontis is " 0U2 ";8th switching tube of the second brachium pontis, the 11st switching tube conducting, 7th switching tube, the 9th switching tube, twelvemo are closed pipe and are turned off, the output level of the second brachium pontis is 0, when the tenth switching tube conducting, the output state of the second brachium pontis is " 0U1 ", when the tenth switching tube turns off, the output state of the second brachium pontis is " 0U2 ".
Definition output state " 0_2 ": the 3rd switching tube of the first brachium pontis, the 6th switching tube conducting, second switch pipe, the 4th switching tube, the 5th switching tube turn off, the output level of the first brachium pontis is 0, when the first switching tube conducting, the output state of the first brachium pontis is " 0L1 ", when the first switching tube turns off, the output state of the first brachium pontis is " 0L2 ";9th switching tube of the second brachium pontis, twelvemo close pipe conducting, 8th switching tube, the tenth switching tube, the 11st switching tube turn off, the output level of the second brachium pontis is 0, when the 7th switching tube conducting, the output state of the second brachium pontis is " 0L1 ", when the 7th switching tube turns off, the output state of the second brachium pontis is " 0L2 ".
Definition output state " 0_3 ": the second switch pipe of the first brachium pontis, the 5th switching tube conducting, first switching tube, the 3rd switching tube, the 6th switching tube turn off, the output level of the first brachium pontis is 0, when the 4th switching tube conducting, the output state of the first brachium pontis is " 0U1 ", when the 4th switching tube turns off, the output state of the first brachium pontis is " 0U2 ";9th switching tube of the second brachium pontis, twelvemo close pipe conducting, 8th switching tube, the tenth switching tube, the 11st switching tube turn off, the output level of the second brachium pontis is 0, when the 7th switching tube conducting, the output state of the second brachium pontis is " 0L1 ", when the 7th switching tube turns off, the output state of the second brachium pontis is " 0L2 ".
Definition output state " 0_4 ": the 3rd switching tube of the first brachium pontis, the 6th switching tube conducting, second switch pipe, the 4th switching tube, the 5th switching tube turn off, the output level of the first brachium pontis is 0, when the first switching tube conducting, the output state of the first brachium pontis is " 0L1 ", when the first switching tube turns off, the output state of the first brachium pontis is " 0L2 ";8th switching tube of the second brachium pontis, the 11st switching tube conducting, 7th switching tube, the 9th switching tube, twelvemo are closed pipe and are turned off, the output level of the second brachium pontis is 0, when the tenth switching tube conducting, the output state of the second brachium pontis is " 0U1 ", when the tenth switching tube turns off, the output state of the second brachium pontis is " 0U2 ".
Definition output state " 0_5 ": the first switching tube of the first brachium pontis, second switch pipe, the 6th switching tube conducting, the 3rd switching tube, the 4th switching tube, the 5th switching tube turn off, and the output level of the first brachium pontis is Vdc/2, and output state is " 1 ";7th switching tube of the second brachium pontis, the 8th switching tube, twelvemo close pipe conducting, and the 9th switching tube, the tenth switching tube, the 11st switching tube turn off, and the output level of the second brachium pontis is Vdc/2, and output state is " 1 ".
Definition output state " 0_6 ": the 3rd switching tube of the first brachium pontis, the 4th switching tube, the 5th switching tube conducting, the first switching tube, second switch pipe, the 6th switching tube turn off, and the output level of the first brachium pontis is-Vdc/2, and output state is "-1 ";9th switching tube of the second brachium pontis, the tenth switching tube, the 11st switching tube conducting, the 7th switching tube, the 8th switching tube, twelvemo are closed pipe and are turned off, and the output level of the second brachium pontis is-Vdc/2, and output state is "-1 ".
D (), when output voltage Van is-Vdc/2, the output of a phase H bridge has four kinds of redundancy way of outputs, is defined respectively as:
Definition output state "-1_1 ": the 3rd switching tube of the first brachium pontis, the 4th switching tube, the 5th switching tube conducting, the first switching tube, second switch pipe, the 6th switching tube turn off, and the output level of the first brachium pontis is-Vdc/2, and output state is "-1 ";9th switching tube of the second brachium pontis, twelvemo close pipe conducting, 8th switching tube, the tenth switching tube, the 11st switching tube turn off, the output level of the second brachium pontis is 0, when the 7th switching tube conducting, the output state of the second brachium pontis is " 0L1 ", when the 7th switching tube turns off, the output state of the second brachium pontis is " 0L2 ".
Definition output state "-1_2 ": the 3rd switching tube of the first brachium pontis, the 4th switching tube, the 5th switching tube conducting, the first switching tube, second switch pipe, the 6th switching tube turn off, and the output level of the first brachium pontis is-Vdc/2, and output state is "-1 ";8th switching tube of the second brachium pontis, the 11st switching tube conducting, 7th switching tube, the 9th switching tube, twelvemo are closed pipe and are turned off, the output level of the second brachium pontis is 0, when the tenth switching tube conducting, the output state of the second brachium pontis is " 0U1 ", when the tenth switching tube turns off, the output state of the second brachium pontis is " 0U2 ".
Definition output state "-1_3 ": the 3rd switching tube of the first brachium pontis, the 6th switching tube conducting, second switch pipe, the 4th switching tube, the 5th switching tube turn off, the output level of the first brachium pontis is 0, when the first switching tube conducting, the output state of the first brachium pontis is " 0L1 ", when the first switching tube turns off, the output state of the first brachium pontis is " 0L2 ";7th switching tube of the second brachium pontis, the 8th switching tube, twelvemo close pipe conducting, and the 9th switching tube, the tenth switching tube, the 11st switching tube turn off, and the output level of the second brachium pontis is Vdc/2, and output state is " 1 ".
Definition output state "-1_4 ": the second switch pipe of the first brachium pontis, the 5th switching tube conducting, first switching tube, the 3rd switching tube, the 6th switching tube turn off, the output level of the first brachium pontis is 0, when the 4th switching tube conducting, the output state of the first brachium pontis is " 0U1 ", when the 4th switching tube turns off, the output state of the first brachium pontis is " 0U2 ";7th switching tube of the second brachium pontis, the 8th switching tube, twelvemo close pipe conducting, and the 9th switching tube, the tenth switching tube, the 11st switching tube turn off, and the output level of the second brachium pontis is Vdc/2, and output state is " 1 ".
Table 3 provides the output state of the first brachium pontis corresponding to each output level of a phase H bridge output voltage Van and output state and the second brachium pontis:
The duty of table 3a phase H bridge output voltage Van and the first brachium pontis output voltage Vao, the second brachium pontis output voltage Vno
(3) specified level switching principle
Owing to five-level active midpoint H bridge inverter topology has redundant level state, therefore having multiple choices when output level switches, the driving signal for multi-electrical level inverter must is fulfilled for following principle:
A (), in order to ensure less voltage change ratio, can only switch during level switching step by step;
B (), in order to meet the restriction of switching device switching dead, improves the security reliability of inverter, should only open a semiconductor device, turn off a semiconductor device, avoid being switched on or off multiple switching device as far as possible simultaneously during level switching.
Based on above-mentioned level switching principle, the zero level state options in table 3, such as " 0U1 or 0U2 ", only one of which particular state meets requirement, such as " 0U1 ", therefore two kinds of zero level states is summarised in an on off state.
2. analyze the switching loss of each switching device under each switching mode
There are four kinds of level switching situations in the single-phase H bridge of five-level active midpoint H bridge inverter, namely For the switching combining of different output states, the switching tube producing switching loss is different, and for different switching directions, the switching tube producing switching loss also differs;According to level switching principle, filter out the level switching mode of application, analyze the commutation course of every kind of switching mode, obtain only one of which switching tube and a diode in the commutation course of each level switching and produce switching loss, and there is symmetrical relations.Illustrate that under difference switching situation, switching tube and diode produce switching loss situation individually below.
(1) when level switches between Vdc and Vdc/2, according to level switching principle, exist Four kinds of level switching modes.
Switching modeWhen output state 2 is switched to state 1_1, first the 9th switching tube is turned off, after a Dead Time, open the 8th switching tube, if the output sense of current is for flow to n from a, now the 9th switching tube and the 8th diode produce switching loss, if the sense of current is contrary, then the 9th diode and the 8th switching tube produce switching loss.
Switching modeWhen output state 2 is switched to state 1_2, first the 11st switching tube is turned off, now do not have electric current and flow through the 11st switching tube, therefore now turn off the 11st switching tube and will not produce turn-off power loss, be then powered off the tenth switching tube, after a Dead Time, opening twelvemo and close pipe, if the output sense of current is for flow to n from a, now the tenth switching tube and the 12nd diode produce switching loss, if the sense of current is contrary, then the tenth diode and twelvemo are closed pipe and are produced switching loss.
Switching modeWhen output state 2 is switched to state 1_3, first the first switching tube is turned off, now do not have electric current and flow through the first switching tube, therefore now turn off the first switching tube and will not produce turn-off power loss, be then powered off the 6th switching tube, after a Dead Time, opening the 5th switching tube, if the output sense of current is for flow to n from a, now the 6th switching tube and the 5th diode produce switching loss, if the sense of current is contrary, then the 6th diode and the 5th switching tube produce switching loss.
Switching modeWhen output state 2 is switched to state 1_4, first second switch pipe is turned off, after a Dead Time, open the 3rd switching tube, if the output sense of current is for flow to n from a, now second switch pipe and the 3rd diode produce switching loss, if the sense of current is contrary, then the second diode and the 3rd switching tube produce switching loss.
(2) when level switches between Vdc/2 and 0, according to level switching principle, the zero level state mated with each Vdc/2 level state only has three, always has 12 kinds of switching modes:
The zero level state mated with level state 1_1 has tri-zero levels of 0_1,0_4 and 0_5.As 1_1 → 0_1, first turning off the 6th switching tube, be then powered off the first switching tube, after a Dead Time, open the 5th switching tube, the first switching tube, the 5th diode bear maximum switching loss.As 1_1 → 0_4, first turning off second switch pipe, the first switching tube is still within opening state, after a Dead Time, opens the 3rd switching tube, and second switch pipe, the 3rd diode produce maximum turn-off power loss.As 1_1 → 0_5, first turning off the 11st switching tube, then open the 7th switching tube, finally open twelvemo and close pipe, the 7th switching tube, the 11st diode produce main switching loss.
The zero level state mated with level state 1_2 has tri-zero levels of 0_2,0_3 and 0_5.As 1_2 → 0_2, first turning off second switch pipe, the first switching tube is still within opening state, after a Dead Time, opens the 3rd switching tube, and second switch pipe, the 3rd diode produce maximum turn-off power loss.As 1_2 → 0_3, first turning off the 6th switching tube, be then powered off the first switching tube, after a Dead Time, open the 5th switching tube, the first switching tube, the 5th diode bear maximum switching loss.As 1_2 → 0_5, first turning off the 9th switching tube, then open the 8th switching tube, the 8th switching tube, the 9th diode produce main switching loss.
The zero level state mated with level state 1_3 has tri-zero levels of 0_1,0_3 and 0_6.As 1_3 → 0_1, first turning off the 9th switching tube, the tenth switching tube is still within opening state, after a Dead Time, opens the 8th switching tube, and the 9th switching tube, the 8th diode produce maximum turn-off power loss.As 1_3 → 0_3, first turning off the 11st switching tube, be then powered off the tenth switching tube, after a Dead Time, open twelvemo and close pipe, the tenth switching tube, the 12nd diode bear maximum switching loss.As 1_3 → 0_6, first turning off second switch pipe, then open the 3rd switching tube, second switch pipe, the 3rd diode produce main switching loss.
The zero level state mated with level state 1_4 has tri-zero levels of 0_2,0_4 and 0_6.As 1_4 → 0_2, first turning off the 11st switching tube, be then powered off the tenth switching tube, after a Dead Time, open twelvemo and close pipe, the tenth switching tube, the 12nd diode bear maximum switching loss.As 1_4 → 0_4, first turning off the 9th switching tube, the tenth switching tube is still within opening state, after a Dead Time, opens the 8th switching tube, and the 9th switching tube, the 8th diode produce maximum turn-off power loss.As 1_4 → 0_6, first turning off the 6th switching tube, then open the 4th switching tube, finally open the 5th switching tube, the 4th switching tube, the 6th diode produce main switching loss.
(3) when level switches between-Vdc/2 and 0, according to multi-electrical level inverter switching principle, the zero level state mated with each-Vdc/2 level state only has three, always has 12 kinds of switching modes:
The zero level state mated with level state-1_1 has 0_2,0_3 and 0_6 tri-.As-1_1 → 0_2, first turning off the 5th switching tube, be then powered off the 4th switching tube, after a Dead Time, open the 6th switching tube, the 4th switching tube, the 6th diode bear maximum switching loss.As-1_1 → 0_3, first turning off the 3rd switching tube, the 4th switching tube is still within opening state, after a Dead Time, opens second switch pipe, and the 3rd switching tube, the second diode produce maximum turn-off power loss.As-1_1 → 0_6, first turning off twelvemo and close pipe, then open the tenth switching tube, finally open the 11st switching tube, the tenth switching tube, the 12nd diode produce main switching loss.
The zero level state mated with level state-1_2 has 0_1,0_4 and 0_6 tri-.As-1_2 → 0_1, first turning off the 3rd switching tube, the 4th switching tube is still within opening state, after a Dead Time, opens second switch pipe, and the 3rd switching tube, the second diode produce maximum turn-off power loss.As-1_2 → 0_4, first turning off the 5th switching tube, be then powered off the 4th switching tube, after a Dead Time, open the 6th switching tube, the 5th switching tube, the 6th diode bear maximum switching loss.As 1_2 → 0_6, first turning off the 8th switching tube, then open the 9th switching tube, the 9th switching tube, the 8th diode produce main switching loss.
The zero level state mated with level state-1_3 has 0_2,0_4 and 0_5 tri-.As-1_3 → 0_2, first turning off the 8th switching tube, the 7th switching tube is still within opening state, after a Dead Time, opens the 9th switching tube, and the 8th switching tube, the 9th diode produce maximum turn-off power loss.As-1_3 → 0_4, first turning off twelvemo and close pipe, be then powered off the 7th switching tube, after a Dead Time, open the 11st switching tube, the 7th switching tube, the 11st diode bear maximum switching loss.As-1_3 → 0_5, first turning off the 3rd switching tube, then open second switch pipe, the 3rd switching tube, the second diode produce main switching loss.
The zero level state mated with level state-1_4 has 0_1,0_3 and 0_5 tri-.As-1_4 → 0_1, first turning off twelvemo and close pipe, be then powered off the 7th switching tube, after a Dead Time, open the 11st switching tube, the 7th switching tube, the 11st diode bear maximum switching loss.As-1_4 → 0_3, first turning off the 8th switching tube, the 7th switching tube is still within opening state, after a Dead Time, opens the 9th switching tube, and the 8th switching tube, the 9th diode produce maximum turn-off power loss.As-1_4 → 0_5, first turning off the 5th switching tube, then open the first switching tube, finally open the 6th switching tube, the first switching tube, the 5th diode produce main switching loss.
(4) when level switches mutually at-Vdc and-Vdc/2, according to level switching principle, exist WithTotally four kinds of level switching types:
Switching modeWhen output state-2 is switched to state-1_1, first the 8th switching tube is turned off, the 9th switching tube is opened after a Dead Time, if the output sense of current is for flow to n from a, now the 8th switching tube and the 9th diode produce switching loss, if the sense of current is contrary, then the 8th diode and the 9th switching tube produce switching loss.
Switching modeWhen output state-2 is switched to state-1_2, first turn off twelvemo and close pipe, now do not have electric current and flow through twelvemo pass pipe, therefore now turn off twelvemo pass pipe and will not produce turn-off power loss, be then powered off the 7th switching tube, after a Dead Time, opening the 11st switching tube, if the output sense of current is for flow to n from a, now the 7th switching tube and the 11st diode produce switching loss, if the sense of current is contrary, then the 7th diode and the 11st switching tube produce switching loss.
Switching modeWhen output state-2 is switched to state-1_3, first the 5th switching tube is turned off, now do not have electric current and flow through the 5th switching tube, therefore now turn off the 5th switching tube and will not produce turn-off power loss, be then powered off the 4th switching tube, after a Dead Time, opening the 6th switching tube, if the output sense of current is for flow to n from a, now the 4th switching tube and the 6th diode produce switching loss, if the sense of current is contrary, then the 4th diode and the 6th switching tube produce switching loss.
Switching modeWhen output state-2 is switched to state-1_4, first the 3rd switching tube is turned off, after a Dead Time, open second switch pipe, if the output sense of current is for flow to n from a, now the 3rd switching tube and the second diode produce switching loss, if the sense of current is contrary, then the 3rd diode and second switch pipe produce switching loss.
Each meet level switching principle level switching time produce the switching tube of loss and diode is as shown in table 4.Wherein, " √ " represents that this device produces switching loss.
Loss distribution during the switching of table 4 five-level active neutral point clamp H bridge inverter level
3. determine four kinds of level switching modes
Level switching mode according to step 1, when a phase H bridge output level Vdc, Vdc/2,0, between-Vdc/2 and-Vdc switching time, switching combining for different output states, the switching tube producing switching loss is different, if output sense of current is determined, only one of which switching tube and a diode produce switching loss.The present invention is with switching loss for loss main source, according to level switching principle, the order of maximum loss it is sequentially generated according to the first switching tube or the 7th switching tube, second switch pipe or the 8th switching tube, the 3rd switching tube or the 9th switching tube, the 4th switching tube or the tenth switching tube, filtering out four kinds of level switching combining, these four level switching mode is respectively as follows:
Level switching mode 1:
Level switching mode 2:
Level switching mode 3:
Level switching mode 4:
Rationally selecting the operation ratio of four kinds of level switching modes when the cycle is used alternatingly level switching mode 1~4 in the ratio of 1:1:1:1 in units of modulation voltage, the average loss of the first switching tube in the first brachium pontis, second switch pipe, the 3rd switching tube and the 4th switching tube can be expressed as:
PAve_tli (i=1,2,3or4)=(Ptli_type1+Ptli_type2+Ptli_type3+Ptli_type4)/4
Wherein, Pave_tliRepresent brachium pontis switch transistor T a1i (i=1,2,3 or 4) four kinds of methods of operation be used alternatingly under average loss, Ptli_type1、Ptli_type2、Ptli_type3、Ptli_type4Represent the brachium pontis switch transistor T a1i (i=1,2,3 or 4) loss under level switching mode 1~4 respectively.
Four kinds of selected switching modes can individually regulate the maximum loss of each switching tube, by regulating the action time of four kinds of switching modes, it is possible to balancing the loss of each switching tube further, the minima that the meansigma methods of each switching tube loss can reach is:
Pmin_ave=(Pave_t11+Pave_t12+Pave_t13+Pave_t14)/4
Wherein, Pmin_aveRepresent that the meansigma methods of the average loss of brachium pontis switch transistor T a11~Ta14 reaches minimum value.
Introduce a loss profile adjustment coefficient k, 0 < k < 1, make four kinds of level switching modes according to k:(1-k): the use frequency effect of (1-k): k, thus the average loss of four kinds of switching modes of individual devices generation can reach minima, to realize the balanced distribution of the loss of inverter leg switching tube.Now the average minimal losses of single switching transistor is:
Pave_tli=[k (Pt11_type1+Pt11_type4)+(1-k)(Pt11_type2+Pt11_type3)]/2
Wherein, Pave_tliRepresenting brachium pontis switch transistor T a1i average loss under level switching mode 1~4 is run by a certain percentage, its minima is Pave_tli_min
Can be in the hope of the optimal value of k:
K=(2Pave_tli_min-Pt11_type2-Pt11_type3)/(Pt11_type1+Pt11_type4-Pt11_type2-Pt11_type3)
Four kinds of level switching modes are according to k:(1-k): ratio action time of (1-k): k is run, it is possible to achieve the loss balancing distribution of inverter one-phase brachium pontis switching tube.
Accompanying drawing explanation
Fig. 1 is three-phase five-level active neutral point clamp H bridge inverter topology diagram;
Fig. 2 is five level single-phase carrier layered manner schematic diagrams;
Fig. 3 is each pipe working condition of a phase the first brachium pontis in level switching mode 1 situation;
Fig. 4 is each pipe working condition of a phase the first brachium pontis in level switching mode 2 situation;
Fig. 5 is each pipe working condition of a phase the first brachium pontis in level switching mode 3 situation;
Fig. 6 is each pipe working condition of a phase the first brachium pontis in level switching mode 4 situation;
Fig. 7 is the loss scattergram of a phase the first brachium pontis in level switching mode 1 situation;
Fig. 8 is the loss scattergram of a phase the first brachium pontis in level switching mode 2 situation;
Fig. 9 is the loss scattergram of a phase the first brachium pontis in level switching mode 3 situation;
Figure 10 is the loss scattergram of a phase the first brachium pontis in level switching mode 4 situation;
Figure 11 is four kinds of switching modes loss scattergrams of a phase the first brachium pontis when using in turn with 1:1:1:1;
Figure 12 is four kinds of switching modes loss scattergrams of a phase the first brachium pontis when using in turn with 2:1:1:2.
Detailed description of the invention
Below in conjunction with the drawings and specific embodiments, the invention will be further described.
As it is shown in figure 1, the three-phase five-level active midpoint H bridge inverter applying control method of the present invention includes three DC sources Vdc1, Vdc2, Vdc3, the derided capacitors that six parameters are identical, and a, b, c three-phase H bridge.In practical application, DC source Vdc1, Vdc2, Vdc3 three is generally equal.Every phase H bridge is made up of 2 brachium pontis, and each brachium pontis is made up of 6 switching tubes, one diode of each switching tube reverse parallel connection, and the corresponding relation of switching tube and diode is switch transistor T aji and diode Daji inverse parallel, j=1 or 2, i=1,2,3,4,5 or 6.
nullFor a phase H bridge,First switch transistor T a11、Second switch pipe Ta12、3rd switch transistor T a13 and the four switch transistor T a14 is composed in series H bridge the first brachium pontis,The anode of the first switch transistor T a11 is connected to DC source Vdc1 positive pole,The negative electrode of the first switch transistor T a11 connects the anode of Ta12,The negative electrode of second switch pipe Ta12 connects the output of a cross streams electricity and the anode of the 3rd switch transistor T a13,Second switch pipe Ta12 negative electrode connect the 4th switch transistor T a14 anode,The negative electrode of the 4th switch transistor T a14 connects the negative pole of DC source Vdc1,What connect between the first switch transistor T a11 and second switch pipe Ta12 is the anode of the 5th switch transistor T a15,The negative electrode of the 5th switch transistor T a15 is connected to the anode of midpoint potential O and the six switch transistor T a16,The negative electrode of the 6th switch transistor T a16 is connected between the 3rd switch transistor T a13 and the 4th switch transistor T a14.null7th switch transistor T a21、8th switch transistor T a22、9th switch transistor T a23 and the ten switch transistor T a24 is composed in series H bridge the second brachium pontis,The anode of the 7th switch transistor T a21 is connected to DC source Vdc1 positive pole,The negative electrode of the 7th switch transistor T a21 connects the anode of the 8th switch transistor T a22,The negative electrode of the 8th switch transistor T a22 connects the anode of public output n and the nine switch transistor T a23 of three-phase alternating current,The negative electrode of the 9th switch transistor T a23 connects the anode of the tenth switch transistor T a24,The negative electrode of the tenth switch transistor T a24 connects the negative pole of DC source,What connect between the 7th switch transistor T a21 and the 8th switch transistor T a22 is the anode of the 11st switch transistor T a25,The negative electrode of the 11st switch transistor T a25 is connected to midpoint potential O and the anode of twelvemo pass pipe Ta26,Twelvemo is closed the negative electrode of pipe Ta26 and is connected to the 9th switch transistor T a23 and the and shows between switch transistor T a24.
nullFor b phase H bridge,13rd switch transistor T b11、14th switch transistor T b12、15th switch transistor T b13 and sixteenmo close pipe Tb14 and are composed in series H bridge the first brachium pontis,The anode of the 13rd switch transistor T b11 is connected to DC source Vdc2 positive pole,The negative electrode of the 13rd switch transistor T b11 connects the anode of the 14th switch transistor T b12,The negative electrode of the 14th switch transistor T b12 connects the output of b cross streams electricity and the anode of the 15th switch transistor T b13,The negative electrode of the 15th switch transistor T b13 connects sixteenmo and closes the anode of pipe Tb14,Sixteenmo closes the negative pole of the negative electrode connection DC source Vdc2 of pipe Tb14,What connect between the 13rd switch transistor T b11 and the 14th switch transistor T b12 is the anode of the 17th switch transistor T b15,The negative electrode of the 17th switch transistor T b15 is connected to midpoint potential O and the anode of eighteenmo pass pipe Tb16,Eighteenmo closes the negative electrode of pipe Tb16 and is connected between the 15th switch transistor T b13 and sixteenmo pass pipe Tb14.null19th switch transistor T b21、20th switch transistor T b22、21st switch transistor T b23 and the second twelvemo are closed pipe Tb24 and are composed in series H bridge the second brachium pontis,The anode of the 19th switch transistor T b21 is connected to DC source Vdc2 positive pole,The negative electrode of the 19th switch transistor T b21 connects the anode of the 20th switch transistor T b22,The negative electrode of the 20th switch transistor T b22 connects the anode of public output n and the 21 switch transistor T b23 of three-phase alternating current,The negative electrode of the 21st switch transistor T b23 connects the second twelvemo and closes the anode of pipe Tb24,Second twelvemo closes the negative pole of the negative electrode connection DC source Vdc2 of pipe Tb24,What connect between the 19th switch transistor T b21 and the 20th switch transistor T b22 is the anode of the 23rd switch transistor T b25,Negative electrode be connected to the anode of midpoint potential O and the 24 switch transistor T b26,The negative electrode of the 24th switch transistor T b26 is connected to the 21st switch transistor T b23 and the second twelvemo is closed between pipe Tb24.
nullFor c phase H bridge,25th switch transistor T c11、Second sixteenmo closes pipe Tc12、27th switch transistor T c13 and the second eighteenmo close pipe Tc14 and are composed in series H bridge the first brachium pontis,The anode of the 25th switch transistor T c11 is connected to DC source Vdc3 positive pole,The negative electrode of the 25th switch transistor T c11 connects the second sixteenmo and closes the anode of pipe Tc12,Second sixteenmo closes the negative electrode of pipe Tc12 and connects the output of c cross streams electricity and the anode of the 27th switch transistor T c13,The negative electrode of the 27th switch transistor T c13 connects the second eighteenmo and closes the anode of pipe Tc14,Second eighteenmo closes the negative pole of the negative electrode connection DC source Vdc3 of pipe Tc14,What connect between the 25th switch transistor T c11 and the second sixteenmo pass pipe Tc12 is the anode of the 29th switch transistor T c15,The negative electrode of the 29th switch transistor T c15 is connected to the anode of midpoint potential O and the 30 switch transistor T c16,The negative electrode of the 30th switch transistor T c16 is connected to the 27th switch transistor T c13 and the second eighteenmo closes between pipe Tc14.null31st switch transistor T c21、Thirty-twomo closes pipe Tc22、33rd switch transistor T c23 and the 34 switch transistor T c24 is composed in series H bridge the second brachium pontis,The anode of the 31st switch transistor T c21 is connected to DC source Vdc3 positive pole,The negative electrode of the 31st switch transistor T c21 connects thirty-twomo and closes the anode of pipe Tc22,Thirty-twomo closes the anode of public output n and the 33 switch transistor T c23 of the negative electrode connection three-phase alternating current of pipe Tc22,The negative electrode of the 33rd switch transistor T c23 connects the anode of the 34th switch transistor T c24,The negative electrode of the 34th switch transistor T c24 connects the negative pole of DC source Vdc3,What connect between the 31st switch transistor T c21 and thirty-twomo pass pipe Tc22 is the anode of the 35th switch transistor T c25,The negative electrode of the 35th switch transistor T c25 is connected to midpoint potential O and the three sixteenmo and closes the anode of pipe Tc26,3rd sixteenmo closes the negative electrode of pipe Tc26 and is connected between the 33rd switch transistor T c23 and the 34th switch transistor T c24.
Five-level active midpoint H bridge inverter wear leveling control method is comprised the following steps by the present invention: definition five-level active neutral point clamp H bridge inverter output state, analyze the switching loss of each switching device under each switching mode, determine four kinds of level switching modes, rationally select the operation ratio of four kinds of level switching modes.
Illustrate each step individually below:
1. definition five-level active neutral point clamp H bridge inverter output state
Control method of the present invention is applicable to any five level pulsewidth modulations.In order to simplify calculating, adopting five level carrier stacking modulator approaches, Fig. 2 is five level single-phase carrier layered manner schematic diagrams.Wherein the amplitude of four same phases be 0.5 triangular wave tr1~tr4 be superimposed between-1 to 1, modulating wave urefFor sine wave.As modulating wave urefDuring more than triangular carrier tr1, inverter leg output Vdc;Work as urefDuring more than tr2 less than tr1, inverter leg output Vdc/2;Work as urefDuring more than tr3 less than tr2, inverter leg exports 0 level;Work as urefDuring less than tr3 more than tr4, inverter leg output-Vdc/2, works as urefDuring less than tr4, inverter leg output-Vdc.
Owing to above-mentioned each output level can be realized by different switching tube turn-on and turn-off, so existence redundancy, thus define output state further.A phase H bridge switch pipe on off state and level output state definition as follows, b phase and c phase in like manner:
(1) output voltage Van is Vdc
In first brachium pontis, when the first switch transistor T a11, second switch, pipe Ta12 and the six switch transistor T a16 is open-minded, when the 3rd switch transistor T a13, the 4th switch transistor T a14 and the five switch transistor T a15 turn off;In second brachium pontis, when the 9th switch transistor T a23, the tenth switch transistor T a24 and the 11 switch transistor T a25 are open-minded, when the 7th switch transistor T a21, the 8th switch transistor T a22 and twelvemo close pipe Ta26 shutoff;A phase H bridge output level is Vdc, and definition output state is " 2 ".
(2) output voltage Van is Vdc/2
In first brachium pontis, when the first switch transistor T a11, second switch, pipe Ta12 and the six switch transistor T a16 is open-minded, when the 3rd switch transistor T a13, the 4th switch transistor T a14 and the five switch transistor T a15 turn off;In second brachium pontis, when the 8th switch transistor T a22 and the 11 switch transistor T a25 is open-minded, the 7th switch transistor T a21, the 9th switch transistor T a23 and twelvemo are closed pipe Ta26 and are turned off, when the tenth switch transistor T a24 opens or turns off, a phase H bridge output level is Vdc/2, and definition output state is " 1_1 ".
In first brachium pontis, when the first switch transistor T a11, second switch, pipe Ta12 and the six switch transistor T a16 is open-minded, when the 3rd switch transistor T a13, the 4th switch transistor T a14 and the five switch transistor T a15 turn off;In second brachium pontis, when the 9th switch transistor T a23 and twelvemo pass pipe Ta26 is open-minded, the 8th switch transistor T a22, the tenth switch transistor T a24 and the 11 switch transistor T a25 turn off, when the 7th switch transistor T a21 opens or turns off, a phase H bridge output level is Vdc/2, and definition output state is " 1_2 ".
In first brachium pontis, when second switch pipe Ta12 and the five switch transistor T a15 is open-minded, the first switch transistor T a11, the 3rd switch transistor T a13 and the six switch transistor T a16 turn off, when the 4th switch transistor T a14 opens or turns off;In second brachium pontis, when the 9th switch transistor T a23, the tenth switch transistor T a24 and the 11 switch transistor T a25 are open-minded, when 7th switch transistor T a21, the 8th switch transistor T a22 and twelvemo close pipe Ta26 shutoff, a phase H bridge output level is Vdc/2, and definition output state is " 1_3 ".
In first brachium pontis, when the 3rd switch transistor T a13 and the six switch transistor T a16 is open-minded, second switch pipe Ta12, the 4th switch transistor T a14 and the five switch transistor T a15 turn off, when first switch transistor T a11 opens or turns off, in second brachium pontis, when the 9th switch transistor T a23, the tenth switch transistor T a24 and the 11 switch transistor T a25 are open-minded, when the 7th switch transistor T a21, the 8th switch transistor T a22 and twelvemo close pipe Ta26 shutoff, a phase H bridge output level is Vdc/2, and definition output state is " 1_4 ".
(3) output voltage Van is 0
In first brachium pontis, when second switch pipe Ta12 and the five switch transistor T a15 is open-minded, first switch transistor T a11, the 3rd switch transistor T a13 and the six switch transistor T a16 turn off, when 4th switch transistor T a14 opens or turns off, in the second brachium pontis, when the 8th switch transistor T a22 and the 11 switch transistor T a25 is open-minded, 7th switch transistor T a21, the 9th switch transistor T a23 and twelvemo are closed pipe Ta26 and are turned off, when tenth switch transistor T a24 opens or turns off, a phase H bridge output level is 0, and definition output state is " 0_1 ".
In first brachium pontis, when the 3rd switch transistor T a13 and the six switch transistor T a16 is open-minded, second switch pipe Ta12, the 4th switch transistor T a14 and the five switch transistor T a15 turn off, when the first switch transistor T a11 opens or turns off;In second brachium pontis, when the 9th switch transistor T a23 and twelvemo pass pipe Ta26 is open-minded, the 8th switch transistor T a22, the tenth switch transistor T a24 and the 11 switch transistor T a25 turn off, when the 7th switch transistor T a21 opens or turns off;A phase H bridge output level is 0, and definition output state is " 0_2 ".
In first brachium pontis, when second switch pipe Ta12 and the five switch transistor T a15 is open-minded, the first switch transistor T a11, the 3rd switch transistor T a13 and the six switch transistor T a16 turn off, when the 4th switch transistor T a14 opens or turns off;In second brachium pontis, when the 9th switch transistor T a23 and twelvemo pass pipe Ta26 is open-minded, the 8th switch transistor T a22, the tenth switch transistor T a24 and the 11 switch transistor T a25 turn off, when the 7th switch transistor T a21 opens or turns off;A phase H bridge output level is 0, and definition output state is " 0_3 ".
In first brachium pontis, when the 3rd switch transistor T a13 and the six switch transistor T a16 is open-minded, second switch pipe Ta12, the 4th switch transistor T a14 and the five switch transistor T a15 turn off, when the first switch transistor T a11 opens or turns off;In second brachium pontis, when the 9th switch transistor T a23 and twelvemo pass pipe Ta26 is open-minded, the 8th switch transistor T a22, the tenth switch transistor T a24 and the 11 switch transistor T a25 turn off, when the 7th switch transistor T a21 opens or turns off;A phase H bridge output level is 0, and definition output state is " 0_4 ".
In first brachium pontis, when the first switch transistor T a11, second switch, pipe Ta12 and the six switch transistor T a16 is open-minded, when the 3rd switch transistor T a13, the 4th switch transistor T a14 and the five switch transistor T a15 turn off;In second brachium pontis, when the 7th switch transistor T a21, the 8th switch transistor T a22 and twelvemo pass, pipe Ta26 is open-minded, when 9th switch transistor T a23, the tenth switch transistor T a24 and the 11 switch transistor T a25 turn off, a phase H bridge output level is 0, and definition output state is " 0_5 ".
In first brachium pontis, when the 3rd switch transistor T a13, the 4th switch transistor T a14 and the five switch transistor T a15 are open-minded, when the first switch transistor T a11, second switch pipe Ta12 and the six switch transistor T a16 turn off;In second brachium pontis, when the 9th switch transistor T a23, the tenth switch transistor T a24 and the 11 switch transistor T a25 are open-minded, when 7th switch transistor T a21, the 8th switch transistor T a22 and twelvemo close pipe Ta26 shutoff, a phase H bridge output level is 0, and definition output state is " 0_6 ".
(4) output voltage Van is-Vdc/2
In first brachium pontis, when the 3rd switch transistor T a13, the 4th switch transistor T a14 and the five switch transistor T a15 are open-minded, when the first switch transistor T a11, second switch pipe Ta12 and the six switch transistor T a16 turn off;In second brachium pontis, when the 9th switch transistor T a23 and twelvemo pass pipe Ta26 is open-minded, the 8th switch transistor T a22, the tenth switch transistor T a24 and the 11 switch transistor T a25 turn off, when the 7th switch transistor T a21 opens or turns off, a phase H bridge output level is-Vdc/2, and definition output state is "-1_1 ".
In first brachium pontis, when the 3rd switch transistor T a13, the 4th switch transistor T a14 and the five switch transistor T a15 are open-minded, when the first switch transistor T a11, second switch pipe Ta12 and the six switch transistor T a16 turn off;In second brachium pontis, when the 9th switch transistor T a23 and twelvemo pass pipe Ta26 is open-minded, the 8th switch transistor T a22, the tenth switch transistor T a24 and the 11 switch transistor T a25 turn off, when the 7th switch transistor T a21 opens or turns off, a phase H bridge output level is-Vdc/2, and definition output state is "-1_2 ".
In first brachium pontis, when the 3rd switch transistor T a13 and the six switch transistor T a16 is open-minded, second switch pipe Ta12, the 4th switch transistor T a14 and the five switch transistor T a15 turn off, when the first switch transistor T a11 opens or turns off;In second brachium pontis, when the 7th switch transistor T a21, the 8th switch transistor T a22 and twelvemo pass, pipe Ta26 is open-minded, when 9th switch transistor T a23, the tenth switch transistor T a24 and the 11 switch transistor T a25 turn off, a phase H bridge output level is-Vdc/2, and definition output state is "-1_3 ".
In first brachium pontis, when second switch pipe Ta12 and the five switch transistor T a15 is open-minded, the first switch transistor T a11, the 3rd switch transistor T a13 and the six switch transistor T a16 turn off, when the 4th switch transistor T a14 opens or turns off;In second brachium pontis, when the 7th switch transistor T a21, the 8th switch transistor T a22 and twelvemo pass, pipe Ta26 is open-minded, when 9th switch transistor T a23, the tenth switch transistor T a24 and the 11 switch transistor T a25 turn off, a phase H bridge output level is-Vdc/2, and definition output state is "-1_4 ".
(5) output voltage Van is-Vdc
In first brachium pontis, when the 3rd switch transistor T a13, the 4th switch transistor T a14 and the five switch transistor T a15 are open-minded, when the first switch transistor T a11, second switch pipe Ta12 and the six switch transistor T a16 turn off;In second brachium pontis, when the 7th switch transistor T a21, the 8th switch transistor T a22 and twelvemo pass, pipe Ta26 is open-minded, when 9th switch transistor T a23, the tenth switch transistor T a24 and the 11 switch transistor T a25 turn off, a phase H bridge output level is-Vdc, and definition output state is "-2 ".
2. analyze the switching loss of each switching device under each switching mode
There are four kinds of level switching situations in the single-phase H bridge of five-level active midpoint H bridge inverter, namely For the switching combining of different output states, the switching tube producing switching loss is different, and for different switching directions, the switching tube producing switching loss also differs;According to level switching principle, filter out the level switching mode of application, analyze the commutation course of every kind of switching mode, obtain only one of which switching tube and a diode in the commutation course of each level switching and produce switching loss, and there is symmetrical relations.Illustrate that under difference switching situation, switching tube and diode produce switching loss situation individually below.
(1) when level switches between Vdc and Vdc/2, according to level switching principle, exist WithFour kinds of level switching modes.
Switching modeWhen output state 2 is switched to state 1_1, first the 9th switch transistor T a23 is turned off, after a Dead Time, open the 8th switch transistor T a22, if the output sense of current is for flow to n from a, now the 9th switch transistor T a23 and the eight diode Da22 produces switching loss, if the sense of current is contrary, then the 9th diode Da23 and the eight switch transistor T a22 produces switching loss.
Switching modeWhen output state 2 is switched to state 1_2, first the 11st switch transistor T a25 is turned off, electric current is not now had to flow through the 11st switch transistor T a25, therefore now turn off the 11st switch transistor T a25 and will not produce turn-off power loss, it is then powered off the tenth switch transistor T a24, after a Dead Time, open twelvemo close pipe Ta26, if the output sense of current is for flow to n from a, now the tenth switch transistor T a24 and the 12 diode Da26 produces switching loss, if the sense of current is contrary, then the tenth diode Da24 and twelvemo are closed pipe Ta26 and are produced switching loss.
Switching modeWhen output state 2 is switched to state 1_3, first the first switch transistor T a11 is turned off, electric current is not now had to flow through the first switch transistor T a11, therefore now turn off the first switch transistor T a11 and will not produce turn-off power loss, it is then powered off the 6th switch transistor T a16, after a Dead Time, open the 5th switch transistor T a15, if the output sense of current is for flow to n from a, now the 6th switch transistor T a16 and the five diode Da15 produces switching loss, if the sense of current is contrary, then the 6th diode Da16 and the five switch transistor T a15 produces switching loss.
Switching modeWhen output state 2 is switched to state 1_4, first second switch pipe Ta12 is turned off, after a Dead Time, open the 3rd switch transistor T a13, if the output sense of current is for flow to n from a, now second switch pipe Ta12 and the three diode Da13 produces switching loss, if the sense of current is contrary, then the second diode Da12 and the three switch transistor T a13 produces switching loss.
(2) when level switches between Vdc/2 and 0, according to level switching principle, the zero level state mated with each Vdc/2 level state only has three, always has 12 kinds of switching modes:
The zero level state mated with level state 1_1 has tri-zero levels of 0_1,0_4 and 0_5.As 1_1 → 0_1, first turning off the 6th switch transistor T a16, be then powered off the first switch transistor T a11, after a Dead Time, open the 5th switch transistor T a15, the first switch transistor T a11, the 5th diode Da15 bear maximum switching loss.As 1_1 → 0_4, first turning off second switch pipe Ta12, the first switch transistor T a11 is still within opening state, after a Dead Time, opens the 3rd switch transistor T a13, second switch pipe Ta12, the 3rd diode Da13 produces maximum turn-off power loss.As 1_1 → 0_5, first turn off the 11st switch transistor T a25, then open the 7th switch transistor T a21, finally open that twelvemo closes pipe Ta26, the 7th switch transistor T a21, the 11st diode Da25 produces main switching loss.
The zero level state mated with level state 1_2 has tri-zero levels of 0_2,0_3 and 0_5.As 1_2 → 0_2, first turning off second switch pipe Ta12, the first switch transistor T a11 is still within opening state, after a Dead Time, opens the 3rd switch transistor T a13, second switch pipe Ta12, the 3rd diode Da13 produces maximum turn-off power loss.As 1_2 → 0_3, first turning off the 6th switch transistor T a16, be then powered off the first switch transistor T a11, after a Dead Time, open the 5th switch transistor T a15, the first switch transistor T a11, the 5th diode Da15 bear maximum switching loss.As 1_2 → 0_5, first turning off the 9th switch transistor T a23, then open the 8th switch transistor T a22, the 8th switch transistor T a22, the 9th diode Da23 produce main switching loss.
The zero level state mated with level state 1_3 has tri-zero levels of 0_1,0_3 and 0_6.As 1_3 → 0_1, first turning off the 9th switch transistor T a23, the tenth switch transistor T a24 is still within opening state, after a Dead Time, opens the 8th switch transistor T a22, and the 9th switch transistor T a23, the 8th diode Da22 produce maximum turn-off power loss.As 1_3 → 0_3, first turning off the 11st switch transistor T a25, be then powered off the tenth switch transistor T a24, after a Dead Time, open twelvemo and close pipe Ta26, the tenth switch transistor T a24, the 12nd diode Da26 bear maximum switching loss.As 1_3 → 0_6, first turn off second switch pipe Ta12, then open the 3rd switch transistor T a13, second switch pipe Ta12, the 3rd diode Da13 produces main switching loss.
The zero level state mated with level state 1_4 has tri-zero levels of 0_2,0_4 and 0_6.As 1_4 → 0_2, first turning off the 11st switch transistor T a25, be then powered off the tenth switch transistor T a24, after a Dead Time, open twelvemo and close pipe Ta26, the tenth switch transistor T a24, the 12nd diode Da26 bear maximum switching loss.As 1_4 → 0_4, first turning off the 9th switch transistor T a23, the tenth switch transistor T a24 is still within opening state, after a Dead Time, opens the 8th switch transistor T a22, and the 9th switch transistor T a23, the 8th diode Da22 produce maximum turn-off power loss.As 1_4 → 0_6, first turning off the 6th switch transistor T a16, then open the 4th switch transistor T a14, finally open the 5th switch transistor T a15, the 4th switch transistor T a14, the 6th diode Da16 produce main switching loss.
(3) when level switches between-Vdc/2 and 0, according to multi-electrical level inverter switching principle, the zero level state mated with each-Vdc/2 level state only has three, always has 12 kinds of switching modes:
The zero level state mated with level state-1_1 has 0_2,0_3 and 0_6 tri-.As-1_1 → 0_2, first turning off the 5th switch transistor T a15, be then powered off the 4th switch transistor T a14, after a Dead Time, open the 6th switch transistor T a16, the 4th switch transistor T a14, the 6th diode Da16 bear maximum switching loss.As-1_1 → 0_3, first turning off the 3rd switch transistor T a13, the 4th switch transistor T a14 is still within opening state, after a Dead Time, opens second switch pipe Ta12, the 3rd switch transistor T a13, the second diode Da12 produces maximum turn-off power loss.As-1_1 → 0_6, first turning off twelvemo and close pipe Ta26, then open the tenth switch transistor T a24, finally open the 11st switch transistor T a25, the tenth switch transistor T a24, the 12nd diode Da26 produce main switching loss.
The zero level state mated with level state-1_2 has 0_1,0_4 and 0_6 tri-.As-1_2 → 0_1, first turning off the 3rd switch transistor T a13, the 4th switch transistor T a14 is still within opening state, after a Dead Time, opens second switch pipe Ta12, the 3rd switch transistor T a13, the second diode Da12 produces maximum turn-off power loss.As-1_2 → 0_4, first turning off the 5th switch transistor T a15, be then powered off the 4th switch transistor T a14, after a Dead Time, open the 6th switch transistor T a16, the 5th switch transistor T a15, the 6th diode Da16 bear maximum switching loss.As 1_2 → 0_6, first turning off the 8th switch transistor T a22, then open the 9th switch transistor T a23, the 9th switch transistor T a23, the 8th diode Da22 produce main switching loss.
The zero level state mated with level state-1_3 has 0_2,0_4 and 0_5 tri-.As-1_3 → 0_2, first turning off the 8th switch transistor T a22, the 7th switch transistor T a21 is still within opening state, after a Dead Time, opens the 9th switch transistor T a23, and the 8th switch transistor T a22, the 9th diode Da23 produce maximum turn-off power loss.As-1_3 → 0_4, first turning off twelvemo and close pipe Ta26, be then powered off the 7th switch transistor T a21, after a Dead Time, open the 11st switch transistor T a25, the 7th switch transistor T a21, the 11st diode Da25 bear maximum switching loss.As-1_3 → 0_5, first turn off the 3rd switch transistor T a13, then open second switch pipe Ta12, the 3rd switch transistor T a13, the second diode Da12 produces main switching loss.
The zero level state mated with level state-1_4 has 0_1,0_3 and 0_5 tri-.As-1_4 → 0_1, first turning off twelvemo and close pipe Ta26, be then powered off the 7th switch transistor T a21, after a Dead Time, open the 11st switch transistor T a25, the 7th switch transistor T a21, the 11st diode Da25 bear maximum switching loss.As-1_4 → 0_3, first turning off the 8th switch transistor T a22, the 7th switch transistor T a21 is still within opening state, after a Dead Time, opens the 9th switch transistor T a23, and the 8th switch transistor T a22, the 9th diode Da23 produce maximum turn-off power loss.As-1_4 → 0_5, first turning off the 5th switch transistor T a15, then open the first switch transistor T a11, finally open the 6th switch transistor T a16, the first switch transistor T a11, the 5th diode Da15 produce main switching loss.
(4) when level switches mutually at-Vdc and-Vdc/2, according to level switching principle, exist WithTotally four kinds of level switching types:
Switching modeWhen output state-2 is switched to state-1_1, first the 8th switch transistor T a22 is turned off, after a Dead Time, open the 9th switch transistor T a23, if the output sense of current is for flow to n from a, now the 8th switch transistor T a22 and the nine diode Da23 produces switching loss, if the sense of current is contrary, then the 8th diode Da22 and the nine switch transistor T a23 produces switching loss.
Switching modeWhen output state-2 is switched to state-1_2, first turn off twelvemo and close pipe Ta26, now do not have electric current to flow through twelvemo and close pipe Ta26, therefore now turn off twelvemo pass pipe Ta26 and will not produce turn-off power loss, it is then powered off the 7th switch transistor T a21, the 11st switch transistor T a25 is opened after a Dead Time, if the output sense of current is for flow to n from a, now the 7th switch transistor T a21 and the 11 diode Da25 produces switching loss, if the sense of current is contrary, then the 7th diode Da21 and the 11 switch transistor T a25 produces switching loss.
Switching modeWhen output state-2 is switched to state-1_3, first the 5th switch transistor T a15 is turned off, electric current is not now had to flow through the 5th switch transistor T a15, therefore now turn off the 5th switch transistor T a15 and will not produce turn-off power loss, it is then powered off the 4th switch transistor T a14, the 6th switch transistor T a16 is opened after a Dead Time, if the output sense of current is for flow to n from a, now the 4th switch transistor T a14 and the six diode Da16 produces switching loss, if the sense of current is contrary, then the 4th diode Da14 and the six switch transistor T a16 produces switching loss.
Switching modeWhen output state-2 is switched to state-1_4, first the 3rd switch transistor T a13 is turned off, after a Dead Time, open second switch pipe Ta12, if the output sense of current is for flow to n from a, now the 3rd switch transistor T a13 and the second diode Da12 produces switching loss, if the sense of current is contrary, then the 3rd diode Da13 and second switch pipe Ta12 produces switching loss.
Each meet level switching principle level switching time produce the switching tube of loss and diode is as shown in table 4.Wherein, " √ " represents that this device produces switching loss.
Loss distribution during the switching of table 4 five-level active neutral point clamp H bridge inverter level
3. determine four kinds of level switching modes
In level handoff procedure, only one of which switching tube and a diode produce switching loss, in order to improve safety operation area and the output capacity of inverter, need to be down to minimum by the loss value of the switching tube of maximum loss.Originate with switching tube loss for dominant loss, according to level switching principle, be sequentially generated the four kinds of level switching combining that sequentially screen out of maximum loss according to the first switch transistor T a11 or the 7th switch transistor T a21, second switch pipe Ta12 or the 8th switch transistor T a22, the 3rd switch transistor T a13 or the 9th switch transistor T a23, the 4th switch transistor T a14 or the tenth switch transistor T a24, these four level switching mode is respectively as follows:
Level switching mode 1:
Level switching mode 2:
Level switching mode 3:
Level switching mode 4:
During application level switching mode 1, the first switch transistor T a11 and the seven switch transistor T a21 produces maximum loss, during application level switching mode 2, second switch pipe Ta12 and the eight switch transistor T a22 produces maximum loss, during application level switching mode 3, the 3rd switch transistor T a13 and the nine switch transistor T a23 produces maximum loss, and during application level switching mode 4, the 4th switching tube switching element T a14 and the ten switch transistor T a24 produces maximum loss.
4. rationally select the operation ratio of four kinds of level switching modes
If the loss respectively P of the brachium pontis switching tube of level switching mode 1~4tli_typ00、Ptli_type2、Ptli_type3And Ptli_type4.When above-mentioned four kinds of level switching modes were used alternatingly in the ratio of 1:1:1:1 with the modulation voltage cycle, each switching device the first switch transistor T a11 in a phase the first brachium pontis, second switch pipe Ta12, the 3rd switch transistor T a13, the 4th switch transistor T a14 average loss can be expressed as:
PAve_tli (i=1,2,3or4)=(Ptli_type1+Ptli_type2+Ptli_type3+Ptli_type4)/4
Four kinds of selected switching modes can individually regulate the maximum loss of each switching tube, by regulating the action time of four kinds of switching modes, it is possible to balancing the loss of each switching tube further, each switching tube loss meansigma methods minima is:
Pmin_ave=(Pave_t11+Pave_t12+Pave_t13+Pave_t14)/4
In five-level active neutral point clamp H bridge inverter topology, in a phase H bridge, first switch transistor T a11 and the four switch transistor T a14 structurally has symmetry, switching tube loss distribution when level switching mode 1 and switching mode 4 act on also has symmetry, and therefore both switching modes implement the identical time within the whole inverter working cycle.In like manner, second switch pipe Ta12 and the three switch transistor T a13 structurally has symmetry, switching tube loss distribution when level switching mode 2 and switching mode 3 act on also has symmetry, and therefore both switching modes implement the identical time within the whole inverter working cycle.
Introduce a loss profile adjustment coefficient k, 0 < k < 1, making level switching mode 1 and 4 and the use frequency ratio of level switching mode 2 and level switching mode 3 is k/ (1-k), and now the average loss of single switching transistor is:
Pave_tli=[k (Pt11_type1+Pt11_type4)+(1-k)(Pt11_type2+Pt11_type3)]/2
Its minima is Pave_tli_min, try to achieve k optimal value:
K=(2Pave_tli_min-Pt11_type2-Pt11_type3)/(Pt11_type1+Pt11_type4-Pt11_type2-Pt11_type3)
Four kinds of level switching mode action times are according to k:(1-k): the mode of (1-k): k can realize the balanced distribution of the loss of inverter one-phase brachium pontis device.
Above the loss balancing control method of a phase brachium pontis is illustrated, wear leveling for b phase, c phase brachium pontis controls, adopt identical output level state to define, four kinds of same level switching modes, same loss breadth coefficient k, it is possible to reach the wear leveling purpose identical with a phase brachium pontis.
The implementation result of the present invention is described below in conjunction with embodiment.
The embodiment of the present invention has built the phantom of five-level active neutral point clamp H bridge inverter, the selected IGCT that active switching devices is 4500V, 4000A, model is 5SHY35L4510, diode model is 5SDF10H4520, busbar voltage Vdc=3000V, exports current effective value Irms=2kA, output frequency 50Hz, carrier frequency 1.2kHz, output capacity 12MVA.
Fig. 7, Fig. 8, Fig. 9 and Figure 10 represent that five-level active neutral point clamp H bridge inverter is when level switching mode 1, switching mode 2, switching mode 3 and switching mode 4 respectively, the single brachium pontis loss scattergram of single-phase H bridge.Figure 11 represents that power factor is as modulation ratio m=0.95Time, loss distribution situation when four kinds of switching modes use in turn with 1:1:1:1, now T12 and T13 produces same loss 2117W, next to that the loss that T11 and T14 produces is 1842W.It appeared that when running in turn according to the ratio of 1:1:1:1, the loss of each switching tube on a brachium pontis is still balanced not.Figure 12 represents under identical modulation ratio and power factor, four kinds of switching modes are run in turn according to the ratio of 2:1:1:2, now loss distribution situation during k=0.65, now switching element T 11, the loss that T12, T13, T14 produce is identical, it is all 1994W, shows that this result produces maximum 2570W than five level NPC/H inverter losses Balance route and reduces 21% through simulation analysis.Thus wear leveling control strategy of the present invention realizes the balance of each brachium pontis switching device loss, improve output capacity and power density.
The loss balancing control strategy that the present invention proposes is applicable to all five-electrical level inverter modulator approaches such as five level carrier stacking modulation, phase-shifting carrier wave modulation and space vector pulse width modulation.

Claims (5)

1. the control method of a five-level active neutral point clamp H bridge inverter, it is characterized in that, first described control method defines the output state of five-level active neutral point clamp H bridge inverter, analyze the loss distribution situation of inverter leg switching tube, determine level switching mode, the ratio of reasonable employment level switching mode;By regulating the ratio of level switching mode action time so that each device loss equiblibrium mass distribution of inverter.
2. the control method of five-level active neutral point clamp H bridge inverter according to claim 1, it is characterised in that the method for the output state of described definition five-level active neutral point clamp H bridge inverter is as follows:
Five level are exported for single-phase H bridge, respectively DC bus-bar voltage Vdc, Vdc/2,0 ,-Vdc/2 and-Vdc, respectively definition status is " 2 ", " 1 ", " 0 ", "-1 ", "-2 ";Owing to each output level is realized by different switching tube turn-on and turn-off, so existence redundancy, thus defining output state further, a phase H bridge switch pipe on off state and the definition of single-phase H bridge output state are as follows, b phase and c phase in like manner:
In first brachium pontis, when the first switching tube (Ta11), second switch pipe (Ta12) and the 6th switching tube (Ta16) are open-minded, when the 3rd switching tube (Ta13), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) turn off;In second brachium pontis, when the 9th switching tube (Ta23), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) are open-minded, when 7th switching tube (Ta21), the 8th switching tube (Ta22) and twelvemo pass pipe (Ta26) turn off, a phase H bridge output level is Vdc, and definition output state is " 2 ";
In first brachium pontis, when the first switching tube (Ta11), second switch pipe (Ta12) and the 6th switching tube (Ta16) are open-minded, when the 3rd switching tube (Ta13), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) turn off;In second brachium pontis, when the 8th switching tube (Ta22) and the 11st switching tube (Ta25) are open-minded, 7th switching tube (Ta21), the 9th switching tube (Ta23) and twelvemo are closed pipe (Ta26) and are turned off, when tenth switching tube (Ta24) is opened or is turned off, a phase H bridge output level is Vdc/2, and definition output state is " 1_1 ";
In first brachium pontis, when the first switching tube (Ta11), second switch pipe (Ta12) and the 6th switching tube (Ta16) are open-minded, when the 3rd switching tube (Ta13), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) turn off;In second brachium pontis, when the 9th switching tube (Ta23) and twelvemo pass pipe (Ta26) are open-minded, 8th switching tube (Ta22), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) turn off, when 7th switching tube (Ta21) is opened or is turned off, a phase H bridge output level is Vdc/2, and definition output state is " 1_2 ";
In first brachium pontis, when second switch pipe (Ta12) and the 5th switching tube (Ta15) are open-minded, first switching tube (Ta11), the 3rd switching tube (Ta13) and the 6th switching tube (Ta16) turn off, when the 4th switching tube (Ta14) is opened or turned off;In second brachium pontis, when the 9th switching tube (Ta23), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) are open-minded, when 7th switching tube (Ta21), the 8th switching tube (Ta22) and twelvemo pass pipe (Ta26) turn off, a phase H bridge output level is Vdc/2, and definition output state is " 1_3 ";
In first brachium pontis, when the 3rd switching tube (Ta13) and the 6th switching tube (Ta16) are open-minded, second switch pipe (Ta12), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) turn off, when the first switching tube (Ta11) is opened or turned off;In second brachium pontis, when the 9th switching tube (Ta23), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) are open-minded, when 7th switching tube (Ta21), the 8th switching tube (Ta22) and twelvemo pass pipe (Ta26) turn off, a phase H bridge output level is Vdc/2, and definition output state is " 1_4 ";
In first brachium pontis, when second switch pipe (Ta12) and the 5th switching tube (Ta15) are open-minded, first switching tube (Ta11), the 3rd switching tube (Ta13) and the 6th switching tube (Ta16) turn off, when the 4th switching tube (Ta14) is opened or turned off;In second brachium pontis, when the 8th switching tube (Ta22) and the 11st switching tube (Ta25) are open-minded, 7th switching tube (Ta21), the 9th switching tube (Ta23) and twelvemo are closed pipe (Ta26) and are turned off, when tenth switching tube (Ta24) is opened or is turned off, a phase H bridge output level is 0, and definition output state is " 0_1 ";
In first brachium pontis, when the 3rd switching tube (Ta13) and the 6th switching tube (Ta16) are open-minded, second switch pipe (Ta12), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) turn off, when the first switching tube (Ta11) is opened or turned off;In second brachium pontis, when the 9th switching tube (Ta23) and twelvemo pass pipe (Ta26) are open-minded, 8th switching tube (Ta22), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) turn off, when 7th switching tube (Ta21) is opened or is turned off, a phase H bridge output level is 0, and definition output state is " 0_2 ";
In first brachium pontis, when second switch pipe (Ta12) and the 5th switching tube (Ta15) are open-minded, first switching tube (Ta11), the 3rd switching tube (Ta13) and the 6th switching tube (Ta16) turn off, when the 4th switching tube (Ta14) is opened or turned off;In second brachium pontis, when the 9th switching tube (Ta23) and twelvemo pass pipe (Ta26) are open-minded, 8th switching tube (Ta22), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) turn off, when 7th switching tube (Ta21) is opened or is turned off, a phase H bridge output level is 0, and definition output state is " 0_3 ";
In first brachium pontis, when the 3rd switching tube (Ta13) and the 6th switching tube (Ta16) are open-minded, second switch pipe (Ta12), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) turn off, when the first switching tube (Ta11) is opened or turned off;In second brachium pontis, when the 9th switching tube (Ta23) and twelvemo pass pipe (Ta26) are open-minded, 8th switching tube (Ta22), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) turn off, when 7th switching tube (Ta21) is opened or is turned off, a phase H bridge output level is 0, and definition output state is " 0_4 ";
In first brachium pontis, when the first switching tube (Ta11), second switch pipe (Ta12) and the 6th switching tube (Ta16) are open-minded, when the 3rd switching tube (Ta13), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) turn off;In second brachium pontis, when the 7th switching tube (Ta21), the 8th switching tube (Ta22) and twelvemo pass pipe (Ta26) are open-minded, when 9th switching tube (Ta23), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) turn off, a phase H bridge output level is 0, and definition output state is " 0_5 ";
In first brachium pontis, when the 3rd switching tube (Ta13), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) are open-minded, when the first switching tube (Ta11), second switch pipe (Ta12) and the 6th switching tube (Ta16) turn off;In second brachium pontis, when the 9th switching tube (Ta23), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) are open-minded, when 7th switching tube (Ta21), the 8th switching tube (Ta22) and twelvemo pass pipe (Ta26) turn off, a phase H bridge output level is 0, and definition output state is " 0_6 ";
In first brachium pontis, when the 3rd switching tube (Ta13), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) are open-minded, when the first switching tube (Ta11), second switch pipe (Ta12) and the 6th switching tube (Ta16) turn off;In second brachium pontis, when the 9th switching tube (Ta23) and twelvemo pass pipe (Ta26) are open-minded, 8th switching tube (Ta22), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) turn off, when 7th switching tube (Ta21) is opened or is turned off, a phase H bridge output level is-Vdc/2, and definition output state is "-1_1 ";
In first brachium pontis, when the 3rd switching tube (Ta13), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) are open-minded, when the first switching tube (Ta11), second switch pipe (Ta12) and the 6th switching tube (Ta16) turn off;In second brachium pontis, when the 9th switching tube (Ta23) and twelvemo pass pipe (Ta26) are open-minded, 8th switching tube (Ta22), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) turn off, when 7th switching tube (Ta21) is opened or is turned off, a phase H bridge output level is-Vdc/2, and definition output state is "-1_2 ";
In first brachium pontis, when the 3rd switching tube (Ta13) and the 6th switching tube (Ta16) are open-minded, second switch pipe (Ta12), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) turn off, when the first switching tube (Ta11) is opened or turned off;In second brachium pontis, when the 7th switching tube (Ta21), the 8th switching tube (Ta22) and twelvemo pass pipe (Ta26) are open-minded, when 9th switching tube (Ta23), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) turn off, a phase H bridge output level is-Vdc/2, and definition output state is "-1_3 ";
In first brachium pontis, when second switch pipe (Ta12) and the 5th switching tube (Ta15) are open-minded, first switching tube (Ta11), the 3rd switching tube (Ta13) and the 6th switching tube (Ta16) turn off, when the 4th switching tube (Ta14) is opened or turned off;In second brachium pontis, when the 7th switching tube (Ta21), the 8th switching tube (Ta22) and twelvemo pass pipe (Ta26) are open-minded, when 9th switching tube (Ta23), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) turn off, a phase H bridge output level is-Vdc/2, and definition output state is "-1_4 ";
In first brachium pontis, when the 3rd switching tube (Ta13), the 4th switching tube (Ta14) and the 5th switching tube (Ta15) are open-minded, when the first switching tube (Ta11), second switch pipe (Ta12) and the 6th switching tube (Ta16) turn off;In second brachium pontis, when the 7th switching tube (Ta21), the 8th switching tube (Ta22) and twelvemo pass pipe (Ta26) are open-minded, when 9th switching tube (Ta23), the tenth switching tube (Ta24) and the 11st switching tube (Ta25) turn off, a phase H bridge output level is-Vdc, and definition output state is "-2 ".
3. the control method of five-level active neutral point clamp H bridge inverter according to claim 1, it is characterized in that, analyzing the switching loss distribution situation that the output voltage of single-phase H bridge switches between adjacent output level, the method for the loss distribution situation analyzing inverter leg switching tube is as follows:
For the switching combining of different output states, the switching tube producing switching loss is different, and for different switching directions, the switching tube producing switching loss also differs;According to level switching principle, filter out the level switching mode of application, analyze the commutation course of every kind of switching mode, obtain only one of which switching tube and a diode in the commutation course of each level switching and produce switching loss.
4. the control method of five-level active neutral point clamp H bridge inverter according to claim 1, it is characterised in that determine that the method for the level switching mode of four kinds of five-level active neutral point clamp H bridge inverters is as follows:
Originate with switching tube loss for dominant loss, according to level switching principle, be sequentially generated the four kinds of level switching combining that sequentially screen out of maximum loss according to the first switching tube (Ta11) or the 7th switching tube (Ta21), second switch pipe (Ta12) or the 8th switching tube (Ta22), the 3rd switching tube (Ta13) or the 9th switching tube (Ta23), the 4th switching tube (Ta14) or the tenth switching tube (Ta24), these four level switching mode is respectively as follows:
Level switching mode 1:
Level switching mode 2:
Level switching mode 3:
Level switching mode 4:
During application level switching mode 1, first switching tube (Ta11) and the 7th switching tube (Ta21) produce maximum loss, during application level switching mode 2, second switch pipe (Ta12) and the 8th switching tube (Ta22) produce maximum loss, during application level switching mode 3,3rd switching tube (Ta13) and the 9th switching tube (Ta23) produce maximum loss, during application level switching mode 4, the 4th switching tube (Ta14) and the tenth switching tube (Ta24) produce maximum loss.
5. the control method of five-level active neutral point clamp H bridge inverter according to claim 1, it is characterized in that, described reasonable employment level switching mode ratio, regulates the ratio of level switching mode action time, makes the method that four kinds of level switching modes are run in proportion in turn as follows:
When in units of modulation voltage, the cycle is used alternatingly level switching mode 1~4 in the ratio of 1:1:1:1, first switching tube (Ta11) of the first brachium pontis, second switch pipe (Ta12), the 3rd switching tube (Ta13), the 4th switching tube (Ta14) average loss be expressed as:
PAve_t1i (i=1,2,3or4)=(Pt1i_type1+Pt1i_type2+Pt1i_type3+Pt1i_type4)/4
Wherein, Pave_t1iRepresent brachium pontis switch transistor T a1i (i=1,2,3 or 4) four kinds of methods of operation be used alternatingly under average loss, Pt1i_type1、Pt1i_type2、Pt1i_type3、Pt1i_type4Represent the brachium pontis switch transistor T a1i (i=1,2,3 or 4) loss under level switching mode 1~4 respectively;
Four kinds of selected switching modes can individually regulate the maximum loss of each switching tube, by regulating the operation time scale of four kinds of switching modes, balances the loss of each switching tube further, and the minima that each switching tube loss meansigma methods can reach is:
Pmin_ave=(Pave_t11+Pave_t12+Pave_t13+Pave_t14)/4
Wherein, Pmin_aveRepresent that the meansigma methods of the average loss of the first brachium pontis switch transistor T a11~Ta14 reaches minimum value;
Introduce a loss profile adjustment coefficient k, 0 < k < 1, make four kinds of level switching modes according to k:(1-k): the use frequency effect of (1-k): k, thus the average loss of four kinds of switching modes of single switching transistor generation reaches minima, to realize the balanced distribution of the loss of inverter leg switching device;Now the average loss of single switching transistor is:
Pave_t1i=[k (Pt11_type1+Pt11_type4)+(1-k)(Pt11_type2+Pt11_type3)]/2
Wherein, Pave_t1iRepresenting brachium pontis switch transistor T a1i average loss under level switching mode 1~4 is run by a certain percentage, its minima is Pave_t1i_min
The optimal value trying to achieve k is:
K=(2Pave_t1i_min-Pt11_type2-Pt11_type3)/(Pt11_type1+Pt11_type4-Pt11_type2-Pt11_type3)。
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CN107565841A (en) * 2017-01-17 2018-01-09 湖南大学 A kind of clamper cascade frequency multiplication multi-level power converter and its control method
CN109756138A (en) * 2019-01-29 2019-05-14 河海大学 A kind of control circuit of five Level Full Bridges inverter
US11146181B2 (en) 2017-12-26 2021-10-12 Huawei Technologies Co., Ltd. Control method and apparatus for common-mode modulated wave of single-phase five-level inverter

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CN101640498B (en) * 2009-09-08 2011-09-21 西安交通大学 Tri-level zero-current conversion soft switching inverter of active middle voltage clamp
DE102011087153A1 (en) * 2011-11-25 2013-05-29 Converteam Gmbh Electrical circuit for power converter e.g. neutral point piloted converter, has semiconductor switch that controls operation of converter and current flowing through resistor which is provided for degradation of energy
CN103401455B (en) * 2013-06-26 2015-06-17 山西潞安环保能源开发股份有限公司 Modulation method for active neutral-point clamp type tri-level inverter

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CN107565841A (en) * 2017-01-17 2018-01-09 湖南大学 A kind of clamper cascade frequency multiplication multi-level power converter and its control method
US11146181B2 (en) 2017-12-26 2021-10-12 Huawei Technologies Co., Ltd. Control method and apparatus for common-mode modulated wave of single-phase five-level inverter
CN109756138A (en) * 2019-01-29 2019-05-14 河海大学 A kind of control circuit of five Level Full Bridges inverter

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