CN105790607B - The constant-current system of adaptive equalization current peak in A.C.-D.C. converter - Google Patents
The constant-current system of adaptive equalization current peak in A.C.-D.C. converter Download PDFInfo
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Abstract
The invention discloses a kind of constant-current systems of adaptive equalization current peak in A.C.-D.C. converter, the constant-current system includes offset voltage sample circuit, compensation time sampling generator, level conversion, voltage-current converter circuit and addition/subtraction circuit, and compensation time sampling generator generates compensating sampling time tcomp, compensating sampling time tcompThe delay time t intrinsic equal to systemdSequential logic, the sampling of the time series stereodata offset voltage sample circuit, to generate sampled voltage Vsmp, sampled voltage VsmpCompensation electric current I is generated by voltage-current converter circuitcompIt is sent to addition/subtraction circuit, thus final output voltage Vc, dynamic offset of the invention isIt contains the resultant effect of the variation of line voltage, the variation of inductance, the variation of turn-on time error and these factors, and the compensating sampling time is equal to system turn-off delay tcomp=td1, so that it may all errors are just compensated for, realize comprehensive compensation.
Description
Technical field
The present invention relates to electronic technology fields, and in particular to adaptive equalization current peak in a kind of A.C.-D.C. converter
The constant-current system of value.
Background technique
With charging equipment industry and illuminating industry constantly bring forth new ideas and it is fast-developing, the requirement to energy conservation and environmental protection is more next
It is more important, it is desirable to which that power consumption is lower and lower.In the application of A.C.-D.C. converter, such as charger, adapter and illumination LED
Lamp, it is desirable that the electric current constant current of system output, and also precision is higher and higher.
However in the inverse-excitation type variator or non-isolated down-converter of AC-DC peak value comparison method, below
Parameter is variation: line voltage VinIt (t) is fluctuation, the sensibility reciprocal L of transformer or inductancepCan with temperature, product batch it is different
Cause property and change；The intrinsic delay time t of changer systemdIt is changed greatly with the drift of temperature and technique.
Fig. 1 and Fig. 2 is that the AC-DC (AC-DC) with current compensation becomes in LED illumination and charger application at present
Transformer system block diagram, wherein Fig. 1 is isolation flyback system, and Fig. 2 is non-shielding system, and AC-DC control system includes peak value electricity
Flow comparator, control logic, driving circuit, current compensation module.Wherein current compensation module be based on primary side peak point current by
The factors such as line voltage influence and fluctuate the larger compensation done.Its principle is: when switching tube Q1 conducting, primary current is linearly increasing,
As detection electricity group RcsThe voltage CS at both ends rises to equal to VrefAfterwards, comparator exports VcompFor " 0 ", logic control VctlFor " 0 "
Output V is converted with drivingdrBe it is low, make switching tube Q1 turn off, to complete primary side turn on process.In fact, comparator becomes " 0 "
To VdrThere are certain delay time td, when such Q1 is turned off, the electric current of voltage CS is more than VrefThere are many/R, this is to cause electric current
The main reason for error.
Assuming that not using any compensating module, there is following relationship when theoretically primary side is connected:
Wherein Vin(t)、Lp、ton1、Ipk1It is bus input voltage (hereinafter referred to as " line voltage "), primary side inductance, V respectivelycs
Voltage reaches VrefWhen turn-on time and corresponding primary side peak point current；Rcs、Vref、Vcs(ton)、Ipk_on、td1It is the end CS respectively
Detection resistance and reference voltage, primary side turn-on time tonEnd while turning off (i.e. Q1) the corresponding end CS voltage and primary side peak point current,
System delay time.
Due to Vref、RcsPrecision it is relatively high, be omitted here, so when really being turned off by switching tube Q1 known to (2)
Primary side peak point current Ipk_onBy system delay tdIt influences and increases much, as shown in actual conditions-uncompensation part of Fig. 3.
In AC-DC (AC-DC) transformation system, line voltage VinBe change it is very big, by (2) formula it is found that peak value is electric
Stream is also by VinThe influence of variation is very big, so academic and industry proposes various line voltage compensation methods at present, by compensating,
The comparator in Fig. 1 and Fig. 2 is set to shift to an earlier date tdTime overturning, while use and VinThe compensation changed in proportion --- VinIt is compensated when big
Greatly, VinHour compensation is small, and compensated waveform is as shown in the part of Fig. 3 " after actual conditions-compensation ".
Current current compensation method is all line voltage compensation method, i.e., the electric current taken mainly for the variation of line voltage
Penalty method, structure mainly include four kinds, such as Fig. 4, Fig. 5, Fig. 6, four kinds of structures shown in Fig. 7.Wherein Fig. 4 and Fig. 7 are suitable for
Isolation and non-isolated application, Fig. 5 are only applicable to shielding system, and Fig. 6 is only applicable to non-isolated system.Its basic structure has two parts
It constitutes: sample circuit and voltage-current converter circuit.
In conjunction with Fig. 1 and Fig. 4, compensation principle is as follows: after taking signal to enter Voltage to current transducer module by sample circuit
Generate compensation electric current Icomp, CS1 voltage is generated by add circuit, the CS1 voltage after increase makes comparator shift to an earlier date tdConducting, more
The error that practical primary side peak point current is bigger than normal caused by system delay is mended.Fig. 1 or Fig. 2 and other three kinds of collocation structures combine,
Its principle is the same.The difference of these four compensation techniques is:
Fig. 4 compensation principle is from VinIt directlys adopt and is added on CS, in this way compensation electric current and VinIt is directly proportional, compensated CS1
Voltage and VinVoltage synchronous variation, VctlFor ' 0 ' time and VinInverse change effectively compensates for VinVariation and tdVariation causes
Error.
Fig. 5 is the auxiliary winding inductance L only for AC-DC converter system is isolatedauxWith the main winding L in Fig. 1pInstead
Phase generates the voltage with input voltage linearly by being coupled to auxiliary winding, and relational expression isWherein VauxIt is using the voltage on winding, NpAnd NauxIt is the number of turns of primary side winding and auxiliary winding.In this way
Compensate electric current and VinThe variation of voltage in proportion, VctlFor ' 0 ' time and VinInverse change: i.e. VinIncrease big then comparator to shift to an earlier date
Turn-on time is big, otherwise small；VinComparator postpones conducting when reduction, compensates for V from effective known to (2) formula in this wayinVariation and td
Error caused by variation.
Fig. 6 is for non-isolated AC-DC converter (see Fig. 2), and compensation thinking (can for the Z1 resistive load in Fig. 6
To be LED lamp bead, be also possible to the resistive loads such as resistance or lithium-ion battery charger) and inductance when sample, i.e.,Sampled voltage V after partial pressuresmpWith (Vin-Vz) thus and Vin
Direct proportionality, thus generation and VinDirectly proportional compensation electric current, effectively compensates for VinVariation and tdCaused by variation accidentally
Difference.
Fig. 7 compensation principle is that the current source of chip interior generates compensation electric current by compensation control, reaches VctlIt is in advance
' 0 ' time, compensate for tdCurrent error caused by variation, since compensation electric current and Vin do not have any relationship, this measure without
Method effectively makes up VinError caused by variation.
Above four kinds of compensation are only line voltage compensation, there is following limitation:
1) the delay t of system is assumeddBe constant, this system delay time t in factdProlong from logical operation
Late, the stray delay of the modules such as high drive, and ± 30% deviation of technique and -40 DEG C -125 DEG C of wide temperature in chip production
Variation is so that tdVariation it is very big.
2) assume that the value L of inductance is constant, the value or the inductance value under different temperatures of different batches inductance in fact
It has a greater change.
tdPeak point current caused by variation with inductance L changes as shown in figure 9, Vref-VcompIt is V after compensatingCS1=VrefWhen
The corresponding voltage in the end CS, K0, K1, K2 are affected by environment and inductance is constant, reduces, leads to the oblique of the end CS voltage change after increase
Rate.It is assumed that delay tdIn the case of fixed value compensation, the virtual voltage at the end CS point when different slopes causes switching tube to turn off
It Wei not Vref、Vref+ΔV1、VrefΔ V2, it is seen that error is larger to be difficult to ensure peak point current precision.Similarly inductance value is constant, by
Temperature and technique influence and cause to postpone tdIn the case where variation, the error of this compensation is also very big it can be seen that existing
The four kinds of compensation techniques compensation having is very limited, and the application not high for the required precision of primary side inductive current is fine, but nothing
Method meets the increasing requirement of current precision, more have no idea to solve the problems, such as be: switching system postpone tdWith chip work
Skill, temperature variation and change very big, some are up to ± 35%.In answering for system operating frequency relatively low (30KHz--50Khz)
In, due to tdIt can be allowed to bigger by design, the bring stray delay of such flow-route and temperature deviation prolongs always
Slow tdMiddle ratio is smaller, can be tdWith chip technology, temperature variation scope control within ± 20%.However technology
Development increasingly require working frequency high, the system delay t in the application of working frequency 50Khz-100KhzdShould not be too big,
The bring stray delay of flow-route and temperature deviation in this way accounts for tdLeading position.The compensation effect of obvious existing scheme is increasingly
It is small, be difficult to accomplish peak point current precision at wide temperature ± 10% hereinafter, and different batches of product current precision deviation more
Greatly, this is also the generally existing batch inconsistency of current chip product, and product stablizes poor, the insufficient main original of system reliability
Cause.
Summary of the invention
To solve the above problems, the present invention provides adaptive equalization electric current in a kind of A.C.-D.C. converter
The constant-current system of peak value.
The present invention solves the above problems used technical solution are as follows: provides adaptive in a kind of A.C.-D.C. converter
The constant-current system of current peak is compensated, which includes offset voltage sample circuit, compensation time sampling generator, level
Conversion, voltage-current converter circuit and addition/subtraction circuit, compensation time sampling generator generate compensating sampling time tcomp,
Compensating sampling time tcompThe delay time t intrinsic equal to systemdSequential logic, which adopts
The sampling of sample circuit, to generate sampled voltage Vsmp, sampled voltage VsmpCompensation electricity is generated by voltage-current converter circuit
Flow IcompIt is sent to addition/subtraction circuit, thus final output voltage Vc。
The present invention is from the CS voltage sample of the linear variation of inductance peak point current as compensation rate, this dynamic offset
ForIt contains the variation of line voltage, the variation of inductance, is conducted to shutdown
(hereinafter referred to as " the turn-off delay ") variation of time error of system turn-off delay and the resultant effect of these factors, compensation adopt
The sample time is equal to system turn-off delay tcomp=td1, so that it may all errors are just compensated for, realize comprehensive compensation.
The invention is used in shielding system figure (see Figure 11), and compensation electric current passes through add circuit value CS1 input after being added
To the anode of comparator, work as Vcs1=Vref, comparator output signal VcompFor ' 0 ', Q1 is still working at this time, has
ton1It is that VCS1 reaches VrefAt the time of, tcompIt is the compensating sampling time.
The output signal V of comparatorcompFor ' 0 ' and VctlDelay for ' 0 ' to switching tube Q1 pipe shutdown is td1, inside is patrolled
Collect VctlThe delay time be really connected for ' 1 ' to switching tube Q1 is td2.Due to td1And td2It is mainly derived from logic control and drive
Dynamic circuit can accomplish that the two delays are the same for a chip, and they and temperature and technique variation and same width
Degree variation, which ensures that dynamic deferred td1=td2.Take td2This time is the compensating sampling time, therefore
tcomp=td1=td2--------------------------------------(4)
When system Q1 is really turned off, the turn-on time of Q1 is ton=ton1+td1, corresponding to CS voltage is
(3) formula substitution (5) formula, which is obtained the end CS voltage, is
(4) are substituted into (6) to obtain
Vcs(ton)=Vref--------------------------------(7)
It can be seen that from being analyzed above for different Δ LpAnd Td1, the constant establishment of (7) formula.
The waveform of this process as shown in Figure 10, in 0-td1During compensation, VCS=2VCS1, working time td1Compensation is kept afterwards
Measure it is constant, if compensation rate be Δ Vref。Vcs1=VrefWhen CS voltage and final Vcs=VrefCS difference in voltage be Δ V1, due to
V in any casecsAnd Vcs1Voltage change slope is the same and tcomp=td1, Δ V1=Δ V is obtained by the geometrical relationship of Figure 10ref,
The voltage at the end system CS in this way accomplishes V alwayscs=Vref.This mechanism ensures in Vin, inductance L, the various changes such as temperature and technique
In the case that amount changes, primary current Ics=Vref/Rcs, the primary current of system is made to accomplish real high-precision, high batch
Measure consistency, high reliability.
Further, which is applied in AC-DC isolation controller and/or non-isolated controller system.
Apply schematic diagram in isolation controller as shown in figure 11 for the present invention, Figure 12 show the present invention apply it is non-every
Schematic diagram from controller send to current compensation circuit from the sampling of the end CS and is sent to add circuit again, generates compensated voltage CS1
It is connected to the anode and V of comparatorrefVoltage Cycle by Cycle compares generation shutdown logical signal Vcomp.Figure 13 show the present invention and answers
It used in the schematic diagram of isolation controller, send from the end CS sample circuit to current compensation circuit and is sent to subtraction circuit again, generate compensation
Voltage V afterwardsref1The negative terminal and CS voltage Cycle by Cycle for being connected to comparator compare generation shutdown logical signal Vcomp, the side of Figure 13
Method is equally applicable to non-isolated system.
Further, the AC-DC isolation controller and/or non-isolated controller system include controller, the control
Device includes current compensation module, comparator, control logic and driving circuit.
Further, the current compensation module includes current compensation circuit and add circuit.
Further, the current compensation module includes current compensation circuit and subtraction circuit.
Further, the offset voltage sample circuit includes two compensating sampling circuits, wherein each compensating sampling circuit
Including switch and capacitor.
Further, the compensation time sampling generator be sampling switch logic, the sampling switch logic by level conversion,
The sequential logic composition of noise blanking circuit, reset circuit, one of compensating sampling circuit.
Further, the voltage-current converter circuit includes operational amplifier, triode and resistance.
Further, the voltage-current converter circuit includes operational amplifier, field-effect tube and resistance.
The beneficial effects of the present invention are: from the CS voltage sample of the linear variation of inductance peak point current as compensation rate, this
One dynamic offset are as follows:It contains the variation of line voltage, inductance
Variation, the variation of turn-on time error and the resultant effect of these factors, the compensating sampling time be equal to system turn-off delay
tcomp=td1, so that it may all errors are just compensated for, realize comprehensive compensation.
Detailed description of the invention
Fig. 1 is the control system schematic diagram with compensating module for being applied to isolation AC-DC converter in the prior art；
Fig. 2 is the control system schematic diagram with compensating module for being applied to non-isolated AC-DC converter in the prior art；
Fig. 3 is the end CS crest voltage waveform diagram before compensating and after using compensation；
Fig. 4 is the current compensation circuit 1 for directlying adopt line voltage sampling compensation；
Fig. 5 is the current compensation circuit 2 that line compensation is carried out using auxiliary winding sampling；
Fig. 6 is indirectly using the current compensation circuit 3 of line voltage sampling compensation；
Fig. 7 is the current compensation circuit 4 of internal constant-current source control；
Fig. 8 is the constant-current system structural schematic diagram of adaptive equalization current peak in A.C.-D.C. converter of the present invention；
Fig. 9 is inductance L and t described in background technologydVariation causes the waveform diagram of error；
Figure 10 is using the end the CS crest voltage waveform diagram after compensation technique of the present invention；
Figure 11 is that compensation rate of the present invention does the compensation technique of addition and applies the structural schematic diagram in isolation controller；
Figure 12 is that compensation rate of the present invention does the compensation technique of addition and applies the structural schematic diagram in non-isolated controller；
Figure 13 is that compensation rate of the present invention does the compensation technique of subtraction and applies the structural schematic diagram in isolation controller；
Figure 14 is the circuit structure diagram of the embodiment of the present invention one；
Figure 15 is the circuit structure diagram of the embodiment of the present invention two；
Figure 16 is the timing diagram that sampling switch logic generates in Figure 14 and Figure 15.
Specific embodiment
Below in conjunction with specific attached drawing, the present invention is further illustrated.
Embodiment one
As shown in figure 14, a kind of constant-current system of adaptive equalization current peak in A.C.-D.C. converter, the perseverance are provided
By compensating sampling 1, voltage-current converter circuit, adder, compensating sampling 2, sampling switch logic, totally five parts are constituted streaming system,
Wherein:
Compensating sampling 1 is made of switch S1, switch S2 and capacitor C1；
Voltage to current transducer electric current is made of operational amplifier AMP1, triode Q1, Q2, Q3 and resistance R1, operation amplifier
Device AMP1, pipe Q1 and resistance R1 realize that Voltage to current transducer, Q2 and Q3 realize the mirror image of electric current；
Adder is made of pipe Q3, the end resistance R2, CS, voltage V after summations=Vcs+Icomp× R2, takes R2=R3, Q2 with
The ratio of Q3 is 1:1, such Vs=Vcs+Vcom；
Compensating sampling 2 is made of switch S3, switch S4 and capacitor C2.Each cycle reset signal tdisMake the end CS1 voltage
Zero, Vctl_delyIt controls from VsSample Vcs1；
Sampling switch logic is made of level conversion, noise blanking circuit, reset circuit, 1 sequential logic of compensating sampling,
Ensure compensating sampling time tcompWith system delay tdIt is equal, VdrPass through the V after level conversiondr_LWith the signal after noise blanking
Vctl_delyGenerate Vdync, sampling when controlling compensating sampling 1 makes sample end time tcomp=td, sequential relationship such as Figure 16
It is shown.In order to avoid the noise on power tube Q1 pipe conducting moment CS is sampled into, one end of 1 sequential logic of compensating sampling is defeated
Enter is Vctl_delyRather than VctlAlthough actual sampling time ratio tcompIt is short, it is a and t due to compensation rate source CS itselfomp
Directly proportional amount, that really determine final compensation rate is the sampling termination time t of compensationcomp, therefore will not noise blanking and shadow
Ring compensation rate.
The reset signal t that each periodic sampling switching logic generatesdisMake the operational amplifier in Current Voltage varying circuit
The anode voltage of AMP1 is zero, the sampled signal V generated from sampling switch logicdyn1 module of compensating sampling is controlled to adopt from the end CS
To dynamic offset voltage, the V of rational designdynSo that the sampling time terminates time tcompEqual to system turn-off delay td, therefore
Sampled voltage VcomForIt is added through A voltage, using the voltage after 2 circuit sampling of compensating sampling
CS1 is being sent to the comparator in AC/DC transfer controller (isolation variator such as Figure 11, non-isolated converter such as Figure 12) just
End, works as VCS1=VrefWhen comparator overturn Vcomp=0, switching tube Q1 turn-on time is ton1, (see Figure 11 and Figure 12) stream at this time
Crossing voltage of the electric current of Q1 at the end CS isHereafter
VcompSignal passes through control logic and driving circuit tdDelay make VdrFor low and the end switch-off power pipe Q1, this when of CS electricity
Pressure is ton1The sum of voltage error caused by moment CS end voltage and system delay, and postpone tdCaused by CS voltage error beSince design of the invention ensures to sample compensation time tcompWith system delay tdIt is equal, so through
The voltage at the end CS is V after overcompensationref, the peak point current for flowing through inductance in this way is equal toIts precision is not by busbar voltage Vin、
Inductance value, temperature and process deviation lead to tdThe factors such as transformation influence, correlation timing figure is shown in Figure 16, Vctl_delyIt is to Vctl's
Signal after noise blanking, it is ensured that td1<td, it follows that this is a kind of high-accuracy and constant Flow Technique of adaptive equalization.
Embodiment two
It as shown in figure 15, is another case study on implementation of the invention, by compensating sampling 1, voltage-current converter circuit, subtraction
Totally five parts are constituted for device, compensating sampling 2, sampling switch logic, in which:
Compensating sampling 1 is made of switch S1, switch S2 and capacitor C1；
Voltage to current transducer electric current is made of operational amplifier AMP1, triode Q1, Q2, Q3 and resistance R1, operation amplifier
Device AMP1, pipe Q1 and resistance R1 realize that Voltage to current transducer, pipe Q2 and pipe Q3 realize current mirror；
Subtracter is by pipe Q3, resistance R2, voltage VrefEnd is constituted, and subtracts each other rear voltage Vs=Vref-Icomp× R2, takes R2=R3,
The ratio of Q2 and Q3 is 1:1, then Vs=Vref-Vcom；
Compensating sampling 2 is made of switch S3, switch S4 and capacitor C2, each cycle reset signal tdisMake the end CS1 voltage
Zero, Vctl_delyIt controls from VsSample Vcs1；
Sampling switch logic is made of level conversion, noise blanking circuit, reset circuit, 1 sequential logic of compensating sampling,
Ensure compensating sampling time tcompWith system delay tdIt is equal, VdrPass through the V after level conversiondr_LWith the signal after noise blanking
Vctl_delyGenerate Vdync, sampling when controlling compensating sampling 1 makes sample end time tcomp=td, sequential relationship such as Figure 16
Shown, in order to avoid the noise on power tube Q1 pipe conducting moment CS is sampled into, one end of 1 sequential logic of compensating sampling is defeated
Enter is Vctl_delyRather than Vctl。
The reset signal t that each periodic sampling switching logic generatesdisMake the operational amplifier in Current Voltage varying circuit
The anode voltage of AMP1 is zero, the sampled signal V generated from sampling switch logicdyn1 module of compensating sampling is controlled to adopt from the end CS
To dynamic offset voltage, the V of rational designdynSo that sampling s time tcompEqual to system turn-off delay td, thus sampled voltage
VcomForCompensation electric current is generated by voltage-current converter circuit, is subtracted finally by what R2 was constituted
Musical instruments used in a Buddhist or Taoist mass with come from VrefThe voltage at end subtracts each other, in the voltage V after 2 circuit sampling of compensating samplingref1It is sent to AC/DC transfer
The negative terminal of comparator in controller (isolation variator such as Figure 13, non-isolated converter are similar), works as VCS=Vref1When comparator
Overturn Vcomp=0, switching tube Q1 turn-on time is t at this timeon1, (see Figure 13) flows through voltage of the electric current of Q1 at the end CS and isHereafter VcompSignal passes through control logic and driving
Circuit tdDelay make VdrIt is ton1 moment CS end voltage and system for low and the end switch-off power pipe Q1, this when of CS voltage
The sum of voltage error caused by delay, and postpone tdCaused by CS voltage error beDue to the present invention
Design ensure sample compensation time tcompWith system delay tdIt is equal, so the voltage at the end CS is V after overcompensationref, in this way
The peak point current for flowing through inductance is equal toIts precision is not by busbar voltage Vin, inductance value, temperature and process deviation lead to td's
The factors such as transformation influence, and correlation timing figure is shown in Figure 16, Vctl_delyIt is to VctlNoise blanking after signal, it is ensured that td1<td。
The above content is a further detailed description of the present invention in conjunction with specific preferred embodiments, and it cannot be said that
Specific implementation of the invention is only limited to these instructions, and for those skilled in the art to which the present invention belongs, is not being taken off
Under the premise of from present inventive concept, a number of simple deductions or replacements can also be made, all shall be regarded as belonging to protection of the invention
Range.
Claims (9)
1. the constant-current system of adaptive equalization current peak in a kind of A.C.-D.C. converter, it is characterised in that: the constant-current system
Including offset voltage sample circuit, compensation time sampling generator, level conversion, voltage-current converter circuit and addition/subtraction
Circuit, compensation time sampling generator generate compensating sampling time tcomp, compensating sampling time tcompIntrinsic equal to system prolongs
Slow time tdSequential logic, the sampling of the time series stereodata offset voltage sample circuit, to generate sampled voltage Vsmp,
Sampled voltage VsmpCompensation electric current I is generated by voltage-current converter circuitcompIt is sent to addition/subtraction circuit, thus final defeated
Voltage V outc。
2. the constant-current system of adaptive equalization current peak, feature in A.C.-D.C. converter according to claim 1
Be: the constant-current system is applied in AC-DC isolation controller and/or non-isolated controller system.
3. the constant-current system of adaptive equalization current peak, feature in A.C.-D.C. converter according to claim 2
Be: the AC-DC isolation controller and/or non-isolated controller system include controller, which includes electric current
Compensating module, comparator, control logic and driving circuit.
4. the constant-current system of adaptive equalization current peak, feature in A.C.-D.C. converter according to claim 3
Be: the current compensation module includes current compensation circuit and add circuit.
5. the constant-current system of adaptive equalization current peak, feature in A.C.-D.C. converter according to claim 3
Be: the current compensation module includes current compensation circuit and subtraction circuit.
6. the constant-current system of adaptive equalization current peak, feature in A.C.-D.C. converter according to claim 1
Be: the offset voltage sample circuit include two compensating sampling circuits, wherein each compensating sampling circuit include switch and
Capacitor.
7. the constant-current system of adaptive equalization current peak, feature in A.C.-D.C. converter according to claim 6
Be: the compensation time sampling generator is sampling switch logic, and the sampling switch logic is by level conversion, noise blanking electricity
Road, reset circuit, one of compensating sampling circuit sequential logic constitute.
8. the constant-current system of adaptive equalization current peak, feature in A.C.-D.C. converter according to claim 7
Be: the voltage-current converter circuit includes operational amplifier, triode and resistance.
9. the constant-current system of adaptive equalization current peak, feature in A.C.-D.C. converter according to claim 7
Be: the voltage-current converter circuit includes operational amplifier, field-effect tube and resistance.
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| CN107017760A (en) * | 2017-05-09 | 2017-08-04 | 深圳市天微电子股份有限公司 | Peak current control device and its current compensation circuit, Switching Power Supply |
| CN107528450A (en) * | 2017-08-29 | 2017-12-29 | 深圳市稳先微电子有限公司 | Voltage comparator, control chip and Switching Power Supply |
| CN109039113B (en) * | 2018-07-18 | 2020-05-12 | 深圳市稳先微电子有限公司 | Switching power supply and control chip thereof |
| CN112821733B (en) * | 2021-04-16 | 2021-07-30 | 深圳市拓尔微电子有限责任公司 | Pulse width modulation control circuit, drive circuit and direct current converter |
| CN118074468A (en) * | 2022-11-22 | 2024-05-24 | 广东美的制冷设备有限公司 | PFC circuit current sampling method and device, air conditioner and storage medium |
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|---|---|---|---|---|
| CN1806381A (en) * | 2003-06-18 | 2006-07-19 | 崇贸科技股份有限公司 | Flyback power converter having a constant voltage and a constant current output under primary-side PWM control |
| CN201122904Y (en) * | 2007-11-29 | 2008-09-24 | 上海辰蕊微电子科技有限公司 | Summit current operated electric voltage feed forward circuit in switch power source |
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