CN105782556A - Detecting and controlling circuit for hydraulic high-speed switch valve - Google Patents

Detecting and controlling circuit for hydraulic high-speed switch valve Download PDF

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Publication number
CN105782556A
CN105782556A CN201610266504.7A CN201610266504A CN105782556A CN 105782556 A CN105782556 A CN 105782556A CN 201610266504 A CN201610266504 A CN 201610266504A CN 105782556 A CN105782556 A CN 105782556A
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filter capacitor
pin
resistance
connect
filter
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CN201610266504.7A
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CN105782556B (en
Inventor
邹洪波
夏素梅
张青
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Hangzhou Dianzi University
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Hangzhou Dianzi University
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    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F16ENGINEERING ELEMENTS AND UNITS; GENERAL MEASURES FOR PRODUCING AND MAINTAINING EFFECTIVE FUNCTIONING OF MACHINES OR INSTALLATIONS; THERMAL INSULATION IN GENERAL
    • F16KVALVES; TAPS; COCKS; ACTUATING-FLOATS; DEVICES FOR VENTING OR AERATING
    • F16K37/00Special means in or on valves or other cut-off apparatus for indicating or recording operation thereof, or for enabling an alarm to be given
    • F16K37/0025Electrical or magnetic means
    • F16K37/0041Electrical or magnetic means for measuring valve parameters
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F16ENGINEERING ELEMENTS AND UNITS; GENERAL MEASURES FOR PRODUCING AND MAINTAINING EFFECTIVE FUNCTIONING OF MACHINES OR INSTALLATIONS; THERMAL INSULATION IN GENERAL
    • F16KVALVES; TAPS; COCKS; ACTUATING-FLOATS; DEVICES FOR VENTING OR AERATING
    • F16K31/00Actuating devices; Operating means; Releasing devices
    • F16K31/02Actuating devices; Operating means; Releasing devices electric; magnetic

Abstract

The invention discloses a detecting and controlling circuit for a hydraulic high-speed switch valve. The detecting and controlling circuit for the hydraulic high-speed switch valve comprises an RAM board basic circuit part, a displacement signal detection circuit part and a control signal outputting circuit part. According to the detecting and controlling circuit for the hydraulic high-speed switch valve, by practical examination, the circuit can effectively measure a voltage value, corresponding to displacement of the valve, and thus the voltage value is converted to a corresponding value control signal with an error in a negligible range. A detecting and controlling device for hydraulic valve switching can be used for a hydraulic valve controlling system, is simple in circuit design, high in performance cost ratio and obvious in practical value and can realize real-time communication.

Description

A kind of Hydraulic high-speed on-off valve door detection and control circuit
Technical field
The invention belongs to technical field of industrial control, relate to a kind of circuit, be specifically related to the detection of a kind of Hydraulic high-speed on-off valve door and control the circuit of device.
Background technology
There is problem bulky, that control accuracy is relatively low in the hydraulic valve controller used in the market.Along with improving constantly of social constantly progressive and economic level, the working method of conventional hydraulic valve cannot meet the change that industrial circle makes rapid progress, so how making hydraulic valve obtain intelligentized control method become current topmost problem with being automatically adjusted.Hydraulic high-speed on-off valve door to be adopted the mode of digital valve complete unlatching and the Guan Bi of valve by we, uses the equipment such as differential pressure pick-up to make hydraulic valve realize digitized better, intelligent and integrated.
Summary of the invention
The purpose of the present invention is aiming at hydraulic valve electric current and is precisely controlled the imperfect of technology, it is provided that the circuit of a kind of reliable, stable Hydraulic high-speed on-off valve door detection and control device.
For realizing object above, the technical solution used in the present invention is:
The measurement of a kind of hydraulic selector valve and control circuit, including RAM plate basic circuit part, displacement signal testing circuit part and control signal output circuit part.
RAM plate basic circuit part includes CPU, voltage filter modular circuit, voltage transformation module circuit, serial ports download modular circuit, clock module circuit, start modular circuit and externally fed download interface circuit;Described CPU adopts STM32F407VGT6 chip;
Described voltage filter module includes digital voltage VCC filtering and analog voltage AVCC filters two parts.Digital voltage VCC filtering part includes four electric capacity.Wherein one end of the first filter capacitor CV17, one end of the second filter capacitor CV18, one end of the 3rd filter capacitor CV19, the 4th filter capacitor CV20 one end be all connected with power supply VCC end, the other end of four filter capacitors all ground connection.
Described analog voltage AVCC filtering includes two electric capacity.Wherein one end of the 5th filter capacitor CA7, the 6th filter capacitor CA8 one end be all connected with one end of analog power AVCC and connect 22 feet of CPU, the other end of two filter capacitors all connect simulation ground AGND.
Described voltage transformation module includes an electric capacity.Wherein one end of the 7th filter capacitor CCAP2 is connected with 49 feet of CPU, the other end ground connection of the 7th filter capacitor CCAP2.
The described serial ports module that downloads includes two resistance and an electric capacity.One end of first divider resistance RB3 is connected with one end of the second divider resistance RB4, and the other end of the first divider resistance RB3 is connected with the pin 94 of CPU.One end of first storage capacitor CRES1 is connected with the NRST interface of CPU, and the other end of the other end and the second divider resistance RB4 connects and ground connection.
Described clock module includes a crystal oscillator and two electric capacity;One end of first crystal oscillator Y1 is connected with one end of the second storage capacitor CY1, and is connected with the pin 12 of CPU;The other end of the first crystal oscillator Y1 and one end of the 3rd storage capacitor CY2 connect, and are connected with the pin 13 of CPU.The other end of the second storage capacitor CY1, the 3rd storage capacitor CY2 the other end all ground connection.
Described startup module includes a resistance.One end of first pull down resistor RB1 is connected with the pin 37 of CPU, other end ground connection.
91 feet of described CPU and one end of the 3rd divider resistance RCAN1 connect, and the other end of the 3rd divider resistance RCAN1 is connected with 4 feet of CAN interface integrated chip U5;52 feet of CPU and one end of the 4th divider resistance RCAN3 connect, and the other end of the 4th divider resistance RCAN3 is connected with 1 foot of described CAN interface integrated chip U5.74 feet of CPU, 99 feet, 27 feet, 10 foot ground connection, 50 feet, 75 feet, 100 feet, 28 feet, 11 feet meet power supply VCC, and 20 foot ground connection simulation ground AGND, 21 feet, 22 feet meet analog power AVCC;73 feet of CPU and one end of the first decoupling capacitor CCAP1 connect, the other end ground connection of the first decoupling capacitor CCAP1;19 feet of CPU connect the first pull-up resistor RA1, another termination power VCC of the first pull-up resistor RA1;29 feet of CPU connect one end of the 5th divider resistance RS6, the other end of the 5th divider resistance RS6 connects one end of the 8th filter capacitor CS5, and connecting the positive input of LVDT part the first operational amplifier U3A, the other end of the 8th filter capacitor CS5 connects simulation ground AGND;40 feet of CPU connect one end of the 6th divider resistance RT1, and the other end of the 6th divider resistance RT1 connects the other end of the first current-limiting resistance R11, the tenth current-limiting resistance R41 in the described left PWM H-bridge circuit module controlled;42 feet of CPU connect one end of the 7th divider resistance RT3, and the other end of the 7th divider resistance RT3 connects the other end of the 7th current-limiting resistance R31, the 5th current-limiting resistance R21 in the described left PWM H-bridge circuit module controlled;63 feet of CPU connect one end of the 8th divider resistance RT2, and the other end of the 8th divider resistance RT2 connects the other end of the 11st current-limiting resistance R51, the 20th current-limiting resistance R81 in the described right PWM H-bridge circuit module controlled;64 feet of CPU connect one end of the 9th divider resistance RT4, and the other end of the 9th divider resistance RT4 connects the other end of the 17th current-limiting resistance R71, the 15th current-limiting resistance R61 in the described right PWM H-bridge circuit module controlled.The pin that CPU does not mention in this article is all built on stilts;
In addition with externally fed interface P0, pin 1 meets power supply VCC, and pin 2 connects the pin 72 of CPU, and pin 3 connects the pin 76 of CPU, pin 4 ground connection.
Described CAN transceiver module includes a resistance and CAN interface integrated chip U5;The model of CAN interface integrated chip U5 is SN65HVD232DR;One end of tenth point of piezoresistance RCAN4 is connected with 7 feet of CAN interface integrated chip U5, and the other end is connected with 6 feet of CAN interface integrated chip U5.The 2 foot ground connection of CAN interface integrated chip U5;3 feet of CAN interface integrated chip U5 are connected with power supply VCC end.
Power supply process part includes the main filtration module of blood pressure lowering, control signal detection module, input power detection module, voltage filter module and ground connection isolation module.
The main filter circuit module of described blood pressure lowering includes a low-dropout regulator, 26 electric capacity and two ferrite beans;The model of low-dropout regulator U4 is CAT6219-330TDGT3;The model of ferrite bean is HTY100505T-221Y-N;One end of 9th filter capacitor CP7, the tenth filter capacitor CP8 one end be connected with+5V power supply and connect 1 foot of the first low-dropout regulator U4, the other end of two filter capacitors all ground connection GND.One end of 11st filter capacitor CP14, one end of the 12nd filter capacitor CP15 and 4 feet of the first low-dropout regulator U4 connect, the other end of two filter capacitors all ground connection.One end of 13rd filter capacitor CV1, one end of the 14th filter capacitor CV2, one end of the 15th filter capacitor CV3, one end of the 16th filter capacitor CV4, one end of the 17th filter capacitor CV5, one end of the 18th filter capacitor CV6, one end of the 19th filter capacitor CV7, one end of the 20th filter capacitor CV8 and one end of the first ferrite bean FB3 connect, and connect 5 feet of the first low-dropout regulator U4, the other end ground connection of eight filter capacitors.The other end of the first ferrite bean FB3 and one end of the 21st filter capacitor CV9, one end of the 22nd filter capacitor CV10, one end of the 23rd filter capacitor CV11, one end of the 24th filter capacitor CV12, one end of the 25th filter capacitor CV13, one end of the 26th filter capacitor CV14, one end of the 27th filter capacitor CV15, the 28th filter capacitor CV16 one end all connect, and it is connected to power supply VCC, the other end of eight filter capacitors all ground connection.One end of 29th filter capacitor CA1, one end of the 30th filter capacitor CA2, one end of the 31st filter capacitor CA3 and one end of the second ferrite bean FB4 connect, and connect 5 feet of the first low-dropout regulator U4, the other end ground connection simulation ground AGND of three filter capacitors.The other end of the second ferrite bean FB4 and one end of the 32nd filter capacitor CA4, one end of the 33rd filter capacitor CA5, the 34th filter capacitor CA6 one end all connect, and it is connected to analog power AVCC, the other end of three filter capacitors all ground connection simulation ground AGND.
Described control signal test section divides and includes the socket of 6 ports, two resistance and an electric capacity.1 port of socket P1 connects voltage VIN;2 ports of socket P1,6 ports all grounded shield ground EGND;5 ports of socket P1,4 ports are sequentially connected with 7 feet of CAN interface integrated chip U5,6 feet;3 ports of socket P1 connect one end of the 11st divider resistance RC1 and connect, and one end of the other end of the 11st divider resistance RC1 and one end of the 12nd divider resistance RC2, the 35th filter capacitor CC1 connects, and is connected to 26 feet of CPU;The other end of the 12nd divider resistance RC2 and the other end all ground connection of the 35th filter capacitor CC1.
Described voltage VIN filter circuit includes 6 electric capacity.One end of 36th filter capacitor CP1, one end of the 37th filter capacitor CP2, one end of the 38th filter capacitor CP3, one end of the 39th filter capacitor CP4, one end of the 40th filter capacitor CP5, the 41st filter capacitor CP6 one end be all connected to power supply VIN, all grounded shield of the other end of six filter capacitors ground EGND.
Described input power VIN testing circuit includes 2 resistance and an electric capacity.The one termination power VIN of the 13rd divider resistance RN1, one end of the other end and one end of the 14th divider resistance RN2, the 42nd filter capacitor CN1 connects, and is connected to 25 feet of CPU.The other end of the 14th divider resistance RN2, the 42nd filter capacitor CN1 the other end all ground connection.
Described ground connection isolation module includes two ferrite beans, and the model of ferrite bean is HTY100505T-221Y-N;The one termination simulation ground AGND of the 3rd ferrite bean FB5, other end ground connection;4th ferrite bean FB6 mono-termination shielding ground EGND, other end ground connection.
Institute's displacement detection circuit includes five resistance, four electric capacity, two operational amplifiers, Schottky diodes.The model of the first operational amplifier and the second operational amplifier is LMC6482AIMX/NOPB;The model of Schottky diode is NSR0140P2T5G;One end of the inverting input of the first operational amplifier U3A and one end of the 43rd filter capacitor CS2, the 15th divider resistance RS2 is connected, one end of normal phase input end and the second pull down resistor RS7 is connected, outfan and the other end of the 43rd filter capacitor CS2, the other end of the 15th divider resistance RS2, the 16th divider resistance RS1 one end connect, and be connected to 23 feet of CPU.The inverting input of the second operational amplifier U3B and one end of the 17th divider resistance RS5, one end of the 3rd pull down resistor RS3, the 44th filter capacitor CS3 one end connect, normal phase input end and one end of the 18th divider resistance RS4, one end of the 45th filter capacitor CS4, the first Schottky diode DS1 negative pole connect, the other end of outfan and the 17th divider resistance RS5 connects, and is connected to 24 feet of CPU.The other end of the second pull down resistor RS7, the other end of the 3rd pull down resistor RS3, the other end of the 44th filter capacitor CS3, the other end of the 45th filter capacitor CS4, the first Schottky diode DS1 positive pole all ground connection simulation ground AGND.1 foot of connector Ps and one end of the 46th filter capacitor CS1 connect, and the other end of the 46th filter capacitor CS1 and the other end of the 16th divider resistance RS1 connect;3 feet of connector Ps and the other end of the 18th divider resistance RS4 connect;2 feet of connector Ps meet simulation ground AGND.
Signal generating circuit includes switching power circuit and filter circuit.
Described switching power circuit module includes a suitching type voltage-releasing voltage stabilizer, two resistance and an electric capacity;The model of described suitching type voltage-releasing voltage stabilizer is U1AOZ1280CI;The two ends of 1 pin of the first suitching type voltage-releasing voltage stabilizer U1,6 pins and the first feedback capacity C5 connect, 2 pin ground connection, one end of 3 pins and the 19th divider resistance R1, the second ten points of piezoresistance R2 one end connect, 4 pins and 5 pins, power supply VIN connection.The other end of the 19th divider resistance R1 is connected with+5V power supply, the other end ground connection of the second ten points of piezoresistance R2.
Described filter circuit module includes 14 electric capacity, two ferrite beans, an inductance and a Schottky diode;The model of described Schottky diode is MBRA160T3G;The model of ferrite bean is HFY100505T-221Y-N;One end of first filter inductance L1 is connected with 6 pins of the negative pole of the second Schottky diode DP1, the first voltage-releasing voltage stabilizer U1.The other end of the first filter inductance L1 and one end of the 47th filter capacitor C6, one end of the 48th filter capacitor C7, one end of the 49th filter capacitor C8, one end of the 50th filter capacitor C9, one end of the 51st filter capacitor C10, one end of the 52nd filter capacitor C11, the 5th ferrite bean FB1 one end connect.The other end of the 5th ferrite bean FB1 and one end of the 53rd filter capacitor C12, one end of the 54th filter capacitor C13, one end of the 55th filter capacitor C14, one end of the 56th filter capacitor C15, the 6th ferrite bean FB2 one end connect.The other end of the 6th ferrite bean FB2 and one end of the 57th filter capacitor C16, one end of the 58th filter capacitor C17, one end of the 59th filter capacitor C18, the 60th filter capacitor C19 one end connect and connect+5V out-put supply.Positive pole all ground connection of the other end of 14 filter capacitors and the second Schottky diode DP1.
PWM control H-bridge circuit include left PWM control H-bridge circuit and filter circuit, right PWM control H-bridge circuit and filter circuit.
The filter circuit of the H-bridge circuit that described left PWM controls includes four electric capacity.Wherein one end of the 61st filter capacitor CP10, one end of the 62nd filter capacitor CP11, one end of the 63rd filter capacitor CP12, the 64th filter capacitor CP13 one end be all connected with power supply VIN end, the other end of four filter capacitors all connect shielding ground.
The H-bridge circuit module that described left PWM controls includes the connector of 2 ports, two dual pathways field effect transistor, four general triodes, four Zener diodes, 16 resistance (ten current-limiting resistances, four discharge resistances, two load resistances);The model of described dual pathways field effect transistor is BSO615CG;The model of general triode is BC847BPDW1T1G;The 1 pin ground connection of the first general triode T1, one end of 2 pins and the first current-limiting resistance R11 connects, and one end of 6 pins and the second current-limiting resistance R12 connects, and all the other pins do not mentioned in this article are all built on stilts.The pin 4 of the second general triode T2 is connected with power supply VIN, and pin 5 and pin 6 are connected with the two ends of the 3rd current-limiting resistance R23, and pin 3 is connected with one end of the 4th current-limiting resistance R22, and pin 2 is connected with one end of the 5th current-limiting resistance R21, pin 1 ground connection.The pin 6 of the 3rd general triode T3 is connected with one end of the 6th current-limiting resistance R32, and pin 2 is connected with one end of the 7th current-limiting resistance R31, pin 1 ground connection.The pin 4 of the 4th general triode T4 is connected with input power VIN, and pin 5 and pin 6 are connected with the two ends of the 8th current-limiting resistance R43, and pin 3 is connected with one end of the 9th current-limiting resistance R42, and pin 2 is connected with one end of the tenth current-limiting resistance R41, pin 1 ground connection;
The pin 4 of the first dual pathways field effect transistor Q1 and one end of the first discharge resistance RD1, one end of the first Zener diode D1, the second current-limiting resistance R12 one end be connected, pin 2 is connected with one end of the second discharge resistance RD2, one end of the second Zener diode D2, one end of the 4th current-limiting resistance R22, first one end detecting resistance RL2, and 1 port of pin 5, pin 6, pin 7, pin 8 and connector PVL connects.The pin 4 of the second bilateral field effect transistor Q2 and one end of the 3rd discharge resistance RD3, one end of the 3rd Zener diode D3, the 6th current-limiting resistance R32 one end be connected, pin 2 and the other end of the 4th discharge resistance RD4, the other end of the 4th Zener diode D4, the 9th current-limiting resistance R42 one end be connected, 2 ports of pin 5, pin 6, pin 7, pin 8 and connector PVL connect.The other end of the first Zener diode D1, the other end of the first discharge resistance RD1, the pin 3 of the first dual pathways field effect transistor Q1, the pin 3 of the second dual pathways field effect transistor Q2, the other end of the 3rd discharge resistance RD3, another termination power VIN of the 3rd Zener diode D3, the other end of the second Zener diode D2, the other end of the second discharge resistance RD2, the pin 1 of the first dual pathways field effect transistor Q1, the pin 1 of the second dual pathways field effect transistor Q2, the other end of the 4th discharge resistance RD4, the other end of the second Zener diode D4, one end of one end of first resistance RL2 and the second detection resistance RL1 connects, the other end of the second detection resistance RL1 and another termination shielding ground of the first detection resistance RL2.
The filter circuit of the H-bridge circuit that described right PWM controls includes four electric capacity.Wherein one end of the 65th filter capacitor CP20, one end of the 66th filter capacitor CP21, one end of the 67th filter capacitor CP22, the 68th filter capacitor CP23 one end be all connected with power supply VIN end, the other end of four filter capacitors all connect shielding ground.
The H-bridge circuit module that described right PWM controls includes two dual pathways field effect transistor, four general triodes, four Zener diodes, 16 resistance (ten current-limiting resistances, four discharge resistances, two load resistances);The model of described dual pathways field effect transistor is BSO615CG;The model of general triode is BC847BPDW1T1G;The 1 pin ground connection of the 5th general triode T5, one end of 2 pins and the 11st current-limiting resistance R51 connects, and one end of 6 pins and the 12nd current-limiting resistance R52 connects, and all the other pins do not mentioned in this article are all built on stilts.The clematis stem pin 4 of triode T6 is connected with power supply VIN, and pin 5 and pin 6 are connected with the two ends of the 13rd current-limiting resistance R63, and pin 3 is connected with one end of the 14th current-limiting resistance R62, and pin 2 is connected with one end of the 15th current-limiting resistance R61, pin 1 ground connection.The pin 6 of the 7th general triode T7 is connected with one end of the 16th current-limiting resistance R72, and pin 2 is connected with one end of the 17th current-limiting resistance R71, pin 1 ground connection.The pin 4 of the 8th general triode T8 is connected with input power VIN, pin 5 and pin 6 are connected with the two ends of the 18th current-limiting resistance R83, pin 3 is connected with one end of the 19th current-limiting resistance R82, and pin 2 is connected with one end of the 20th current-limiting resistance R81, pin 1 ground connection;
The pin 4 of the 3rd dual pathways field effect transistor Q5 and one end of the 5th discharge resistance RD5, one end of the 5th Zener diode D5, the 12nd current-limiting resistance R52 one end be connected, pin 2 is connected with one end of the 6th discharge resistance RD6, one end of the 6th Zener diode D6, the 14th current-limiting resistance R62, and 1 port of pin 5, pin 6, pin 7, pin 8 and connector PVL connects.The pin 4 of the 4th bilateral field effect transistor Q6 and one end of the 7th discharge resistance RD7, one end of the 7th Zener diode D7, the 16th current-limiting resistance R72 one end be connected, pin 2 and the other end of the 8th discharge resistance RD8, the other end of the 8th Zener diode D8, the 16th current-limiting resistance R72 one end be connected, 2 ports of pin 5, pin 6, pin 7, pin 8 and connector PVL connect.The other end of the 5th Zener diode D5, the other end of the 5th discharge resistance RD5, the pin 3 of the 3rd dual pathways field effect transistor Q5, the pin 3 of the 4th dual pathways field effect transistor Q6, the other end of the 7th discharge resistance RD7, another termination power VIN of the 7th Zener diode D7, the other end of the 6th Zener diode D6, the other end of the 6th discharge resistance RD6, the pin 1 of the 3rd dual pathways field effect transistor Q5, the pin 1 of the 4th dual pathways field effect transistor Q6, the other end of the 8th discharge resistance RD8, the other end of the 8th Zener diode D8, one end of 3rd detection resistance RL5 and one end of the 4th resistance RL6 connect, the other end of the 3rd detection resistance RL5 and another termination shielding ground of the 4th detection resistance RL6.
Detection signal filter circuit includes left-side signal filter circuit and right-side signal filter circuit.
Described left-side signal filter circuit includes two resistance, four electric capacity.One end of 21st divider resistance RL3 and one end of the 22nd divider resistance RL4, one end of the 69th filter capacitor CL1, the 70th filter capacitor CL2 one end be connected, the other end of the 22nd divider resistance RL4 and one end of one end of the 71st filter capacitor CL3, the 72nd filter capacitor CL4 connect and connect the ADC123_10 interface of CPU.The other end of the 69th filter capacitor CL1, the other end of the 70th filter capacitor CL2, the other end of the 71st filter capacitor CL3, the 72nd filter capacitor CL4 the other end all ground connection;
Described right-side signal filter circuit includes two resistance, four electric capacity.One end of 23rd divider resistance RL7 and one end of the 73rd filter capacitor CL5, one end of the 74th filter capacitor CL6, the 24th divider resistance RL8 one end be connected, the other end of the 24th divider resistance RL8 and one end of one end of the 75th filter capacitor CL7, the 76th filter capacitor CL8 connect and connect the ADC123_11 interface of CPU.The other end of the 73rd filter capacitor CL5, the other end of the 74th filter capacitor CL6, the other end of the 75th filter capacitor CL7, the 76th filter capacitor CL8 the other end all ground connection.
Beneficial effect:
Hydraulic high-speed on-off valve door detection and control the circuit of device through practice examining, can effectively measuring go out magnitude of voltage corresponding to valve displacement, control valve signal accordingly thus being converted into, its error is in insignificant scope.Hydraulic valve switch detection and control device, it is possible to in hydraulic valve accelerator control system, its circuit design is simple, and cost performance is high, it may be achieved real-time Communication for Power, practical value is obvious.
Accompanying drawing explanation
Fig. 1 be the CPU in the RAM plate basic circuit part of the present invention, voltage filter modular circuit, voltage transformation module circuit, serial ports download modular circuit, clock module circuit, start modular circuit and externally fed download interface circuit;
Fig. 2 is the CAN transceiver module circuit part in the RAM plate basic circuit part of invention;
Fig. 3-1 is the main filtration module of blood pressure lowering in power supply process part;
Fig. 3-2 is the control signal detection module in power supply process part;
Fig. 3-3 is the input power detection module in power supply process part;
Fig. 3-4 is the voltage filter module in power supply process part;
Fig. 3-5 is the ground connection isolation module in power supply process part;
Fig. 4 is displacement detecting circuit;
Fig. 5 is that signal generating circuit includes switching power circuit and filter circuit;
Fig. 6 is the left PWM H-bridge circuit controlled and corresponding filter circuit;
Fig. 7 is the right PWM H-bridge circuit controlled and corresponding filter circuit;
Fig. 8 is filter circuit.
Detailed description of the invention
Implement below in conjunction with schematic diagram and concrete operations that the invention will be further described, to help the researcher of association area that the thought of the present invention has a more deep understanding.
The measurement of a kind of hydraulic valve switch and control circuit, control output circuit part including RAM plate basic circuit part, displacement signal testing circuit and signal.
As it is shown in figure 1, RAM plate basic circuit part includes CPU, voltage filter modular circuit, voltage transformation module circuit, serial ports download modular circuit, clock module circuit, start modular circuit and externally fed download interface circuit;Described CPU adopts STM32F407VGT6 chip;
Described voltage filter module includes digital voltage VCC filtering and analog voltage AVCC filters two parts.Digital voltage VCC filtering part includes four electric capacity.Wherein one end of the first filter capacitor CV17, one end of the second filter capacitor CV18, one end of the 3rd filter capacitor CV19, the 4th filter capacitor CV20 one end be all connected with power supply VCC end, the other end of four filter capacitors all ground connection.
Described analog voltage AVCC filtering includes two electric capacity.Wherein one end of the 5th filter capacitor CA7, the 6th filter capacitor CA8 one end be all connected with one end of analog power AVCC and connect 22 feet of CPU, the other end of two filter capacitors all connect simulation ground AGND.
Described voltage transformation module includes an electric capacity.Wherein one end of the 7th filter capacitor CCAP2 is connected with 49 feet of CPU, the other end ground connection of the 7th filter capacitor CCAP2.
The described serial ports module that downloads includes two resistance and an electric capacity.One end of first divider resistance RB3 is connected with one end of the second divider resistance RB4, and the other end of the first divider resistance RB3 is connected with the pin 94 of CPU.One end of first storage capacitor CRES1 is connected with the NRST interface of CPU, and the other end of the other end and the second divider resistance RB4 connects and ground connection.
Described clock module includes a crystal oscillator and two electric capacity;One end of first crystal oscillator Y1 is connected with one end of the second storage capacitor CY1, and is connected with the pin 12 of CPU;The other end of the first crystal oscillator Y1 and one end of the 3rd storage capacitor CY2 connect, and are connected with the pin 13 of CPU.The other end of the second storage capacitor CY1, the 3rd storage capacitor CY2 the other end all ground connection.
Described startup module includes a resistance.One end of first pull down resistor RB1 is connected with the pin 37 of CPU, other end ground connection.
91 feet of described CPU and one end of the 3rd divider resistance RCAN1 connect, and the other end of the 3rd divider resistance RCAN1 is connected with 4 feet of CAN interface integrated chip U5;52 feet of CPU and one end of the 4th divider resistance RCAN3 connect, and the other end of the 4th divider resistance RCAN3 is connected with 1 foot of described CAN interface integrated chip U5.74 feet of CPU, 99 feet, 27 feet, 10 foot ground connection, 50 feet, 75 feet, 100 feet, 28 feet, 11 feet meet power supply VCC, and 20 foot ground connection simulation ground AGND, 21 feet, 22 feet meet analog power AVCC;73 feet of CPU and one end of the first decoupling capacitor CCAP1 connect, the other end ground connection of the first decoupling capacitor CCAP1;19 feet of CPU connect the first pull-up resistor RA1, another termination power VCC of the first pull-up resistor RA1;29 feet of CPU connect one end of the 5th divider resistance RS6, the other end of the 5th divider resistance RS6 connects one end of the 8th filter capacitor CS5, and connecting the positive input of LVDT part the first operational amplifier U3A, the other end of the 8th filter capacitor CS5 connects simulation ground AGND;40 feet of CPU connect one end of the 6th divider resistance RT1, and the other end of the 6th divider resistance RT1 connects the other end of the first current-limiting resistance R11, the tenth current-limiting resistance R41 in the described left PWM H-bridge circuit module controlled;42 feet of CPU connect one end of the 7th divider resistance RT3, and the other end of the 7th divider resistance RT3 connects the other end of the 7th current-limiting resistance R31, the 5th current-limiting resistance R21 in the described left PWM H-bridge circuit module controlled;63 feet of CPU connect one end of the 8th divider resistance RT2, and the other end of the 8th divider resistance RT2 connects the other end of the 11st current-limiting resistance R51, the 20th current-limiting resistance R81 in the described right PWM H-bridge circuit module controlled;64 feet of CPU connect one end of the 9th divider resistance RT4, and the other end of the 9th divider resistance RT4 connects the other end of the 17th current-limiting resistance R71, the 15th current-limiting resistance R61 in the described right PWM H-bridge circuit module controlled.The pin that CPU does not mention in this article is all built on stilts;
In addition with externally fed interface P0, pin 1 meets power supply VCC, and pin 2 connects the pin 72 of CPU, and pin 3 connects the pin 76 of CPU, pin 4 ground connection.
As in figure 2 it is shown, described CAN transceiver module includes a resistance and CAN interface integrated chip U5;The model of CAN interface integrated chip U5 is SN65HVD232DR;One end of tenth point of piezoresistance RCAN4 is connected with 7 feet of CAN interface integrated chip U5, and the other end is connected with 6 feet of CAN interface integrated chip U5.The 2 foot ground connection of CAN interface integrated chip U5;3 feet of CAN interface integrated chip U5 are connected with power supply VCC end.
Power supply process part includes the main filtration module of blood pressure lowering, control signal detection module, input power detection module, voltage filter module and ground connection isolation module.
As shown in figure 3-1, the main filter circuit module of described blood pressure lowering includes a low-dropout regulator, 26 electric capacity and two ferrite beans;The model of low-dropout regulator U4 is CAT6219-330TDGT3;The model of ferrite bean is HTY100505T-221Y-N;One end of 9th filter capacitor CP7, the tenth filter capacitor CP8 one end be connected with+5V power supply and connect 1 foot of the first low-dropout regulator U4, the other end of two filter capacitors all ground connection GND.One end of 11st filter capacitor CP14, one end of the 12nd filter capacitor CP15 and 4 feet of the first low-dropout regulator U4 connect, the other end of two filter capacitors all ground connection.One end of 13rd filter capacitor CV1, one end of the 14th filter capacitor CV2, one end of the 15th filter capacitor CV3, one end of the 16th filter capacitor CV4, one end of the 17th filter capacitor CV5, one end of the 18th filter capacitor CV6, one end of the 19th filter capacitor CV7, one end of the 20th filter capacitor CV8 and one end of the first ferrite bean FB3 connect, and connect 5 feet of the first low-dropout regulator U4, the other end ground connection of eight filter capacitors.The other end of the first ferrite bean FB3 and one end of the 21st filter capacitor CV9, one end of the 22nd filter capacitor CV10, one end of the 23rd filter capacitor CV11, one end of the 24th filter capacitor CV12, one end of the 25th filter capacitor CV13, one end of the 26th filter capacitor CV14, one end of the 27th filter capacitor CV15, the 28th filter capacitor CV16 one end all connect, and it is connected to power supply VCC, the other end of eight filter capacitors all ground connection.One end of 29th filter capacitor CA1, one end of the 30th filter capacitor CA2, one end of the 31st filter capacitor CA3 and one end of the second ferrite bean FB4 connect, and connect 5 feet of the first low-dropout regulator U4, the other end ground connection simulation ground AGND of three filter capacitors.The other end of the second ferrite bean FB4 and one end of the 32nd filter capacitor CA4, one end of the 33rd filter capacitor CA5, the 34th filter capacitor CA6 one end all connect, and it is connected to analog power AVCC, the other end of three filter capacitors all ground connection simulation ground AGND.
As shown in figure 3-2, described control signal test section divides and includes the socket of 6 ports, two resistance and an electric capacity.1 port of socket P1 connects voltage VIN;2 ports of socket P1,6 ports all grounded shield ground EGND;5 ports of socket P1,4 ports are sequentially connected with 7 feet of CAN interface integrated chip U5,6 feet;3 ports of socket P1 connect one end of the 11st divider resistance RC1 and connect, and one end of the other end of the 11st divider resistance RC1 and one end of the 12nd divider resistance RC2, the 35th filter capacitor CC1 connects, and is connected to 26 feet of CPU;The other end of the 12nd divider resistance RC2 and the other end all ground connection of the 35th filter capacitor CC1.
As shown in Fig. 3-3, described voltage VIN filter circuit includes 6 electric capacity.One end of 36th filter capacitor CP1, one end of the 37th filter capacitor CP2, one end of the 38th filter capacitor CP3, one end of the 39th filter capacitor CP4, one end of the 40th filter capacitor CP5, the 41st filter capacitor CP6 one end be all connected to power supply VIN, all grounded shield of the other end of six filter capacitors ground EGND.
As shown in Figure 3-4, described input power VIN testing circuit includes 2 resistance and an electric capacity.The one termination power VIN of the 13rd divider resistance RN1, one end of the other end and one end of the 14th divider resistance RN2, the 42nd filter capacitor CN1 connects, and is connected to 25 feet of CPU.The other end of the 14th divider resistance RN2, the 42nd filter capacitor CN1 the other end all ground connection.
As in Figure 3-5, described ground connection isolation module includes two ferrite beans, and the model of ferrite bean is HTY100505T-221Y-N;The one termination simulation ground AGND of the 3rd ferrite bean FB5, other end ground connection;4th ferrite bean FB6 mono-termination shielding ground EGND, other end ground connection.
As shown in Figure 4, institute's displacement detection circuit includes five resistance, four electric capacity, two operational amplifiers, Schottky diodes.The model of the first operational amplifier and the second operational amplifier is LMC6482AIMX/NOPB;The model of Schottky diode is NSR0140P2T5G;One end of the inverting input of the first operational amplifier U3A and one end of the 43rd filter capacitor CS2, the 15th divider resistance RS2 is connected, one end of normal phase input end and the second pull down resistor RS7 is connected, outfan and the other end of the 43rd filter capacitor CS2, the other end of the 15th divider resistance RS2, the 16th divider resistance RS1 one end connect, and be connected to 23 feet of CPU.The inverting input of the second operational amplifier U3B and one end of the 17th divider resistance RS5, one end of the 3rd pull down resistor RS3, the 44th filter capacitor CS3 one end connect, normal phase input end and one end of the 18th divider resistance RS4, one end of the 45th filter capacitor CS4, the first Schottky diode DS1 negative pole connect, the other end of outfan and the 17th divider resistance RS5 connects, and is connected to 24 feet of CPU.The other end of the second pull down resistor RS7, the other end of the 3rd pull down resistor RS3, the other end of the 44th filter capacitor CS3, the other end of the 45th filter capacitor CS4, the first Schottky diode DS1 positive pole all ground connection simulation ground AGND.1 foot of connector Ps and one end of the 46th filter capacitor CS1 connect, and the other end of the 46th filter capacitor CS1 and the other end of the 16th divider resistance RS1 connect;3 feet of connector Ps and the other end of the 18th divider resistance RS4 connect;2 feet of connector Ps meet simulation ground AGND.
As it is shown in figure 5, signal generating circuit includes switching power circuit and filter circuit.
Described switching power circuit module includes a suitching type voltage-releasing voltage stabilizer, two resistance and an electric capacity;The model of described suitching type voltage-releasing voltage stabilizer is U1AOZ1280CI;The two ends of 1 pin of the first suitching type voltage-releasing voltage stabilizer U1,6 pins and the first feedback capacity C5 connect, 2 pin ground connection, one end of 3 pins and the 19th divider resistance R1, the second ten points of piezoresistance R2 one end connect, 4 pins and 5 pins, power supply VIN connection.The other end of the 19th divider resistance R1 is connected with+5V power supply, the other end ground connection of the second ten points of piezoresistance R2.
Described filter circuit module includes 14 electric capacity, two ferrite beans, an inductance and a Schottky diode;The model of described Schottky diode is MBRA160T3G;The model of ferrite bean is HFY100505T-221Y-N;One end of first filter inductance L1 is connected with 6 pins of the negative pole of the second Schottky diode DP1, the first voltage-releasing voltage stabilizer U1.The other end of the first filter inductance L1 and one end of the 47th filter capacitor C6, one end of the 48th filter capacitor C7, one end of the 49th filter capacitor C8, one end of the 50th filter capacitor C9, one end of the 51st filter capacitor C10, one end of the 52nd filter capacitor C11, the 5th ferrite bean FB1 one end connect.The other end of the 5th ferrite bean FB1 and one end of the 53rd filter capacitor C12, one end of the 54th filter capacitor C13, one end of the 55th filter capacitor C14, one end of the 56th filter capacitor C15, the 6th ferrite bean FB2 one end connect.The other end of the 6th ferrite bean FB2 and one end of the 57th filter capacitor C16, one end of the 58th filter capacitor C17, one end of the 59th filter capacitor C18, the 60th filter capacitor C19 one end connect and connect+5V out-put supply.Positive pole all ground connection of the other end of 14 filter capacitors and the second Schottky diode DP1.
PWM control H-bridge circuit include left PWM control H-bridge circuit and filter circuit, right PWM control H-bridge circuit and filter circuit.
As shown in Figure 6, the filter circuit of the H-bridge circuit that described left PWM controls includes four electric capacity.Wherein one end of the 61st filter capacitor CP10, one end of the 62nd filter capacitor CP11, one end of the 63rd filter capacitor CP12, the 64th filter capacitor CP13 one end be all connected with power supply VIN end, the other end of four filter capacitors all connect shielding ground.
The H-bridge circuit module that described left PWM controls includes the connector of 2 ports, two dual pathways field effect transistor, four general triodes, four Zener diodes, 16 resistance (ten current-limiting resistances, four discharge resistances, two load resistances);The model of described dual pathways field effect transistor is BSO615CG;The model of general triode is BC847BPDW1T1G;The 1 pin ground connection of the first general triode T1, one end of 2 pins and the first current-limiting resistance R11 connects, and one end of 6 pins and the second current-limiting resistance R12 connects, and all the other pins do not mentioned in this article are all built on stilts.The pin 4 of the second general triode T2 is connected with power supply VIN, and pin 5 and pin 6 are connected with the two ends of the 3rd current-limiting resistance R23, and pin 3 is connected with one end of the 4th current-limiting resistance R22, and pin 2 is connected with one end of the 5th current-limiting resistance R21, pin 1 ground connection.The pin 6 of the 3rd general triode T3 is connected with one end of the 6th current-limiting resistance R32, and pin 2 is connected with one end of the 7th current-limiting resistance R31, pin 1 ground connection.The pin 4 of the 4th general triode T4 is connected with input power VIN, and pin 5 and pin 6 are connected with the two ends of the 8th current-limiting resistance R43, and pin 3 is connected with one end of the 9th current-limiting resistance R42, and pin 2 is connected with one end of the tenth current-limiting resistance R41, pin 1 ground connection;
The pin 4 of the first dual pathways field effect transistor Q1 and one end of the first discharge resistance RD1, one end of the first Zener diode D1, the second current-limiting resistance R12 one end be connected, pin 2 is connected with one end of the second discharge resistance RD2, one end of the second Zener diode D2, one end of the 4th current-limiting resistance R22, first one end detecting resistance RL2, and 1 port of pin 5, pin 6, pin 7, pin 8 and connector PVL connects.The pin 4 of the second bilateral field effect transistor Q2 and one end of the 3rd discharge resistance RD3, one end of the 3rd Zener diode D3, the 6th current-limiting resistance R32 one end be connected, pin 2 and the other end of the 4th discharge resistance RD4, the other end of the 4th Zener diode D4, the 9th current-limiting resistance R42 one end be connected, 2 ports of pin 5, pin 6, pin 7, pin 8 and connector PVL connect.The other end of the first Zener diode D1, the other end of the first discharge resistance RD1, the pin 3 of the first dual pathways field effect transistor Q1, the pin 3 of the second dual pathways field effect transistor Q2, the other end of the 3rd discharge resistance RD3, another termination power VIN of the 3rd Zener diode D3, the other end of the second Zener diode D2, the other end of the second discharge resistance RD2, the pin 1 of the first dual pathways field effect transistor Q1, the pin 1 of the second dual pathways field effect transistor Q2, the other end of the 4th discharge resistance RD4, the other end of the second Zener diode D4, one end of one end of first resistance RL2 and the second detection resistance RL1 connects, the other end of the second detection resistance RL1 and another termination shielding ground of the first detection resistance RL2.
As it is shown in fig. 7, the filter circuit of the H-bridge circuit of described right PWM control includes four electric capacity.Wherein one end of the 65th filter capacitor CP20, one end of the 66th filter capacitor CP21, one end of the 67th filter capacitor CP22, the 68th filter capacitor CP23 one end be all connected with power supply VIN end, the other end of four filter capacitors all connect shielding ground.
The H-bridge circuit module that described right PWM controls includes two dual pathways field effect transistor, four general triodes, four Zener diodes, 16 resistance (ten current-limiting resistances, four discharge resistances, two load resistances);The model of described dual pathways field effect transistor is BSO615CG;The model of general triode is BC847BPDW1T1G;The 1 pin ground connection of the 5th general triode T5, one end of 2 pins and the 11st current-limiting resistance R51 connects, and one end of 6 pins and the 12nd current-limiting resistance R52 connects, and all the other pins do not mentioned in this article are all built on stilts.The clematis stem pin 4 of triode T6 is connected with power supply VIN, and pin 5 and pin 6 are connected with the two ends of the 13rd current-limiting resistance R63, and pin 3 is connected with one end of the 14th current-limiting resistance R62, and pin 2 is connected with one end of the 15th current-limiting resistance R61, pin 1 ground connection.The pin 6 of the 7th general triode T7 is connected with one end of the 16th current-limiting resistance R72, and pin 2 is connected with one end of the 17th current-limiting resistance R71, pin 1 ground connection.The pin 4 of the 8th general triode T8 is connected with input power VIN, pin 5 and pin 6 are connected with the two ends of the 18th current-limiting resistance R83, pin 3 is connected with one end of the 19th current-limiting resistance R82, and pin 2 is connected with one end of the 20th current-limiting resistance R81, pin 1 ground connection;
The pin 4 of the 3rd dual pathways field effect transistor Q5 and one end of the 5th discharge resistance RD5, one end of the 5th Zener diode D5, the 12nd current-limiting resistance R52 one end be connected, pin 2 is connected with one end of the 6th discharge resistance RD6, one end of the 6th Zener diode D6, the 14th current-limiting resistance R62, and 1 port of pin 5, pin 6, pin 7, pin 8 and connector PVL connects.The pin 4 of the 4th bilateral field effect transistor Q6 and one end of the 7th discharge resistance RD7, one end of the 7th Zener diode D7, the 16th current-limiting resistance R72 one end be connected, pin 2 and the other end of the 8th discharge resistance RD8, the other end of the 8th Zener diode D8, the 16th current-limiting resistance R72 one end be connected, 2 ports of pin 5, pin 6, pin 7, pin 8 and connector PVL connect.The other end of the 5th Zener diode D5, the other end of the 5th discharge resistance RD5, the pin 3 of the 3rd dual pathways field effect transistor Q5, the pin 3 of the 4th dual pathways field effect transistor Q6, the other end of the 7th discharge resistance RD7, another termination power VIN of the 7th Zener diode D7, the other end of the 6th Zener diode D6, the other end of the 6th discharge resistance RD6, the pin 1 of the 3rd dual pathways field effect transistor Q5, the pin 1 of the 4th dual pathways field effect transistor Q6, the other end of the 8th discharge resistance RD8, the other end of the 8th Zener diode D8, one end of 3rd detection resistance RL5 and one end of the 4th resistance RL6 connect, the other end of the 3rd detection resistance RL5 and another termination shielding ground of the 4th detection resistance RL6.
As shown in Figure 8, detection signal filter circuit includes left-side signal filter circuit and right-side signal filter circuit.
Described left-side signal filter circuit includes two resistance, four electric capacity.One end of 21st divider resistance RL3 and one end of the 22nd divider resistance RL4, one end of the 69th filter capacitor CL1, the 70th filter capacitor CL2 one end be connected, the other end of the 22nd divider resistance RL4 and one end of one end of the 71st filter capacitor CL3, the 72nd filter capacitor CL4 connect and connect the ADC123_10 interface of CPU.The other end of the 69th filter capacitor CL1, the other end of the 70th filter capacitor CL2, the other end of the 71st filter capacitor CL3, the 72nd filter capacitor CL4 the other end all ground connection;
Described right-side signal filter circuit includes two resistance, four electric capacity.One end of 23rd divider resistance RL7 and one end of the 73rd filter capacitor CL5, one end of the 74th filter capacitor CL6, the 24th divider resistance RL8 one end be connected, the other end of the 24th divider resistance RL8 and one end of one end of the 75th filter capacitor CL7, the 76th filter capacitor CL8 connect and connect the ADC123_11 interface of CPU.The other end of the 73rd filter capacitor CL5, the other end of the 74th filter capacitor CL6, the other end of the 75th filter capacitor CL7, the 76th filter capacitor CL8 the other end all ground connection.
STM32F407VGT6 in described RAM plate basic circuit is a 32 single-chip microcomputers of ST Microelectronics, possesses CAN transmission-receiving function, excellent performance, reasonable price, fully meets the needs of hydraulic valve engineering field.First, second operational amplifier of institute's displacement detection circuit part is the low consumed power operational amplifier integrated chip LMC6482AIMX/NOPB of TI company, and its stable performance meets requirements.The voltage-releasing voltage stabilizer of described switching power circuit module is the suitching type voltage-releasing voltage stabilizer AOZ1280CI of ALPHA&OmegaSemiconductor company, and its efficiency is high, easy to use, it is possible to be optimized for various application scenarios flexibly.Field effect transistor in the H-bridge circuit that described PWM controls is general (NPN/PNP) transistor BC847BPDW1T1G of ONSemiconductor company.Described field effect transistor is double; two P/N passage enhancement mode field effect transistor BSO615CG of Infineontechnology company.
Work process:
Hydraulic valve current valve position signal is detected by displacement detecting circuit, according to required valve folding condition, 4 tunnel control signal TIM1CH1, TIM1CH2, TIM8CH1, TIM8CH2 is obtained for controlling 4 relay foldings in hydraulic valve after CPU calculates, the folding of relay causes the movement of iron shot in 4 passages, if the iron shot in the upper left corner and the lower right corner moves, channel conductive, liquid flows to the lower right corner from the upper left corner, and in valve, iron core moves right;If the iron shot in the upper right corner and the lower left corner moves, channel conductive, liquid flows to the lower left corner from the upper right corner, and in valve, iron core is moved to the left, thus controlling the switch of valve.Two relays in left side are controlled by a circuit, two relays in right side are controlled by another control circuit, two control circuits are drawn two detection filtered circuit of signal VCL0 and VCR0 respectively and stable signal VCL and VCR are input to CPU, adjust control signal through CPU analyzing and processing and control stablizing of relay to maintain.

Claims (1)

1. the measurement of hydraulic selector valve and a control circuit, including RAM plate basic circuit part, displacement signal testing circuit part and control signal output circuit part;
It is characterized in that: described RAM plate basic circuit part includes CPU, voltage filter modular circuit, voltage transformation module circuit, serial ports download modular circuit, clock module circuit, start modular circuit and externally fed download interface circuit;Described CPU adopts STM32F407VGT6 chip;
Described voltage filter module includes digital voltage VCC filtering and analog voltage AVCC filters two parts;Digital voltage VCC filtering part includes four electric capacity;Wherein one end of the first filter capacitor CV17, one end of the second filter capacitor CV18, one end of the 3rd filter capacitor CV19, the 4th filter capacitor CV20 one end be all connected with power supply VCC end, the other end of four filter capacitors all ground connection;
Described analog voltage AVCC filtering includes two electric capacity;Wherein one end of the 5th filter capacitor CA7, the 6th filter capacitor CA8 one end be all connected with one end of analog power AVCC and connect 22 feet of CPU, the other end of two filter capacitors all connect simulation ground AGND;
Described voltage transformation module includes an electric capacity;Wherein one end of the 7th filter capacitor CCAP2 is connected with 49 feet of CPU, the other end ground connection of the 7th filter capacitor CCAP2;
The described serial ports module that downloads includes two resistance and an electric capacity;One end of first divider resistance RB3 is connected with one end of the second divider resistance RB4, and the other end of the first divider resistance RB3 is connected with the pin 94 of CPU;One end of first storage capacitor CRES1 is connected with the NRST interface of CPU, and the other end of the other end and the second divider resistance RB4 connects and ground connection;
Described clock module includes a crystal oscillator and two electric capacity;One end of first crystal oscillator Y1 is connected with one end of the second storage capacitor CY1, and is connected with the pin 12 of CPU;The other end of the first crystal oscillator Y1 and one end of the 3rd storage capacitor CY2 connect, and are connected with the pin 13 of CPU;The other end of the second storage capacitor CY1, the 3rd storage capacitor CY2 the other end all ground connection;
Described startup module includes a resistance;One end of first pull down resistor RB1 is connected with the pin 37 of CPU, other end ground connection;
91 feet of described CPU and one end of the 3rd divider resistance RCAN1 connect, and the other end of the 3rd divider resistance RCAN1 is connected with 4 feet of CAN interface integrated chip U5;52 feet of CPU and one end of the 4th divider resistance RCAN3 connect, and the other end of the 4th divider resistance RCAN3 is connected with 1 foot of described CAN interface integrated chip U5;74 feet of CPU, 99 feet, 27 feet, 10 foot ground connection, 50 feet, 75 feet, 100 feet, 28 feet, 11 feet meet power supply VCC, and 20 foot ground connection simulation ground AGND, 21 feet, 22 feet meet analog power AVCC;73 feet of CPU and one end of the first decoupling capacitor CCAP1 connect, the other end ground connection of the first decoupling capacitor CCAP1;19 feet of CPU connect the first pull-up resistor RA1, another termination power VCC of the first pull-up resistor RA1;29 feet of CPU connect one end of the 5th divider resistance RS6, the other end of the 5th divider resistance RS6 connects one end of the 8th filter capacitor CS5, and connecting the positive input of LVDT part the first operational amplifier U3A, the other end of the 8th filter capacitor CS5 connects simulation ground AGND;40 feet of CPU connect one end of the 6th divider resistance RT1, and the other end of the 6th divider resistance RT1 connects the other end of the first current-limiting resistance R11, the tenth current-limiting resistance R41 in the described left PWM H-bridge circuit module controlled;42 feet of CPU connect one end of the 7th divider resistance RT3, and the other end of the 7th divider resistance RT3 connects the other end of the 7th current-limiting resistance R31, the 5th current-limiting resistance R21 in the described left PWM H-bridge circuit module controlled;63 feet of CPU connect one end of the 8th divider resistance RT2, and the other end of the 8th divider resistance RT2 connects the other end of the 11st current-limiting resistance R51, the 20th current-limiting resistance R81 in the described right PWM H-bridge circuit module controlled;64 feet of CPU connect one end of the 9th divider resistance RT4, and the other end of the 9th divider resistance RT4 connects the other end of the 17th current-limiting resistance R71, the 15th current-limiting resistance R61 in the described right PWM H-bridge circuit module controlled;The pin that CPU does not mention in this article is all built on stilts;
In addition with externally fed interface P0, pin 1 meets power supply VCC, and pin 2 connects the pin 72 of CPU, and pin 3 connects the pin 76 of CPU, pin 4 ground connection;
Described CAN transceiver module includes a resistance and CAN interface integrated chip U5;The model of CAN interface integrated chip U5 is SN65HVD232DR;One end of tenth point of piezoresistance RCAN4 is connected with 7 feet of CAN interface integrated chip U5, and the other end is connected with 6 feet of CAN interface integrated chip U5;The 2 foot ground connection of CAN interface integrated chip U5;3 feet of CAN interface integrated chip U5 are connected with power supply VCC end;
Power supply process part includes the main filtration module of blood pressure lowering, control signal detection module, input power detection module, voltage filter module and ground connection isolation module;
The main filter circuit module of described blood pressure lowering includes a low-dropout regulator, 26 electric capacity and two ferrite beans;The model of low-dropout regulator U4 is CAT6219-330TDGT3;The model of ferrite bean is HTY100505T-221Y-N;One end of 9th filter capacitor CP7, the tenth filter capacitor CP8 one end be connected with+5V power supply and connect 1 foot of the first low-dropout regulator U4, the other end of two filter capacitors all ground connection GND;One end of 11st filter capacitor CP14, one end of the 12nd filter capacitor CP15 and 4 feet of the first low-dropout regulator U4 connect, the other end of two filter capacitors all ground connection;One end of 13rd filter capacitor CV1, one end of the 14th filter capacitor CV2, one end of the 15th filter capacitor CV3, one end of the 16th filter capacitor CV4, one end of the 17th filter capacitor CV5, one end of the 18th filter capacitor CV6, one end of the 19th filter capacitor CV7, one end of the 20th filter capacitor CV8 and one end of the first ferrite bean FB3 connect, and connect 5 feet of the first low-dropout regulator U4, the other end ground connection of eight filter capacitors;The other end of the first ferrite bean FB3 and one end of the 21st filter capacitor CV9, one end of the 22nd filter capacitor CV10, one end of the 23rd filter capacitor CV11, one end of the 24th filter capacitor CV12, one end of the 25th filter capacitor CV13, one end of the 26th filter capacitor CV14, one end of the 27th filter capacitor CV15, the 28th filter capacitor CV16 one end all connect, and it is connected to power supply VCC, the other end of eight filter capacitors all ground connection;One end of 29th filter capacitor CA1, one end of the 30th filter capacitor CA2, one end of the 31st filter capacitor CA3 and one end of the second ferrite bean FB4 connect, and connect 5 feet of the first low-dropout regulator U4, the other end ground connection simulation ground AGND of three filter capacitors;The other end of the second ferrite bean FB4 and one end of the 32nd filter capacitor CA4, one end of the 33rd filter capacitor CA5, the 34th filter capacitor CA6 one end all connect, and it is connected to analog power AVCC, the other end of three filter capacitors all ground connection simulation ground AGND;
Described control signal test section divides and includes the socket of 6 ports, two resistance and an electric capacity;1 port of socket P1 connects voltage VIN;2 ports of socket P1,6 ports all grounded shield ground EGND;5 ports of socket P1,4 ports are sequentially connected with 7 feet of CAN interface integrated chip U5,6 feet;3 ports of socket P1 connect one end of the 11st divider resistance RC1 and connect, and one end of the other end of the 11st divider resistance RC1 and one end of the 12nd divider resistance RC2, the 35th filter capacitor CC1 connects, and is connected to 26 feet of CPU;The other end of the 12nd divider resistance RC2 and the other end all ground connection of the 35th filter capacitor CC1;
Described voltage VIN filter circuit includes 6 electric capacity;One end of 36th filter capacitor CP1, one end of the 37th filter capacitor CP2, one end of the 38th filter capacitor CP3, one end of the 39th filter capacitor CP4, one end of the 40th filter capacitor CP5, the 41st filter capacitor CP6 one end be all connected to power supply VIN, all grounded shield of the other end of six filter capacitors ground EGND;
Described input power VIN testing circuit includes 2 resistance and an electric capacity;The one termination power VIN of the 13rd divider resistance RN1, one end of the other end and one end of the 14th divider resistance RN2, the 42nd filter capacitor CN1 connects, and is connected to 25 feet of CPU;The other end of the 14th divider resistance RN2, the 42nd filter capacitor CN1 the other end all ground connection;
Described ground connection isolation module includes two ferrite beans, and the model of ferrite bean is HTY100505T-221Y-N;The one termination simulation ground AGND of the 3rd ferrite bean FB5, other end ground connection;4th ferrite bean FB6 mono-termination shielding ground EGND, other end ground connection;
Institute's displacement detection circuit includes five resistance, four electric capacity, two operational amplifiers, Schottky diodes;The model of the first operational amplifier and the second operational amplifier is LMC6482AIMX/NOPB;The model of Schottky diode is NSR0140P2T5G;One end of the inverting input of the first operational amplifier U3A and one end of the 43rd filter capacitor CS2, the 15th divider resistance RS2 is connected, one end of normal phase input end and the second pull down resistor RS7 is connected, outfan and the other end of the 43rd filter capacitor CS2, the other end of the 15th divider resistance RS2, the 16th divider resistance RS1 one end connect, and be connected to 23 feet of CPU;The inverting input of the second operational amplifier U3B and one end of the 17th divider resistance RS5, one end of the 3rd pull down resistor RS3, the 44th filter capacitor CS3 one end connect, normal phase input end and one end of the 18th divider resistance RS4, one end of the 45th filter capacitor CS4, the first Schottky diode DS1 negative pole connect, the other end of outfan and the 17th divider resistance RS5 connects, and is connected to 24 feet of CPU;The other end of the second pull down resistor RS7, the other end of the 3rd pull down resistor RS3, the other end of the 44th filter capacitor CS3, the other end of the 45th filter capacitor CS4, the first Schottky diode DS1 positive pole all ground connection simulation ground AGND;1 foot of connector Ps and one end of the 46th filter capacitor CS1 connect, and the other end of the 46th filter capacitor CS1 and the other end of the 16th divider resistance RS1 connect;3 feet of connector Ps and the other end of the 18th divider resistance RS4 connect;2 feet of connector Ps meet simulation ground AGND;
Signal generating circuit includes switching power circuit and filter circuit;
Described switching power circuit module includes a suitching type voltage-releasing voltage stabilizer, two resistance and an electric capacity;The model of described suitching type voltage-releasing voltage stabilizer is U1AOZ1280CI;The two ends of 1 pin of the first suitching type voltage-releasing voltage stabilizer U1,6 pins and the first feedback capacity C5 connect, 2 pin ground connection, one end of 3 pins and the 19th divider resistance R1, the second ten points of piezoresistance R2 one end connect, 4 pins and 5 pins, power supply VIN connection;The other end of the 19th divider resistance R1 is connected with+5V power supply, the other end ground connection of the second ten points of piezoresistance R2;
Described filter circuit module includes 14 electric capacity, two ferrite beans, an inductance and a Schottky diode;The model of described Schottky diode is MBRA160T3G;The model of ferrite bean is HFY100505T-221Y-N;One end of first filter inductance L1 is connected with 6 pins of the negative pole of the second Schottky diode DP1, the first voltage-releasing voltage stabilizer U1;The other end of the first filter inductance L1 and one end of the 47th filter capacitor C6, one end of the 48th filter capacitor C7, one end of the 49th filter capacitor C8, one end of the 50th filter capacitor C9, one end of the 51st filter capacitor C10, one end of the 52nd filter capacitor C11, the 5th ferrite bean FB1 one end connect;The other end of the 5th ferrite bean FB1 and one end of the 53rd filter capacitor C12, one end of the 54th filter capacitor C13, one end of the 55th filter capacitor C14, one end of the 56th filter capacitor C15, the 6th ferrite bean FB2 one end connect;The other end of the 6th ferrite bean FB2 and one end of the 57th filter capacitor C16, one end of the 58th filter capacitor C17, one end of the 59th filter capacitor C18, the 60th filter capacitor C19 one end connect and connect+5V out-put supply;Positive pole all ground connection of the other end of 14 filter capacitors and the second Schottky diode DP1;
PWM control H-bridge circuit include left PWM control H-bridge circuit and filter circuit, right PWM control H-bridge circuit and filter circuit;
The filter circuit of the H-bridge circuit that described left PWM controls includes four electric capacity;Wherein one end of the 61st filter capacitor CP10, one end of the 62nd filter capacitor CP11, one end of the 63rd filter capacitor CP12, the 64th filter capacitor CP13 one end be all connected with power supply VIN end, the other end of four filter capacitors all connect shielding ground;
The H-bridge circuit module that described left PWM controls includes the connector of 2 ports, two dual pathways field effect transistor, four general triodes, four Zener diodes, 16 resistance (ten current-limiting resistances, four discharge resistances, two load resistances);The model of described dual pathways field effect transistor is BSO615CG;The model of general triode is BC847BPDW1T1G;The 1 pin ground connection of the first general triode T1, one end of 2 pins and the first current-limiting resistance R11 connects, and one end of 6 pins and the second current-limiting resistance R12 connects, and all the other pins do not mentioned in this article are all built on stilts;The pin 4 of the second general triode T2 is connected with power supply VIN, and pin 5 and pin 6 are connected with the two ends of the 3rd current-limiting resistance R23, and pin 3 is connected with one end of the 4th current-limiting resistance R22, and pin 2 is connected with one end of the 5th current-limiting resistance R21, pin 1 ground connection;The pin 6 of the 3rd general triode T3 is connected with one end of the 6th current-limiting resistance R32, and pin 2 is connected with one end of the 7th current-limiting resistance R31, pin 1 ground connection;The pin 4 of the 4th general triode T4 is connected with input power VIN, and pin 5 and pin 6 are connected with the two ends of the 8th current-limiting resistance R43, and pin 3 is connected with one end of the 9th current-limiting resistance R42, and pin 2 is connected with one end of the tenth current-limiting resistance R41, pin 1 ground connection;
The pin 4 of the first dual pathways field effect transistor Q1 and one end of the first discharge resistance RD1, one end of the first Zener diode D1, the second current-limiting resistance R12 one end be connected, pin 2 is connected with one end of the second discharge resistance RD2, one end of the second Zener diode D2, one end of the 4th current-limiting resistance R22, first one end detecting resistance RL2, and 1 port of pin 5, pin 6, pin 7, pin 8 and connector PVL connects;The pin 4 of the second bilateral field effect transistor Q2 and one end of the 3rd discharge resistance RD3, one end of the 3rd Zener diode D3, the 6th current-limiting resistance R32 one end be connected, pin 2 and the other end of the 4th discharge resistance RD4, the other end of the 4th Zener diode D4, the 9th current-limiting resistance R42 one end be connected, 2 ports of pin 5, pin 6, pin 7, pin 8 and connector PVL connect;The other end of the first Zener diode D1, the other end of the first discharge resistance RD1, the pin 3 of the first dual pathways field effect transistor Q1, the pin 3 of the second dual pathways field effect transistor Q2, the other end of the 3rd discharge resistance RD3, another termination power VIN of the 3rd Zener diode D3, the other end of the second Zener diode D2, the other end of the second discharge resistance RD2, the pin 1 of the first dual pathways field effect transistor Q1, the pin 1 of the second dual pathways field effect transistor Q2, the other end of the 4th discharge resistance RD4, the other end of the second Zener diode D4, one end of one end of first resistance RL2 and the second detection resistance RL1 connects, the other end of the second detection resistance RL1 and another termination shielding ground of the first detection resistance RL2;
The filter circuit of the H-bridge circuit that described right PWM controls includes four electric capacity;Wherein one end of the 65th filter capacitor CP20, one end of the 66th filter capacitor CP21, one end of the 67th filter capacitor CP22, the 68th filter capacitor CP23 one end be all connected with power supply VIN end, the other end of four filter capacitors all connect shielding ground;
The H-bridge circuit module that described right PWM controls includes two dual pathways field effect transistor, four general triodes, four Zener diodes, 16 resistance (ten current-limiting resistances, four discharge resistances, two load resistances);The model of described dual pathways field effect transistor is BSO615CG;The model of general triode is BC847BPDW1T1G;The 1 pin ground connection of the 5th general triode T5, one end of 2 pins and the 11st current-limiting resistance R51 connects, and one end of 6 pins and the 12nd current-limiting resistance R52 connects, and all the other pins do not mentioned in this article are all built on stilts;The clematis stem pin 4 of triode T6 is connected with power supply VIN, and pin 5 and pin 6 are connected with the two ends of the 13rd current-limiting resistance R63, and pin 3 is connected with one end of the 14th current-limiting resistance R62, and pin 2 is connected with one end of the 15th current-limiting resistance R61, pin 1 ground connection;The pin 6 of the 7th general triode T7 is connected with one end of the 16th current-limiting resistance R72, and pin 2 is connected with one end of the 17th current-limiting resistance R71, pin 1 ground connection;The pin 4 of the 8th general triode T8 is connected with input power VIN, pin 5 and pin 6 are connected with the two ends of the 18th current-limiting resistance R83, pin 3 is connected with one end of the 19th current-limiting resistance R82, and pin 2 is connected with one end of the 20th current-limiting resistance R81, pin 1 ground connection;
The pin 4 of the 3rd dual pathways field effect transistor Q5 and one end of the 5th discharge resistance RD5, one end of the 5th Zener diode D5, the 12nd current-limiting resistance R52 one end be connected, pin 2 is connected with one end of the 6th discharge resistance RD6, one end of the 6th Zener diode D6, the 14th current-limiting resistance R62, and 1 port of pin 5, pin 6, pin 7, pin 8 and connector PVL connects;The pin 4 of the 4th bilateral field effect transistor Q6 and one end of the 7th discharge resistance RD7, one end of the 7th Zener diode D7, the 16th current-limiting resistance R72 one end be connected, pin 2 and the other end of the 8th discharge resistance RD8, the other end of the 8th Zener diode D8, the 16th current-limiting resistance R72 one end be connected, 2 ports of pin 5, pin 6, pin 7, pin 8 and connector PVL connect;The other end of the 5th Zener diode D5, the other end of the 5th discharge resistance RD5, the pin 3 of the 3rd dual pathways field effect transistor Q5, the pin 3 of the 4th dual pathways field effect transistor Q6, the other end of the 7th discharge resistance RD7, another termination power VIN of the 7th Zener diode D7, the other end of the 6th Zener diode D6, the other end of the 6th discharge resistance RD6, the pin 1 of the 3rd dual pathways field effect transistor Q5, the pin 1 of the 4th dual pathways field effect transistor Q6, the other end of the 8th discharge resistance RD8, the other end of the 8th Zener diode D8, one end of 3rd detection resistance RL5 and one end of the 4th resistance RL6 connect, the other end of the 3rd detection resistance RL5 and another termination shielding ground of the 4th detection resistance RL6;
Detection signal filter circuit includes left-side signal filter circuit and right-side signal filter circuit;
Described left-side signal filter circuit includes two resistance, four electric capacity;One end of 21st divider resistance RL3 and one end of the 22nd divider resistance RL4, one end of the 69th filter capacitor CL1, the 70th filter capacitor CL2 one end be connected, the other end of the 22nd divider resistance RL4 and one end of one end of the 71st filter capacitor CL3, the 72nd filter capacitor CL4 connect and connect the ADC123_10 interface of CPU;The other end of the 69th filter capacitor CL1, the other end of the 70th filter capacitor CL2, the other end of the 71st filter capacitor CL3, the 72nd filter capacitor CL4 the other end all ground connection;
Described right-side signal filter circuit includes two resistance, four electric capacity;One end of 23rd divider resistance RL7 and one end of the 73rd filter capacitor CL5, one end of the 74th filter capacitor CL6, the 24th divider resistance RL8 one end be connected, the other end of the 24th divider resistance RL8 and one end of one end of the 75th filter capacitor CL7, the 76th filter capacitor CL8 connect and connect the ADC123_11 interface of CPU;The other end of the 73rd filter capacitor CL5, the other end of the 74th filter capacitor CL6, the other end of the 75th filter capacitor CL7, the 76th filter capacitor CL8 the other end all ground connection.
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CN104713615A (en) * 2015-03-23 2015-06-17 杭州电子科技大学 Circuit of drainage pipe network liquid level measurement device
CN104931722A (en) * 2015-03-23 2015-09-23 杭州电子科技大学 Circuit for measuring flow velocity of drainage pipe network
CN205877386U (en) * 2016-04-26 2017-01-11 杭州电子科技大学 Hydraulic pressure high -speed switching valve detect and control circuit

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JPH1011118A (en) * 1996-06-24 1998-01-16 Keyence Corp Sequence controller, data processor, data recording and reproducing method, and recording medium
JP2011177876A (en) * 2010-03-04 2011-09-15 Sugino Machine Ltd Multi-stage feeding controller, and air drive drill equipped with multi-stage feeding controller
CN102493885A (en) * 2011-12-14 2012-06-13 中国人民解放军装甲兵工程学院 Electronic control system for combustion closed-loop control of diesel engine
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