CN105739158A - Liquid crystal display panel - Google Patents

Abstract

The invention discloses a liquid crystal display panel. The liquid crystal display panel comprises a first polarizer, a color filter substrate, a liquid crystal layer, a thin film transistor array substrate, a second polarizer, a backlight module and a control circuit, wherein the control circuit is electrically connected with the backlight module, the color filter substrate and the thin film transistor array substrate; the thin film transistor array substrate comprises a device combined plate, a pixel electrode layer, a second alignment film layer and a common electrode; a passivation layer is arranged on the device combined plate, a hole and a groove array are formed in the passivation layer, and the groove array comprises at least one groove; the pixel electrode layer is arranged on the passivation layer and in the groove array, and the pixel electrode layer is connected with a second signal line layer through the hole; wavy stripes are formed on the common electrode, and the position in which the wavy stripes are formed corresponds to the position in which the groove is formed. According to the liquid crystal display panel, the display effect can be increased.

Description

Display panels

Technical field

The present invention relates to technical field of liquid crystal display, particularly to a kind of display panels.

Background technology

Traditional display panels generally comprises colored filter substrate, liquid crystal layer, thin-film transistor array base-plate, backlight module.Described colored filter substrate, described thin-film transistor array base-plate, described backlight module stack combinations are integrated, and described liquid crystal layer is arranged between described colored filter substrate and described thin-film transistor array base-plate.Wherein, the pixel electrode of above-mentioned traditional described thin-film transistor array base-plate is typically all flat.The electric field force that common electrode in the described pixel electrode of flat and described colored filter substrate is formed cannot make liquid crystal molecule produce deflection by a larger margin.The display effect of above-mentioned traditional display panels is not ideal enough.Therefore, it is necessary to a kind of new technical scheme is proposed, to solve above-mentioned technical problem.

Summary of the invention

It is an object of the invention to provide a kind of display panels, it can improve display effect.

For solving the problems referred to above, technical scheme is as follows:

A kind of display panels, described display panels includes the first Polarizer, colored filter substrate, liquid crystal layer, thin-film transistor array base-plate, the second Polarizer, backlight module and control circuit, and described control circuit is electrically connected with described backlight module, described colored filter substrate and described thin-film transistor array base-plate；Described first Polarizer, described colored filter substrate, described thin-film transistor array base-plate, described second Polarizer and described backlight module stack combinations are integrated, and described liquid crystal layer is arranged between described colored filter substrate and described thin-film transistor array base-plate；Described colored filter substrate includes first substrate, color rete, black-matrix layer, common electrode layer, introns combination layer, the first orientation rete, and described color rete includes red color resistance block, green color blocking block, blue color blocking block, white color blocking block；Described backlight module includes light source, light guide plate, reflecting plate, scatter plate, described light source is arranged on a side of described light guide plate, and described backlight module is for providing light source to the entirety being made up of described first Polarizer, described colored filter substrate, described liquid crystal layer, described thin-film transistor array base-plate and described second Polarizer；Wherein, described thin-film transistor array base-plate includes: combination of devices plate, and described combination of devices plate includes: second substrate；First signal line layer, described first signal line layer includes scanning line, grid；First insulating barrier, described first insulating barrier is arranged on described second substrate and described first signal line layer；Semiconductor layer；Second insulating barrier, described second insulating barrier is arranged on described first insulating barrier and described semiconductor layer；And secondary signal line layer, described secondary signal line layer includes data wire, source electrode, drain electrode；Passivation layer, described passivation layer is arranged on described combination of devices plate, and described passivation layer is provided with hole and groove array, and described groove array includes at least one groove；Pixel electrode layer, described pixel electrode layer is arranged on described passivation layer and in described groove array, and described pixel electrode layer is connected with described secondary signal line layer by described hole；Second orientation rete；Being provided with waveform striped on described common electrode, the position at described waveform striped place is corresponding with the position at described groove place.

In above-mentioned display panels, described waveform striped is three-dimensional waveform striped.

In above-mentioned display panels, described red color resistance block overlaps on described black matrix" with described green color blocking block, and constitutes the first light-blocking block；Described green color blocking block overlaps on described black matrix" with described blue color blocking block, and constitutes the second light-blocking block；Described blue color blocking block overlaps on described black matrix" with described white color blocking block, and constitutes third gear light block；Described white color blocking block overlaps on described black matrix" with described red color resistance block, and constitutes fourth gear light block.

In above-mentioned display panels, described first light-blocking block is for jointly stopping described red color resistance block and described green color blocking block directive light each other with described black matrix"；Described second light-blocking block is for jointly stopping described green color blocking block and described blue color blocking block directive light each other with described black matrix"；Described third gear light block is for jointly stopping described blue color blocking block and described white color blocking block directive light each other with described black matrix"；Described fourth gear light block is for jointly stopping described white color blocking block and described red color resistance block directive light each other with described black matrix".

In above-mentioned display panels, the shape of the first cross section of described hole is identical with the shape of the second cross section of described groove；The area of described first cross section is identical with the area of described second cross section.

In above-mentioned display panels, in the plane corresponding to described display panels, the distance between described hole with the beeline of described groove with groove described in adjacent two is equal.

In above-mentioned display panels, described hole has first degree of depth, and described groove has second degree of depth；Described groove array is all formed by identical optical cover process and etch process with described hole.

In above-mentioned display panels, the mask corresponding to described optical cover process includes: a first area, and described first area has the first light transmittance, and described first area is corresponding with described hole, and described first light transmittance is corresponding with described first degree of depth；At least one second area, described second area has the second light transmittance, and described second area is corresponding with described groove, and described second light transmittance is corresponding with described second degree of depth.

In above-mentioned display panels, described mask is half-tone mask.

In above-mentioned display panels, described groove array and described hole are by the photoresist layer on described passivation layer is carried out described optical cover process, with the 3rd region in described photoresist layer with the 4th region is formed the first depression and the second depression respectively, and be etched described passivation layer and described photoresist layer being formed in described first depression and described second recess；Wherein, described 3rd region is corresponding with described first area, and described 4th region is corresponding with described second area, and described first depression has the 3rd degree of depth, and described second depression has the 4th degree of depth.

Hinge structure, the present invention can improve display effect.

For the foregoing of the present invention can be become apparent, preferred embodiment cited below particularly, and coordinate institute's accompanying drawings, it is described in detail below.

Accompanying drawing explanation

Fig. 1 is the schematic diagram of the thin-film transistor array base-plate in the display panels of the present invention.

Fig. 2 is the schematic diagram of the mask used in the manufacturing process of the thin-film transistor array base-plate shown in Fig. 1.

Fig. 3 is the schematic diagram of the transparent cover plate in the display panels of the present invention.

Detailed description of the invention

Reference Fig. 1, Fig. 1 are the schematic diagram of the thin-film transistor array base-plate in the display panels of the present invention.

The display panels of the present invention includes the first Polarizer, colored filter substrate, liquid crystal layer, thin-film transistor array base-plate, the second Polarizer, backlight module and control circuit, and described control circuit is electrically connected with described backlight module, described colored filter substrate and described thin-film transistor array base-plate.

Described first Polarizer, described colored filter substrate, described thin-film transistor array base-plate, described second Polarizer and described backlight module stack combinations are integrated, and described liquid crystal layer is arranged between described colored filter substrate and described thin-film transistor array base-plate.

Described colored filter substrate includes first substrate, color rete, black-matrix layer, common electrode layer, introns combination layer, the first orientation rete, and described color rete includes red color resistance block, green color blocking block, blue color blocking block, white color blocking block.

Described backlight module includes light source, light guide plate, reflecting plate, scatter plate, described light source is arranged on a side of described light guide plate, and described backlight module is for providing light source to the entirety being made up of described first Polarizer, described colored filter substrate, described liquid crystal layer, described thin-film transistor array base-plate and described second Polarizer.

Wherein, described thin-film transistor array base-plate includes: combination of devices plate 101, passivation layer 102, pixel electrode layer the 103, second orientation rete.

Described combination of devices plate includes: second substrate the 1011, first signal line layer, the first insulating barrier 1013, semiconductor layer the 1014, second insulating barrier 1015, secondary signal line layer.Described first signal line layer includes scanning line, grid 1012.Described first insulating barrier is arranged on described second substrate and described first signal line layer.Described second insulating barrier is arranged on described first insulating barrier and described semiconductor layer.Described secondary signal line layer includes data wire, source electrode 1016, drain electrode 1017.

Described first signal line layer can be scanning line layer, and described secondary signal line layer can be data line layer.Described scanning line layer is arranged on the lower section of described semiconductor layer (described semiconductor layer is described amorphous silicon layer), described first insulating barrier it is provided with between described scanning line layer and described amorphous silicon layer, described second insulating barrier is arranged on the top of described amorphous silicon layer, described data line layer is arranged on the top of described second insulating barrier, and described data line layer is connected through described second insulating barrier with described amorphous silicon layer；Or, described scanning line layer is arranged on the top of described semiconductor layer (described semiconductor layer is described polysilicon layer), it is provided with described first insulating barrier between described polysilicon layer and described scanning line layer, described second insulating barrier is arranged on the top of described scanning line layer, described data line layer is arranged on the top of described second insulating barrier, and described data line layer is connected with described polysilicon layer through described first insulating barrier with described second insulating barrier.

Described passivation layer is arranged on described combination of devices plate, and described passivation layer is provided with hole and groove array, and described groove array includes at least one groove.Described pixel electrode layer is arranged on described passivation layer and in described groove array, and described pixel electrode layer is connected with described secondary signal line layer by described hole.

Described pixel electrode layer is arranged on described passivation layer and in described groove array, and described pixel electrode layer is connected with described secondary signal line layer by described hole.

Being provided with waveform striped on described common electrode, the position at described waveform striped place is corresponding with the position at described groove place.

Described waveform striped is three-dimensional waveform striped.

Described red color resistance block overlaps on described black matrix" with described green color blocking block, and constitutes the first light-blocking block；Described green color blocking block overlaps on described black matrix" with described blue color blocking block, and constitutes the second light-blocking block；Described blue color blocking block overlaps on described black matrix" with described white color blocking block, and constitutes third gear light block；Described white color blocking block overlaps on described black matrix" with described red color resistance block, and constitutes fourth gear light block.

Described first light-blocking block is for jointly stopping described red color resistance block and described green color blocking block directive light each other with described black matrix"；Described second light-blocking block is for jointly stopping described green color blocking block and described blue color blocking block directive light each other with described black matrix"；Described third gear light block is for jointly stopping described blue color blocking block and described white color blocking block directive light each other with described black matrix"；Described fourth gear light block is for jointly stopping described white color blocking block and described red color resistance block directive light each other with described black matrix".

The shape of the first cross section of described hole is identical with the shape of the second cross section of described groove.

The area of described first cross section is identical with the area of described second cross section.

In the plane corresponding to described display panels, the distance between described hole with the beeline of described groove with groove described in adjacent two is equal.

Described hole has first degree of depth, and described groove has second degree of depth.Described groove array is all formed by identical optical cover process and etch process with described hole.It is to say, described groove array is all formed with described hole in optical cover process.

Described groove array is all formed by identical optical cover process and etch process with described hole.

Mask 201 corresponding to described optical cover process includes: first area 2011 and second area 2013.Described first area has the first light transmittance, and described first area is corresponding with described hole, and described first light transmittance is corresponding with described first degree of depth.Described second area has the second light transmittance, and described second area is corresponding with described groove, and described second light transmittance is corresponding with described second degree of depth.

Described mask is half-tone mask.

Described hole and described groove array are by the photoresist layer on described passivation layer is carried out described optical cover process, with the 3rd region in described photoresist layer with the 4th region is formed the first depression and the second depression respectively, and be etched described passivation layer and described photoresist layer being formed in described first depression and described second recess.

Wherein, described 3rd region is corresponding with described first area, and described 4th region is corresponding with described second area, and described first depression has the 3rd degree of depth, and described second depression has the 4th degree of depth.

Described semiconductor layer includes at least one in non-crystalline silicon, polysilicon, indium gallium zinc oxide.

Comparing traditional technical scheme, technique scheme can save one optical cover process, is conducive to saving the cost of manufacture of described thin-film transistor array base-plate, and improves the make efficiency of described thin-film transistor array base-plate.

With reference to the schematic diagram that Fig. 2, Fig. 2 are the mask used in the manufacturing process of the thin-film transistor array base-plate shown in Fig. 1.

In the present embodiment, the mask corresponding to described optical cover process includes first area and second area.Described first area has the first light transmittance, and described first area is corresponding with described hole, and described first light transmittance is corresponding with described first degree of depth.Described second area has the second light transmittance, and described second area is corresponding with described groove, and described second light transmittance is corresponding with described second degree of depth.

Preferably, in the present embodiment, described mask is half-tone mask (HTM, HalfToneMask).

The degree of depth (described first degree of depth) of described hole and the degree of depth (described second degree of depth) of described groove can be arranged according to the light transmittance (open interval of 0-100%) of HTM.

It is to say, described first degree of depth and described second degree of depth in described passivation layer are formed by such mode:

Utilize the described mask with described first area and described second area, described passivation layer is implemented described optical cover process, to concurrently form described first degree of depth and described second degree of depth, wherein, described first area has described first light transmittance, and described second area has described second light transmittance.nullSuch as，Described first light transmittance is 100%，Described second light transmittance (a%) is in the scope (open interval) of 0% to 100%，Such as，Described a% is 0.35%、0.55%、0.85%、1.6%、2.3%、3%、3.3%、4.5%、4.7%、5%、5.9%、7%、8.1%、9%、9.3%、10.5%、11%、12.7%、13%、13.9%、14.1%、15%、15.3%、16.2%、17%、17.7%、19%、21%、23%、23.5%、23.9%、25%、26.7%、27%、29%、29.3%、29.7%、31%、33%、33.6%、34.1%、35%、35.3%、37%、38.3%、39%、41%、42.3%、43%、45%、45.7%、47%、47.9%、49%、49.5%、51%、52.1%、53%、55%、55.7%、55.8%、57%、59%、59.8%、61%、62.1%、63%、63.6%、65%、65.4%、67%、67.7%、69%、69.4%、71%、71.8%、73%、73.1%、75%、75.9%、77%、77.3%、79%、79.6%、81%、81.2%、83%、83.7%、85%、85.6%、87%、88.7%、89%、89.3%、91%、91.5%、93%、93.3%、95%、96.5%、97%、99%、99.5%.

In the present embodiment, described groove array and described hole are by the photoresist layer on described passivation layer is carried out described optical cover process, with the 3rd region in described photoresist layer with the 4th region is formed the first depression and the second depression respectively, and be etched described passivation layer and described photoresist layer being formed in described first depression and described second recess.

Wherein, described 3rd region is corresponding with described first area, and described 4th region is corresponding with described second area, and described first depression has the 3rd degree of depth, and described second depression has the 4th degree of depth.

By technique scheme, the present invention can improve display effect.

Reference Fig. 3, Fig. 3 are the schematic diagram of the transparent cover plate in the display panels of the present invention.

Described display panels also includes transparent cover plate, and described transparent cover plate is arranged on the exiting surface of described colored filter substrate.

Specifically, described transparent cover plate is superimposed on described first Polarizer, described transparent cover plate includes the first transparent material layer the 301, second transparent material layer 302 and the 3rd transparent material layer 303, described first transparent material layer, described second transparent material layer and described 3rd transparent material layer stack combinations are integrated, and described second transparent material layer is arranged between described first transparent material layer and described 3rd transparent material layer.

By technique scheme, be conducive to improving the structural strength of described transparent cover plate.

Being provided with chamber 3021 in described transparent cover plate, described chamber is positioned at described second transparent material layer, and described chamber is flat, and the plane at described chamber place is parallel with the plane at described second transparent material layer place.Described chamber is used for holding transparent oil plant.Described transparent cover plate is additionally provided with a draining pipeline and stores oil portion, and the two ends of described draining pipeline connect described chamber and described storage oil portion respectively.

Described transparent oil plant fills described chamber, when described transparent oil plant for being subject to the extruding of external forces or impacting at described transparent cover plate, the first energy (kinetic energy) corresponding to described active force is converted to the second energy (potential energy or kinetic energy).Specifically, part described transparent oil plant is released when described draining pipeline for being subject to the extruding of external forces or impacting at described transparent cover plate to described storage oil portion, to slow down the impact to described transparent cover plate of the described external forces.

Wherein, described draining pipeline and described storage oil portion are positioned at the predetermined side of described transparent cover plate, described predetermined side be described display panels when being in upright state, the side at the top of described transparent cover plate.

The described oil portion that stores is additionally operable to will utilize action of gravity that by described draining pipeline, the described transparent oil plant stored is back to described chamber when described external forces terminates the extruding to described transparent cover plate or impacts.

Wherein, the first material corresponding to described first transparent material layer, the second material corresponding to described second transparent material layer, the 3rd material corresponding to described 3rd transparent material layer are any one in glass, plastic cement.

Technique scheme is conducive to improving the structural strength of described transparent cover plate, to slow down the external forces percussion to described display panels such that it is able to effectively protect described display panels without damage.

Improving as one, the side of described transparent cover plate also has kink, and described kink bends towards described backlight module from the side of described transparent cover plate.Described kink contacts with described backlight module.

Described kink is provided with Heat Conduction Material, and described kink is for conducting the partial heat of described backlight module to described transparent cover plate, and is left in the front end of described display panels described partial heat by described transparent cover plate.

Described Heat Conduction Material is metal, and the heat pipe being made up of described Heat Conduction Material is arranged in described kink, is provided with heat-conducting liquid in described heat pipe.Described heat-conducting liquid can be such as water, wet goods.Described heat pipe contacts with described backlight module and described transparent cover plate.

Further, described kink is for by the described transparent oil plant in described partial heat conduction to the described chamber of described transparent cover plate, to have stored described partial heat by described transparent oil plant, and left in the front end (dorsad the one side of described backlight module) of described display panels described partial heat by described transparent oil plant.

Further, the end of described kink is additionally provided with clasp, and described clasp is for buckling described backlight module with described transparent cover plate, described backlight module and described transparent cover plate to be fixed.

The part that the medial surface of described clasp contacts with described backlight module is provided with heat conductive silica gel, and described heat conductive silica gel is for conducting the heat of described backlight module to described kink.

In sum; although the present invention is disclosed above with preferred embodiment; but above preferred embodiment is also not used to the restriction present invention; those of ordinary skill in the art; without departing from the spirit and scope of the present invention; all can doing various change and retouching, the scope that therefore protection scope of the present invention defines with claim is as the criterion.

Claims (10)

1. a display panels, described display panels includes the first Polarizer, colored filter substrate, liquid crystal layer, thin-film transistor array base-plate, the second Polarizer, backlight module and control circuit, and described control circuit is electrically connected with described backlight module, described colored filter substrate and described thin-film transistor array base-plate；

Described first Polarizer, described colored filter substrate, described thin-film transistor array base-plate, described second Polarizer and described backlight module stack combinations are integrated, and described liquid crystal layer is arranged between described colored filter substrate and described thin-film transistor array base-plate；

Described colored filter substrate includes first substrate, color rete, black-matrix layer, common electrode layer, introns combination layer, the first orientation rete, and described color rete includes red color resistance block, green color blocking block, blue color blocking block, white color blocking block；

Described backlight module includes light source, light guide plate, reflecting plate, scatter plate, described light source is arranged on a side of described light guide plate, and described backlight module is for providing light source to the entirety being made up of described first Polarizer, described colored filter substrate, described liquid crystal layer, described thin-film transistor array base-plate and described second Polarizer；

It is characterized in that, described thin-film transistor array base-plate includes:

Combination of devices plate, described combination of devices plate includes:

Second substrate；

First signal line layer, described first signal line layer includes scanning line, grid；

First insulating barrier, described first insulating barrier is arranged on described second substrate and described first signal line layer；

Semiconductor layer；

Second insulating barrier, described second insulating barrier is arranged on described first insulating barrier and described semiconductor layer；And

Secondary signal line layer, described secondary signal line layer includes data wire, source electrode, drain electrode；

Passivation layer, described passivation layer is arranged on described combination of devices plate, and described passivation layer is provided with hole and groove array, and described groove array includes at least one groove；

Pixel electrode layer, described pixel electrode layer is arranged on described passivation layer and in described groove array, and described pixel electrode layer is connected with described secondary signal line layer by described hole；

Second orientation rete；

Being provided with waveform striped on described common electrode, the position at described waveform striped place is corresponding with the position at described groove place.

2. display panels according to claim 1, it is characterised in that described waveform striped is three-dimensional waveform striped.

3. display panels according to claim 1, it is characterised in that described red color resistance block overlaps on described black matrix" with described green color blocking block, and constitutes the first light-blocking block；

Described green color blocking block overlaps on described black matrix" with described blue color blocking block, and constitutes the second light-blocking block；

Described blue color blocking block overlaps on described black matrix" with described white color blocking block, and constitutes third gear light block；

Described white color blocking block overlaps on described black matrix" with described red color resistance block, and constitutes fourth gear light block.

4. display panels according to claim 3, it is characterised in that described first light-blocking block is for jointly stopping described red color resistance block and described green color blocking block directive light each other with described black matrix"；

Described second light-blocking block is for jointly stopping described green color blocking block and described blue color blocking block directive light each other with described black matrix"；

Described third gear light block is for jointly stopping described blue color blocking block and described white color blocking block directive light each other with described black matrix"；

Described fourth gear light block is for jointly stopping described white color blocking block and described red color resistance block directive light each other with described black matrix".

5. display panels according to claim 1, it is characterised in that the shape of the first cross section of described hole is identical with the shape of the second cross section of described groove；

The area of described first cross section is identical with the area of described second cross section.

6. display panels according to claim 1, it is characterised in that in the plane corresponding to described display panels, the distance between described hole with the beeline of described groove with groove described in adjacent two is equal.

7. display panels according to claim 1, it is characterised in that described hole has first degree of depth, and described groove has second degree of depth；

Described groove array is all formed by identical optical cover process and etch process with described hole.

8. display panels according to claim 7, it is characterised in that the mask corresponding to described optical cover process includes:

One first area, described first area has the first light transmittance, and described first area is corresponding with described hole, and described first light transmittance is corresponding with described first degree of depth；

At least one second area, described second area has the second light transmittance, and described second area is corresponding with described groove, and described second light transmittance is corresponding with described second degree of depth.

9. display panels according to claim 8, it is characterised in that described mask is half-tone mask.

10. the display panels according to any one in claim 7 to 9, it is characterized in that, described groove array and described hole are by the photoresist layer on described passivation layer is carried out described optical cover process, with the 3rd region in described photoresist layer with the 4th region is formed the first depression and the second depression respectively, and be etched described passivation layer and described photoresist layer being formed in described first depression and described second recess；

Wherein, described 3rd region is corresponding with described first area, and described 4th region is corresponding with described second area, and described first depression has the 3rd degree of depth, and described second depression has the 4th degree of depth.