CN105718208A - Design method for Flash program memory protection and hardware implementation device - Google Patents
Design method for Flash program memory protection and hardware implementation device Download PDFInfo
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- CN105718208A CN105718208A CN201410728168.4A CN201410728168A CN105718208A CN 105718208 A CN105718208 A CN 105718208A CN 201410728168 A CN201410728168 A CN 201410728168A CN 105718208 A CN105718208 A CN 105718208A
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Abstract
The invention discloses a design method and hardware implementation for achieving Flash program memory protection by a method for safety mode, region protection and rewritable operation process control to meet the high-reliability requirements of an automobile electronic chip. Overall protection of a Flash program memory is achieved by the safety mode; an unauthorized channel has an access right to the Flash program memory only in a non-safety mode; data in the Flash program memory in a protected region is prevented from being maliciously or inadvertently tampered by region protection; the data in a non-protected region is prevented from being illegally or inadvertently tampered through operation process normalization by operation process control protection; a protection wall is added to the Flash program memory on the basis of the region protection; and the design scheme for Flash program memory protection meets the requirements of the automobile electronic chip on the high reliability of a function failure and the like.
Description
Technical field
The present invention relates to Flash program memory protection method for designing in reliability design to realize with hardware, utilize safe mode, locality protection and three kinds of methods of erasable Row control to combine, realize Flash program memory protection.
Background technology
At present, electronic product the increasing just gradually that automobile uses, the aspects such as the fuel economy of vehicle traveling process, processing safety and comfortableness have been played very important effect by the use of automotive electronic technology.High reliability is the marked feature that automotive semiconductor chip is different from consumer chip.Flash program memory protection is the importance of automotive electronics reliability consideration.
One serious consequence of EMI interference is the destruction to storage data, and the stable safety therefore protecting memory data is to improve the important technology of reliability, it is however generally that storage protection mode conventional in MCU system is ECC and MPU unit；The memory-protection method often used includes also including non-usage space and fills, and namely with NOP instruction, or mistake performs instruction and fills non-usage space, when program is made mistakes and jumped to these regions, can return to normal operating conditions by reset system.
For the method that realizes and the cost problem of Flash program memory protection, this paper presents a kind of Flash program memory protection method for designing based on safe mode, locality protection and erasing and programming Row control and hardware realizes.The main contributions of the present invention is to define a kind of safe mode, Flash program memory content can not be read by unauthorized channel in such a mode, such as JTAG debugging interface, and it is in any memory element that the data program in the Flash program memorizer of safety zone can access in MCU；It addition, the method that Flash program memory storage space protection part adopts locality protection, only the Flash program memory storage space of non-protected area just can be conducted interviews；Finally, it is stipulated that Flash program memorizer is wiped, the execution process of programming operation, only according to the flow process of regulation, operation could be successful, otherwise can point out AccessError.
Summary of the invention
The present invention relates to a kind of Flash program memory protection scheme meeting automotive electronics reliability requirement.Concrete, the present invention proposes Flash program memory protection method for designing and hardware based on safe mode, locality protection, erasing and programming Row control and realizes.Wherein, under safe mode, the content in Flash program memorizer can not be read by unauthorized channel；Locality protection (BlockProtection) prevent the data in Flash program memorizer suffer be not intended to or malice distort, the protection that non-protected area in Flash program memorizer just can be wiped, programmed；User must carry out Flash program memorizer erasing, programming according to strict execution flow process, could successfully complete the erasing of Flash program memorizer, programming operation.
First, invention provides for a kind of safe mode, the content in Flash program memorizer can not be read by unauthorized channel in such a mode, for instance JTAG debugging interface；And it is in any memory element that the data program in the Flash program memorizer of safety zone can access in MCU.The read-write operation of Flash program memorizer all can be left in the basket (being read as 0, write is ignored) by the program of any insecure area.Safe mode has SEC [1:0] position in FPROT depositor to determine, the content of this depositor can be covered by the content of registers in NVRI after the reset, and the content of this depositor can not be write by user program or revise.The state of SEC [1:0]=2 ' b10 is non-secure states, and all the other states are safe condition.Jtag interface, when chip is in running status and is safe condition, is not allowed into debugging mode.In the secure mode, only while resetting P3.7/DEBUG pin is placed in and low system could be placed in debugging mode.User can be released by two ways or temporarily release safe mode:
(1) decruption key
User can pass through Peripheral Interface and input the key of 8 bytes continuously, and it is continuously written into FKEY depositor, these keys will compare with the ComparisonKey in Flash program memorizer, if coincide, SEC [1:0] becomes 2 ' b10, then can temporarily release safe condition, until reset next time.
If the KEYEN in FPROT depositor is 1, then above-mentioned mechanism is feasible, if being 0, then system does not allow key to release the mechanism of safe mode.The setting of ComparisonKey and SEC, is respectively positioned in the protection zone of Flash program memorizer, if locality protection mechanism is opened, then above content is unless wiped by full chip, otherwise all can not be modified.
(2) reprogramming
System, by entering debugging mode, revises FPROT, cancels locality protection mechanism；Afterwards, full chip erasing is carried out by jtag interface；Carrying out reprogramming, burned Bootloader, NVRI, NVRII and ComparisonKey by JTAG, wherein SEC can be set to 2 ' b10 states according to user's request.
Secondly, invention provides for the concrete scheme of a kind of locality protection, configuration Flash program memorizer protected field is set by depositor.After having Flash program memory access authority; locality protection provides protection further for Flash program memorizer specific region; prevent the data in Flash program memorizer from suffering unintentionally or the tampered region of malice is protected, non-protected areas just can only be carried out effectively erasing, programming operation.These protection zones are determined by FPROT depositor, and this depositor is copied to the register address space of SFR after the reset by the NVRII of Flash program memorizer.FPROT can not be revised by user program, and it is read-only not writeable depositor.NVRII register-bit last sector (sector) in Flash program feram memory, if any one region in Flash program memorizer is protected, then NVRII itself is also protected.The method wanting modifier area protected mode only has one: access FPROT depositor by JTAG mode; it is revised as whole Flash program memorizer to be all not protected; whole Flash program memorizer is wiped afterwards, again through jtag interface programming bootloader, NVRI, NVRII and comparisonkey by JTAG.Locality protection can be used to protect the critical data information of bootloader program and user.
Finally, the present invention proposes a kind of operation to Flash program memorizer and controls, and user could must successfully carry out according to strict operation that Flash program memorizer is erasable, programming operation.Referring to Fig. 1, this Figure illustrates the program command ByteProgram of Flash program memorizer and erasable order Sectorerase and MassErase, these order execution processes are as follows:
(1) FCLK depositor is first write, this depositor will initialize after any reset, and only allow to arrange once, this depositor determines the clock frequency that Flash program memorizer carries out using when wiping and program, it is necessary to according to different bus clocks by Flash program memory clock frequency limitation within the scope of 700kHz-800kHz.
(2) first removing any rub-out signal FPVIOL and FACCE, method is to write direct 1；Judging in FSTATUS depositor, whether FCBEF is 1, if being 1, illustrating that instruction queue is empty, then first write FCMD order, this order is only some instruction specified；
(3) the data write FDATA that will program, if to perform erasing operation, then this content of registers can be arbitrary value；
(4) address is write FLADDR, FHADDR with this, and FADDR [16] is write FSTATUS depositor, if erasing operation, this address can be the arbitrary address (MassErase) of the arbitrary address (SectorErase) of sector or full Flash program memorizer；
(5) FCBEF being write 1, clear flag position, now Flash program memorizer formally starts operation；
(6) wait and read FSTATUS depositor; determine whether that protection zone erasing breaks rules (FPVIOL is 1) or Flash program storage operation breaks rules (FACCE is 1), if it occur that above mistake then needs to restart this operation；
(7) if FCCF is 1, it was shown that operated.This flag bit once writes automatic clear after FCMD upper.
In order to improve the speed of Flash program memory program, it is provided that burst mode programming (BurstProgram) order, perform burst programming condition have two:
(1) system needs at FCCF is before 1, and is writing commands after 1 at FCBEF, it is possible to continuously perform programming operation；
(2) address of next execution burstprogram is adjacent with current execution operation address, and is positioned at same Flash program memorizer Row, namely only has least-significant byte address different, and high 9 bit address are identical.One Flash program memorizer Row comprises 256 bytes.
If conditions above is satisfied by, then BurstProgram is adopted can significantly to reduce programming time.If the next address of Burstprogram is different Row, then programming time is common single byte programming time, and subsequent byte is programmed for burst mode, and the time reduces in a large number.
The idiographic flow of continuous programming of bursting is:
(1) writing commands, address, after data, FCBEF is reset, proceeds by burstprogram；
(2) being before 1 at FCCF, and be after 1 at FCBEF, writing new data, and again reset by FCBEF, system address adds 1 automatically；
(3) when FCCF is before 1, if system is no longer by clear for FCBEF 0, then system burstprogram terminates.
Situations below is considered as the access errors (AccessError) of Flash program feram memory: be before 1 at Flash program memory state command register idle marker FCBEF, writing address, data or order；Command register is written with illegal instruction；When MCU enters IDLE or STOP state, programming or erasable operation is had to be carrying out (operation simultaneously is abandoned).
From technique scheme it can be seen that the method have the advantages that
1, the method for designing for Flash program memory protection provided by the invention; respectively from memory space, erasable flow process, angle that pattern is different; do not increasing Flash program memorizer storage code element position; there is no the codec unit of complexity; by locality protection, Row control, safe mode synergism, complete the protection of Flash program memorizer with less cost.
2, locality protection function provided by the invention, has configurability, and optional Flash program memorizer Zone Full is protected, it is possible to protected by certain region of register configuration concrete Flash program memorizer.
3, programming Row control ByteProgram provided by the invention and erasing order Sectorerase and MassErase Row control; strictly control the effectiveness of erasable process; for being not intended to or having a mind to distort Flash program memory data content, there is efficient protective effect；In order to improve the speed of Flash program memory program, it is provided that burst mode programming (BurstProgram) order, and perform flow process.
4, safe mode provided by the invention mechanism, to the external protective barrier that Flash program memorizer provides, is the key opening Flash program memorizer, with the ground floor protection of the Flash program memorizer that shirtsleeve operation and structure realize.
5, this Flash program memory protection method for designing provided by the invention, can be widely used in microcontroller especially memory protection to the high application of reliability requirement.
Accompanying drawing explanation
Fig. 1 releases safe mode two ways；
Fig. 2 locality protection depositor is arranged and corresponding protection zone；
Fig. 3 erasing, programming execution process.
Detailed description of the invention
For making the object, technical solutions and advantages of the present invention clearly understand, below in conjunction with the instantiation of safe mode, locality protection and erasable Row control, and with reference to accompanying drawing, the present invention is described in more detail.
In a particular embodiment of the present invention, hardware platform adopts 8 MCU towards Body Control, and this platform adopts DW-8051 kernel, adopts 17 bit address buses, the mode of 8 bit data bus, carries out data transmission.
The embedded Flash program storage IP of GSMC it is integrated with in system, Flash program memory size is 128KB, meet extension application demand, this Flash program memorizer has following features: 128KB primary data array, with the depositor sector (NVRSector) of the redundant storage sector (Sector) of 512Byte and 2x512Byte；Each sector (Sector) 512B, each piece (Block) is 8 sectors 4KB altogether；Running voltage is 1.8V/5V, is internally integrated ChargePump electric charge pump, it is not necessary to external high pressure is powered；The erasable number of times in sector > 100,000 times；Data hold period > 100 years.
After sheet dispatches from the factory, Flash program memorizer does not comprise any content, it is necessary to the key message in Flash program memorizer is initialized, and these information have important function for the programming of user, locality protection, safeguard protection etc..Need to carry out the Flash program memory content of programming and address distribution is referred to table 1.
As it is shown in figure 1, being described in detail below about safe mode in this example:
First, after system reset, the value of security mode control depositor FPROT, updated by the content of registers in NVRI, wherein, SEC [1:0] position in depositor FPROT, the state of SEC [1:0]=2 ' b10 is non-secure states, and all the other states are safe condition；
If it follows that system is in non-secure states, by sfr access Flash program memorizer, now cannot successful access, jtag interface chip be in running status and for safe condition time, be not allowed into debugging mode.In the secure mode, only while resetting P3.7/DEBUG pin is placed in and low system could be placed in debugging mode.Need temporarily to release safe mode, just can complete first step operation.Concrete, user can be released by two ways or temporarily release safe mode:
(1) decruption key
User can pass through Peripheral Interface and input the key of 8 bytes continuously, and it is continuously written into FKEY depositor, these keys will compare with the ComparisonKey in Flash program memorizer, if coincide, SEC [1:0] becomes 2 ' b10, then can temporarily release safe condition, until reset next time.
If the KEYEN in FPROT depositor is 1, then above-mentioned mechanism is feasible, if being 0, then system does not allow key to release the mechanism of safe mode.The setting of ComparisonKey and SEC, is respectively positioned in the protection zone of Flash program memorizer, if locality protection mechanism is opened, then above content is unless wiped by full chip, otherwise all can not be modified.
(2) reprogramming
If the KEYEN in FPROT depositor is 0, system does not allow key to release the mechanism of safe mode, and at this moment system drags down DEBUG pin and enters debugging mode after can adopting reset, revises FPROT, cancels locality protection mechanism；Afterwards, full chip erasing is carried out by jtag interface；Carrying out reprogramming, burned Bootloader, NVRI, NVRII and ComparisonKey by JTAG, wherein SEC can be set to 2 ' b10 states according to user's request.FKEY register description is as shown in table 2.
As in figure 2 it is shown, this example also proposed the concrete scheme of a kind of locality protection, configuration Flash program memorizer protected field is set by depositor.After having Flash program memory access authority; locality protection provides protection further for Flash program memorizer specific region; prevent the data in Flash program memorizer from suffering unintentionally or the tampered region of malice is protected, non-protected areas just can only be carried out effectively erasing, programming operation.These protection zones are determined by FPROT depositor, and this depositor is copied to the register address space of SFR after the reset by the NVRII of Flash program memorizer.FPROT can not be revised by user program, and it is read-only not writeable depositor.NVRII register-bit last sector (sector) in Flash program feram memory, if any one region in Flash program memorizer is protected, then NVRII itself is also protected.The method wanting modifier area protected mode only has one: access FPROT depositor by JTAG mode; it is revised as whole Flash program memorizer to be all not protected; whole Flash program memorizer is wiped afterwards, again through jtag interface programming bootloader, NVRI, NVRII and comparisonkey by JTAG.Locality protection can be used to protect the critical data information of bootloader program and user.
Concrete, originally it is being described in detail below about locality protection in example:
This example region guard space is divided into 2 pieces, and depositor arranges and determined protective position all the time.Front 64K, protection domain is from initial protective position to 0x0_FFFF, and interval amplitude of variation is 8K；Rear 64K, protection domain includes front 64K plus from initial protective position to 0x1_FFFF.Following table gives the depositor of locality protection and arranges and corresponding locality protection scope.Locality protection scope is determined by FREGION depositor and FPS depositor, and depositor is replicated by the NVRII in Flash program memorizer after the reset, and user program is read-only not writeable to this depositor.
FREGION register description is as shown in table 3:
FPS depositor is as shown in table 4.
As shown in Figure 3; the erasing of this example, programming operation flow process include program command ByteProgram and erasing order Sectorerase and MassErase Row control; strictly control the effectiveness of erasable process; for being not intended to or having a mind to distort Flash program memory data content, there is efficient protective effect；In order to improve the speed of Flash program memory program, it is provided that burst mode programming (BurstProgram) order, and perform flow process.
Write FCMD order, this order is only possible for the instruction in table 5；
The program command ByteProgram and erasable order Sectorerase and MassErase of Flash program memorizer, these order execution processes are as follows:
First, writing FCLK depositor, this depositor will initialize after any reset, and only allows to arrange once, configures Flash program memory operation clock；Secondly, directly writing 1 removing any rub-out signal FPVIOL and FACCE, it is judged that in FSTATUS depositor, whether FCBEF is 1, if being 1, illustrating that instruction queue is empty, then first write FCMD order；Then the data write FDATA that will program, if to perform erasing operation, then this content of registers can be arbitrary value；Next, address is write FLADDR, FHADDR, and FADDR [16] is write FSTATUS depositor, if erasing operation, this address can be the arbitrary address (MassErase) of the arbitrary address (SectorErase) of sector or full Flash program memorizer；It follows that FCBEF is write 1, clear flag position, now Flash program memorizer formally starts operation；Next; wait and read FSTATUS depositor; determine whether that protection zone erasing breaks rules (FPVIOL is 1) or Flash program storage operation breaks rules (FACCE is 1), if it occur that above mistake then needs to restart this operation；Finally, if FCCF is 1, it was shown that operated.This flag bit once writes automatic clear after FCMD upper.
In order to improve the speed of Flash program memory program, it is provided that burst mode programming (BurstProgram) order, is originally being in example, and the idiographic flow of continuous programming of bursting is:
First, after writing commands, address, data, FCBEF is reset, proceeds by burstprogram；Secondly, being before 1 at FCCF, and be after 1 at FCBEF, writing new data, and again reset by FCBEF, system address adds 1 automatically；Finally, when FCCF is before 1, if system is no longer by clear for FCBEF 0, then system burstprogram terminates.
The specific embodiments of the invention that are only disclosed above, but protection scope of the present invention is not limited thereto, and the changes that any person skilled in the art can think of all should belong in protection scope of the present invention.
Claims (4)
1. a Flash program memory protection method for designing realizes with hardware, including:
Safe mode, determined by SEC [1:0] position in FPROT depositor, the state of SEC [1:0]=2 ' b10 is non-secure states, all the other states are safe condition, the content of this depositor can be covered by the content of registers in NVRI after the reset, and the content of this depositor can not be write by user program or revise；
Locality protection; determined by FPROT depositor; FPROT depositor is copied to the register address space of SFR after the reset by the NVRII of Flash program memorizer, if any one region in Flash program memorizer is protected, then NVRII itself is also protected；
Erasing, programming Row control, the program command ByteProgram and erasable order Sectorerase and MassErase that include Flash program memorizer perform process, if violating operating process, system can point out Flash program memory access errors.
2. method for designing according to claim 1, under described safe mode, in chip, Flash program memorizer can not be read by unauthorized channel, safe mode jtag interface is when chip is in running status and is safe condition, it is not allowed into debugging mode, in the secure mode, only while resetting P3.7/DEBUG pin is placed in and low system could be placed in debugging mode, decruption key can be passed through and reprogramming two ways releases safe mode.
3. method for designing according to claim 1; described locality protection scope is revisable; the method of modifier area protected mode only has one: access FPROT depositor by JTAG mode; it is revised as whole Flash program memorizer to be all not protected; whole Flash program memorizer is wiped afterwards, again through jtag interface programming bootloader, NVRI, NVRII and comparisonkey by JTAG.
4. method for designing according to claim 1, described erasing, programming Row control provide burst mode program command, it is stipulated that the condition of burst mode programming and the process of execution.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106650510A (en) * | 2016-12-26 | 2017-05-10 | 湖南国科微电子股份有限公司 | OTP memory data protection method and system and OTP controller |
| CN110069216A (en) * | 2019-04-09 | 2019-07-30 | 大唐微电子技术有限公司 | The management method and device of memory |
| CN112685802A (en) * | 2020-12-28 | 2021-04-20 | 青岛信芯微电子科技股份有限公司 | Flash chip reading control method and device and storage medium |
| CN116595594A (en) * | 2023-05-19 | 2023-08-15 | 无锡摩芯半导体有限公司 | FLASH safety control method based on UCB |
| CN116893858A (en) * | 2023-09-11 | 2023-10-17 | 西安智多晶微电子有限公司 | Configuration method for fast starting PCIe (peripheral component interconnect express) by FPGA (field programmable gate array) |
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2014
- 2014-12-04 CN CN201410728168.4A patent/CN105718208A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106650510A (en) * | 2016-12-26 | 2017-05-10 | 湖南国科微电子股份有限公司 | OTP memory data protection method and system and OTP controller |
| CN106650510B (en) * | 2016-12-26 | 2019-10-08 | 湖南国科微电子股份有限公司 | A kind of otp memory data guard method, system and OTP controller |
| CN110069216A (en) * | 2019-04-09 | 2019-07-30 | 大唐微电子技术有限公司 | The management method and device of memory |
| CN112685802A (en) * | 2020-12-28 | 2021-04-20 | 青岛信芯微电子科技股份有限公司 | Flash chip reading control method and device and storage medium |
| CN112685802B (en) * | 2020-12-28 | 2022-07-01 | 青岛信芯微电子科技股份有限公司 | Flash chip reading control method and device and storage medium |
| CN116595594A (en) * | 2023-05-19 | 2023-08-15 | 无锡摩芯半导体有限公司 | FLASH safety control method based on UCB |
| CN116893858A (en) * | 2023-09-11 | 2023-10-17 | 西安智多晶微电子有限公司 | Configuration method for fast starting PCIe (peripheral component interconnect express) by FPGA (field programmable gate array) |
| CN116893858B (en) * | 2023-09-11 | 2023-12-12 | 西安智多晶微电子有限公司 | Configuration method for fast starting PCIe (peripheral component interconnect express) by FPGA (field programmable gate array) |
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