CN105717526A - Carrier phase cycle slip inhibition method based on phase error amplitude-limiting processing - Google Patents

Carrier phase cycle slip inhibition method based on phase error amplitude-limiting processing Download PDF

Info

Publication number
CN105717526A
CN105717526A CN201610134546.5A CN201610134546A CN105717526A CN 105717526 A CN105717526 A CN 105717526A CN 201610134546 A CN201610134546 A CN 201610134546A CN 105717526 A CN105717526 A CN 105717526A
Authority
CN
China
Prior art keywords
phase
phase error
cycle slip
amplitude limiter
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201610134546.5A
Other languages
Chinese (zh)
Other versions
CN105717526B (en
Inventor
肖志斌
唐小妹
马春江
彭竞
雍玲
黄龙
楼生强
王勇
刘哲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hunan Zhongdian Xinghe Electronics Co ltd
Original Assignee
National University of Defense Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National University of Defense Technology filed Critical National University of Defense Technology
Priority to CN201610134546.5A priority Critical patent/CN105717526B/en
Publication of CN105717526A publication Critical patent/CN105717526A/en
Application granted granted Critical
Publication of CN105717526B publication Critical patent/CN105717526B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/35Constructional details or hardware or software details of the signal processing chain
    • G01S19/37Hardware or software details of the signal processing chain
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/24Acquisition or tracking or demodulation of signals transmitted by the system
    • G01S19/29Acquisition or tracking or demodulation of signals transmitted by the system carrier including Doppler, related

Landscapes

  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

The invention provides a carrier phase cycle slip inhibition method based on phase error amplitude-limiting processing. According to main factors causing carrier phase cycle slip, a carrier wave tracking loop easily produces phase jump when a tracking loop produces dramatical phase jitter or concentrated emergence of the same phase deviations of multiple symbols in a short time. According to the factors causing the phase cycle slip, phase errors output by a phase discriminator can be processed in the carrier wave tracking loop. Large phase jitter and the phase deviations of the same continuous symbols can be avoided by conducting amplitude limiting on instantaneous phase discrimination errors and accumulation values of phase discrimination errors, and accordingly the occurrence probability of the phase cycle slip of the loop is can be reduced. Compared with a traditional carrier wave tracking method, the occurrence probability of the phase cycle slip of the carrier wave tracking loop can be reduced by 67% under the condition that the dynamic conditions of the loop are not considered, and the occurrence probability of the phase cycle slip of the carrier wave tracking loop can be reduced by 38% under the condition that the Doppler frequency of input signals is constant.

Description

A kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing
Technical field
The invention belongs to field of navigation technology, particularly relate to a kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing, it can be used in satellite navigation signals receiver or other kinds of band spread receiver.
Background technology
In high-precision receiver, position frequently with carrier-phase measurement.Carrier phase cycle slip is one of key factor affecting carrier-phase measurement tracking accuracy.For general high-precision receiver, the certainty of measurement of carrier phase can reach centimetre even grade, but, the carrier phase cycle slip of a week just can make the deviation that carrier-phase measurement produces about 20cm.In order to reduce the impact on carrier-phase measurement of the carrier phase cycle slip, it is necessary for the lane in carrier-phase measurement is jumped into row process.
The cycle slip impact on carrier phase measurement can be reduced by carrier-phase measurement being carried out detection and reparation for cycle slips, but this method is easily subject to receiver dynamically and the impact of satellite, receiver clock-offsets, and when cycle-skipping number is less or cycle-skipping frequently occurs, its treatment effect is unsatisfactory.In order to make up the deficiency that current cycle-slip detection and repair algorithm exists, it is necessary in the carrier tracking loop generating carrier-phase measurement, reduce the probability that phase place cycle-skipping occurs.
Summary of the invention
It is an object of the invention to provide a kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing, it is intended to when inconspicuous increase operand, reduce the probability of high-precision receiver carrier phase generation cycle slip.
The basic ideas of the present invention are: according to the principal element causing carrier phase cycle slip, when track loop occur at short notice significantly phase jitter or concentrate the multiple symbols occurred identical phase deviation time, carrier tracking loop is susceptible to phase hit.The factor of phase place cycle slip is caused, it is possible in carrier tracking loop, the phase error of phase discriminator output is processed according to these.By the aggregate-value of phase demodulation error and phase demodulation error is carried out amplitude limit, it is possible to avoid big phase jitter and continuously with the phase deviation of symbol, thus reducing the probability of loop generation phase cycle slip.
The technical scheme is that a kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing, specifically include following step:
The first step, builds carrier tracking loop
Described carrier tracking loop includes phase discriminator, instantaneous phase error amplitude limiter, phase error accumulation effect value amplitude limiter, loop filter and voltage controlled oscillator, the input of phase discriminator is the input signal of carrier tracking loop, the outfan of phase discriminator is connected to instantaneous phase error amplitude limiter, the outfan of instantaneous phase error amplitude limiter connects phase error accumulation effect value amplitude limiter, the outfan linkloop wave filter of phase error accumulation effect value amplitude limiter, the outfan of loop filter connects voltage controlled oscillator, and the outfan feed back input of voltage controlled oscillator is to phase discriminator;
Second step, instantaneous phase error amplitude limit
Input signal ui (t) being sent into phase discriminator and carries out phase demodulation, the phase error of phase discriminator output is sent into instantaneous phase error amplitude limiter and is carried out amplitude limiting processing;
Assume that the phase demodulation interval of phase discriminator is for [-φ, φ], when the phase error of t phase discriminator output is uaiTime (t), it is carried out the output u after instantaneous phase error amplitude limiting processingao(t) be:
u a o ( t ) = u a i ( t ) - K 1 * &Phi; u a i > K 1 * &Phi; u a i ( t ) , | u a i ( t ) | < K 1 * &Phi; u a i ( t ) + K 1 * &Phi; , u a i ( t ) < - K 1 * &Phi;
K in above formula1Represent the limiting figure of instantaneous phase error amplitude limiter;
3rd step, phase error accumulation effect value amplitude limit
Output result u with instantaneous phase error amplitude limiteraoT () is as the input u of phase error accumulation effect value amplitude limiterbi(t), then the output u of phase error accumulation effect value amplitude limiterbo(t) be:
Wherein, TLAnd K2Respectively time of integration of phase error accumulation effect value amplitude limiter and limiting figure;
4th step, it is determined that COEFFICIENT K1、K2And TL
Defining average cycle slip time T is the average operating time that loop carrier phase error aggregate-value is equal to during 2 φ needed for loop, and average cycle slip probability P is the inverse of average cycle slip time T.To amplitude limiter parameter K1∈[1,2]、K1∈[0,1]、TL∈ [1,20] carries out traveling through (parameter value here only retains one decimal place), it is thus achieved that at different parameters K1、K2And TLThe carrier tracking loop average cycle slip time under combination condition, and take the satisfied average cycle slip time maximum time, corresponding amplitude limiter coefficient is K in this method1、K2And TLValue.
The invention has the beneficial effects as follows: by instantaneous phase error and phase error accumulation effect value are carried out amplitude limit so that the probability of carrier loop track loop generation cycle slip can effectively reduce.Additionally, the whole implementation process in the present invention all only relates to some simple arithmetical operations, it is not related to invert, the complex calculation such as feature decomposition, therefore the present invention realizes simply, and operand is little, to insensitive for noise, and implement and be convenient to, can be directly used for traditional carrier tracking loop.
Accompanying drawing explanation
Fig. 1 is the flow chart of the carrier phase cycle slip suppressing method based on phase error amplitude limit that invention provides
Fig. 2 is carrier wave ring phase place complete cycle saltus step schematic diagram
Fig. 3 is restriction phase error amplitude schematic diagram
Fig. 4 is the structural design block diagram of phase error amplitude limiting processing
Fig. 5 is that the loop average cycle slip time is with instantaneous phase error amplitude limiter COEFFICIENT K1Change curve
Fig. 6 is that the loop average cycle slip time is with phase error accumulation effect value amplitude limiter COEFFICIENT K2Change curve
Fig. 7 is that the loop average cycle slip time is with the phase error accumulation effect value amplitude limiter T time of integrationLChange curve
Detailed description of the invention
Below in conjunction with accompanying drawing, the carrier phase cycle slip suppressing method based on phase error amplitude limiting processing provided by the invention is described in detail.
Fig. 1 is the flow chart of the carrier phase cycle slip suppressing method based on phase error amplitude limiting processing provided by the present invention.
The first step: build carrier tracking loop
Described carrier tracking loop route carrier phase descriminator, phase error amplitude limiter, loop filter and voltage controlled oscillator four part composition, and phase error amplitude limiter includes again instantaneous phase error amplitude limiter and phase error accumulation effect value amplitude limiter two parts.The input of phase discriminator is the signal input part of carrier tracking loop, the outfan of phase discriminator is connected to instantaneous phase error amplitude limiter, the outfan of instantaneous phase error amplitude limiter connects phase error accumulation effect value amplitude limiter, the outfan linkloop wave filter of phase error accumulation effect value amplitude limiter, the outfan of loop filter connects voltage controlled oscillator, and the outfan feed back input of voltage controlled oscillator is to phase discriminator.
Second step: instantaneous phase error amplitude limit
Assume that the phase demodulation interval of phase-shift discriminator is for [-φ, φ], when the phase error of t phase discriminator output is uaiTime (t), it is carried out the output u after instantaneous phase error amplitude limiting processingao(t) be:
u a o ( t ) = u a i ( t ) - K 1 * &Phi; u a i > K 1 * &Phi; u a i ( t ) , | u a i ( t ) | < K 1 * &Phi; u a i ( t ) + K 1 * &Phi; , u a i ( t ) < - K 1 * &Phi;
K in above formula1Represent the limiting figure of instantaneous phase error amplitude limiter.
3rd step: phase error accumulation effect value amplitude limit
Output result u with instantaneous phase error amplitude limiteraoT () is as the input u of phase error accumulation effect value amplitude limiterbi(t), then the output u of accumulation amplitude limiterbo(t) be:
Wherein, K2And K2Respectively time of integration of accumulation amplitude limiter and limiting figure.
4th step: determine COEFFICIENT K1、K2And TL
Defining average cycle slip time T is the average operating time that loop carrier phase error aggregate-value is equal to during 2 Φ needed for loop, and average cycle slip probability P is the inverse of average cycle slip time T.By to different amplitude limiter COEFFICIENT K1、K2With the T time of integrationLThe lower carrier tracking loop average cycle slip time emulates, according to the phase place cycle slip probability that carrier tracking loop to reach, it is determined that the value of each coefficient of carrier tracking loop.
Fig. 2 is the schematic diagram that phase hit occurs in carrier wave ring, and wherein state A and state B is point of safes, also referred to as equilibrium point;State C is uneven point, also referred to as saddle point;State D is intermediateness.Hypothesis loop is initial is in state A, and owing to being subject to the impact of certain bigger noise dither, ring routing state A transfers to state D, but state D is not a stable state, so, loop can converge to the state B that another one is stable gradually with regard to near-earth.The loop that should have been at equilibrium point A transfers to another equilibrium point B in one or several cycle of interval for a certain reason, and corresponding phase tracking error then there occurs the saltus step of integer multiples.Therefore, according to above-mentioned analysis, cause the factor of carrier tracking loop phase place complete cycle saltus step to can be largely classified into short time significantly phase error jitter and the two kinds of factors of same symbol phase error occurred continuously.
Fig. 3 is the schematic diagram that phase error amplitude is limited, and wherein abscissa is the size of phase error, and vertical coordinate is the SIN function of phase error.Hypothesis loop is in equilibrium point A, below the amplitude of phase error single change is limited, and its midpoint E is the lower bound of error span change, and some F is the upper bound of amplitude of variation.Common design make lower bound E and upper bound F keep symmetry, i.e. | | E-A | |=| | F-A | | about equilibrium point A.If PEFThere is not the probability (the cycle slip probability said here is it can be appreciated that loop jumps to the probability of equilibrium point B from equilibrium point A) of phase place complete cycle saltus step for loop, when EF value more hour, then there is the P of phase hitEFValue is more big.
By the amplitude limit of phase error, it is possible to suppress the phase place complete cycle saltus step caused by minority significantly phase error, but for the phase place cycle slip that multiple same symbol phase errors cause continuously, it is necessary to time TLInterior phase error accumulated value carries out amplitude limit.Wherein it is desired to select the suitable T time of integration for different application sceneL, as the T time of integrationLWhen value is excessive, then loop dynamic performance declines;As the T time of integrationLWhen value is too small, then can not effectively detect again phase place cycle slip.
Fig. 4 is the structural design block diagram of context of methods, with aeronautical satellite baseband signal uiT () is as the input of carrier tracking loop, after carrier phase descriminator, instantaneous phase error amplitude limiter, phase error accumulation effect value amplitude limiter, loop filter and voltage controlled oscillator, feed back to descriminator, form the carrier tracking loop described in this method.The input of phase discriminator is the signal input part of carrier tracking loop, the outfan of phase discriminator is connected to instantaneous phase error amplitude limiter, the outfan of instantaneous phase error amplitude limiter connects phase error accumulation effect value amplitude limiter, the outfan linkloop wave filter of phase error accumulation effect value amplitude limiter, the outfan of loop filter connects voltage controlled oscillator, and the outfan feed back input of voltage controlled oscillator is to phase discriminator.
Fig. 5 to Fig. 7 is the result utilizing the embodiment of the invention to carry out emulation experiment.The basic parameter of emulation experiment is provided that
Input Signal-to-Noise is-12dB, and IF-FRE is 100Hz, and sample rate is 1000Hz;Carrier phase descriminator adopts two quadrant arc tangent descriminator;Loop filter adopts second order loop, and noise bandwidth is 5Hz, and damped coefficient is 2;The loop renewal time is 1ms, and single emulation duration is 50s, and simulation times is 3000 times.
Fig. 5 is that the loop average cycle slip time is with instantaneous phase error amplitude limiter COEFFICIENT K1Change curve.K in Fig. 51The situation of=1 is equivalent to and phase error is not carried out amplitude limit, when along with limiting figure K1Increase, average cycle slip time of loop increases, and namely occurs the probability of cycle slip to reduce, works as K1When=1.6, the loop average cycle slip time reaches maximum, namely should take instantaneous phase error amplitude limiter COEFFICIENT K under this simulated conditions1It is 1.6.
Fig. 6 is that the loop average cycle slip time is with phase error accumulation effect value amplitude limiter COEFFICIENT K2Change curve.K in Fig. 62The situation of=1 is equivalent to and phase error is not carried out amplitude limit, by simulation result it is found that work as K2When=0.8, the loop average cycle slip time reaches maximum, namely should take instantaneous phase error amplitude limiter COEFFICIENT K under this simulated conditions2It is 0.8.
Fig. 7 is that the loop average cycle slip time is with the phase error accumulation effect value amplitude limiter T time of integrationLChange curve.T in Fig. 7LThe situation of=1ms is equivalent to instantaneous phase amplitude limiter, by simulation result it is found that work as TLDuring=4ms, the loop average cycle slip time reaches maximum, namely should take the instantaneous phase error amplitude limiter T time of integration under this simulated conditionsLFor 4ms.
In sum; although the present invention is disclosed above with preferred embodiment; so it is not limited to the present invention; any those of ordinary skill in the art; without departing from the spirit and scope of the present invention; when doing various change and retouching, therefore protection scope of the present invention ought be as the criterion depending on the scope that claims define.

Claims (1)

1. the carrier phase cycle slip suppressing method based on phase error amplitude limiting processing, it is characterised in that comprise the following steps:
The first step, builds carrier tracking loop
Described carrier tracking loop includes phase discriminator, instantaneous phase error amplitude limiter, phase error accumulation effect value amplitude limiter, loop filter and voltage controlled oscillator, the input of phase discriminator is the signal input part of carrier tracking loop, the outfan of phase discriminator is connected to instantaneous phase error amplitude limiter, the outfan of instantaneous phase error amplitude limiter connects phase error accumulation effect value amplitude limiter, the outfan linkloop wave filter of phase error accumulation effect value amplitude limiter, the outfan of loop filter connects voltage controlled oscillator, and the outfan feed back input of voltage controlled oscillator is to phase discriminator;
Second step, instantaneous phase error amplitude limit
Will input signal uiT () is sent into phase discriminator and is carried out phase demodulation, the phase error of phase discriminator output is sent into instantaneous phase error amplitude limiter and carried out amplitude limiting processing;
Assume that the phase demodulation interval of phase discriminator is for [-Φ, Φ], when the phase error of t phase discriminator output is uaiTime (t), it is carried out the output u after instantaneous phase error amplitude limiting processingao(t) be:
u a o ( t ) = u a i ( t ) - K 1 * &Phi; u a i ( t ) > K 1 * &Phi; u a i ( t ) , | u a i ( t ) | < K 1 * &Phi; u a i ( t ) + K 1 * &Phi; , u a i ( t ) < - K 1 * &Phi;
K in above formula1Represent the limiting figure of instantaneous phase error amplitude limiter;
3rd step, phase error accumulation effect value amplitude limit
Output result u with instantaneous phase error amplitude limiteraoT () is as the input u of phase error accumulation effect value amplitude limiterbi(t), then the output u of phase error accumulation effect value amplitude limiterbo(t) be:
Wherein, TLAnd K2Respectively time of integration of phase error accumulation effect value amplitude limiter and limiting figure;
4th step, it is determined that COEFFICIENT K1、K2And TL
Defining average cycle slip time T is the average operating time that loop carrier phase error aggregate-value is equal to during 2 Φ needed for loop, and average cycle slip probability P is the inverse of average cycle slip time T;
To amplitude limiter parameter K1∈[1,2]、K1∈[0,1]、TL∈ [1,20] travels through, it is thus achieved that at different parameters K1、K2And TLThe carrier tracking loop average cycle slip time under combination condition, and take the satisfied average cycle slip time maximum time, corresponding amplitude limiter coefficient is K in carrier tracking loop1、K2And TLValue.
CN201610134546.5A 2016-03-10 2016-03-10 A kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing Active CN105717526B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610134546.5A CN105717526B (en) 2016-03-10 2016-03-10 A kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610134546.5A CN105717526B (en) 2016-03-10 2016-03-10 A kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing

Publications (2)

Publication Number Publication Date
CN105717526A true CN105717526A (en) 2016-06-29
CN105717526B CN105717526B (en) 2017-12-19

Family

ID=56157549

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610134546.5A Active CN105717526B (en) 2016-03-10 2016-03-10 A kind of carrier phase cycle slip suppressing method based on phase error amplitude limiting processing

Country Status (1)

Country Link
CN (1) CN105717526B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106526635A (en) * 2016-12-29 2017-03-22 中国人民解放军国防科学技术大学 GNSS signal carrier tracking and navigation solution tight combination filtering method
CN106597495A (en) * 2016-12-23 2017-04-26 湖南北云科技有限公司 Pessimistic-counter-based satellite navigation loop parameter amplitude limiter arranging apparatus
CN106873008A (en) * 2016-12-21 2017-06-20 湖南北云科技有限公司 A kind of satellite navigation half cycle saltus step restraining device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101334458A (en) * 2008-06-03 2008-12-31 电子科技大学 Satellite navigation positioning carrier phase cycle slip rehabilitation method
US20100299066A1 (en) * 2009-05-20 2010-11-25 Gang Kevin Liu INS based GPS carrier phase cycle slip detection and repairing
CN102439928A (en) * 2009-05-29 2012-05-02 汤姆森特许公司 Fast cycle slip detection and correction

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101334458A (en) * 2008-06-03 2008-12-31 电子科技大学 Satellite navigation positioning carrier phase cycle slip rehabilitation method
US20100299066A1 (en) * 2009-05-20 2010-11-25 Gang Kevin Liu INS based GPS carrier phase cycle slip detection and repairing
CN102439928A (en) * 2009-05-29 2012-05-02 汤姆森特许公司 Fast cycle slip detection and correction

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
王建辉: "一种延长弱信号环境下载波环平均周跳时间的方法", 《第一届中国卫星导航学术年会论文集》 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106873008A (en) * 2016-12-21 2017-06-20 湖南北云科技有限公司 A kind of satellite navigation half cycle saltus step restraining device
CN106873008B (en) * 2016-12-21 2019-09-10 湖南北云科技有限公司 A kind of satellite navigation half cycle jump inhibition device
CN106597495A (en) * 2016-12-23 2017-04-26 湖南北云科技有限公司 Pessimistic-counter-based satellite navigation loop parameter amplitude limiter arranging apparatus
CN106597495B (en) * 2016-12-23 2018-12-18 湖南北云科技有限公司 A kind of satellite navigation loop parameter limiter setting device based on pessimistic counter
CN106526635A (en) * 2016-12-29 2017-03-22 中国人民解放军国防科学技术大学 GNSS signal carrier tracking and navigation solution tight combination filtering method
CN106526635B (en) * 2016-12-29 2019-02-22 中国人民解放军国防科学技术大学 A kind of filtering method of GNSS signal carrier track and navigation calculation tight integration

Also Published As

Publication number Publication date
CN105717526B (en) 2017-12-19

Similar Documents

Publication Publication Date Title
US10649095B2 (en) Method and apparatus for joint data-pilot tracking of navigation signal
CN105717526A (en) Carrier phase cycle slip inhibition method based on phase error amplitude-limiting processing
US9954561B2 (en) Systems and methods for parallelizing and pipelining a tunable blind source separation filter
CN106959439A (en) The strong interference suppression method and system of automobile frequency modulated continuous wave radar
CN106656168B (en) Clock data recovery device and method
CN105093243A (en) GNSS carrier loop circuit tracking method based on stochastic resonance algorithm
CN102780444A (en) Motor stator flux linkage estimating method
CN102621561A (en) Loop self-regulation method of satellite navigation receiver
Lopes et al. Adaptive carrier tracking for mars to earth communications during entry, descent, and landing
CN104199059A (en) Doppler self-compensation method of receiver tracking loop based on self-adaptive alpha-beta filter
CN109581432A (en) A kind of satellite-based navigation receiver tracking loop circuit and its processing method
CN104990548B (en) Processing method based on the dynamic pulse star signal that epoch converts into
CN109901201B (en) Beidou rotation self-adaptive carrier tracking system and method thereof
CN105516041A (en) Adaptive digital demodulation system at low signal to noise ratio
CN105891855B (en) High dynamic GPS receiver carrier wave tracing method based on fuzzy control
CN104199063B (en) A kind of blind frequency discriminator processing method based on cross product algorithm
CN104407362A (en) Carrier wave phase-locked loop based on four-path signal processing
CN105425257A (en) Tracking method and tracking system for high dynamic GNSS carrier wave signals
NL7908110A (en) DEVICE FOR RECOVERING A CLOCK SIGNAL.
CN104868909A (en) Floating frequency and phase lock loop based on voltage quadrature resonator (QR) and measuring method thereof
Shachi et al. Coherent BPSK demodulator using Costas loop and early-late gate synchronizer
CN106597495B (en) A kind of satellite navigation loop parameter limiter setting device based on pessimistic counter
CN107064864A (en) Doppler direction finding method
CN104242928B (en) Frequency locking detector processing method based on cross product algorithm in frequency locking loop
Peters et al. A software defined radio based method for accurate frequency estimation for space domain awareness in real-time

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CP01 Change in the name or title of a patent holder
CP01 Change in the name or title of a patent holder

Address after: 410073 Hunan province Changsha Kaifu District, Deya Road No. 109

Patentee after: National University of Defense Technology

Address before: 410073 Hunan province Changsha Kaifu District, Deya Road No. 109

Patentee before: NATIONAL University OF DEFENSE TECHNOLOGY

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20220629

Address after: 410000 block a, building 1, Changsha National Security Industrial Park, No. 699 Qingshan Road, Yuelu District, Changsha City, Hunan Province

Patentee after: Hunan Institute of advanced technology

Address before: 410073 Hunan province Changsha Kaifu District, Deya Road No. 109

Patentee before: National University of Defense Technology

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20221125

Address after: Building 4, Hunan Military civilian Integration Science and Technology Innovation Industrial Park, No. 699, Qingshan Road, Changsha Hi tech Development Zone, 410000, Hunan

Patentee after: Hunan Zhongdian Xinghe Electronics Co.,Ltd.

Address before: 410000 block a, building 1, Changsha National Security Industrial Park, No. 699 Qingshan Road, Yuelu District, Changsha City, Hunan Province

Patentee before: Hunan Institute of advanced technology