CN105653785A - Radar clutter simulation method, device and system - Google Patents

Abstract

The invention discloses a radar clutter simulation method, device and system, which relates to radar production and test. Software and hardware are combined, so that huge manpower or material resources do not need to be consumed, resources are saved, and in addition, radar clutter simulation accuracy is greatly improved on the basis of feasibility increase. The radar clutter simulation method has the following technical scheme key points: configuring the related hardware of a digital signal processor; utilizing a ZMNL (Zero Memory Nonlinearity) method to simulate clutter by a simulator, wherein the amplitude distribution of the clutter is logarithmic normal distribution, and the power spectrum of the clutter is of a Gaussian type; compiling a program, and inputting the program into the digital signal processor through the simulator; obtaining the theoretical data of the clutter amplitude data and a power spectral number; obtaining the simulation data of the clutter amplitude data and the power spectral number; independently carrying out plotting on the theoretical data and the simulation data; and comparing a theoretical data map with the clutter amplitude data and a simulation data map, and verifying a clutter simulation result. The radar clutter simulation method, device and system is mainly used for radar clutter simulation.

Description

A kind of radar clutter simulation method, Apparatus and system

Technical field

The present invention relates to radar and produce and field tests, relate in particular to a kind of radar clutter simulation method, device andSystem.

Background technology

Have very important effect at current military affairs, civil middle radar, radar is that one utilizes electromagnetic wave to visitSurvey the electronic equipment of target location, utilize the electromagnetic wave of transmitting target is irradiated and receive its echo, obtainTarget is to information such as the distance of electromagnetic wave launch point, range rate (radial velocity), orientation, height. ButBecause radar is operated in down the state of looking, target echo is usually submerged in very strong noise signal, to target detectionForm great threat, therefore, need to study fully the noise performance in radar operating environment.The in the situation that of actual measurement high cost, provide clutter data by Computer Simulation, there is very important valencyValue: on the one hand, be conducive to the interactional physical process of cognitive electromagnetic wave and natural environment, radar clutter producesMechanism, promote the research of Clutter suppression algorithm; On the other hand, obtain a large amount of different thunders by simulation meansReach the clutter data under systematic parameter, different natural environmental condition, will effectively make up the deficiency of experimental data,Play a significant role at aspects such as radar system Performance Evaluation, signal processing algorithm checkings. Therefore, research aircraft thunderThe method that reaches clutter simulation is of great significance in theory and practiceThe method that prior art is carried out radar clutter simulation is generally outfield experiments simulation: obtain by outfield simulated experimentTo detailed radar clutter information.

Above-mentioned outfield experiments simulation obtains detailed radar clutter information by outfield simulated experiment, not only needsExpend huge human and material resources, and be easily subject to the impact of weather conditions.

Summary of the invention

A kind of radar clutter simulation method, Apparatus and system that embodiments of the invention provide, by software and hardwareCombine, not only need not expend huge human and material resources, saved resource, and at the base that increases feasibilityOn plinth, greatly improve the accuracy of radar clutter simulation.

For achieving the above object, embodiments of the invention adopt following technical scheme:

First aspect present invention provides a kind of radar clutter simulation method, comprising:

Digital signal processor related hardware configuration: described hardware configuration comprises described digital signal processor storageSpatial division, described digital signal processor program section are distributed, described digital signal processor operating frequency is setAnd development environment configuration;

Utilize ZMNL method, emulator is that logarithm normal distribution, power spectrum are Gaussian to amplitude distributionClutter carries out emulation;

Coding, described program process emulator supplied with digital signal processor: described program is by computer eventuallyEnd is write;

Obtain the gross data of clutter amplitude data and power spectrum number;

Obtain the emulated data of clutter amplitude data and power spectrum number: described emulated data is exported by described emulator;Gross data to described clutter amplitude data and power spectrum number and described clutter amplitude data and power spectrum numberEmulated data is mapped respectively;

Gross data figure to described clutter amplitude data and power spectrum number and described clutter amplitude data and powerThe emulated data figure of spectrum number is analyzed, and checking clutter simulation result, to complete radar clutter simulation.

In conjunction with first aspect, in a kind of possible embodiment, described radar clutter simulation method, also bagDraw together:

Described terminal is debugged described digital signal processor by CCS software, to readDescribed digital signal processor real-time data and the each components and parts real-time status of detection.

Second aspect present invention provides a kind of radar clutter simulation device, comprising:

Dispensing unit, configures for digital signal processor related hardware; Described hardware configuration comprises described numeralSignal processor memory space is divided, described digital signal processor program section is distributed, described Digital Signal ProcessingDevice operating frequency is set and development environment configuration;

Simulation unit, utilizes ZMNL method, and emulator is logarithm normal distribution, power spectrum to amplitude distributionFor the clutter of Gaussian carries out emulation;

Write unit, for coding, described program is through emulator supplied with digital signal processor; DescribedProgram is write by terminal;

The first acquiring unit, for obtaining the gross data of clutter amplitude data and power spectrum data;

Second acquisition unit, for obtaining the emulated data of clutter amplitude data and power spectrum number; Described emulation numberAccording to being exported by described emulator;

Mapping unit, for the gross data to described clutter amplitude data and power spectrum number and described clutter amplitudeThe emulated data of data and power spectrum number is mapped respectively;

Authentication unit, for the gross data figure to described clutter amplitude data and power spectrum number and described clutter widthThe emulated data figure of degrees of data and power spectrum number is analyzed, and checking clutter simulation result, to complete thunderReach clutter simulation.

In conjunction with second aspect, in a kind of possible embodiment, described radar clutter simulation device, also bagDraw together:

Debugging unit, carries out described digital signal processor by CCS software for described terminalDebugging, to read described digital signal processor real-time data and detect each components and parts real-time status.

Third aspect present invention provides a kind of radar clutter simulation system, comprising: digital signal processor, emulationDevice and terminal;

Described digital signal processor is the hardware configuration of system;

Described emulator connects described digital signal processor and described terminal, for to amplitude distribution beingThe clutter that logarithm normal distribution, power spectrum are Gaussian carries out emulation;

Described terminal is for coding, gross data to described clutter amplitude data and power spectrum numberMap respectively with the emulated data of described clutter amplitude data and power spectrum number and to described clutter amplitude numberAccording to carrying out with the gross data figure of power spectrum number and the emulated data figure of described clutter amplitude data and power spectrum numberComparative analysis, checking clutter simulation result, to complete radar clutter simulation.

A kind of radar clutter simulation method, Apparatus and system that the embodiment of the present invention provides, comprising: data signalThe configuration of processor related hardware; Utilize ZMNL method, emulator to amplitude distribution be logarithm normal distribution,Power spectrum is that the clutter of Gaussian carries out emulation; Coding, program is through the processing of emulator supplied with digital signalDevice; Obtain the gross data of clutter amplitude data and power spectrum number; Obtain clutter amplitude data and power spectrum numberEmulated data; Gross data and emulated data are mapped respectively; Gross data figure and described clutter amplitude numberAccording to being analyzed with emulated data figure, checking clutter simulation result, than prior art, the present invention willSoftware and hardware combines, and not only need not expend huge human and material resources, has saved resource, and is increasingOn the basis of feasibility, greatly improve the accuracy of radar clutter simulation.

Brief description of the drawings

In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, required in below describing embodimentThe accompanying drawing using is briefly described.

Fig. 1 is a kind of radar clutter simulation method flow schematic diagram in the embodiment of the present invention 1;

Fig. 2 is a kind of radar clutter simulation method flow schematic diagram in the embodiment of the present invention 2;

Fig. 3 is a kind of radar clutter simulation installation composition schematic diagram in the embodiment of the present invention 3;

Fig. 4 is a kind of radar clutter simulation system composition schematic diagram in the embodiment of the present invention 4;

Fig. 5 is a kind of radar clutter simulation system finished product schematic diagram in the embodiment of the present invention 4;

Fig. 6 is the schematic diagram of the emulator chosen in a kind of radar clutter simulation method in the embodiment of the present invention 1;

Fig. 7 is development environment schematic diagram in a kind of radar clutter simulation method in the embodiment of the present invention 1;

Fig. 8 be in the embodiment of the present invention 2 in a kind of radar clutter simulation method clutter amplitude distribution comparing result showIntention;

Fig. 9 is clutter power spectrum comparing result signal in a kind of radar clutter simulation method in the embodiment of the present invention 2Figure.

Detailed description of the invention

Below in conjunction with the accompanying drawing in the embodiment of the present invention, to the technical scheme in the embodiment of the present invention carry out clear,Intactly describe. Obviously, described embodiment is only the present invention's part embodiment, instead of wholeEmbodiment. Based on the embodiment in the present invention, those of ordinary skill in the art are not making before creative workPut obtained every other embodiment, all belong to the scope of protection of the invention.

Embodiment 1

The embodiment of the present invention provides a kind of radar clutter simulation method, as shown in Figure 1, comprising:

101, digital signal processor related hardware configuration; Described hardware configuration comprises described Digital Signal ProcessingDevice memory space is divided, described digital signal processor program section is distributed, described digital signal processor work frequencyRate is set and development environment configuration.

Wherein, digital signal processor (digitalsignalprocessing, DSP) is used the side of numerical computationsThe theory and technology that formula is processed signal. Model, type etc. that the present invention is concrete to digital information processorChoose and do not do any restriction, the side of choosing that can realize the same or similar function of digital signal processor of the present inventionFormula, choose result all within protection scope of the present invention. Below only choose with the one of digital signal processorMay carry out simple explanation for example. For example, choose great Xiang 5509A development board as digital signal processor,This development board adopts TMS320VC5509A fixed-point processor, and dominant frequency is 200MHz, has high-performance, lowThe characteristics such as power consumption, development board has extended out the SDRAM of 4M16 position, and be integrated with MMC/SD card interface,The Audio COBBAIF of AC97 standard, standard USBB type interface, emulator jtag interface, 10M withThe key-press input that too network interface, CPLD detect, 8 LED that driven by the GPIO of VC5509A indicateLamp and complete bus expansion.

Wherein, DSP memory space is divided: the memory space of VC5509A chip adopts the unified volume of program/dataThe access method of location, all the memory space of 16M byte or 8M word is divided into 128 homepages (0～127),Each homepage is 64K word. Front 192 bytes (000000h～0000BFh) of homepage 0 or 96It is shared that word (000000h～00005Fh) is stored device mapping register (MMR), and user can not use.VC5509A (PGE encapsulation) has the interior storage resources of sheet of 160K word, wherein has 128K word RAM and 32KWord ROM, in the RAM of 128K word, DARAM is 32K word, SARAM is 96K word. Outside expansionExhibition memory space is by CE[0:3] be divided into 4 parts, every part can be supported synchronous or asynchronous memory type.

The memory space of DSP must be mapped on corresponding physical storage and could use, and is not mapped to physicsMemory space on memory is out of use, and linker can not put into any program the not storage sky of configurationBetween, so the available memory space that need to have dsp system is stated. While is due to the volume of DSPThe compiling result of translating device is no-fix, and DSP does not have operating system to locate run time version, each user's designThe configuration of dsp system be also not quite similar, therefore need the installation site of user oneself definition code, aboveComplete by cmd file (being again linker command file). Wherein, cmd file mainly comprises twoLarge content, is exactly first the resource inventory of memory, in other words available memory resource in system; SecondlyHow code segment is assigned in the middle of different memories. In cmd file, use MEMORY dummy order in order toThe memory range that can use with program of pointing out that physics in goal systems exists, each memory range has title, initialAddress and length. Can also use independently address space of PAGE option configuration, PAGE option makes chain simultaneouslyConnect device and regard specific page as completely independently memory space, user can specify at most 255 pages. Under normal circumstancesOnly specify two memory space PAGE0 and PAGE1, PAGE0 represents the program space, in order to deposit program generationCode; PAGE1 representative data space, is used for depositing the various data in program operation process. One belowThe usage example of MEMORY dummy order:

MEMORY

{

PAGE0:

PROG(RWIX):origin＝0000c0h，length＝003f40h

PAGE1:

DARAM(RWI):origin＝004000h，length＝006000h

}

Wherein, PROG and DARAM are memory name, and they have nothing special for linkerMeaning, be just used for determine memory range. (RWIX) in bracket represents the attribute of memory below,R represents that this memory block is readable, and W represents that this memory block can write, and X represents that this memory block can comprise executable code,I represents that this memory block can be initialised. The initial address of origin designated store scope, length represents to store modelThe byte length enclosing.

In cmd file, by SECTIONS dummy order, program segment being positioned, is one belowThe usage example of SECTIONS dummy order:

Wherein, C compiler generates .text section .cinit section and .const section are positioned in PAGE0 spacePROG memory block in, and .stack section and .sysstack section and .bss section are positioned in PAGE1 spaceDARAM memory block in.

The cmd file content that Program of the present invention uses is as follows:

It should be noted that address and space size in cmd file refer to byte address and byte-sized.And in the development environment of CCS, all addresses and space size are all word address and word size, this pointIn the process of actual development, should be noted that.

Wherein, digital signal processor operating frequency is set: program starts first will arrange the work frequency of DSPRate, there is a clock generator DSP inside, and clock generator receives input clock signal from CLKIN pin,Be transformed to the needed work clock of CPU and peripheral hardware thereof; Work clock is exported through pin CLKOUT,Can be for other devices.

While having a digital phase-locked loop DPLL (DigitalPhase-LockLoop) and one in clock generatorClock mode register CLKMD. When the PLLENABLE territory in clock mode register CLKMD is 1Time, PLL works in locking mode, and now the clock frequency of output is determined by formula below,

Wherein PLLMULT territory represents the PLL frequency multiplication value under locking mode, and span is 2～31; PLLDIV territory represents the PLL frequency division value under locking mode, and span is 0～3. Letter Xiang 5509A development board is adoptedProvide clock with 12MHz crystal for system, incoming frequency is 12MHz.

In program, use PLL_Config structure and PLL_config () function in CSL storehouse to come PLLBe configured and initialize. For VC5509A, the member in PLL_Config structure is corresponding clock respectivelyIAI territory, IOB territory, PLLMULT territory and PLLDIV territory in mode register. IAI territory and IOB mono-As get respectively 0 and 1, PLLMULT territory and PLLDIV territory be used for the operating frequency that configuration needs,Then in principal function, call PLL_config () function, and import PLL_Config structure pointer into can be completeBecome the configuration of DSP operating frequency. In the present invention, the operating frequency of DSP is configured to 144MHz, even PLLMULT territory is that 12, PLLDIV territory is 0.

Wherein, digital signal processor development environment configuration: as shown in Figure 7, use development environment in the present inventionBe CCSv4.2.4, engineering need to configure some options after building up in the property pages of engineering, guarantees engineeringCorrect compiling. First need to be at property pages > C/C++Build > C5500Complier > PredefinedIn Symbols--under define option, newly-built " CHIP_5509A " symbol; Then at property pages > C/C++Build > C5500Complier > in RuntimeModelOptions--under memory_model option, selectLarge, adopts large memories pattern; At property pages > C/C++Build > C5500Complier > IncludeIn Options--under include_path option, add the include path in CSL storehouse and DSPLIB storehouse, andAt property pages > C/C++Build > C5500Linker > in FileSearchPath--under library option, add" csl5509ax.lib " and " 55xdspx.lib ", under--search_path option, adds CSL storehouse and DSPLIBThe lib folder path in storehouse. Completing above configuration just can write afterwards C code and carried out the exploitation of DSP.

102, utilize ZMNL method, emulator is that logarithm normal distribution, power spectrum are Gauss to amplitude distributionThe clutter of type carries out emulation.

Wherein, the present invention chooses and does not do any restriction emulator concrete model, type etc., can realizeThe mode of choosing of the same or similar function of emulator of the present invention, choose result all within protection scope of the present invention.As shown in Figure 6, below, only the one taking emulator is chosen and may be carried out simple explanation as example. For example: thisThe emulator that bright middle cooperation development board uses is the SEED-XDS510PLUS emulator that closes crowd and reach production, shouldEmulator adopts standard USB2.0 interface, supports CCSv2.2 and above version, supports each mainstream operation system,For the above version of CCSv4.0, support win764 bit manipulation system.

Wherein, when simulation clutter, need to produce the random sequence with certain probability distribution and power spectral density,The method of main flow has zero-memory nonlinearity method of changing (ZMNL) and spherically invariant random processes (SIRP). Commonly useClutter amplitude distributed model has Rayleigh (Rayleigh) distribution, lognormal (Lognormal) distribution, Wei Buer(Weibull) distribution and K distribute. Conventional clutter power spectrum has Gaussian, exponential type, Cubic and full polarogramType. The present invention adopts the method for ZMNL, is that logarithm normal distribution, power spectrum are Gaussian to amplitude distributionThe clutter of power spectrum has carried out emulation.

The probability density function of logarithm normal distribution clutter is

$p\left(z\right)=\frac{1}{\sqrt{2\mathrm{\π}}{\mathrm{\σ}}_{c}z}\exp \[\frac{-1}{2{\mathrm{\σ}}_c^2}\left|{\mathrm{Ln}}^2(z/{\mathrm{\μ}}_c)\right|\]---\left(1\right)$

Wherein, σ_c＞0，μ_c＞0，σ_cFor form parameter, represent the gradient of distribution, the radar number of actual measurementAccording to showing, its excursion is σ_c∈[0.335,1.247]；μ_cBe scale parameter, represent the median distributing.

For Gaussian Power Spectrum Model, generally can define it by the spectrum width between two half power pointsConcrete form, corresponding expression formula is as follows

S(f)＝exp[-(αf/f_3dB)²](2)

In formula, α is a constant, and its value should make S (f_3dB/ 2)=0.5, so.

$\mathrm{\α}=2\sqrt{Ln2}=\mathrm{1.665.}$

Use ZMNL method, the clutter order that generation whose amplitude obeys logarithm normal distribution, power spectrum are Gaussian spectrumRow flow process:

1) first produce N Gaussian sequence { x that obeys N (0,1)_j},j＝1,2,…,N。

2) Gaussian sequence is obtained to relevant gaussian random order by a linear digital filter H (ω)Row { u_j, this time series { u_jThere is correlation coefficient r_ij。

3) be μ in order to produce average_c, variance isLogarithm normal distribution sequence { z_j, need structure to obeyRandom sequence, therefore to sequence { u_jCarry out respectively multiplication and add operation, obeyedSequence { w_j, same to time series { w_jAlso there is correlation coefficient r_ij。

4) to sequence { w_jCarry out nonlinear transformation (index operation) and can produce whose amplitude obeys lognormal and divideCloth, coefficient correlation is s_ijRandom sequence { z_j. Wherein, correlation coefficient r_ijAnd s_ijPass be

$r_{ij}=\frac{Ln\[1+s_{ij}(e^{{\mathrm{\σ}}_c^2}-1)\]}{{\mathrm{\σ}}_c^2}---\left(3\right)$

Produce flow process from clutter, the design of linear digital filter is a step of most critical. Due to power spectrumDensity is the Fourier transformation of coefficient correlation, gets final product so the sample sequence of gaussian spectrum is carried out to IFFTTo coefficient correlation s_ij, can obtain correlation coefficient r according to formula (3)_ij, then to correlation coefficient r_ijCarry out FFTCan obtain linear digital filter H (ω) mould square, thus, can obtain the filter factor of linear filter.

It should be added that: algorithm of the present invention has used DSPLIB, DSPLIB is that TI company is carried hereinThe DSP function library of an optimization of confession, it comprises the logical of more than 50 the compilation optimization that can call in c programUse signal handler. Adopt DSPLIB can obtain execution speed significantly faster than adopting standard C language to compileThe corresponding program of writing, has greatly reduced development time of DSP application system. DSPLIB needs to download separately peaceDress, the DSPLIB version using in the present invention is v2.40.00. Function in the DSPLIB that the present invention usesHave 7, they are respectively fltoq15, q15tofl, cfft, cifft, cbrev, rand16 and rand16init.Wherein two functions of fltoq15 and q15tofl are used for the conversion of data type; Cfft, cifft and cbrev are used forMake positive and negative Fourier transformation operation; Rand16 and rand16init are used for producing random number. Use these functions to wantComprise header file dsplib.h. Below the use main points of these functions are described respectively:

1) in DSPLIB, TI has newly defined Q.15 decimal data type, adopts the mode of fixed point to representFloating number is predefined as DATA type in dsplib.h header file. Unless stated otherwise, DSPLIB adoptsCarry out computing with Q15 decimal data type. Because the decimal in C language is all floating point type, so adjustingNeed floating point type to be converted to Q15 decimal type with before DSPLIB function, this work is by fltoq15Function completes, but in transfer process, should be noted that the floating number scope that will change must be between [1,1],This is because the scope of the represented number of Q15 decimal type is [1,1], so may be often in transfer processNeed to be normalized operation to data. Conversely, calling after DSPLIB functional operation completes, also needQ15 data are converted to floating type, this work is completed by q15tofl function, the floating type after conversionData, between [1,1], if carried out before normalization operation, also need to carry out the convergent-divergent of data after conversionReduction, is multiplied by normalization coefficient to the each data after conversion.

2) plural Fourier transform function cfft and Fourier inversion function cifft have SCALE andTwo versions of NOSCALE, difference is that SCALE version all can in interative computation each time at functionData are carried out to the generation of convergent-divergent to prevent from overflowing, and the function of NOSCALE version can not carry out to dataZoom operations. In view of this reason, we use the function of SCALE version, now should note each tuneAfter carrying out N point Fourier transformation with cfft, size of data all can be dwindled N doubly, so to data zooming alsoWhen former, need to consider this point, but use cifft function there is no this problem. Need in addition explanation a bitThe input data that are cfft and cifft are all normal alignment, and data after computing to be bit reversals arrange, therefore existCall after cfft or cifft functional operation complete, also need to call the data of cbrev function after to computing and carry outAdjust, to obtain the data of normal alignment, note it must being will first call cfft or cifft and then call cbrev,Order can not be exchanged.

3) rand16 function is used for producing the random number of 16, and scope is [0～65535], is calling rand16Before producing random number, first to call rand16init function and initialize random data. Due to rand16 functionParameter be DATA type, its essence is also the type of 16, thus by produce after data force conversionFor ushort type, make sure to keep in mind directly to use DATA type, more DATA type cannot be turnedBe changed to floating number.

103, coding, described program is through emulator supplied with digital signal processor; Described program is by countingCalculation machine terminal is write.

Wherein, the present invention adopts C language to carry out the exploitation of software program, and program package is containing three parts, main journeyOrder, linear filter filtering module function, nonlinear transformation modularity function. Programming principle is former with reference to emulationReason one joint, in the compiling procedure of program, what will note all the time the address of wherein using and large little finger of toe is all word groundLocation and word size.

Wherein, the present invention chooses and does not do any restriction concrete model, the type etc. of terminal,Can realize the same or similar function of terminal of the present invention the mode of choosing, choose result all guarantor of the present inventionWithin protecting scope. Below only choose and may carry out simple explanation as example taking the one of terminal. For example:The operating system that the present invention uses is windows7SP164 bit manipulation system, and development environment is CCSv4.2.4.

104, obtain the gross data of clutter amplitude data and power spectrum number.

105, obtain the emulated data of clutter amplitude data and power spectrum number; Described emulated data is by described emulationDevice output.

106, the gross data to described clutter amplitude data and power spectrum number and described clutter amplitude data and meritThe emulated data of rate spectrum number is mapped respectively.

107, the gross data figure to described clutter amplitude data and power spectrum number and described clutter amplitude data andThe emulated data figure of power spectrum number is analyzed, and checking clutter simulation result, to complete radar clutter mouldIntend.

A kind of radar clutter simulation method that the embodiment of the present invention provides, comprising: digital signal processor is relevant hardPart configuration; Utilize ZMNL method, emulator is that logarithm normal distribution, power spectrum are Gauss to amplitude distributionThe clutter of type carries out emulation; Coding, program is through emulator supplied with digital signal processor; Obtain clutterThe gross data of amplitude data and power spectrum number; Obtain the emulated data of clutter amplitude data and power spectrum number; RightGross data and emulated data are mapped respectively; Gross data figure and described clutter amplitude data and emulated dataFigure is analyzed, checking clutter simulation result, and than prior art, the present invention is by software and hardware phaseIn conjunction with, not only need not expend huge human and material resources, save resource, and on the basis that increases feasibilityAbove, greatly improved the accuracy of radar clutter simulation.

Embodiment 2

The embodiment of the present invention provides a kind of radar clutter simulation method, as shown in Figure 2, comprising:

201, digital signal processor related hardware configuration; Described hardware configuration comprises described Digital Signal ProcessingDevice memory space is divided, described digital signal processor program section is distributed, described digital signal processor work frequencyRate is set and development environment configuration;

202, utilize ZMNL method, emulator is that logarithm normal distribution, power spectrum are Gauss to amplitude distributionThe clutter of type carries out emulation;

203, coding, described program is through emulator supplied with digital signal processor; Described program is by countingCalculation machine terminal is write;

204, obtain the gross data of clutter amplitude data and power spectrum number;

205, obtain the emulated data of clutter amplitude data and power spectrum number; Described emulated data is by described emulationDevice output;

206, the gross data to described clutter amplitude data and power spectrum number and described clutter amplitude data and meritThe emulated data of rate spectrum number is mapped respectively;

207, the gross data figure to described clutter amplitude data and power spectrum number and described clutter amplitude data andThe emulated data figure of power spectrum number is analyzed, and checking clutter simulation result, to complete radar clutter mouldIntend.

Wherein, as shown in Figure 8, Figure 9, the invention provides the theory of a kind of clutter amplitude data and power spectrum numberThe emulated data figure comparative analysis result figure of datagram and clutter amplitude data and power spectrum number is only for reference, to fillDivide explanation the present invention software and hardware can be combined, not only need not expend huge human and material resources, saveResource, and increasing on the basis of feasibility, greatly improved the accuracy of radar clutter simulation.

208, described terminal is debugged described digital signal processor by CCS software, so thatRead described digital signal processor real-time data and detect each components and parts real-time status.

A kind of radar clutter simulation method that the embodiment of the present invention provides, comprising: digital signal processor is relevant hardPart configuration; Utilize ZMNL method, emulator is that logarithm normal distribution, power spectrum are Gauss to amplitude distributionThe clutter of type carries out emulation; Coding, program is through emulator supplied with digital signal processor; Obtain clutterThe gross data of amplitude data and power spectrum number; Obtain the emulated data of clutter amplitude data and power spectrum number; RightGross data and emulated data are mapped respectively; Gross data figure and described clutter amplitude data and emulated dataFigure is analyzed, checking clutter simulation result, and terminal is believed described numeral by CCS softwareNumber processor is debugged, and than prior art, the present invention combines software and hardware, not only need not consumeTake huge human and material resources, saved resource, and increasing on the basis of feasibility, greatly improved thunderReach the accuracy of clutter simulation.

Embodiment 3

The embodiment of the present invention provides a kind of radar clutter simulation device, as shown in Figure 3, comprising:

Dispensing unit 31, configures for digital signal processor related hardware; Described in described hardware configuration comprisesDigital signal processor memory space is divided, described digital signal processor program section is distributed, described data signalProcessor working frequency is set and development environment configuration;

Simulation unit 32, utilizes ZMNL method, and emulator is logarithm normal distribution, power to amplitude distributionSpectrum is that the clutter of Gaussian carries out emulation;

Write unit 33, for coding, described program is through emulator supplied with digital signal processor;Described program is write by terminal;

The first acquiring unit 34, for obtaining the gross data of clutter amplitude data and power spectrum number;

Second acquisition unit 35, for obtaining the emulated data of clutter amplitude data and power spectrum number; Described imitativeTrue data is exported by described emulator;

Mapping unit 36, for the gross data to described clutter amplitude data and power spectrum number and described clutterThe emulated data of amplitude data and power spectrum number is mapped respectively;

Authentication unit 37, for the gross data figure to described clutter amplitude data and power spectrum number and described assortedThe emulated data figure of wave amplitude data and power spectrum number is analyzed, and checking clutter simulation result, so that completeBecome radar clutter simulation.

Debugging unit 38, enters described digital signal processor by CCS software for described terminalRow debugging, to read described digital signal processor real-time data and detect each components and parts real-time status.

A kind of radar clutter simulation device that the embodiment of the present invention provides, comprising: dispensing unit, believe for numeralThe configuration of number processor related hardware; Simulation unit, utilizes ZMNL method, and emulator is right to amplitude distributionThe clutter that number normal distribution, power spectrum are Gaussian carries out emulation; Write unit, for coding; FirstAcquiring unit, for obtaining the gross data of clutter amplitude data and power spectrum number; Second acquisition unit, forObtain the emulated data of clutter amplitude data and power spectrum number; Described emulated data is exported by described emulator; DoFigure unit, for the gross data to described clutter amplitude data and power spectrum number and described clutter amplitude data andThe emulated data of power spectrum number is mapped respectively; Authentication unit, for to described clutter amplitude data and powerThe spectrum gross data figure of number and the emulated data figure of described clutter amplitude data and power spectrum number are analyzed,Checking clutter simulation result, to complete radar clutter simulation, debugging unit is logical for described terminalCross CCS software described digital signal processor is debugged, so that it is real to read described digital signal processorTime internal storage data and detect each components and parts real-time status. Than prior art, the present invention is by software and hardware phaseIn conjunction with, not only need not expend huge human and material resources, save resource, and on the basis that increases feasibilityAbove, greatly improved the accuracy of radar clutter simulation.

Embodiment 4

The embodiment of the present invention provides a kind of radar clutter simulation system, as shown in Figure 4, comprising: data signal placeReason device 41, emulator 42 and terminal 43;

The hardware configuration that described digital signal processor 41 is system;

Described emulator 42 connects described digital signal processor 41 and described terminal 43, for rightAmplitude distribution is that the clutter that logarithm normal distribution, power spectrum are Gaussian carries out emulation;

Described terminal 43 is for coding, theory to described clutter amplitude data and power spectrum numberThe emulated data of data and described clutter amplitude data and power spectrum number is mapped respectively and to described clutter widthThe emulated data figure of the gross data figure of degrees of data and power spectrum number and described clutter amplitude data and power spectrum numberBe analyzed, checking clutter simulation result, to complete radar clutter simulation.

Wherein, as shown in Figure 5, the embodiment of the present invention provides a kind of radar clutter simulation system finished product of the present invention to showBe intended to for referencely, but it should be noted that: protection scope of the present invention is not limited to this, be anyly familiar with basisIn the technical scope that those skilled in the art disclose in the present invention, the variation that can expect easily or replacement, allWithin should being encompassed in protection scope of the present invention.

A kind of radar clutter simulation system that the embodiment of the present invention provides, comprising: digital signal processor 41,Emulator 42 and terminal 43; The hardware configuration that digital signal processor 41 is system; Emulator 42Linking number word signal processor 41 and terminal 43, for being logarithm normal distribution, merit to amplitude distributionThe clutter that rate spectrum is Gaussian carries out emulation; Terminal 43 is for coding, to clutter amplitude dataMap respectively with the gross data of power spectrum number and the emulated data of clutter amplitude data and power spectrum number andGross data figure to described clutter amplitude data and power spectrum number and described clutter amplitude data and power spectrum numberEmulated data figure be analyzed, checking clutter simulation result, to complete radar clutter simulation, comparesIn prior art, the present invention combines software and hardware, not only need not expend huge human and material resources, jointEconomize resource, and increased on the basis of feasibility, greatly improved the accuracy of radar clutter simulation.

Through the above description of the embodiments, those skilled in the art can be well understood to the present inventionThe mode that can add essential common hardware by software realizes, and can certainly pass through hardware, but a lot of situationThe former is better embodiment down. Based on such understanding, technical scheme of the present invention is right in other words in essenceThe part that prior art contributes can embody with the form of software product, and this computer software product is depositedStorage in the storage medium can read, as the floppy disk of computer, hard disk or CD etc., comprise some instructions in order toMake a computer equipment (can be personal computer, server, or the network equipment etc.) carry out thisMethod described in bright each embodiment.

The above, be only the specific embodiment of the present invention, but protection scope of the present invention is not limited to this,Any be familiar with those skilled in the art the present invention disclose technical scope in, the variation that can expect easilyOr replace, within all should being encompassed in protection scope of the present invention. Therefore, protection scope of the present invention should be with describedThe protection domain of claim is as the criterion.

Claims (5)

1. a radar clutter simulation method, is characterized in that, comprising:

The configuration of digital signal processor related hardware; Described hardware configuration comprises described digital signal processor storageSpatial division, described digital signal processor program section are distributed, described digital signal processor operating frequency is setAnd development environment configuration;

Utilize ZMNL method, emulator is that logarithm normal distribution, power spectrum are Gaussian to amplitude distributionClutter carries out emulation;

Coding, described program is through emulator supplied with digital signal processor; Described program by computer eventuallyEnd is write;

Obtain the gross data of clutter amplitude data and power spectrum number;

Obtain the emulated data of clutter amplitude data and power spectrum number; Described emulated data is exported by described emulator;

Gross data to described clutter amplitude data and power spectrum number and described clutter amplitude data and power spectrumThe emulated data of number is mapped respectively;

Gross data figure to described clutter amplitude data and power spectrum number and described clutter amplitude data and powerThe emulated data figure of spectrum number is analyzed, and checking clutter simulation result, to complete radar clutter simulation.

2. radar clutter simulation method according to claim 1, is characterized in that, also comprises:

Described terminal is debugged described digital signal processor by CCS software, to readDescribed digital signal processor real-time data and the each components and parts real-time status of detection.

3. a radar clutter simulation device, is characterized in that, comprising:

Dispensing unit, configures for digital signal processor related hardware; Described hardware configuration comprises described numeralSignal processor memory space is divided, described digital signal processor program section is distributed, described Digital Signal ProcessingDevice operating frequency is set and development environment configuration;

Simulation unit, utilizes ZMNL method, and emulator is logarithm normal distribution, power spectrum to amplitude distributionFor the clutter of Gaussian carries out emulation;

Write unit, for coding, described program is through emulator supplied with digital signal processor; DescribedProgram is write by terminal;

The first acquiring unit, for obtaining the gross data of clutter amplitude data and power spectrum number;

Second acquisition unit, for obtaining the emulated data of clutter amplitude data and power spectrum number; Described emulation numberAccording to being exported by described emulator;

Mapping unit, for the gross data to described clutter amplitude data and power spectrum number and described clutter amplitudeThe emulated data of data and power spectrum number is mapped respectively;

Authentication unit, for the gross data figure to described clutter amplitude data and power spectrum number and described clutter widthThe emulated data figure of degrees of data and power spectrum number is analyzed, and checking clutter simulation result, to complete thunderReach clutter simulation.

4. radar clutter simulation device according to claim 3, is characterized in that, also comprises:

Debugging unit, carries out described digital signal processor by CCS software for described terminalDebugging, to read described digital signal processor real-time data and detect each components and parts real-time status.

5. a radar clutter simulation system, is characterized in that, comprising: digital signal processor, emulatorAnd terminal;

Described digital signal processor is the hardware configuration of system;

Described emulator connects described digital signal processor and described terminal, for to amplitude distribution beingThe clutter that logarithm normal distribution, power spectrum are Gaussian carries out emulation;

Described terminal is for coding, gross data to described clutter amplitude data and power spectrum numberMap respectively with the emulated data of described clutter amplitude data and power spectrum number and to described clutter amplitude numberAccording to carrying out with the gross data figure of power spectrum number and the emulated data figure of described clutter amplitude data and power spectrum numberComparative analysis, checking clutter simulation result, to complete radar clutter simulation.