CN105632213A - Traffic signal time display - Google Patents
Traffic signal time display Download PDFInfo
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- CN105632213A CN105632213A CN201410625287.7A CN201410625287A CN105632213A CN 105632213 A CN105632213 A CN 105632213A CN 201410625287 A CN201410625287 A CN 201410625287A CN 105632213 A CN105632213 A CN 105632213A
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Abstract
A traffic signal time display provided by the present invention comprises an input subsystem, a measurement subsystem, a countdown display subsystem, a clock subsystem and a controller. The input subsystem comprises a traffic signal instrument and a power supply signal conversion circuit, the measurement subsystem comprises a time measurement circuit, and the countdown display subsystem comprises three countdown timers of same functions, a dynamic scanning and decoding circuit and an LED nixie tube; the clock subsystem comprises a clock signal source and a frequency divider, and the controller comprises a preset circuit and a reset circuit. The traffic signal time display of the present invention is used as an auxiliary device of the signal instrument, mainly solves the signal instrument working cycle display problem, takes a programmable device as the core, and has the characteristics of accurate time travelling, self-adaption, simple circuit, etc., and a hardware circuit is realized on an independently researched and developed field programmable gate array (FPGA) innovative development experimental box.
Description
Technical field
The present invention relates to technical field of intelligent traffic, be specifically related to a kind of traffic signal time display. Background technology
Traditional all kinds traffic signaling equipment has working cycle conversion, adjusts and ask several functions such as arranging in time, but cannot show each duty cycle time to driver and pedestrian. Traffic signal time display, as the auxiliary equipment of semaphore, mainly solves semaphore duty cycle time display problem.
Summary of the invention
It is an object of the invention to provide a kind of traffic signal time display.
The technical scheme is that
A kind of traffic signal time display, including input subsystem, measures subsystem, countdown display subsystem, Clock Subsystem and controller;
Described input subsystem includes traffic signaling equipment and power supply signal change-over circuit; The outfan of traffic signaling equipment connects the input of power supply signal change-over circuit;
Described measurement subsystem includes time measuring circuit;
Described countdown display subsystem includes three identical count-down devices of function, dynamic scan decoding circuit and LED charactron; The outfan of the count-down device that three functions are identical connects the input of dynamic scan decoding circuit, and the outfan of dynamic scan decoding circuit connects LED charactron;
Described Clock Subsystem includes signal source of clock and frequency divider, and the outfan of signal source of clock connects the input of frequency divider;
Described controller includes putting several circuit and reset circuit; The input putting several circuit connects the outfan of dynamic scan decoding circuit, and the outfan putting several circuit connects the input of three identical count-down devices of function.
The red, green, yellow three road 220V alternating voltages that traffic signaling equipment is exported by described power-switching circuit export tri-kinds of signals of R, G, Y of+5V after carrying out transformation, rectification, filtering.
Count-down device respectively red light count-down device, amber light count-down device and the green light count-down device that described three functions are identical.
Beneficial effect:
The traffic signal time display of the present invention, as the auxiliary equipment of semaphore, mainly solves semaphore duty cycle time display problem. Traffic signal time display, with programming device for core, has the features such as punctual timing, self adaptation, circuit are simple, and hardware circuit realizes on the FPGA innovative and development experiment case of independent research.
Accompanying drawing explanation
In order to be illustrated more clearly that the technical scheme in the embodiment of the present invention, the accompanying drawing used required in embodiment will be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the premise not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the traffic signal time display structured flowchart of the specific embodiment of the invention;
Fig. 2 is the time measuring circuit figure of the specific embodiment of the invention;
Fig. 3 is the reset circuit figure of the specific embodiment of the invention.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only a part of embodiment of the present invention, rather than whole embodiments. Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under not making creative work premise, broadly fall into the scope of protection of the invention.
A kind of traffic signal time display, as it is shown in figure 1, include input subsystem, measure subsystem, countdown display subsystem, Clock Subsystem and controller; Circuit adopts middle small scale integrated circuit to be designed, and realizes with FPGA device.
Semaphore working cycle change over order is that when red one green light one amber light is bright, moves in circles. In FIG, after the red, green, yellow three road 220V alternating voltages that semaphore is exported by power-switching circuit carry out transformation, rectification, filtering, three kinds of signals of R, G, Y (red, green, yellow) of output+5V.
When semaphore is operated in chi, G, l, during cycle of signal respectively high level, time measuring circuit is by measuring each duty cycle time to 1Hz signal-count. When the working cycle changes, put several circuit and produce to put several signal LD, measurement data DATA is inserted in the count-down device of correspondence. Meanwhile, under LD signal function, the reset signal RESET of reset circuit output, time measuring circuit is resetted, prepares the measurement of next working cycle. The data that count-down device prestores are successively decreased under 1Hz signal function, drive LED charactron, the remaining time of display current operating cycle through dynamic scan decoding circuit. LkHz signal is additionally operable to dynamic scan encoded control.
When traffic signal time display is started working, first cycle period can only carry out signal time measurement and storage, and count-down device does not work, and shows blank screen. From second cycle period, time display shows signal time in countdown mode while measuring.
Input subsystem includes traffic signaling equipment and power supply signal change-over circuit; The outfan of traffic signaling equipment connects the input of power supply signal change-over circuit;
Measure subsystem and include time measuring circuit; Time measuring circuit is as shown in Figure 2. 74160 and 74190 are connected into one synchronizes 100 system up counters. Under the 1Hz clock signal effect of CLK end input, outfan Q.��Q. It is sequentially output oooooooo (oo) one 10011001 (99) (two 8421 yards). Because the circulation conversion of semaphore working cycle, so only just can measure the working time of three road signal lighties with a circuit. LD end is asynchronous put several end, is connected with reset circuit RESET end, during LD=0, Q8 mono-QI is set to oooooool state. By arranging 74190 states putting several end A B (Sk low level is to high-order), it is possible to finishing measurement error. Outfan Q.��Q. It is connected with count-down device circuit.
Countdown display subsystem includes three identical count-down devices of function, dynamic scan decoding circuit and LED charactron; The outfan of the count-down device that three functions are identical connects the input of dynamic scan decoding circuit, and the outfan of dynamic scan decoding circuit connects LED charactron;
Clock Subsystem includes signal source of clock and frequency divider, and the outfan of signal source of clock connects the input of frequency divider;
Controller includes putting several circuit and reset circuit; The input putting several circuit connects the outfan of dynamic scan decoding circuit, and the outfan putting several circuit connects the input of three identical count-down devices of function.
It is that when red one green light one amber light is bright that semaphore controls colored lights working cycle order, moves in circles. It is desirable that its measurement data is put the count-down device that people is corresponding when each end cycle. Putting several circuit R, G, y end and connect red signal, green light signals and steady yellow respectively, terminate when the colored lights working cycle, LDR, LDG, LDY end produces to put several undersuing accordingly respectively. 74160 are connected into groan and synchronize a ternary addition enumerator.
The red, green, yellow three road 220V alternating voltages that traffic signaling equipment is exported by power-switching circuit export tri-kinds of signals of R, G, Y of+5V after carrying out transformation, rectification, filtering.
Reset circuit by d type flip flop, 74160, phase inverter and NAND gate form, as shown in Figure 3. Wherein, 74160 and phase inverter be connected into one synchronize quaternary up counter. Input A. One A. Being connected with putting several circuit output end LDR, LDG, LDY, outfan RESET puts several end LD and is connected with time measuring circuit.
Under normal circumstances, A.��A, end is 1 state, indicates that NAND gate is output as 0, and d type flip flop is in maintenance state, Q=0 without putting the input of several signal. The Enable Pin ENT=ENT=Q=0 of 74160, enumerator is also at maintenance state, RESET=1, indicates and exports without reset signal. When putting several signal and being effective (negative pulse), NAND gate output is 1 by 0 saltus step, produces a rising edge of a pulse, and d type flip flop puts people 1. Now Q=1, ENT=ENT=Q=l, enumerator starts the clock signal counting to the input of CLK end, when the 4th pulse arrives, RESET=0, indicate that reset signal exports, d type flip flop and 74160 are reset meanwhile.
Enumerator in circuit plays time-lag action, it is ensured that after measurement data is reliably inserted count-down device, then is resetted by time measuring circuit. Enumerator delay time and 74160 connection (being connected into other system Counter) and CLK end input clock signal frequency relevant.
Count-down device respectively red light count-down device, amber light count-down device and the green light count-down device that three functions are identical.
Count-down device adopts two panels 74190 to be connected into one and synchronizes 100 system subtraction count devices, input D. One D. It is connected with time measuring circuit, outfan Q.��Q. It is connected with dynamic scan decoding circuit. Its function is count-down device to be exported data decode, and drives two numeral method 00��99. Turn off the light input BIN=0 time, export Q^��QG=1111111o
The clock signal frequency of signal source of clock output is significantly high, is divided as 1Hz and lkHz clock signal by frequency divider. 1Hz clock signal is used for timing, and lkHz clock signal is used for dynamic scan encoded control. Divider circuit can designed, designed.
Dynamic scan decoding circuit is made up of 4 74244 and a piece of 7446, and the data output end of its input and three count-down devices connects.
Claims (3)
1. a traffic signal time display, it is characterised in that: include input subsystem, measure subsystem, countdown display subsystem, Clock Subsystem and controller;
Described input subsystem includes traffic signaling equipment and power supply signal change-over circuit; The outfan of traffic signaling equipment connects the input of power supply signal change-over circuit;
Described measurement subsystem includes time measuring circuit;
Described countdown display subsystem includes three identical count-down devices of function, dynamic scan decoding circuit and LED charactron; The outfan of the count-down device that three functions are identical connects the input of dynamic scan decoding circuit, and the outfan of dynamic scan decoding circuit connects LED charactron;
Described Clock Subsystem includes signal source of clock and frequency divider, and the outfan of signal source of clock connects the input of frequency divider;
Described controller includes putting several circuit and reset circuit; The input putting several circuit connects the outfan of dynamic scan decoding circuit, and the outfan putting several circuit connects the input of three identical count-down devices of function.
2. a kind of traffic signal time display according to claim 1, it is characterised in that: the red, green, yellow three road 220V alternating voltages that traffic signaling equipment is exported by described power-switching circuit export tri-kinds of signals of R, G, Y of+5V after carrying out transformation, rectification, filtering.
3. a kind of traffic signal time display according to claim 1, it is characterised in that: count-down device respectively red light count-down device, amber light count-down device and the green light count-down device that described three functions are identical.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410625287.7A CN105632213A (en) | 2014-11-07 | 2014-11-07 | Traffic signal time display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410625287.7A CN105632213A (en) | 2014-11-07 | 2014-11-07 | Traffic signal time display |
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| Publication Number | Publication Date |
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| CN105632213A true CN105632213A (en) | 2016-06-01 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201410625287.7A Pending CN105632213A (en) | 2014-11-07 | 2014-11-07 | Traffic signal time display |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109637159A (en) * | 2019-01-25 | 2019-04-16 | 江西省高速公路联网管理中心 | A kind of traffic signal control system based on EDA |
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2014
- 2014-11-07 CN CN201410625287.7A patent/CN105632213A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109637159A (en) * | 2019-01-25 | 2019-04-16 | 江西省高速公路联网管理中心 | A kind of traffic signal control system based on EDA |
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| C06 | Publication | ||
| PB01 | Publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20160601 |
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| WD01 | Invention patent application deemed withdrawn after publication |