CN105629615A - Array substrate and manufacture method thereof, display panel and display device - Google Patents
Array substrate and manufacture method thereof, display panel and display device Download PDFInfo
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- CN105629615A CN105629615A CN201610203563.XA CN201610203563A CN105629615A CN 105629615 A CN105629615 A CN 105629615A CN 201610203563 A CN201610203563 A CN 201610203563A CN 105629615 A CN105629615 A CN 105629615A
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- photoresist material
- chock insulator
- insulator matter
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
- G02F1/13394—Gaskets; Spacers; Sealing of cells spacers regularly patterned on the cell subtrate, e.g. walls, pillars
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136231—Active matrix addressed cells for reducing the number of lithographic steps
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention provides an array substrate and a manufacture method thereof, a display panel and a display device. The manufacture method of the array substrate comprises the step of forming graphs of pixel electrodes and spacers by one composition process. According to the invention, the spacers are formed at one side of the array substrate, and the spacers and the pixel electrodes on the array substrate are formed via the one composition process, namely that the graphs of the pixel electrodes and the spacers can be manufactured at the same time with one mask plate, and no spacer needs to be formed at one side of a color film substrate, so that the frequency of one composition process is lowered, one mask plate is reduced, and thus the manufacture cost of the display panel with the array substrate is lowered.
Description
Technical field
The present invention relates to technique of display field, particularly relate to a kind of array substrate and making method, display panel and display unit.
Background technology
Along with development in science and technology, the application of display panels gets more and more, simultaneously, the manufacturing process of display panels is also many, the mask quantity used is also many, and such as, HIC (Hybridincell) product needed uses 13 or 14 mask, FIC (Fullincell) product needed uses 16 mask, and this adds the cost of manufacture of display panels undoubtedly.
Summary of the invention
In view of this, the present invention provides a kind of array substrate and making method, display panel and display unit, many in order to solve the mask quantity that existing display panels uses, and causes the problem that cost of manufacture is high.
For solving the problems of the technologies described above, the present invention provides the making method of a kind of array substrate, comprising:
By the figure of a composition technique formation pixel electrode and chock insulator matter.
Preferably, described chock insulator matter comprises main chock insulator matter and auxiliary chock insulator matter.
Preferably, the step of the described figure forming pixel electrode and chock insulator matter by composition technique comprises:
Form transparent conductive film and photoresist layer successively;
Utilize a mask, described photoresist layer is exposed and develops, form the complete reserve area of photoresist material, first photoresist material part reserve area, region removed completely by 2nd photoresist material part reserve area and photoresist material, wherein, the transmittance in the mask region that the transmittance in the mask region that described first photoresist material part reserve area is corresponding is corresponding from described 2nd photoresist material part reserve area is different, the corresponding described main chock insulator matter region of the complete reserve area of described photoresist material, the corresponding described auxiliary chock insulator matter region of described first photoresist material part reserve area, the corresponding described pixel electrode region of described 2nd photoresist material part reserve area, other regions corresponding, region removed completely by described photoresist material,
Adopt etching technics to etch away the transparent conductive film that region removed completely by described photoresist material, form the figure of described pixel electrode;
Cineration technics is adopted to remove the photoresist material of described 2nd photoresist material part reserve area, remove the part photoresist material of the complete reserve area of described photoresist material, form the figure of described main chock insulator matter, and remove the part photoresist material of described first photoresist material part reserve area, form the figure of described auxiliary chock insulator matter.
Preferably, the step of the described figure forming pixel electrode and chock insulator matter by composition technique comprises:
Form transparent conductive film and chock insulator matter material layer successively;
Described chock insulator matter material layer applies photoresist layer;
Utilize a mask, described photoresist layer is exposed and develops, form the complete reserve area of photoresist material, first photoresist material part reserve area, region removed completely by 2nd photoresist material part reserve area and photoresist material, wherein, the transmittance in the mask region that the transmittance in the mask region that described first photoresist material part reserve area is corresponding is corresponding from described 2nd photoresist material part reserve area is different, the corresponding described main chock insulator matter region of the complete reserve area of described photoresist material, the corresponding described auxiliary chock insulator matter region of described first photoresist material part reserve area, the corresponding described pixel electrode region of described 2nd photoresist material part reserve area, other regions corresponding, region removed completely by described photoresist material,
Adopt etching technics to etch away chock insulator matter material layer and the transparent conductive film that region removed completely by described photoresist material, form the figure of described pixel electrode;
Cineration technics is adopted to remove the photoresist material of described 2nd photoresist material part reserve area, and the part photoresist material of the complete reserve area of described photoresist material and described first photoresist material part reserve area;
Etching technics is adopted to etch away the chock insulator matter material layer of described 2nd photoresist material part reserve area;
Cineration technics is adopted to remove the photoresist material of described first photoresist material part reserve area, and the part photoresist material of the complete reserve area of described photoresist material;
Adopt etching technics to etch away the part chock insulator matter material layer of described first photoresist material part reserve area, form the figure of described auxiliary chock insulator matter;
Peel off remaining photoresist material, expose the figure of described main chock insulator matter.
Preferably, also comprise before the step of the described figure being formed pixel electrode and chock insulator matter by composition technique:
Form thin film transistor;
Forming the figure of passivation layer, what described passivation layer was formed the drain electrode for connecting pixel electrode and thin film transistor crosses hole;
Wherein, the projection of described chock insulator matter on described array substrate is positioned at and described crosses region, hole.
The present invention also provides a kind of array substrate, adopts aforesaid method to be made, and described array substrate comprises:
Pixel electrode;
Chock insulator matter, is arranged on described pixel electrode.
Preferably, described chock insulator matter comprises main chock insulator matter and auxiliary chock insulator matter.
Preferably, described array substrate also comprises:
Thin film transistor;
Passivation layer, is arranged on described thin film transistor, and what described passivation layer had the drain electrode for connecting described pixel electrode and described thin film transistor crosses hole;
Wherein, the projection of described chock insulator matter on described array substrate is positioned at and described crosses region, hole.
Preferably, described chock insulator matter is cylindrical spacer, and the cross section of described chock insulator matter is sexangle.
The present invention also provides a kind of display panel, comprises the array substrate and color membrane substrates that are arranged by box, and described array substrate is above-mentioned array substrate.
Preferably, described array substrate comprises: thin film transistor; Passivation layer, is arranged on described thin film transistor, and what described passivation layer had the drain electrode for connecting described pixel electrode and described thin film transistor crosses hole; The projection of described chock insulator matter on array substrate is positioned at described region, hole excessively;
The region of the corresponding described chock insulator matter on described color membrane substrates is provided with black matrix.
The present invention also provides a kind of display unit, comprises above-mentioned display panel.
The useful effect of the technique scheme of the present invention is as follows:
In the embodiment of the present invention, chock insulator matter is formed in array substrate side, and formed by a composition technique with the pixel electrode on array substrate, namely using a mask, just can make the figure of pixel electrode and chock insulator matter simultaneously, color membrane substrates side is then without the need to forming chock insulator matter, decrease a composition technique, use a mask less, and save the material that composition is used, thus reduce the cost of manufacture of the display panel comprising this array substrate. In addition, the hole excessively for connecting pixel electrode and drain electrode that also can be used for filling on the passivation layer of array substrate for making the material of chock insulator matter, reduced the section caused in hole poor, improve the Flatness of array substrate, can improving the coating effect of alignment films further, the orientations such as the stain that minimizing causes because crossing hole are bad.
Accompanying drawing explanation
Fig. 1-Fig. 4 is the formation pixel electrode of the embodiment of the present invention one and the method schematic diagram of the figure of chock insulator matter;
Fig. 5-Figure 13 is the formation pixel electrode of the embodiment of the present invention two and the method schematic diagram of the figure of chock insulator matter;
Figure 14 is a structural representation of the array substrate of the embodiment of the present invention;
Figure 15 is another structural representation of the array substrate of the embodiment of the present invention.
Embodiment
Display panels of the prior art comprises: array substrate and color membrane substrates, and last mask that array substrate uses is generally the mask of pixel electrode, and, last mask that color membrane substrates uses is generally the mask of chock insulator matter.
For solving the many problems of mask quantity that display panels of the prior art uses, the embodiment of the present invention provides the making method of a kind of array substrate, comprising: the figure being formed pixel electrode and chock insulator matter by composition technique.
That is, in the embodiment of the present invention, chock insulator matter is formed in array substrate side, and is formed by a composition technique with the pixel electrode on array substrate, namely a mask is used, just can making the figure of pixel electrode and chock insulator matter, color membrane substrates side, then without the need to forming chock insulator matter, decreases a composition technique simultaneously, use a mask less, and save the material that composition is used, such as photoresist material, thus reduce the cost of manufacture of the display panel comprising this array substrate.
In addition, the hole excessively for connecting pixel electrode and drain electrode that also can be used for filling on the passivation layer of array substrate for making the material of chock insulator matter, reduced the section caused in hole poor, improve the Flatness of array substrate, can improving the coating effect of alignment films further, the orientations such as the stain that minimizing causes because crossing hole are bad.
Preferably, in the embodiment of the present invention, chock insulator matter comprises main chock insulator matter and auxiliary chock insulator matter, wherein, the height of main chock insulator matter is greater than the height of auxiliary chock insulator matter, wherein, under normal circumstances, the box of main chock insulator matter maintenance medium LCD panel is thick, and auxiliary chock insulator matter is played a supporting role when main chock insulator matter is compressed to a certain degree.
In the embodiment of the present invention, pixel electrode can adopt the transparent conductive oxide material such as ITO (tin indium oxide) or IZO (indium zinc oxide) to make.
In the embodiment of the present invention, chock insulator matter can adopt the good material of the elasticity such as photoresist material, resin to make. Certainly, it is also possible to adopt the material of other types to make.
When being differing materials for chock insulator matter below, formed by composition technique pixel electrode and chock insulator matter figure method citing be described.
<embodiment one>
In the present embodiment, chock insulator matter comprises main chock insulator matter and auxiliary chock insulator matter, and chock insulator matter adopts photoresist material to make.
Please refer to Fig. 1-Fig. 4, the method for the formation pixel electrode of the embodiment of the present invention one and the figure of chock insulator matter comprises the following steps:
Step S11: please refer to Fig. 1, forms transparent conductive film 101 and photoresist layer 102 successively;
Described transparent conductive film 101 can adopt the transparent conductive oxide materials such as ITO or IZO to make.
Step S12: please refer to Fig. 2, utilize a mask 201, described photoresist layer 102 is exposed and develops, form the complete reserve area 102a of photoresist material, first photoresist material part reserve area 102b, region removed completely by 2nd photoresist material part reserve area 102c and photoresist material, wherein, the transmittance of the mask region 201c that the transmittance of the mask region 201b that described first photoresist material part reserve area 102b is corresponding is corresponding from described 2nd photoresist material part reserve area 102c is different, so that the first photoresist material part reserve area 102b is different with the thickness of the photoresist material of the 2nd photoresist material part reserve area 102c, the corresponding described main chock insulator matter region of described photoresist material complete reserve area 102a, the corresponding described auxiliary chock insulator matter region of described first photoresist material part reserve area 102b, the corresponding described pixel electrode region of described 2nd photoresist material part reserve area 102c, other regions corresponding, region removed completely by described photoresist material,
The photoresist material for the formation of chock insulator matter in the embodiment of the present invention can be positive photoresist, it is possible to think negative photoresist. When photoresist material is positive photoresist, the transmittance of mask region 201b is less than the transmittance of mask region 201c. When photoresist material is negative photoresist, the transmittance of mask region 201b is greater than the transmittance of mask region 201c. Thus so that the thickness that the thickness of the photoresist material of the first photoresist material part reserve area 102b is greater than the photoresist material of the 2nd photoresist material part reserve area 102c is different.
As can be seen from Figure 2, the thickness of the photoresist material of photoresist material complete reserve area 102a is the highest, the thickness of the photoresist material of the first photoresist material part reserve area 102b is less than the thickness of the photoresist material of the complete reserve area 102a of photoresist material, is greater than the thickness of the photoresist material of the 2nd photoresist material part reserve area 102c.
In the embodiment of the present invention, the photoresist material in the photoresist material region that main chock insulator matter is corresponding retains completely, certainly, in some other embodiment of the present invention, the photoresist material in the photoresist material region that main chock insulator matter is corresponding can also be the same with the photoresist material region that auxiliary chock insulator matter and pixel electrode are corresponding, is that part retains. As long as the thickness of the photoresist material in the photoresist material region finally making winner's chock insulator matter corresponding is the highest, the thickness of the photoresist material in auxiliary chock insulator matter and photoresist material region corresponding to pixel electrode reduces successively.
Step S13: please refer to Fig. 3, adopts etching technics to etch away the transparent conductive film that region removed completely by described photoresist material, forms the figure of described pixel electrode 1011;
Step S14: please refer to Fig. 4, cineration technics is adopted to remove the photoresist material of described 2nd photoresist material part reserve area 102c, remove the part photoresist material of the complete reserve area 102a of described photoresist material, form the figure of described main chock insulator matter 1021, and remove the part photoresist material of described first photoresist material part reserve area 102b, form the figure of described auxiliary chock insulator matter 1022.
In the embodiment of the present invention, adopting photoresist material to form chock insulator matter, processing step is simple, and cost is lower.
<embodiment two>
In the present embodiment, chock insulator matter comprises main chock insulator matter and auxiliary chock insulator matter, and chock insulator matter adopts non-lithographic material to make, such as common resin.
Please refer to Fig. 5-Figure 13, the method for the formation pixel electrode of the embodiment of the present invention two and the figure of chock insulator matter comprises the following steps:
Step S21: please refer to Fig. 5, forms transparent conductive film 101 and chock insulator matter material layer 103 successively;
Step S22: please refer to Fig. 6, applies photoresist layer 102 on described chock insulator matter material layer 103;
Step S23: please refer to Fig. 7, utilize a mask 201, described photoresist layer 102 is exposed and develops, form the complete reserve area 102a of photoresist material, first photoresist material part reserve area 102b, region removed completely by 2nd photoresist material part reserve area 102c and photoresist material, wherein, the transmittance of the mask region 201c that the transmittance of the mask region 201b that described first photoresist material part reserve area 102b is corresponding is corresponding from described 2nd photoresist material part reserve area 102c is different, so that the first photoresist material part reserve area 102b is different with the thickness of the photoresist material of the 2nd photoresist material part reserve area 102c, the corresponding described main chock insulator matter region of described photoresist material complete reserve area 102a, the corresponding described auxiliary chock insulator matter region of described first photoresist material part reserve area 102b, the corresponding described pixel electrode region of described 2nd photoresist material part reserve area 102c, other regions corresponding, region removed completely by described photoresist material,
Photoresist material in the embodiment of the present invention can be positive photoresist, it is possible to think negative photoresist. When photoresist material is positive photoresist, the transmittance of mask region 201b is less than the transmittance of mask region 201c. When photoresist material is negative photoresist, the transmittance of mask region 201b is greater than the transmittance of mask region 201c. Thus so that the thickness that the thickness of the photoresist material of the first photoresist material part reserve area 102b is greater than the photoresist material of the 2nd photoresist material part reserve area 102c is different.
As can be seen from Figure 7, the thickness of the photoresist material of photoresist material complete reserve area 102a is the highest, the thickness of the photoresist material of the first photoresist material part reserve area 102b is less than the thickness of the photoresist material of the complete reserve area 102a of photoresist material, is greater than the thickness of the photoresist material of the 2nd photoresist material part reserve area 102c.
In the embodiment of the present invention, the photoresist material in the photoresist material region that main chock insulator matter is corresponding retains completely, certainly, in some other embodiment of the present invention, the photoresist material in the photoresist material region that main chock insulator matter is corresponding can also be the same with the photoresist material region that auxiliary chock insulator matter and pixel electrode are corresponding, is that part retains. As long as the thickness of the photoresist material in the photoresist material region finally making winner's chock insulator matter corresponding is the highest, the thickness of the photoresist material in auxiliary chock insulator matter and photoresist material region corresponding to pixel electrode reduces successively.
Step S24: please refer to Fig. 8, adopts etching technics to etch away chock insulator matter material layer and the transparent conductive film that region removed completely by described photoresist material, forms the figure of described pixel electrode 1011;
Step S25: please refer to Fig. 9, adopts cineration technics to remove the photoresist material of described 2nd photoresist material part reserve area 102c, and the part photoresist material of described photoresist material complete reserve area 102a and described first photoresist material part reserve area 102b;
Step S26: please refer to Figure 10, adopts etching technics to etch away the chock insulator matter material layer of described 2nd photoresist material part reserve area 102c;
Step S27: please refer to Figure 11, adopts cineration technics to remove the photoresist material 102b of described first photoresist material part reserve area, and the part photoresist material of the complete reserve area 102a of described photoresist material;
Step S28: please refer to Figure 12, adopts etching technics to etch away the part chock insulator matter material layer of described first photoresist material part reserve area 102b, forms the figure of described auxiliary chock insulator matter 1022;
Step S29: please refer to Figure 13, peels off remaining photoresist material, exposes the figure of described main chock insulator matter 1021.
In the embodiment of the present invention, non-lithographic material is adopted to form chock insulator matter so that the possibility of the material that chock insulator matter can use is more various.
In above-described embodiment, all to comprise main chock insulator matter and the chock insulator matter of auxiliary chock insulator matter two kinds of height, the method for the formation pixel electrode in the embodiment of the present invention and chock insulator matter is described. Certainly, in some other embodiment of the present invention, the situation of the chock insulator matter only comprising a kind of height is not got rid of yet, in the embodiment of chock insulator matter only comprising a kind of height, making processes can adopt existing the intermediate tone mask version or the gray tone mask that comprise complete printing opacity region, part printing opacity region and complete occlusion area, forming pixel electrode and chock insulator matter, idiographic flow illustrates no longer one by one.
In the making method of the array substrate of the embodiment of the present invention, also comprised before the step of figure forming pixel electrode and chock insulator matter: form thin film transistor and form the step of the figure of passivation layer, wherein, what described passivation layer is formed with the drain electrode for connecting pixel electrode and thin film transistor crosses hole. The hole excessively for connecting pixel electrode and drain electrode filling on the passivation layer of array substrate is can be used for for making the material of chock insulator matter, reduced the section caused in hole poor, improve the Flatness of array substrate, can improving the coating effect of alignment films further, the orientations such as the stain that minimizing causes because crossing hole are bad.
Preferably, described chock insulator matter is formed in described crosses region, hole, and namely the projection of chock insulator matter on array substrate is positioned at and described crosses region, hole, thus can arrange black matrix in region corresponding to the chock insulator matter on color membrane substrates, prevent chock insulator matter region light leak, and do not affect display.
The embodiment of the present invention also provides a kind of array substrate, adopts the method described in above-mentioned any embodiment to be made, and described array substrate comprises: pixel electrode and chock insulator matter, and described chock insulator matter is arranged on described pixel electrode.
Preferably, the chock insulator matter in the embodiment of the present invention comprises main chock insulator matter and auxiliary chock insulator matter.
The array substrate of the embodiment of the present invention can also comprise:
Thin film transistor and passivation layer, passivation layer is arranged on described thin film transistor, and what described passivation layer had the drain electrode for connecting described pixel electrode and described thin film transistor crosses hole;
The hole excessively for connecting pixel electrode and drain electrode filling on the passivation layer of array substrate is can be used for for making the material of chock insulator matter, reduced the section caused in hole poor, improve the Flatness of array substrate, can improving the coating effect of alignment films further, the orientations such as the stain that minimizing causes because crossing hole are bad.
Preferably, described chock insulator matter is arranged on described crosses region, hole, and namely the projection of chock insulator matter on array substrate is positioned at and described crosses region, hole, thus can arrange black matrix in region corresponding to the chock insulator matter on color membrane substrates, prevent chock insulator matter region light leak, and do not affect display.
Please refer to Figure 14, Figure 14 is a structural representation of the array substrate of the embodiment of the present invention, and described array substrate comprises pixel electrode 1011 and chock insulator matter 1020, and wherein, chock insulator matter 1020 is positioned at the hole location excessively for connecting pixel electrode and drain electrode. Chock insulator matter 1020 in the embodiment of the present invention is cylindrical spacer, and the cross section of described chock insulator matter is sexangle.
In some other embodiment of the present invention, the cross section of chock insulator matter can also be circular, oval, square, rectangle, rhombus or other irregular figures etc.
In the other embodiment of the present invention, chock insulator matter can also be spherical chock insulator matter.
Main chock insulator matter and the distribution situation of auxiliary chock insulator matter in the various embodiments described above can set as required, such as, and main chock insulator matter and auxiliary chock insulator matter space set, or, in a region, comprise a main chock insulator matter, multiple auxiliary chock insulator matter etc.
Accompanying drawing 14 corresponding to above-described embodiment is owing to being vertical view, and being thus difficult to embody chock insulator matter by being used for connecting crossing hole and filling smooth effect of pixel electrode and drain electrode, can be described below in conjunction with accompanying drawing 15.
Please refer to Figure 15, Figure 15 is another structural representation of the array substrate of the embodiment of the present invention, described array substrate comprises underlay substrate 301, thin film transistor, passivation layer 303, pixel electrode 1011 and chock insulator matter 1020, wherein, thin film transistor comprises gate electrode 3021, gate insulation layer 3022, active layer 3023, source electrode 3024 and drain electrode 3025, described passivation layer 303 was provided with hole 3031, pixel electrode 1011 passed through hole 3031 and was connected with drain electrode 3025, and, chock insulator matter 1020 was arranged at region, hole 3031.
As can be seen from Figure 15, chock insulator matter 1020 can be filled smooth by crossing hole 3031, thus improves the Flatness of array substrate, can improve the coating effect of follow-up alignment films further, and the orientations such as the stain that minimizing causes because crossing hole are bad.
The embodiment of the present invention also provides a kind of display panel, comprises the array substrate and color membrane substrates that are arranged by box, and described array substrate is the array substrate in above-mentioned any embodiment.
Preferably, the array substrate of the embodiment of the present invention can also comprise:
Thin film transistor;
Passivation layer, is arranged on described thin film transistor, and what described passivation layer had the drain electrode for connecting described pixel electrode and described thin film transistor crosses hole;
Described chock insulator matter is arranged on described crosses region, hole, and namely the projection of chock insulator matter on array substrate is positioned at and described crosses region, hole.
The region of the corresponding described chock insulator matter on described color membrane substrates is provided with black matrix, to prevent chock insulator matter region light leak, and do not affect display.
The embodiment of the present invention also provides a kind of display unit, comprises above-mentioned display panel.
The above is the preferred embodiment of the present invention; it is noted that for those skilled in the art, under the prerequisite not departing from principle of the present invention; can also making some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (12)
1. the making method of an array substrate, it is characterised in that, comprising:
By the figure of a composition technique formation pixel electrode and chock insulator matter.
2. the making method of array substrate according to claim 1, it is characterised in that, described chock insulator matter comprises main chock insulator matter and auxiliary chock insulator matter.
3. the making method of array substrate according to claim 2, it is characterised in that, the step of the described figure forming pixel electrode and chock insulator matter by composition technique comprises:
Form transparent conductive film and photoresist layer successively;
Utilize a mask, described photoresist layer is exposed and develops, form the complete reserve area of photoresist material, first photoresist material part reserve area, region removed completely by 2nd photoresist material part reserve area and photoresist material, wherein, the transmittance in the mask region that the transmittance in the mask region that described first photoresist material part reserve area is corresponding is corresponding from described 2nd photoresist material part reserve area is different, the corresponding described main chock insulator matter region of the complete reserve area of described photoresist material, the corresponding described auxiliary chock insulator matter region of described first photoresist material part reserve area, the corresponding described pixel electrode region of described 2nd photoresist material part reserve area, other regions corresponding, region removed completely by described photoresist material,
Adopt etching technics to etch away the transparent conductive film that region removed completely by described photoresist material, form the figure of described pixel electrode;
Cineration technics is adopted to remove the photoresist material of described 2nd photoresist material part reserve area, remove the part photoresist material of the complete reserve area of described photoresist material, form the figure of described main chock insulator matter, and remove the part photoresist material of described first photoresist material part reserve area, form the figure of auxiliary chock insulator matter.
4. the making method of array substrate according to claim 2, it is characterised in that, the step of the described figure forming pixel electrode and chock insulator matter by composition technique comprises:
Form transparent conductive film and chock insulator matter material layer successively;
Described chock insulator matter material layer applies photoresist layer;
Utilize a mask, described photoresist layer is exposed and develops, form the complete reserve area of photoresist material, first photoresist material part reserve area, region removed completely by 2nd photoresist material part reserve area and photoresist material, wherein, the transmittance in the mask region that the transmittance in the mask region that described first photoresist material part reserve area is corresponding is corresponding from described 2nd photoresist material part reserve area is different, the corresponding described main chock insulator matter region of the complete reserve area of described photoresist material, the corresponding described auxiliary chock insulator matter region of described first photoresist material part reserve area, the corresponding described pixel electrode region of described 2nd photoresist material part reserve area, other regions corresponding, region removed completely by described photoresist material,
Adopt etching technics to etch away chock insulator matter material layer and the transparent conductive film that region removed completely by described photoresist material, form the figure of described pixel electrode;
Cineration technics is adopted to remove the photoresist material of described 2nd photoresist material part reserve area, and the part photoresist material of the complete reserve area of described photoresist material and described first photoresist material part reserve area;
Etching technics is adopted to etch away the chock insulator matter material layer of described 2nd photoresist material part reserve area;
Cineration technics is adopted to remove the photoresist material of described first photoresist material part reserve area, and the part photoresist material of the complete reserve area of described photoresist material;
Adopt etching technics to etch away the part chock insulator matter material layer of described first photoresist material part reserve area, form the figure of described auxiliary chock insulator matter;
Peel off remaining photoresist material, expose the figure of described main chock insulator matter.
5. the making method of array substrate according to the arbitrary item of claim 1-4, it is characterised in that, also comprise before the step of the described figure being formed pixel electrode and chock insulator matter by composition technique:
Form thin film transistor;
Forming the figure of passivation layer, what described passivation layer was formed the drain electrode for connecting pixel electrode and thin film transistor crosses hole;
Wherein, the projection of described chock insulator matter on described array substrate is positioned at and described crosses region, hole.
6. an array substrate, it is characterised in that, comprising:
Pixel electrode and chock insulator matter, wherein, described chock insulator matter is arranged on described pixel electrode.
7. array substrate according to claim 6, it is characterised in that, also comprise:
Thin film transistor;
Passivation layer, is arranged on described thin film transistor, and what described passivation layer had the drain electrode for connecting described pixel electrode and described thin film transistor crosses hole;
Wherein, the projection of described chock insulator matter on described array substrate is positioned at and described crosses region, hole.
8. array substrate according to claim 6, it is characterised in that, described chock insulator matter comprises main chock insulator matter and auxiliary chock insulator matter.
9. array substrate according to the arbitrary item of claim 6-8, it is characterised in that, described chock insulator matter is cylindrical spacer, and the cross section of described chock insulator matter is sexangle.
10. a display panel, it is characterised in that, comprise the array substrate and color membrane substrates that are arranged by box, described array substrate is the array substrate as described in item as arbitrary in claim 6-9.
11. display panels according to claim 10, it is characterised in that,
Described array substrate comprises: thin film transistor; Passivation layer, is arranged on described thin film transistor, and what described passivation layer had the drain electrode for connecting described pixel electrode and described thin film transistor crosses hole; The projection of described chock insulator matter on array substrate is positioned at described region, hole excessively;
The region of the corresponding described chock insulator matter on described color membrane substrates is provided with black matrix.
12. 1 kinds of display unit, it is characterised in that, comprise the display panel as described in claim 10 or 11.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610203563.XA CN105629615A (en) | 2016-04-01 | 2016-04-01 | Array substrate and manufacture method thereof, display panel and display device |
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| CN201610203563.XA CN105629615A (en) | 2016-04-01 | 2016-04-01 | Array substrate and manufacture method thereof, display panel and display device |
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| CN105629615A true CN105629615A (en) | 2016-06-01 |
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| CN201610203563.XA Pending CN105629615A (en) | 2016-04-01 | 2016-04-01 | Array substrate and manufacture method thereof, display panel and display device |
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| CN106653774A (en) * | 2017-01-04 | 2017-05-10 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method thereof, mask plate and display device |
| CN106681069A (en) * | 2017-01-03 | 2017-05-17 | 京东方科技集团股份有限公司 | Display baseplate, preparation method for same, and display device |
| CN112859454A (en) * | 2021-02-26 | 2021-05-28 | Tcl华星光电技术有限公司 | Display panel, manufacturing method thereof and display device |
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| CN104880878A (en) * | 2015-06-19 | 2015-09-02 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method thereof and display device |
| CN105892180A (en) * | 2015-02-13 | 2016-08-24 | 株式会社日本显示器 | Liquid crystal display device |
| CN205827023U (en) * | 2016-07-05 | 2016-12-21 | 厦门天马微电子有限公司 | Display panels and liquid crystal indicator |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105892180A (en) * | 2015-02-13 | 2016-08-24 | 株式会社日本显示器 | Liquid crystal display device |
| CN104880878A (en) * | 2015-06-19 | 2015-09-02 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method thereof and display device |
| CN205827023U (en) * | 2016-07-05 | 2016-12-21 | 厦门天马微电子有限公司 | Display panels and liquid crystal indicator |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106681069A (en) * | 2017-01-03 | 2017-05-17 | 京东方科技集团股份有限公司 | Display baseplate, preparation method for same, and display device |
| CN106653774A (en) * | 2017-01-04 | 2017-05-10 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method thereof, mask plate and display device |
| CN106653774B (en) * | 2017-01-04 | 2019-12-24 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof, mask and display device |
| CN112859454A (en) * | 2021-02-26 | 2021-05-28 | Tcl华星光电技术有限公司 | Display panel, manufacturing method thereof and display device |
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