CN105575823A - Fabrication method of fan-out package structure for semiconductor device - Google Patents
Fabrication method of fan-out package structure for semiconductor device Download PDFInfo
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- CN105575823A CN105575823A CN201510996030.7A CN201510996030A CN105575823A CN 105575823 A CN105575823 A CN 105575823A CN 201510996030 A CN201510996030 A CN 201510996030A CN 105575823 A CN105575823 A CN 105575823A
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- semiconductor device
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- monomer
- packaging structure
- cylindrical member
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the bump connector during or after the bonding process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
The invention discloses a fabrication method of a fan-out package structure for a semiconductor device. The method comprises the following steps: fabricating a columnar bump monomer of the semiconductor device and a rewiring substrate; arranging the columnar bump monomer of the semiconductor device on the rewiring substrate in an inverted manner; and executing resin filling in a reflux manner, wherein the step of fabricating the rewiring substrate comprises the following steps: forming a polymer layer on the surface of a support plate and forming a plurality of openings on the polymer layer; coating the front surface of the polymer layer with a photosensitive film, carrying out exposure and development on the photosensitive film to form a pattern; forming rewiring metal plates on the surface of the polymer layer and in the first openings by an electroplating method, and matching the thicknesses of the rewiring metal plates according to currents required by chips in the columnar bump monomer of the semiconductor device; and forming solder bumps on the rewiring metal plates. With the support plate as a seed layer, the support plate can be directly eliminated after the rewiring substrate is formed; the thicknesses of the rewiring metal plates can be matched according to the currents required by chips in the columnar bump monomer of the semiconductor device; and the interval between every two rewiring metal plates is further reduced, so that the package precision is improved.
Description
Technical field
The present invention relates to semiconductor packages field, be specifically related to a kind of manufacture method of semiconductor device fan-out packaging structure.
Background technology
In recent years, semiconductor device cost reduce and front road wafer manufacturing process lifting common promotion under, achieve the target that the monomer chip size of the semiconductor device of said function is more and more less, can cause on semiconductor device more and more less for the pitch between external electrode like this, the semiconductor device column structure for flip chip bonding originally easily causes the bridge joint between electrode thus causes semiconductor device failure.Meanwhile, present semiconductor device to avoiding Alpha-ray radiation effect, between salient point and upside-down mounting carrier and the aspect such as the adhesion intensity of salient point and chip there has also been more and more taller and bigger requirement.
Fig. 1 is existing semiconductor device columnar bump structure; chip 101 has electrode 102; chip 101 and electrode 102 are optionally coated with the passivation layer 103 that the material such as silica or silicon nitride is formed, passivation layer 103 selectively forms the protective layers 209 such as one deck polyimides (PI) or polybenzoxazoles (PBO) again.Then by Graphic transitions method that semiconductor is conventional, utilize sputtering to add electroplating technique and form ubm layer UBM and plated metal solder 212 on semi-conducting electrode surface, the metal level 210 that typical UBM is made up of the titanium layer sputtered and layers of copper and electroless nickel layer 211 form, form spherical salient point after brazing metal 212 refluxes, last upside-down mounting forms the existing flip chip packaging structure shown in Fig. 1 on substrate.
Although this flip chip packaging structure structurally meets the requirement of flip chip packaging structure, but easily cause the bridge joint between electrode, between salient point and upside-down mounting carrier and salient point and chip junction easily crack, thus cause semiconductor device failure.Meanwhile, the semiconductor device failure that in plated metal solder 212, alpha ray causes the impact of circuit in chip 101 is not avoided to the full extent yet.
Summary of the invention
In view of above-mentioned defect of the prior art or deficiency, expect to provide a kind of manufacture method being not easy to cause the semiconductor device fan-out packaging structure of semiconductor device failure.
The invention provides a kind of manufacture method of semiconductor device fan-out packaging structure, comprising:
Making semiconductor device columnar bump monomer and again circuit board, by the upside-down mounting of described semiconductor device columnar bump monomer on described circuit board again, and resin filling is implemented in backflow; Wherein, described in making, circuit board comprises again:
Form polymer layer on support plate surface, described polymer layer is formed multiple first opening;
Coat light-sensitive surface in the front of described polymer layer, exposure imaging is carried out to described light-sensitive surface and forms pattern;
Electro-plating method is adopted to form wiring metal plate again in the surface of described polymer layer and described first opening, electric current needed for the chip in described semiconductor device columnar bump monomer of the thickness of the described plate of wiring metal again and mating;
The described plate of wiring metal again forms solder bump.
Compared with prior art, the invention has the beneficial effects as follows:
The manufacture method of semiconductor fan-out packaging structure provided by the invention, by forming the figuratum polymer layer of band on support plate, and coats on its surface and carries out photoetching development, and then connect up circuit board more again that formed in the present invention.Wherein, form Seed Layer with support plate alternate physical CVD (Chemical Vapor Deposition) method, do not need after being formed to remove unnecessary Seed Layer by the method for corrosion at circuit board again; The fan-out formed by the plating thickness that wiring metal plate can be corresponding to the design requirement coupling of size of current according to semiconductor device again, and the interval between two again between wiring metal plate reduces further, is conducive to improving envelope precision.Semiconductor device fan-out packaging structure prepared by the present invention, the stress at bump structure and semiconductor chip binding site place can be alleviated by the first metal column and the second metal column, solve and easily cause lead rupture because thermal expansion is uneven, cause the problem of semiconductor device failure.
Accompanying drawing explanation
By reading the detailed description done non-limiting example done with reference to the following drawings, the other features, objects and advantages of the application will become more obvious:
The flip chip packaging structure schematic diagram of Fig. 1 for providing in prior art.
The schematic flow sheet of the formation that Fig. 2 provides for embodiment of the present invention circuit board again;
The schematic flow sheet of the formation semiconductor device columnar bump monomer that Fig. 3 provides for the embodiment of the present invention;
The schematic flow sheet of the formation semiconductor fan-out packaging structure that Fig. 4 provides for the embodiment of the present invention;
The process schematic of the formation that Fig. 5-Fig. 8 provides for embodiment of the present invention circuit board again;
The process schematic of the formation semiconductor device columnar bump monomer that Fig. 9-Figure 15 provides for the embodiment of the present invention;
The sectional view of the semiconductor device columnar bump monomer upside-down mounting that Figure 16 provides for the embodiment of the present invention on circuit board again;
Sectional view after the resin filling that Figure 17 provides for the embodiment of the present invention;
The structural representation of the monomer of the semiconductor device fan-out packaging structure that Figure 18 provides for the embodiment of the present invention;
Figure 19 provides the structural representation of the monomer of semiconductor device fan-out packaging structure for another embodiment of the present invention.
Embodiment
Below in conjunction with drawings and Examples, the application is described in further detail.Be understandable that, specific embodiment described herein is only for explaining related invention, but not the restriction to this invention.It also should be noted that, for convenience of description, illustrate only in accompanying drawing and invent relevant part.
It should be noted that, when not conflicting, the embodiment in the application and the feature in embodiment can combine mutually.Below with reference to the accompanying drawings and describe the application in detail in conjunction with the embodiments.
One embodiment of the invention provide a kind of manufacture method of semiconductor device fan-out packaging structure, comprising: making semiconductor device columnar bump monomer and again circuit board; By the upside-down mounting of described semiconductor device columnar bump monomer on described circuit board again; And resin filling is implemented in backflow; Wherein, as shown in Figure 2, make again circuit board to comprise the steps:
S101: form polymer layer on support plate surface, polymer layer is formed multiple first opening;
S102: coat light-sensitive surface in the front of polymer layer, carries out exposure imaging to light-sensitive surface and forms pattern;
S103: adopt electro-plating method to form wiring metal plate again in the surface of polymer layer and the first opening, then the electric current of the thickness of wiring metal plate needed for the chip in semiconductor device columnar bump monomer and mating;
S104: form solder bump on wiring metal plate again.
See Fig. 5, implementation step S101, forms polymer layer on support plate 601 surface, polymer layer 602 is formed multiple first opening 602a; Wherein, polymer layer is one layer of polymeric, and support plate can be preferably layer protecting film, can form multiple first opening by the technique of image transfer and dry etching on polymer layer.
Then implementation step S102, coats light-sensitive surface 603 in the front of polymer layer 602, carries out exposure imaging and forms pattern, as shown in Figure 6 to light-sensitive surface;
As shown in Figure 7, implementation step S103, adopts electro-plating method to form wiring metal plate 604 again in the surface of polymer layer 602 and the first opening, then the electric current of the thickness of wiring metal plate needed for the chip in semiconductor device columnar bump monomer and mating.
Then implementation step S104, wiring metal plate 604 again forms solder bump 605, and form circuit board more as shown in Figure 8, solder bump is for connecting the link of semiconductor device.
Optionally, when adopting electro-plating method to form again wiring metal plate 604 in polymer layer 602 surface and the first opening 602a, wiring metal plate 604 is included in the metal end 604a formed in the first opening and the metal wiring layer 604b again formed on polymer layer surface again, then on metal again wiring layer 604b, forms solder bump 605.Wherein, between two again wiring metal plate close on end face be spaced apart 7um, then the thickness of wiring metal plate is 3-15um, while the electrical property ensureing semiconductor device, reduces the interval between two again between wiring metal plate, improves packaging density further.
By the plate of wiring metal again that plating is formed in the present invention, have higher fusing point and good conductivity in order to ensure it, then wiring metal plate preferably connects up copper coin again, metal end is preferably copper termination, and metal again wiring layer is preferably copper wiring layer again.
Next introduce the forming process of semiconductor device columnar bump monomer further, with reference to Fig. 3, comprise the steps:
S201: form electrode on chip;
S202: on chip and electrode, optionally passivation layer is set, and expose the local surfaces of electrode;
S203: form insulating hollow cylindrical member in passivation layer surface;
S204: at local surfaces and the chip surface formation metal level of insulating hollow cylindrical member surface, electrode;
S205: form photoresist on the surface of metal level, form the second opening by photoetching on a photoresist;
S206: form the first metal column in insulating hollow cylindrical member, forms the second metal column in the second opening of photoresist;
S207: photoresist and the metal level of removing insulating hollow cylindrical member periphery;
S208: cut into the semiconductor device monomer with columnar bump.
And then the semiconductor device columnar bump monomer formed as shown in figure 15.
Implementation step S201, chip 101 is formed electrode 102; Then implementation step S202, chip and electrode optionally arrange passivation layer 103, and passivation layer 103 has opening to expose the local surfaces of electrode 102, as shown in Figure 9, wherein passivation layer is formed by the material such as silica or silicon nitride.
Then, implementation step S203, insulating hollow cylindrical member is formed on the surface of passivation layer 103, concrete, with reference to Figure 10 and Figure 11, form one layer of polymeric 201 on the surface of passivation layer 103, more selectively form insulating hollow cylindrical member 205, insulating hollow cylindrical member is formed by the technique of image transfer and dry etching.
Further, in semiconductor device columnar bump monomer, electrode is two, each electrode is equipped with insulating hollow cylindrical member, and two insulating hollow cylindrical member are separated from each other.
The height of insulating hollow cylindrical member is 5-20um; And/or
The internal diameter 8-20um less of the opening of passivation layer on electrode of insulating hollow cylindrical member; And/or
The large 8-200um of external diameter of the outer diameter ratio electrode of insulating hollow cylindrical member.
Then implementation step S204, forms metal level 301, with reference to Figure 12 by physical gas-phase deposite methods such as sputterings at insulating hollow cylindrical member surface, the local surfaces of electrode and chip surface.Metal level 301, the titanium coating preferably playing adhesive attraction and the copper metal layer playing electric action are laminated, and titanium coating surface arranges copper metal layer.
Following implementation step S205, forms photoresist on the surface of metal level, forms the second opening on a photoresist by photoetching.Concrete, form photoresist 401 at the surface integral of metal level 301, form the second opening by photoetching; Wherein the second opening comprises opening 402 in insulating hollow cylindrical member and photoresist opening 403, with reference to Figure 13.
Then implementation step S206, as shown in figure 14, the Graphic transitions method conventional by semiconductor and electroplating technology form the first metal column 502 in insulating hollow cylindrical member, form the second metal column 503 in photoresist opening.The surface of copper metal layer is stacked is provided with the first metal column and the second metal column, and the surface of the first metal column arranges the second metal column.The column structure of the first metal column 502 is highly the column structure of 4.5-19.5um, the second metal column 503, is highly 35-115um, and the diameter of the first metal column 502 is less than the diameter of the second metal column 503, and the first metal column and the second metal column are copper post.
Next, with reference to the schematic flow sheet of the formation semiconductor device fan-out packaging structure shown in Fig. 4, form semiconductor device fan-out packaging structure and specifically comprise the steps:
S301: by the upside-down mounting of semiconductor device columnar bump monomer on circuit board again;
S302: the solder bump reflow soldering on metal wiring layer surface again;
S303: potting resin;
S304: remove support plate;
S305: the monomer cutting into semiconductor device fan-out packaging structure.
As shown in figure 16, by institute's semiconductor device columnar bump monomer upside-down mounting on described circuit board again, wherein, the second metal column 503 connects described solder bump 605; Then, solder bump refluxes, and realizes being electrically connected; Then with reference to Figure 17, at the periphery of chip 101 and chip 101 and potting resin 901 between circuit board again; Remove the monomer that then support plate 601 cuts into semiconductor device fan-out packaging structure, as shown in figure 18.
With reference to a kind of semiconductor device fan-out packaging structure shown in Figure 18, comprise: polymer layer 602, polymer layer has multiple first opening, in the first opening, be provided with metal end, be provided with metal wiring layer again on the surface of polymer layer, metal again wiring layer are provided with solder bump; Semiconductor device columnar bump monomer is connected with solder bump by the second metal column, and wherein, metal end and metal again wiring layer are the plate of wiring metal again 604 in diagram.Semiconductor device columnar bump monomer comprises: chip 101, and chip is provided with electrode 102; The one side being provided with electrode at chip is provided with passivation layer 103, and passivation layer exposes the local surfaces of electrode; Insulating hollow cylindrical member 205 is provided with on the surface of passivation layer; Metal level 301 is provided with on the surface of insulating hollow cylindrical member; The surface being provided with the first metal column 502, first metal column on the surface of metal level is provided with the second metal column 503.
The present invention forms insulating hollow cylindrical member on electrode in semiconductor device, the first metal column formed in insulating hollow cylindrical member well alleviates the stress to bump structure and semiconductor chip binding site place, solve and easily cause lead rupture because thermal expansion is uneven, cause the problem of semiconductor device failure.The periphery annulus of the second metal column simultaneously on the first metal column, by contact insulating hollow cylindrical member contact semiconductor chip again, effectively alleviates the pressure of columnar bump to semiconductor chip.The material selection polyimides (PI) of edge hollow columnar part, polybenzoxazole (PBO) or benzocyclobutene (BCB).
Present invention also offers another embodiment, after the step S305 of above-described embodiment, then after microcorrosion is carried out to the surface of the metal end exposed, plant soldered ball 606 on the surface of metal end, as shown in figure 19.
According to the manufacture method of semiconductor device fan-out packaging structure provided by the invention, with the Seed Layer that support plate replaces physical gas-phase deposite method to be formed when forming again circuit board, do not need to remove unnecessary Seed Layer at circuit board again after being formed by the method for corrosion; Form fan-out wiring metal plate again by plating in encapsulation, then the thickness of circuit board according to semiconductor device to the demand of size of current matched design; And the interval reduced further between two again between wiring metal plate, both ensure the performance of semiconductor device, improve encapsulation precision simultaneously; And the stress at bump structure and semiconductor chip binding site place can be alleviated by the first metal column and the second metal column, solve and easily cause lead rupture because thermal expansion is uneven, cause the problem of semiconductor device failure.
More than describe and be only the preferred embodiment of the application and the explanation to institute's application technology principle.It will be appreciated by those skilled in the art that invention scope involved in the application, be not limited to the specific of above-mentioned technical characteristic
The technical scheme combined, also should be encompassed in when not departing from described inventive concept, other technical scheme of being carried out combination in any by above-mentioned technical characteristic or its equivalent feature and being formed simultaneously.The technical characteristic that such as, disclosed in above-mentioned feature and the application (but being not limited to) has similar functions is replaced mutually and the technical scheme formed.
Claims (10)
1. a manufacture method for semiconductor device fan-out packaging structure, is characterized in that, comprising:
Making semiconductor device columnar bump monomer and again circuit board, by the upside-down mounting of described semiconductor device columnar bump monomer on described circuit board again, and resin filling is implemented in backflow; Wherein, described in making, circuit board comprises again:
Form polymer layer on support plate surface, described polymer layer is formed multiple first opening;
Coat light-sensitive surface in the front of described polymer layer, exposure imaging is carried out to described light-sensitive surface and forms pattern;
Electro-plating method is adopted to form wiring metal plate again in the surface of described polymer layer and described first opening, electric current needed for the chip in described semiconductor device columnar bump monomer of the thickness of the described plate of wiring metal again and mating;
The described plate of wiring metal again forms solder bump.
2. the manufacture method of semiconductor device fan-out packaging structure according to claim 1, is characterized in that,
When adopting electro-plating method to form again wiring metal plate in described polymer layer surface and described first opening, the described plate of wiring metal is again included in the metal end formed in described first opening and the metal wiring layer again formed on described polymer layer surface, and described metal again wiring layer form solder bump;
Wherein, between two again wiring metal plate close on end face be spaced apart 7um, the thickness of the described plate of wiring metal is again 3-15um.
3. the manufacture method of semiconductor device fan-out packaging structure according to claim 2, is characterized in that, makes described semiconductor device columnar bump monomer and comprises:
Form electrode on the chip;
Described chip and described electrode optionally arrange passivation layer, and exposes the local surfaces of described electrode;
Insulating hollow cylindrical member is formed in described passivation layer surface;
At local surfaces and the described chip surface formation metal level of described insulating hollow cylindrical member surface, described electrode;
Form photoresist on the surface of described metal level, form the second opening by photoetching on a photoresist;
In described insulating hollow cylindrical member, form the first metal column, in the second opening of described photoresist, form the second metal column;
Remove photoresist and the metal level of insulating hollow cylindrical member periphery;
Cut into the semiconductor device monomer with columnar bump.
4. the manufacture method of semiconductor device fan-out packaging structure according to claim 3, is characterized in that,
During by the upside-down mounting of described semiconductor device columnar bump monomer on described circuit board again, described second metal column connects described solder bump, at the periphery of described chip and described chip and described potting resin between circuit board again after the backflow of described solder bump, after removing described support plate, cut into the monomer of semiconductor device fan-out packaging structure.
5. the manufacture method of semiconductor device fan-out packaging structure according to claim 4, it is characterized in that, after removing described support plate, after microcorrosion is carried out to the surface of the metal end exposed, plant soldered ball on the surface of described metal end, then cut into the monomer of semiconductor device fan-out packaging structure.
6. the manufacture method of semiconductor device fan-out packaging structure according to claim 3, is characterized in that,
Form insulating hollow cylindrical member in described passivation layer surface to comprise: form one layer of polymeric in described passivation layer surface, described passivation layer selectively forms described insulating hollow cylindrical member again;
Described in described semiconductor device columnar bump monomer, electrode is two, and each described electrode is equipped with insulating hollow cylindrical member, and two described insulating hollow cylindrical member are separated from each other.
7. the manufacture method of semiconductor device fan-out packaging structure according to claim 6, is characterized in that,
The height of described insulating hollow cylindrical member is 5-20um; And/or
The internal diameter 8-20um less of described passivation layer opening on the electrodes of described insulating hollow cylindrical member; And/or
The external diameter 8-200um larger than the external diameter of described electrode of described insulating hollow cylindrical member.
8. the manufacture method of semiconductor device fan-out packaging structure according to claim 3, is characterized in that,
Described metal level comprises titanium coating and the copper metal layer of stacked setting, and described titanium coating surface arranges described copper metal layer;
The surface of described copper metal layer is stacked is provided with described first metal column and described second metal column, and the surface of described first metal column arranges described second metal column.
9. semiconductor device fan-out packaging structure manufacture method according to claim 8, is characterized in that,
Described first metal column and described second metal column are copper post;
The height of described first metal column is 4.5-19.5mm, and/or
The height of described second metal column is 35-115um.
10. the semiconductor device fan-out packaging structure manufacture method according to any one of claim 2-9, is characterized in that,
The described plate of wiring metal is again the copper coin that connects up again, and described metal end is copper termination, and described metal again wiring layer is copper wiring layer again.
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| CN201510996030.7A CN105575823A (en) | 2015-12-24 | 2015-12-24 | Fabrication method of fan-out package structure for semiconductor device |
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| CN201510996030.7A CN105575823A (en) | 2015-12-24 | 2015-12-24 | Fabrication method of fan-out package structure for semiconductor device |
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| CN111952190A (en) * | 2019-05-16 | 2020-11-17 | 矽磐微电子(重庆)有限公司 | Semiconductor packaging method |
| CN115117012A (en) * | 2022-05-09 | 2022-09-27 | 上海沛塬电子有限公司 | Manufacturing method and application of carrier plate with metal bump structure on surface |
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